openpower/sv/rfc/ls001.po9.mdwn

   1 # External RFC ls001.po9 Allocation of new 64-bit Power ISA Encodings
   2
   3 **URLs**:
   4
   5 * <https://git.openpower.foundation/isa/PowerISA/issues/64>
   6
   7 **Severity**: Major
   8
   9 **Status**: New
  10
  11 **Date**: 29 Apr 2023. v1
  12
  13 **Target**: v3.2B
  14
  15 **Source**: v3.0B
  16
  17 **Books and Section affected**:
  18
  19 ```
  20     New Section: 1.6.5
  21     New Definitions: 1.3.1
  22 ```
  23
  24 **Summary**
  25
  26 ```
  27     Introduces a new 64-bit encoding similar to EXT1xx in PO1, in which
  28     32 new Primary Opcodes are introduced (EXT2xx), several RESERVED spaces
  29     (57-bit and at least three 32-bit), and the RISC-paradigm Prefixing
  30     concepts are introduced: SVP64 and SVP64Single.
  31 ```
  32
  33 **Submitter**: Luke Leighton (Libre-SOC)
  34
  35 **Requester**: Libre-SOC
  36
  37 **Impact on processor**:
  38
  39 ```
  40     Addition of new "Zero-Overhead-Loop-Control" DSP-style Vector-style
  41     Encoding concept, introduction of new 64-bit Encodings specifically
  42     designed to be easily identifiable extremely early in Multi-Issue
  43     systems
  44 ```
  45
  46 **Impact on software**:
  47
  48 ```
  49     Requires support for new instructions in assembler, debuggers, and related tools.
  50 ```
  51
  52 **Keywords**:
  53
  54 ```
  55     64-bit Encoding
  56 ```
  57
  58 **Motivation**
  59
  60 Power ISA Encoding is a finite precious resource that is under pressure.
  61 New Primary Opcode areas are needed (beyond those already strictly defined
  62 as EXT1xx).  New Primary Opcode areas EXT232-263 allows for immediate growth,
  63 allowing Power ISA to catch up 12-15 years on Intel and ARM.  Also the
  64 Simple-V RISC-paradigm "Loop" subsystem based on x86 REP and Zilog Z80
  65 CPIR and LDIR may be cleanly and smoothly introduced.  Also several new
  66 areas are RESERVED which allows significant future expansion.
  67
  68 **Changes**
  69
  70 Add the following entries to:
  71
  72 * Section 1.3.1 Book I
  73 * Section 1.6.5 Book I
  74
  75 [[!tag opf_rfc]]
  76
  77 --------
  78
  79 \newpage{}
  80
  81 [[!inline pages="openpower/sv/po9_encoding" raw=yes ]]