openpower/sv/rfc/ls006.mdwn

   1 # RFC ls006 FPR <-> GPR Move/Conversion
   2
   3 **URLs**:
   4
   5 * <https://libre-soc.org/openpower/sv/int_fp_mv/>
   6 * <https://libre-soc.org/openpower/sv/rfc/ls006/>
   7 * <https://bugs.libre-soc.org/show_bug.cgi?id=1015>
   8 * <https://git.openpower.foundation/isa/PowerISA/issues/todo>
   9
  10 **Severity**: Major
  11
  12 **Status**: New
  13
  14 **Date**: 20 Oct 2022
  15
  16 **Target**: v3.2B
  17
  18 **Source**: v3.1B
  19
  20 **Books and Section affected**: **UPDATE**
  21
  22 * Book I 4.6.5 Floating-Point Move Instructions
  23 * Book I 4.6.7.2 Floating-Point Convert To/From Integer Instructions
  24 * Appendix E Power ISA sorted by opcode
  25 * Appendix F Power ISA sorted by version
  26 * Appendix G Power ISA sorted by Compliancy Subset
  27 * Appendix H Power ISA sorted by mnemonic
  28
  29 **Summary**
  30
  31 Single-precision Instructions added:
  32
  33 * `fmvtgs` -- Single-Precision Floating Move To GPR
  34 * `fmvfgs` -- Single-Precision Floating Move From GPR
  35 * `fcvttgs` -- Single-Precision Floating Convert To Integer In GPR
  36 * `fcvtfgs` -- Single-Precision Floating Convert From Integer In GPR
  37
  38 Identical (except Double-precision) Instructions added:
  39
  40 * `fmvtg` -- Double-Precision Floating Move To GPR
  41 * `fmvfg` -- Double-Precision Floating Move From GPR
  42 * `fcvttg` -- Double-Precision Floating Convert To Integer In GPR
  43 * `fcvtfg` -- Double-Precision Floating Convert From Integer In GPR
  44
  45 **Submitter**: Luke Leighton (Libre-SOC)
  46
  47 **Requester**: Libre-SOC
  48
  49 **Impact on processor**:
  50
  51 * Addition of four new Single-Precision GPR-FPR-based instructions
  52 * Addition of four new Double-Precision GPR-FPR-based instructions
  53
  54 **Impact on software**:
  55
  56 * Requires support for new instructions in assembler, debuggers,
  57   and related tools.
  58
  59 **Keywords**:
  60
  61 ```
  62     GPR, FPR, Move, Conversion, JavaScript
  63 ```
  64
  65 **Motivation**
  66
  67 CPUs without VSX/VMX lack a way to efficiently transfer data between
  68 FPRs and GPRs, they need to go through memory, this proposal adds more
  69 efficient data transfer (both bitwise copy and Integer <-> FP conversion)
  70 instructions that transfer directly between FPRs and GPRs without needing
  71 to go through memory.
  72
  73 IEEE 754 doesn't specify what results are obtained when converting a NaN
  74 or out-of-range floating-point value to integer, so different programming
  75 languages and ISAs have made different choices.  Below is an overview
  76 of the different variants, listing the languages and hardware that
  77 implements each variant.
  78
  79 **Notes and Observations**:
  80
  81 * These instructions are present in many other ISAs.
  82 * JavaScript rounding as one instruction saves 32 scalar instructions
  83   including seven branch instructions.
  84 * Both sets are orthogonal (no difference except being Single/Double).
  85   This allows IBM to follow the pre-existing precedent of allocating
  86   separate Major Opcodes (PO) for Double-precision and Single-precision
  87   respectively.
  88
  89 **Changes**
  90
  91 Add the following entries to:
  92
  93 * Book I 4.6.5 Floating-Point Move Instructions
  94 * Book I 4.6.7.2 Floating-Point Convert To/From Integer Instructions
  95 * Book I 1.6.1 and 1.6.2
  96
  97 ----------------
  98
  99 \newpage{}
 100
 101 [[!inline pages="openpower/sv/int_fp_mv/moves_and_conversions" raw=yes ]]
 102
 103 ----------
 104
 105 \newpage{}
 106
 107 ----------
 108
 109 # Instruction Formats
 110
 111 Add the following entries to Book I 1.6.1.19 XO-FORM:
 112
 113 ```
 114     |0    |6   |11  |13   |16   |21  |22  |31  |
 115     | PO  | RT | IT | CVM | FRB | OE | XO | Rc |
 116 ```
 117
 118 Add the following entries to Book I 1.6.1.15 X-FORM:
 119
 120 ```
 121     |0   |6    |11  |13  |16   |21  |31  |
 122     | PO | FRT | IT | // | RB  | XO | Rc |
 123     | PO | FRT | //      | RB  | XO | Rc |
 124     | PO | RT  | //      | FRB | XO | Rc |
 125 ```
 126
 127 ## Instruction Fields
 128
 129 Add XO to FRB's Formats list in Book I 1.6.2 Word Instruction Fields.
 130
 131 Add XO to FRT's Formats list in Book I 1.6.2 Word Instruction Fields.
 132
 133 Add new fields:
 134
 135 ```
 136     IT (11:12)
 137         Field used to specify integer type for FPR <-> GPR conversions.
 138
 139         Formats: X, XO
 140
 141     CVM (13:15)
 142         Field used to specify conversion mode for
 143         integer -> floating-point conversion.
 144
 145         Formats: XO
 146 ```
 147
 148 ----------
 149
 150 \newpage{}
 151
 152 ----------
 153
 154 # Appendices
 155
 156     Appendix E Power ISA sorted by opcode
 157     Appendix F Power ISA sorted by version
 158     Appendix G Power ISA sorted by Compliancy Subset
 159     Appendix H Power ISA sorted by mnemonic
 160
 161 |Form| Book | Page | Version | mnemonic | Description |
 162 |----|------|------|---------|----------|-------------|
 163 |VA  | I    | #    | 3.2B    |todo   | |
 164
 165 ----------------
 166
 167 [[!tag opf_rfc]]