openpower/sv/setvl.mdwn

   1 # OpenPOWER SV setvl/setvli
   2
   3 See links:
   4
   5 * <http://lists.libre-soc.org/pipermail/libre-soc-dev/2020-November/001366.html>
   6 * <https://bugs.libre-soc.org/show_bug.cgi?id=535>
   7 * <https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#vsetvlivsetvl-instructions>
   8
   9 # Format
  10
  11 | 0..5 |6..10|11..15|16.20|21.22.23.24..25|26.....30|31|  name   |
  12 |------|-----|------|-----|---------------|---------|--|---------|
  13 | 19   | RT  | RA   |     | XO[0:4]       | XO[5:9] |Rc| XL-Form |
  14 | 19   | RT  | RA   |imm  | imm //  vs ms | NNNNNN  |Rc| setvl/i |
  15
  16 Note that setmvli is a pseudo-op, based on RT=0, and setvli likewise, based on RA=0, RT=0.
  17
  18 # Pseudocode
  19
  20     // instruction fields:
  21     rd = get_rt_field();         // bits 6..10
  22     ra = get_ra_field();         // bits 11..15
  23     vlimmed = get_immed_field(); // bits 16..22
  24     vs = get_vs_field();         // bit 24
  25     ms = get_ms_field();         // bit 25
  26     Rc = get_Rc_field();         // bit 31
  27
  28     // set VL (or not).
  29     // 3 options: from SPR, from immed, from ra
  30     if vs {
  31        if ra == 0 {
  32            VL = SPR[SV_VL]
  33        } else {
  34            VL = vlimmed
  35        }
  36     } elif ra != 0 {
  37        VL = GPR[ra]
  38     }
  39
  40     // set MVL (or not).
  41     // 2 options: from SPR, from immed
  42     if ms {
  43        MVL = vlimmed
  44     } else {
  45        MVL = SPR[SV_MVL]
  46     }
  47
  48     // calculate (limit) VL
  49     VL = min(VL, MVL)
  50
  51     // store VL, MVL
  52     SPR[SV_VL] = VL
  53     SPR[SV_MVL] = MVL
  54
  55     // write rd
  56     if rt != 0 {
  57         // rt is not zero
  58         regs[rt] = VL;
  59     }
  60     // write CR?
  61     if Rc {
  62         // update CR from VL (not rt)
  63         CR0 = ....
  64     }
  65
  66 # Examples
  67
  68 ## Core concept loop
  69
  70     loop:
  71     setvl a3, a0, MVL=8    #  update a3 with vl
  72                            # (# of elements this iteration)
  73                            # set MVL to 8
  74     # do vector operations at up to 8 length (MVL=8)
  75     # ...
  76     sub a0, a0, a3   # Decrement count by vl
  77     bnez a0, loop    # Any more?