openpower/sv/sof.py

   1 def sof(RA, mask=None, zero=False):
   2     RT = RA if mask is not None and not zero else 0
   3     i = 0
   4     # start setting if no predicate or if 1st predicate bit set
   5     setting_mode = mask is None
   6     found = False
   7     while i < 16:
   8         bit = 1<<i
   9         if not setting_mode and mask is not None and (mask & bit):
  10             setting_mode = True # back into "setting" mode
  11             found = False       # start finding first
  12         if setting_mode:
  13             if mask is not None and not (mask & bit):
  14                 setting_mode = False
  15             elif RA & bit and not found: # found a bit: set if not found
  16                 RT |= bit
  17                 found = True # don't set another bit
  18         i += 1
  19     return RT
  20
  21 if __name__ == '__main__':
  22      m  = 0b11000011
  23      v3 = 0b11010100 # vmsof.m v2, v3
  24      v2 = 0b01000000 # v2
  25      RT = sof(v3, m, True)
  26      print(bin(v3), bin(v2), bin(RT))
  27      v3 = 0b10010100 # vmsof.m v2, v3
  28      v2 = 0b00000100 # v2 contents
  29      RT = sof(v3)
  30      print(bin(v3), bin(v2), bin(RT))
  31      v3 = 0b10010101 # vmsof.m v2, v3
  32      v2 = 0b00000001 # v2
  33      RT = sof(v3)
  34      print(bin(v3), bin(v2), bin(RT))
  35      v3 = 0b00000000 # vmsof.m v2, v3
  36      v2 = 0b00000000 # v2
  37      RT = sof(v3)
  38      print(bin(v3), bin(v2), bin(RT))