openpower/sv/svstep.mdwn

   1 # svstep
   2
   3 Links
   4
   5 * pseudocode in [[isa/simplev]] page
   6
   7 `svstep` performs explicit stepping of the Vector for-loop,
   8 and it can also be used to enquire about the current state
   9 of the REMAP indices and SVSTATE.
  10
  11 # Format
  12
  13 *(Allocation of opcode TBD pending OPF ISA WG approval)*,
  14 using EXT22 temporarily and fitting into the
  15 [[sv/bitmanip]] space
  16
  17 Form: SVL-Form (see [[isatables/fields.text]])
  18
  19 | 0.5|6.10|11.15|16..22| 23...25    | 26.30 |31|  name   |
  20 | -- | -- | --- | ---- |----------- | ----- |--| ------- |
  21 |OPCD| RT | /   | SVi  |   /  /  vf | 11011 |Rc| svstep  |
  22
  23 Instruction format:
  24
  25     svstep RT,SVi,vf  (Rc=0)
  26     svstep. RT,SVi,vf (Rc=1)
  27
  28 # Description
  29
  30 When `vf=1` then stepping occurs. When `vf=0` svstep may be used
  31 to enquire about the REMAP Schedule, without altering internal
  32 state.  If `SVi=0, Rc=0, vf=0` this instruction is a `nop`.
  33
  34 When `SVi` is 1-4 the REMAP Schedule for a given SVSHAPE may be
  35 returned in `RT`.  SVi=1 selects SVSHAPE0 current state,
  36 through to SVi=4 selects SVSHAPE3.
  37 When `SVi` is 5, `SVSTATE.srcstep` is returned.
  38 When `SVi` is 6, `SVSTATE.dststep` is returned.
  39 As this is a Single-Predicated (1P) instruction, predication may be applied
  40 to skip (or zero) elements.
  41
  42 * Vertical-First Mode will return the requested index
  43   (and move to the next state if `vf=1`)
  44 * Horizontal-First Mode can be used to return all indices,
  45   i.e. walks through all possible states.
  46
  47 To obtain the full set of possible computed element
  48 indices use `svstep RT.v,SVI,1` which will store all computed element
  49 indices, starting from RT.  If Rc=1 then a co-result Vector of CR Fields
  50 will also be returned, comprising the "loop end-points" of each of the inner
  51 loops when either Matrix Mode or DCT/FFT is set.  In other words,
  52 for example, when the `xdim` inner loop reaches the end and on the next
  53 iteration it will begin again at zero, the CR Field `EQ` will be set.
  54 With a maximum of three loops within both Matrix and DCT/FFT Modes,
  55 the CR Field's EQ bit will be set at the end of the first inner loop,
  56 the LE bit for the second, the GT bit for the outermost loop and the
  57 SO bit set on the very last element, when all loops reach their maximum
  58 extent.
  59
  60 *Programmer's note (1): VL in some situations, particularly larger Matrices,
  61 may exceed 64,
  62 meaning that `sv.svshape` returning a considerable number of values. Under
  63 such circumstances `sv.svshape/ew=8` is recommended.*
  64
  65 *Programmer's note (2): having conveniently obtained a pre-computed
  66 Schedule with `sv.svstep`,
  67 it may then be used as the input to Indexed REMAP Mode
  68 to achieve the exact same Schedule. It is evident however that
  69 before use some of the Indices may be arbitrarily altered as desired.
  70 `sv.svstep` helps the programmer avoid having to manually recreate
  71 Indices for certain
  72 types of common Loop patterns, and in its simplest form, without REMAP
  73 (SVi=5 or SVi=6),
  74 is equivalent to the `iota` instruction found in other Vector ISAs*