2 * <https://bugs.libre-soc.org/show_bug.cgi?id=1074>
3 * <https://libre-soc.org/openpower/sv/biginteger/> for format and
4 information about implicit RS/FRS
6 # [DRAFT] Twin Butterfly DCT Instruction(s)
8 The goal is to implement instructions that calculate the expression:
11 fdct_round_shift((a +/- b) * c)
14 For the single-coefficient butterfly instruction, and:
17 fdct_round_shift(a * c1 +/- b * c2)
20 For the double-coefficient butterfly instruction.
22 `fdct_round_shift` is defined as `ROUND_POWER_OF_TWO(x, 14)`
25 #define ROUND_POWER_OF_TWO(value, n) (((value) + (1 << ((n)-1))) >> (n))
28 These instructions are at the core of **ALL** FDCT calculations in many major video codecs, including -but not limited to- VP8/VP9, AV1, etc.
29 Arm includes special instructions to optimize these operations, although they are limited in precision: `vqrdmulhq_s16`/`vqrdmulhq_s32`.
31 The suggestion is to have a single instruction to calculate both values `((a + b) * c) >> N`, and `((a - b) * c) >> N`.
32 The instruction will run in accumulate mode, so in order to calculate the 2-coeff version one would just have to call the same instruction with different order a, b and a different constant c.
35 # [DRAFT] Integer Butterfly Multiply Add/Sub FFT/DCT
39 * maddsubrs RT,RA,RB,RC,SH
47 prod2 <- MUL(RC, diff)
48 res1 <- ROTL64(prod1, SH)
49 res2 <- ROTL64(prod2, SH)
53 Special Registers Altered:
58 Where BF-Form is defined in fields.txt:
62 |0 | 6 |11 |16 |21 | 25 |30 |31 |
63 | PO | RT | RA | RB | RC | SH | XO | Rc |
67 The instruction has been added to `minor_59.csv`:
69 1111011111,ALU,OP_MADDSUBRS,RA,RB,RC,RT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,1,0,RC_ONLY,0,0,maddsubrs,A,,1,unofficial until submitted and approved/renumbered by the opf isa wg