3 # NOTE that this program is python2 compatible, please do not stop it
4 # from working by adding syntax that prevents that.
6 # Initial version written by lkcl Oct 2020
7 # This program analyses the Power 9 op codes and looks at in/out register uses
8 # The results are displayed:
9 # https://libre-soc.org/openpower/opcode_regs_deduped/
11 # It finds .csv files in the directory isatables/
12 # then goes through the categories and creates svp64 CSV augmentation
13 # tables on a per-opcode basis
17 from os
.path
import dirname
, join
19 from collections
import OrderedDict
20 from soc
.decoder
.power_svp64
import SVP64RM
23 # Return absolute path (ie $PWD) + isatables + name
24 def find_wiki_file(name
):
25 filedir
= os
.path
.dirname(os
.path
.abspath(__file__
))
26 tabledir
= join(filedir
, 'isatables')
27 file_path
= join(tabledir
, name
)
30 # Return an array of dictionaries from the CSV file name:
32 file_path
= find_wiki_file(name
)
33 with
open(file_path
, 'r') as csvfile
:
34 reader
= csv
.DictReader(csvfile
)
37 # Write an array of dictionaries to the CSV file name:
38 def write_csv(name
, items
, headers
):
39 file_path
= find_wiki_file(name
)
40 with
open(file_path
, 'w') as csvfile
:
41 writer
= csv
.DictWriter(csvfile
, headers
, lineterminator
="\n")
43 writer
.writerows(items
)
45 # This will return True if all values are true.
46 # Not sure what this is about
48 #for v in row.values():
49 # if 'SPR' in v: # skip all SPRs
51 for v
in row
.values():
56 # General purpose registers have names like: RA, RT, R1, ...
57 # Floating point registers names like: FRT, FRA, FR1, ..., FRTp, ...
58 # Return True if field is a register
60 return (field
.startswith('R') or field
.startswith('FR') or
64 # These are the attributes of the instructions,
66 keycolumns
= ['unit', 'in1', 'in2', 'in3', 'out', 'CR in', 'CR out',
67 ] # don't think we need these: 'ldst len', 'rc', 'lk']
69 tablecols
= ['unit', 'in', 'outcnt', 'CR in', 'CR out', 'imm'
70 ] # don't think we need these: 'ldst len', 'rc', 'lk']
75 for key
in keycolumns
:
76 # registers IN - special-case: count number of regs RA/RB/RC/RS
77 if key
in ['in1', 'in2', 'in3']:
85 # If upd is 1 then increment the count of outputs
86 if 'outcnt' not in res
:
93 # CRs (Condition Register) (CR0 .. CR7)
94 if key
.startswith('CR'):
95 if row
[key
].startswith('NONE'):
99 if row
['comment'].startswith('cr'):
103 if row
[key
] == 'LDST': # we care about LDST units
107 # LDST len (LoadStore length)
108 if key
.startswith('ldst'):
109 if row
[key
].startswith('NONE'):
114 if key
in ['rc', 'lk']:
115 if row
[key
] == 'ONE':
117 elif row
[key
] == 'NONE':
124 # Convert the numerics 'in' & 'outcnt' to strings
125 res
['in'] = str(res
['in'])
126 res
['outcnt'] = str(res
['outcnt'])
130 if row
['in2'].startswith('CONST_'):
131 res
['imm'] = "1" # row['in2'].split("_")[1]
140 for k
, v
in d
.items():
141 res
.append("%s: %s" % (k
, v
))
145 return ' | '.join(d
) + " |"
149 if row
['unit'] != 'OTHER':
150 res
.append(row
['unit'])
152 res
.append('%sR' % row
['in'])
153 if row
['outcnt'] != '0':
154 res
.append('%sW' % row
['outcnt'])
155 if row
['CR in'] == '1' and row
['CR out'] == '1':
157 res
.append("CR=2R1W")
160 elif row
['CR in'] == '1':
162 elif row
['CR out'] == '1':
164 elif 'imm' in row
and row
['imm']:
174 dictkeys
= OrderedDict()
176 insns
= {} # dictionary of CSV row, by instruction
179 print ("# OpenPOWER ISA register 'profile's")
181 print ("this page is auto-generated, do not edit")
182 print ("created by http://libre-soc.org/openpower/sv_analysis.py")
185 # Expand that (all .csv files)
186 pth
= find_wiki_file("*.csv")
188 # Ignore those containing: valid test sprs
189 for fname
in glob(pth
):
196 if fname
.endswith('sprs.csv'):
198 if fname
.endswith('minor_19_valid.csv'):
203 csvname
= os
.path
.split(fname
)[1]
204 csvname_
= csvname
.split(".")[0]
205 # csvname is something like: minor_59.csv, fname the whole path
208 csvs_svp64
[csvname_
] = []
212 insn_name
= row
['comment']
213 # skip instructions that are not suitable
214 if insn_name
in ['mcrxr', 'mcrxrx', 'darn']:
216 if insn_name
.startswith('bc') or 'rfid' in insn_name
:
218 if insn_name
in ['setvl',]: # SVP64 opcodes
221 insns
[insn_name
] = row
# accumulate csv data by instruction
222 insn_to_csv
[insn_name
] = csvname_
# CSV file name by instruction
223 dkey
= create_key(row
)
224 key
= tuple(dkey
.values())
230 bykey
[key
].append((csvname
, row
['opcode'], insn_name
,
231 row
['form'].upper() + '-Form'))
233 # detect immediates, collate them (useful info)
234 if row
['in2'].startswith('CONST_'):
235 imm
= row
['in2'].split("_")[1]
236 if key
not in immediates
:
237 immediates
[key
] = set()
238 immediates
[key
].add(imm
)
240 primarykeys
= list(primarykeys
)
243 # mapping to old SVPrefix "Forms"
244 mapsto
= {'3R-1W-CRio': 'RM-1P-3S1D',
245 '2R-1W-CRio': 'RM-1P-2S1D',
246 '2R-1W-CRi': 'RM-1P-3S1D',
247 '2R-1W-CRo': 'RM-1P-2S1D',
249 '2R-1W': 'RM-1P-2S1D',
250 '1R-CRio': 'RM-2P-2S1D',
251 '2R-CRio': 'RM-1P-2S1D',
252 '2R-CRo': 'RM-1P-2S1D',
254 '1R-1W-CRio': 'RM-2P-1S1D',
255 '1R-1W-CRo': 'RM-2P-1S1D',
256 '1R-1W': 'RM-2P-1S1D',
257 '1R-1W-imm': 'RM-2P-1S1D',
258 '1R-CRo': 'RM-2P-1S1D',
261 '1W-CRi': 'RM-2P-1S1D',
262 'CRio': 'RM-2P-1S1D',
263 'CR=2R1W': 'RM-1P-2S1D',
267 'LDST-2R-imm': 'LDSTRM-2P-2S',
268 'LDST-2R-1W-imm': 'LDSTRM-2P-2S1D',
269 'LDST-2R-1W': 'LDSTRM-2P-2S1D',
270 'LDST-2R-2W': 'LDSTRM-2P-2S1D',
271 'LDST-1R-1W-imm': 'LDSTRM-2P-1S1D',
272 'LDST-1R-2W-imm': 'LDSTRM-2P-1S2D',
273 'LDST-3R': 'LDSTRM-2P-3S',
274 'LDST-3R-CRo': 'LDSTRM-2P-3S', # st*x
275 'LDST-3R-1W': 'LDSTRM-2P-2S1D', # st*x
277 print ("# map to old SV Prefix")
279 print ('[[!table data="""')
280 for key
in primarykeys
:
281 name
= keyname(dictkeys
[key
])
282 value
= mapsto
.get(name
, "-")
283 print (tformat([name
, value
+ " "]))
289 print ('[[!table data="""')
290 print (tformat(tablecols
) + " imms | name |")
292 # print out the keys and the table from which they're derived
293 for key
in primarykeys
:
294 name
= keyname(dictkeys
[key
])
295 row
= tformat(dictkeys
[key
].values())
296 imms
= list(immediates
.get(key
, ""))
298 row
+= " %s | " % ("/".join(imms
))
299 row
+= " %s |" % name
304 # print out, by remap name, all the instructions under that category
305 for key
in primarykeys
:
306 name
= keyname(dictkeys
[key
])
307 value
= mapsto
.get(name
, "-")
308 print ("## %s (%s)" % (name
, value
))
310 print ('[[!table data="""')
311 print (tformat(['CSV', 'opcode', 'asm', 'form']))
319 #for fname, csv in csvs.items():
322 #for insn, row in insns.items():
325 print ("# svp64 remaps")
326 svp64
= OrderedDict()
327 # create a CSV file, per category, with SV "augmentation" info
328 # XXX note: 'out2' not added here, needs to be added to CSV files
329 # KEEP TRACK OF THESE https://bugs.libre-soc.org/show_bug.cgi?id=619
330 csvcols
= ['insn', 'Ptype', 'Etype', '0', '1', '2', '3']
331 csvcols
+= ['in1', 'in2', 'in3', 'out', 'CR in', 'CR out'] # temporary
332 for key
in primarykeys
:
333 # get the decoded key containing row-analysis, and name/value
336 value
= mapsto
.get(name
, "-")
337 if value
== 'non-SV':
340 # print out svp64 tables by category
341 print ("* **%s**: %s" % (name
, value
))
343 # store csv entries by svp64 RM category
344 if value
not in svp64
:
351 #for idx in range(len(row)):
352 # if row[idx] == 'NONE':
354 # get the instruction
356 insn
= insns
[insn_name
]
357 # start constructing svp64 CSV row
359 res
['insn'] = insn_name
360 res
['Ptype'] = value
.split('-')[1] # predication type (RM-xN-xxx)
361 # get whether R_xxx_EXTRAn fields are 2-bit or 3-bit
362 res
['Etype'] = 'EXTRA2'
363 # go through each register matching to Rxxxx_EXTRAx
364 for k
in ['0', '1', '2', '3']:
366 # create "fake" out2 (TODO, needs to be added to CSV files)
367 # KEEP TRACK HERE https://bugs.libre-soc.org/show_bug.cgi?id=619
369 if insn
['upd'] == '1': # LD/ST with update has RA as out2
372 # temporary useful info
374 for k
in ['in1', 'in2', 'in3', 'out', 'CR in', 'CR out']:
375 if insn
[k
].startswith('CONST'):
380 if insn
[k
] == 'RA_OR_ZERO':
382 elif insn
[k
] != 'NONE':
387 # sigh now the fun begins. this isn't the sanest way to do it
388 # but the patterns are pretty regular.
389 if value
== 'LDSTRM-2P-1S1D':
390 res
['Etype'] = 'EXTRA3' # RM EXTRA3 type
391 res
['0'] = 'd:RT' # RT: Rdest_EXTRA3
392 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
394 elif value
== 'LDSTRM-2P-1S2D':
395 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
396 res
['0'] = 'd:RT' # RT: Rdest1_EXTRA2
397 res
['1'] = 'd:RA' # RA: Rdest2_EXTRA2
398 res
['2'] = 's:RA' # RA: Rsrc1_EXTRA2
400 elif value
== 'LDSTRM-2P-2S':
402 res
['Etype'] = 'EXTRA3' # RM EXTRA2 type
403 res
['0'] = 's:RS' # RT: Rdest1_EXTRA2
404 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA2
406 elif value
== 'LDSTRM-2P-2S1D':
407 if 'st' in insn_name
and 'x' not in insn_name
: # stwu/stbu etc
408 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
409 res
['0'] = 'd:RA' # RA: Rdest1_EXTRA2
410 res
['1'] = 's:RS' # RS: Rdsrc1_EXTRA2
411 res
['2'] = 's:RA' # RA: Rsrc2_EXTRA2
412 elif 'st' in insn_name
and 'x' in insn_name
: # stwux
413 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
414 res
['0'] = 'd:RA' # RA: Rdest1_EXTRA2
415 res
['1'] = 's:RS;s:RA' # RS: Rdest2_EXTRA2, RA: Rsrc1_EXTRA2
416 res
['2'] = 's:RB' # RB: Rsrc2_EXTRA2
417 elif 'u' in insn_name
: # ldux etc.
418 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
419 res
['0'] = 'd:RT' # RT: Rdest1_EXTRA2
420 res
['1'] = 'd:RA' # RA: Rdest2_EXTRA2
421 res
['2'] = 's:RB' # RB: Rsrc1_EXTRA2
423 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
424 res
['0'] = 'd:RT' # RT: Rdest1_EXTRA2
425 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA2
426 res
['2'] = 's:RB' # RB: Rsrc2_EXTRA2
428 elif value
== 'LDSTRM-2P-3S':
429 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
430 if 'cx' in insn_name
:
431 res
['0'] = 's:RS;d:CR0' # RS: Rsrc1_EXTRA2 CR0: dest
433 res
['0'] = 's:RS' # RS: Rsrc1_EXTRA2
434 res
['1'] = 's:RA' # RA: Rsrc2_EXTRA2
435 res
['2'] = 's:RB' # RA: Rsrc3_EXTRA2
437 elif value
== 'RM-2P-1S1D':
438 res
['Etype'] = 'EXTRA3' # RM EXTRA3 type
439 if insn_name
== 'mtspr':
440 res
['0'] = 'd:SPR' # SPR: Rdest1_EXTRA3
441 res
['1'] = 's:RS' # RS: Rsrc1_EXTRA3
442 elif insn_name
== 'mfspr':
443 res
['0'] = 'd:RS' # RS: Rdest1_EXTRA3
444 res
['1'] = 's:SPR' # SPR: Rsrc1_EXTRA3
445 elif name
== 'CRio' and insn_name
== 'mcrf':
446 res
['0'] = 'd:BF' # BFA: Rdest1_EXTRA3
447 res
['1'] = 's:BFA' # BFA: Rsrc1_EXTRA3
448 elif 'mfcr' in insn_name
or 'mfocrf' in insn_name
:
449 res
['0'] = 'd:RT' # RT: Rdest1_EXTRA3
450 res
['1'] = 's:CR' # CR: Rsrc1_EXTRA3
451 elif insn_name
== 'setb':
452 res
['0'] = 'd:RT' # RT: Rdest1_EXTRA3
453 res
['1'] = 's:BFA' # BFA: Rsrc1_EXTRA3
454 elif insn_name
.startswith('cmp'): # cmpi
455 res
['0'] = 'd:BF' # BF: Rdest1_EXTRA3
456 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
457 elif regs
== ['RA','','','RT','','']:
458 res
['0'] = 'd:RT' # RT: Rdest1_EXTRA3
459 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
460 elif regs
== ['RA','','','RT','','CR0']:
461 res
['0'] = 'd:RT;d:CR0' # RT,CR0: Rdest1_EXTRA3
462 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
463 elif (regs
== ['RS','','','RA','','CR0'] or
464 regs
== ['','','RS','RA','','CR0']):
465 res
['0'] = 'd:RA;d:CR0' # RA,CR0: Rdest1_EXTRA3
466 res
['1'] = 's:RS' # RS: Rsrc1_EXTRA3
467 elif regs
== ['RS','','','RA','','']:
468 res
['0'] = 'd:RA' # RA: Rdest1_EXTRA3
469 res
['1'] = 's:RS' # RS: Rsrc1_EXTRA3
470 elif regs
== ['','FRB','','FRT','0','CR1']:
471 res
['0'] = 'd:FRT;d:CR1' # FRT,CR1: Rdest1_EXTRA3
472 res
['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3
473 elif regs
== ['','FRB','','','','CR1']:
474 res
['0'] = 'd:CR1' # CR1: Rdest1_EXTRA3
475 res
['1'] = 's:FRB' # FRA: Rsrc1_EXTRA3
476 elif regs
== ['','FRB','','','','BF']:
477 res
['0'] = 'd:BF' # BF: Rdest1_EXTRA3
478 res
['1'] = 's:FRB' # FRA: Rsrc1_EXTRA3
479 elif regs
== ['','FRB','','FRT','','CR1']:
480 res
['0'] = 'd:FRT;d:CR1' # FRT,CR1: Rdest1_EXTRA3
481 res
['1'] = 's:FRB' # FRB: Rsrc1_EXTRA3
485 elif value
== 'RM-1P-2S1D':
486 res
['Etype'] = 'EXTRA3' # RM EXTRA3 type
487 if insn_name
.startswith('cr'):
488 res
['0'] = 'd:BT' # BT: Rdest1_EXTRA3
489 res
['1'] = 's:BA' # BA: Rsrc1_EXTRA3
490 res
['2'] = 's:BB' # BB: Rsrc2_EXTRA3
491 elif regs
== ['FRA','','FRC','FRT','','CR1']:
492 res
['0'] = 'd:FRT;d:CR1' # FRT,CR1: Rdest1_EXTRA3
493 res
['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3
494 res
['2'] = 's:FRC' # FRC: Rsrc1_EXTRA3
496 elif regs
== ['FRA','FRB','','','','BF']:
497 res
['0'] = 'd:BF' # BF: Rdest1_EXTRA3
498 res
['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3
499 res
['2'] = 's:FRB' # FRB: Rsrc1_EXTRA3
500 elif regs
== ['FRA','FRB','','FRT','','']:
501 res
['0'] = 'd:FRT' # FRT: Rdest1_EXTRA3
502 res
['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3
503 res
['2'] = 's:FRB' # FRB: Rsrc1_EXTRA3
504 elif regs
== ['FRA','FRB','','FRT','','CR1']:
505 res
['0'] = 'd:FRT;d:CR1' # FRT,CR1: Rdest1_EXTRA3
506 res
['1'] = 's:FRA' # FRA: Rsrc1_EXTRA3
507 res
['2'] = 's:FRB' # FRB: Rsrc1_EXTRA3
508 elif name
== '2R-1W' or insn_name
== 'cmpb': # cmpb
509 if insn_name
in ['bpermd', 'cmpb']:
510 res
['0'] = 'd:RA' # RA: Rdest1_EXTRA3
511 res
['1'] = 's:RS' # RS: Rsrc1_EXTRA3
513 res
['0'] = 'd:RT' # RT: Rdest1_EXTRA3
514 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
515 res
['2'] = 's:RB' # RB: Rsrc1_EXTRA3
516 elif insn_name
.startswith('cmp'): # cmp
517 res
['0'] = 'd:BF' # BF: Rdest1_EXTRA3
518 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
519 res
['2'] = 's:RB' # RB: Rsrc1_EXTRA3
520 elif (regs
== ['','RB','RS','RA','','CR0'] or
521 regs
== ['RS','RB','','RA','','CR0']):
522 res
['0'] = 'd:RA;d:CR0' # RA,CR0: Rdest1_EXTRA3
523 res
['1'] = 's:RB' # RB: Rsrc1_EXTRA3
524 res
['2'] = 's:RS' # RS: Rsrc1_EXTRA3
525 elif regs
== ['RA','RB','','RT','','CR0']:
526 res
['0'] = 'd:RT;d:CR0' # RT,CR0: Rdest1_EXTRA3
527 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
528 res
['2'] = 's:RB' # RB: Rsrc1_EXTRA3
529 elif regs
== ['RA','','RS','RA','','CR0']:
530 res
['0'] = 'd:RA;d:CR0' # RA,CR0: Rdest1_EXTRA3
531 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA3
532 res
['2'] = 's:RS' # RS: Rsrc1_EXTRA3
536 elif value
== 'RM-2P-2S1D':
537 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
538 if insn_name
.startswith('mt'): # mtcrf
539 res
['0'] = 'd:CR' # CR: Rdest1_EXTRA2
540 res
['1'] = 's:RS' # RS: Rsrc1_EXTRA2
541 res
['2'] = 's:CR' # CR: Rsrc2_EXTRA2
545 elif value
== 'RM-1P-3S1D':
546 res
['Etype'] = 'EXTRA2' # RM EXTRA2 type
547 if insn_name
== 'isel':
548 res
['0'] = 'd:RT' # RT: Rdest1_EXTRA2
549 res
['1'] = 's:RA' # RA: Rsrc1_EXTRA2
550 res
['2'] = 's:RB' # RT: Rsrc2_EXTRA2
551 res
['3'] = 's:BC' # BC: Rsrc3_EXTRA2
553 res
['0'] = 'd:FRT;d:CR1' # FRT, CR1: Rdest1_EXTRA2
554 res
['1'] = 's:FRA' # FRA: Rsrc1_EXTRA2
555 res
['2'] = 's:FRB' # FRB: Rsrc2_EXTRA2
556 res
['3'] = 's:FRC' # FRC: Rsrc3_EXTRA2
559 #for k in ['in1', 'in2', 'in3', 'out', 'CR in', 'CR out']:
561 #if res['0'] != 'TODO':
563 if res
[k
] == 'NONE' or res
[k
] == '':
565 svp64
[value
].append(res
)
566 # also add to by-CSV version
567 csv_fname
= insn_to_csv
[insn_name
]
568 csvs_svp64
[csv_fname
].append(res
)
572 # now write out the csv files
573 for value
, csv
in svp64
.items():
574 # print out svp64 tables by category
575 print ("## %s" % value
)
577 print ('[[!table format=csv file="openpower/isatables/%s.csv"]]' % \
581 #csvcols = ['insn', 'Ptype', 'Etype', '0', '1', '2', '3']
582 write_csv("%s.csv" % value
, csv
, csvcols
+ ['out2'])
584 # okaaay, now we re-read them back in for producing microwatt SV
586 # get SVP64 augmented CSV files
587 svt
= SVP64RM(microwatt_format
=True)
588 # Expand that (all .csv files)
589 pth
= find_wiki_file("*.csv")
591 # Ignore those containing: valid test sprs
592 for fname
in glob(pth
):
599 if fname
.endswith('sprs.csv'):
601 if fname
.endswith('minor_19_valid.csv'):
605 svp64_csv
= svt
.get_svp64_csv(fname
)
607 csvcols
= ['insn', 'Ptype', 'Etype']
608 csvcols
+= ['in1', 'in2', 'in3', 'out', 'out2', 'CR in', 'CR out']
610 # and a nice microwatt VHDL file
611 file_path
= find_wiki_file("sv_decode.vhdl")
612 with
open(file_path
, 'w') as vhdl
:
613 # autogeneration warning
614 vhdl
.write("-- this file is auto-generated, do not edit\n")
615 vhdl
.write("-- http://libre-soc.org/openpower/sv_analysis.py\n")
616 vhdl
.write("-- part of Libre-SOC, sponsored by NLnet\n")
619 # first create array types
620 lens
= {'major' : 63,
631 for value
, csv
in csvs_svp64
.items():
633 value
= value
.lower()
634 value
= value
.replace("-", "_")
635 if value
not in lens
:
636 todo
= " -- TODO %s (or no SVP64 augmentation)\n"
637 vhdl
.write(todo
% value
)
640 typarray
= " type sv_%s_rom_array_t is " \
641 "array(0 to %d) of sv_decode_rom_t;\n"
642 vhdl
.write(typarray
% (value
, width
))
645 sv_cols
= ['sv_in1', 'sv_in2', 'sv_in3', 'sv_out', 'sv_out2',
646 'sv_cr_in', 'sv_cr_out']
647 fullcols
= csvcols
+ sv_cols
649 " constant sv_%s_decode_rom_array :\n" \
650 " sv_%s_rom_array_t := (\n" \
652 ftr
= " others => sv_illegal_inst\n" \
654 for value
, csv
in csvs_svp64
.items():
656 value
= value
.lower()
657 value
= value
.replace("-", "_")
658 if value
not in lens
:
660 vhdl
.write(hdr
% (value
, value
, " ".join(fullcols
)))
662 insn
= str(entry
['insn'])
663 sventry
= svt
.svp64_instrs
.get(insn
, None)
664 op
= insns
[insn
]['opcode']
665 # binary-to-vhdl-binary
666 if op
.startswith("0b"):
667 op
= "2#%s#" % op
[2:]
669 for colname
in csvcols
[1:]:
671 # zero replace with NONE
675 re
= re
.replace("1P", "P1")
676 re
= re
.replace("2P", "P2")
679 for colname
in sv_cols
:
683 re
= sventry
[colname
]
686 vhdl
.write(" %13s => (%s), -- %s\n" % (op
, row
, insn
))
689 if __name__
== '__main__':