openpower/transcendentals.mdwn

   1 # DRAFT Scalar Transcendentals
   2
   3 Summary:
   4
   5 *This proposal extends Power ISA scalar floating point operations to
   6 add IEEE754 transcendental functions (pow, log etc) and trigonometric
   7 functions (sin, cos etc). These functions are also 98% shared with the
   8 Khronos Group OpenCL Extended Instruction Set.*
   9
  10 Authors/Contributors:
  11
  12 * Luke Kenneth Casson Leighton
  13 * Jacob Lifshay
  14 * Dan Petroski
  15 * Mitch Alsup
  16 * Allen Baum
  17 * Andrew Waterman
  18 * Luis Vitorio Cargnini
  19
  20 [[!toc levels=2]]
  21
  22 See:
  23
  24 * <http://bugs.libre-soc.org/show_bug.cgi?id=127>
  25 * <https://bugs.libre-soc.org/show_bug.cgi?id=923> under review
  26 * <https://www.khronos.org/registry/spir-v/specs/unified1/OpenCL.ExtendedInstructionSet.100.html>
  27 * [[power_trans_ops]] for opcode listing.
  28
  29 Extension subsets:
  30
  31 TODO: rename extension subsets -- we're not on RISC-V anymore.
  32
  33 * **Zftrans**: standard transcendentals (best suited to 3D)
  34 * **ZftransExt**: extra functions (useful, not generally needed for 3D,
  35   can be synthesised using Ztrans)
  36 * **Ztrigpi**: trig. xxx-pi sinpi cospi tanpi
  37 * **Ztrignpi**: trig non-xxx-pi sin cos tan
  38 * **Zarctrigpi**: arc-trig. a-xxx-pi: atan2pi asinpi acospi
  39 * **Zarctrignpi**: arc-trig. non-a-xxx-pi: atan2, asin, acos
  40 * **Zfhyp**: hyperbolic/inverse-hyperbolic.  sinh, cosh, tanh, asinh,
  41   acosh, atanh (can be synthesised - see below)
  42 * **ZftransAdv**: much more complex to implement in hardware
  43 * **Zfrsqrt**: Reciprocal square-root.
  44
  45 Minimum recommended requirements for 3D: Zftrans, Ztrignpi,
  46 Zarctrignpi, with Ztrigpi and Zarctrigpi as augmentations.
  47
  48 Minimum recommended requirements for Mobile-Embedded 3D:
  49 Ztrignpi, Zftrans, with Ztrigpi as an augmentation.
  50
  51 The Platform Requirements for 3D are driven by cost competitive
  52 factors and it is the Trademarked Vulkan Specification that provides
  53 clear direction for 3D GPU markets, but nothing else (IEEE754).
  54 Implementors must note that minimum
  55 Compliance with the Third Party Vulkan Specification (for power-area competitive
  56 reasons with other 3D GPU manufacturers) will not qualify for strict IEEE754 accuracy Compliance or vice-versa.
  57
  58 Implementors **must** make it clear which accuracy level is implemented and provide a switching mechanism and throw Illegal Instruction traps if fully compliant accuracy cannot be achieved.
  59 It is also the Implementor's responsibility to comply with all Third Party Certification Marks and Trademarks (Vulkan, OpenCL). Nothing in this specification in any way implies that any Third Party Certification Mark Compliance is granted, nullified, altered or overridden by this document.
  60
  61
  62 # TODO:
  63
  64 * Decision on accuracy, moved to [[zfpacc_proposal]]
  65 <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-August/002355.html>
  66 * Errors **MUST** be repeatable.
  67 * How about four Platform Specifications? 3DUNIX, UNIX, 3DEmbedded and Embedded?
  68 <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-August/002361.html>
  69   Accuracy requirements for dual (triple) purpose implementations must
  70   meet the higher standard.
  71 * Reciprocal Square-root is in its own separate extension (Zfrsqrt) as
  72   it is desirable on its own by other implementors.  This to be evaluated.
  73
  74 # Requirements <a name="requirements"></a>
  75
  76 This proposal is designed to meet a wide range of extremely diverse
  77 needs, allowing implementors from all of them to benefit from the tools
  78 and hardware cost reductions associated with common standards adoption
  79 in Power ISA (primarily IEEE754 and Vulkan).
  80
  81 **The use-cases are**:
  82
  83 * 3D GPUs
  84 * Numerical Computation
  85 * (Potentially) A.I. / Machine-learning (1)
  86
  87 (1) although approximations suffice in this field, making it more likely
  88 to use a custom extension.  High-end ML would inherently definitely
  89 be excluded.
  90
  91 **The power and die-area requirements vary from**:
  92
  93 * Ultra-low-power (smartwatches where GPU power budgets are in milliwatts)
  94 * Mobile-Embedded (good performance with high efficiency for battery life)
  95 * Desktop Computing
  96 * Server / HPC / Supercomputing
  97
  98 **The software requirements are**:
  99
 100 * Full public integration into GNU math libraries (libm)
 101 * Full public integration into well-known Numerical Computation systems (numpy)
 102 * Full public integration into upstream GNU and LLVM Compiler toolchains
 103 * Full public integration into Khronos OpenCL SPIR-V compatible Compilers
 104   seeking public Certification and Endorsement from the Khronos Group
 105   under their Trademarked Certification Programme.
 106
 107 # Proposed Opcodes vs Khronos OpenCL vs IEEE754-2019<a name="khronos_equiv"></a>
 108
 109 This list shows the (direct) equivalence between proposed opcodes,
 110 their Khronos OpenCL equivalents, and their IEEE754-2019 equivalents.
 111 98% of the opcodes in this proposal that are in the IEEE754-2019 standard
 112 are present in the Khronos Extended Instruction Set.
 113
 114 See
 115 <https://www.khronos.org/registry/spir-v/specs/unified1/OpenCL.ExtendedInstructionSet.100.html>
 116 and <https://ieeexplore.ieee.org/document/8766229>
 117
 118 * Special FP16 opcodes are *not* being proposed, except by indirect / inherent
 119   use of elwidth overrides that is already present in the SVP64 Specification.
 120 * "Native" opcodes are *not* being proposed: implementors will be expected
 121   to use the (equivalent) proposed opcode covering the same function.
 122 * "Fast" opcodes are *not* being proposed, because the Khronos Specification
 123   fast\_length, fast\_normalise and fast\_distance OpenCL opcodes require
 124   vectors (or can be done as scalar operations using other Power ISA
 125   instructions).
 126
 127 The OpenCL FP32 opcodes are **direct** equivalents to the proposed opcodes.
 128 Deviation from conformance with the Khronos Specification - including the
 129 Khronos Specification accuracy requirements - is not an option, as it
 130 results in non-compliance, and the vendor may not use the Trademarked words
 131 "Vulkan" etc. in conjunction with their product.
 132
 133 IEEE754-2019 Table 9.1 lists "additional mathematical operations".
 134 Interestingly the only functions missing when compared to OpenCL are
 135 compound, exp2m1, exp10m1, log2p1, log10p1, pown (integer power) and powr.
 136
 137 |opcode      |OpenCL FP32|OpenCL FP16|OpenCL native|IEEE754               |Power ISA               |My 66000 ISA |
 138 |------------|-----------|-----------|-------------|--------------        |------------------------|-------------|
 139 |fsin        |sin        |half\_sin  |native\_sin  |sin                   |NONE                    |sin          |
 140 |fcos        |cos        |half\_cos  |native\_cos  |cos                   |NONE                    |cos          |
 141 |ftan        |tan        |half\_tan  |native\_tan  |tan                   |NONE                    |tan          |
 142 |NONE (1)    |sincos     |NONE       |NONE         |NONE                  |NONE                    |             |
 143 |fasin       |asin       |NONE       |NONE         |asin                  |NONE                    |asin         |
 144 |facos       |acos       |NONE       |NONE         |acos                  |NONE                    |acos         |
 145 |fatan       |atan       |NONE       |NONE         |atan                  |NONE                    |atan         |
 146 |fsinpi      |sinpi      |NONE       |NONE         |sinPi                 |NONE                    |sinpi        |
 147 |fcospi      |cospi      |NONE       |NONE         |cosPi                 |NONE                    |cospi        |
 148 |ftanpi      |tanpi      |NONE       |NONE         |tanPi                 |NONE                    |tanpi        |
 149 |fasinpi     |asinpi     |NONE       |NONE         |asinPi                |NONE                    |asinpi       |
 150 |facospi     |acospi     |NONE       |NONE         |acosPi                |NONE                    |acospi       |
 151 |fatanpi     |atanpi     |NONE       |NONE         |atanPi                |NONE                    |atanpi       |
 152 |fsinh       |sinh       |NONE       |NONE         |sinh                  |NONE                    |             |
 153 |fcosh       |cosh       |NONE       |NONE         |cosh                  |NONE                    |             |
 154 |ftanh       |tanh       |NONE       |NONE         |tanh                  |NONE                    |             |
 155 |fasinh      |asinh      |NONE       |NONE         |asinh                 |NONE                    |             |
 156 |facosh      |acosh      |NONE       |NONE         |acosh                 |NONE                    |             |
 157 |fatanh      |atanh      |NONE       |NONE         |atanh                 |NONE                    |             |
 158 |fatan2      |atan2      |NONE       |NONE         |atan2                 |NONE                    |atan2        |
 159 |fatan2pi    |atan2pi    |NONE       |NONE         |atan2pi               |NONE                    |atan2pi      |
 160 |frsqrt      |rsqrt      |half\_rsqrt|native\_rsqrt|rSqrt                 |fsqrte, fsqrtes (4)     |rsqrt        |
 161 |fcbrt       |cbrt       |NONE       |NONE         |NONE (2)              |NONE                    |             |
 162 |fexp2       |exp2       |half\_exp2 |native\_exp2 |exp2                  |NONE                    |exp2         |
 163 |flog2       |log2       |half\_log2 |native\_log2 |log2                  |NONE                    |ln2          |
 164 |fexpm1      |expm1      |NONE       |NONE         |expm1                 |NONE                    |expm1        |
 165 |flog1p      |log1p      |NONE       |NONE         |logp1                 |NONE                    |logp1        |
 166 |fexp        |exp        |half\_exp  |native\_exp  |exp                   |NONE                    |exp          |
 167 |flog        |log        |half\_log  |native\_log  |log                   |NONE                    |ln           |
 168 |fexp10      |exp10      |half\_exp10|native\_exp10|exp10                 |NONE                    |exp10        |
 169 |flog10      |log10      |half\_log10|native\_log10|log10                 |NONE                    |log          |
 170 |fpow        |pow        |NONE       |NONE         |pow                   |NONE                    |pow          |
 171 |fpown       |pown       |NONE       |NONE         |pown                  |NONE                    |             |
 172 |fpowr       |powr       |half\_powr |native\_powr |powr                  |NONE                    |             |
 173 |frootn      |rootn      |NONE       |NONE         |rootn                 |NONE                    |             |
 174 |fhypot      |hypot      |NONE       |NONE         |hypot                 |NONE                    |             |
 175 |frecip      |NONE       |half\_recip|native\_recip|NONE (3)              |fre, fres (4)           |rcp          |
 176 |NONE        |NONE       |NONE       |NONE         |compound              |NONE                    |             |
 177 |fexp2m1     |NONE       |NONE       |NONE         |exp2m1                |NONE                    |exp2m1       |
 178 |fexp10m1    |NONE       |NONE       |NONE         |exp10m1               |NONE                    |exp10m1      |
 179 |flog2p1     |NONE       |NONE       |NONE         |log2p1                |NONE                    |ln2p1        |
 180 |flog10p1    |NONE       |NONE       |NONE         |log10p1               |NONE                    |logp1        |
 181 |fminnum08   |fmin       |fmin       |NONE         |minNum                |xsmindp (5)             |             |
 182 |fmaxnum08   |fmax       |fmax       |NONE         |maxNum                |xsmaxdp (5)             |             |
 183 |fmin19      |fmin       |fmin       |NONE         |minimum               |NONE                    |fmin         |
 184 |fmax19      |fmax       |fmax       |NONE         |maximum               |NONE                    |fmax         |
 185 |fminnum19   |fmin       |fmin       |NONE         |minimumNumber         |vminfp (6), xsminjdp (5)|             |
 186 |fmaxnum19   |fmax       |fmax       |NONE         |maximumNumber         |vmaxfp (6), xsmaxjdp (5)|             |
 187 |fminc       |fmin       |fmin       |NONE         |NONE                  |xsmincdp (5)            |fmin*        |
 188 |fmaxc       |fmax       |fmax       |NONE         |NONE                  |xsmaxcdp (5)            |fmax*        |
 189 |fminmagnum08|minmag     |minmag     |NONE         |minNumMag             |NONE                    |             |
 190 |fmaxmagnum08|maxmag     |maxmag     |NONE         |maxNumMag             |NONE                    |             |
 191 |fminmag19   |minmag     |minmag     |NONE         |minimumMagnitude      |NONE                    |             |
 192 |fmaxmag19   |maxmag     |maxmag     |NONE         |maximumMagnitude      |NONE                    |             |
 193 |fminmagnum19|minmag     |minmag     |NONE         |minimumMagnitudeNumber|NONE                    |             |
 194 |fmaxmagnum19|maxmag     |maxmag     |NONE         |maximumMagnitudeNumber|NONE                    |             |
 195 |fminmagc    |minmag     |minmag     |NONE         |NONE                  |NONE                    |             |
 196 |fmaxmagc    |maxmag     |maxmag     |NONE         |NONE                  |NONE                    |             |
 197 |fmod        |fmod       |fmod       |             |NONE                  |NONE                    |             |
 198 |fremainder  |remainder  |remainder  |             |remainder             |NONE                    |             |
 199
 200  from Mitch Alsup:
 201
 202 * Brian's LLVM compiler converts fminc and fmaxc into fmin and fmax instructions
 203 These are all IEEE 754-2019 compliant
 204 These are native instructions not extensions
 205 All listed functions are available in both F32 and F64 formats.
 206 THere is some confusion (in my head) abouot fmin and fmax. I intend both instruction to perform 754-2019 semantics--
 207 but I don know if this is minimum/maximum or minimumNumber/maximumNumber.
 208 fmad and remainder are a 2-instruction sequence--don't know how to "edit it in"
 209
 210
 211 Note (1) fsincos is macro-op fused (see below).
 212
 213 Note (2) synthesised in IEEE754-2019 as "rootn(x, 3)"
 214
 215 Note (3) synthesised in IEEE754-2019 using "1.0 / x"
 216
 217 Note (4) these are estimate opcodes that help accelerate
 218 software emulation
 219
 220 Note (5) f64-only (though can be used on f32 stored in f64 format), requires VSX.
 221
 222 Note (6) 4xf32-only, requires VMX.
 223
 224 ## List of 2-arg opcodes
 225
 226 | opcode       | Description                          | pseudocode                                     | Extension   |
 227 | ------       | ----------------                     | ----------------                               | ----------- |
 228 | fatan2       | atan2 arc tangent                    | FRT = atan2(FRB, FRA)                          | Zarctrignpi |
 229 | fatan2pi     | atan2 arc tangent / pi               | FRT = atan2(FRB, FRA) / pi                     | Zarctrigpi  |
 230 | fpow         | x power of y                         | FRT = pow(FRA, FRB)                            | ZftransAdv  |
 231 | fpown        | x power of n (n int)                 | FRT = pow(FRA, RB)                             | ZftransAdv  |
 232 | fpowr        | x power of y (x +ve)                 | FRT = exp(FRA log(FRB))                        | ZftransAdv  |
 233 | frootn       | x power 1/n (n integer)              | FRT = pow(FRA, 1/RB)                           | ZftransAdv  |
 234 | fhypot       | hypotenuse                           | FRT = sqrt(FRA^2 + FRB^2)                      | ZftransAdv  |
 235 | fminnum08    | IEEE 754-2008 minNum                 | FRT = minNum(FRA, FRB)  (1)                    | TBD         |
 236 | fmaxnum08    | IEEE 754-2008 maxNum                 | FRT = maxNum(FRA, FRB)  (1)                    | TBD         |
 237 | fmin19       | IEEE 754-2019 minimum                | FRT = minimum(FRA, FRB)                        | TBD         |
 238 | fmax19       | IEEE 754-2019 maximum                | FRT = maximum(FRA, FRB)                        | TBD         |
 239 | fminnum19    | IEEE 754-2019 minimumNumber          | FRT = minimumNumber(FRA, FRB)                  | TBD         |
 240 | fmaxnum19    | IEEE 754-2019 maximumNumber          | FRT = maximumNumber(FRA, FRB)                  | TBD         |
 241 | fminc        | C ternary-op minimum                 | FRT = FRA \< FRB ? FRA : FRB                   | TBD         |
 242 | fmaxc        | C ternary-op maximum                 | FRT = FRA > FRB ? FRA : FRB                    | TBD         |
 243 | fminmagnum08 | IEEE 754-2008 minNumMag              | FRT = minmaxmag(FRA, FRB, False, fminnum08) (2)| TBD         |
 244 | fmaxmagnum08 | IEEE 754-2008 maxNumMag              | FRT = minmaxmag(FRA, FRB, True, fmaxnum08) (2) | TBD         |
 245 | fminmag19    | IEEE 754-2019 minimumMagnitude       | FRT = minmaxmag(FRA, FRB, False, fmin19) (2)   | TBD         |
 246 | fmaxmag19    | IEEE 754-2019 maximumMagnitude       | FRT = minmaxmag(FRA, FRB, True, fmax19) (2)    | TBD         |
 247 | fminmagnum19 | IEEE 754-2019 minimumMagnitudeNumber | FRT = minmaxmag(FRA, FRB, False, fminnum19) (2)| TBD         |
 248 | fmaxmagnum19 | IEEE 754-2019 maximumMagnitudeNumber | FRT = minmaxmag(FRA, FRB, True, fmaxnum19) (2) | TBD         |
 249 | fminmagc     | C ternary-op minimum magnitude       | FRT = minmaxmag(FRA, FRB, False, fminc) (2)    | TBD         |
 250 | fmaxmagc     | C ternary-op maximum magnitude       | FRT = minmaxmag(FRA, FRB, True, fmaxc) (2)     | TBD         |
 251 | fmod         | modulus                              | FRT = fmod(FRA, FRB)                           | TBD         |
 252 | fremainder   | IEEE 754 remainder                   | FRT = remainder(FRA, FRB)                      | TBD         |
 253
 254 Note (1): for the purposes of minNum/maxNum, -0.0 is defined to be less than +0.0. This is left unspecified in IEEE 754-2008.
 255
 256 Note (2): minmaxmag(x, y, cmp, fallback) is defined as:
 257
 258 ```python
 259 def minmaxmag(x, y, is_max, fallback):
 260     a = abs(x) < abs(y)
 261     b = abs(x) > abs(y)
 262     if is_max:
 263         a, b = b, a  # swap
 264     if a:
 265         return x
 266     if b:
 267         return y
 268     # equal magnitudes, or NaN input(s)
 269     return fallback(x, y)
 270 ```
 271
 272 ## List of 1-arg transcendental opcodes
 273
 274 | opcode   | Description            | pseudocode               | Extension  |
 275 | ------   | ----------------       | ----------------         | ---------- |
 276 | frsqrt   | Reciprocal Square-root | FRT = sqrt(FRA)          | Zfrsqrt    |
 277 | fcbrt    | Cube Root              | FRT = pow(FRA, 1.0 / 3)  | ZftransAdv |
 278 | frecip   | Reciprocal             | FRT = 1.0 / FRA          | Zftrans    |
 279 | fexp2m1  | power-2 minus 1        | FRT = pow(2, FRA) - 1.0  | ZftransExt |
 280 | flog2p1  | log2 plus 1            | FRT = log(2, 1 + FRA)    | ZftransExt |
 281 | fexp2    | power-of-2             | FRT = pow(2, FRA)        | Zftrans    |
 282 | flog2    | log2                   | FRT = log(2. FRA)        | Zftrans    |
 283 | fexpm1   | exponential minus 1    | FRT = pow(e, FRA) - 1.0  | ZftransExt |
 284 | flog1p   | log plus 1             | FRT = log(e, 1 + FRA)    | ZftransExt |
 285 | fexp     | exponential            | FRT = pow(e, FRA)        | ZftransExt |
 286 | flog     | natural log (base e)   | FRT = log(e, FRA)        | ZftransExt |
 287 | fexp10m1 | power-10 minus 1       | FRT = pow(10, FRA) - 1.0 | ZftransExt |
 288 | flog10p1 | log10 plus 1           | FRT = log(10, 1 + FRA)   | ZftransExt |
 289 | fexp10   | power-of-10            | FRT = pow(10, FRA)       | ZftransExt |
 290 | flog10   | log base 10            | FRT = log(10, FRA)       | ZftransExt |
 291
 292 ## List of 1-arg trigonometric opcodes
 293
 294 | opcode   | Description              | pseudocode               | Extension   |
 295 | -------- | ------------------------ | ------------------------ | ----------- |
 296 | fsin     | sin (radians)            | FRT = sin(FRA)           | Ztrignpi    |
 297 | fcos     | cos (radians)            | FRT = cos(FRA)           | Ztrignpi    |
 298 | ftan     | tan (radians)            | FRT = tan(FRA)           | Ztrignpi    |
 299 | fasin    | arcsin (radians)         | FRT = asin(FRA)          | Zarctrignpi |
 300 | facos    | arccos (radians)         | FRT = acos(FRA)          | Zarctrignpi |
 301 | fatan    | arctan (radians)         | FRT = atan(FRA)          | Zarctrignpi |
 302 | fsinpi   | sin times pi             | FRT = sin(pi * FRA)      | Ztrigpi     |
 303 | fcospi   | cos times pi             | FRT = cos(pi * FRA)      | Ztrigpi     |
 304 | ftanpi   | tan times pi             | FRT = tan(pi * FRA)      | Ztrigpi     |
 305 | fasinpi  | arcsin / pi              | FRT = asin(FRA) / pi     | Zarctrigpi  |
 306 | facospi  | arccos / pi              | FRT = acos(FRA) / pi     | Zarctrigpi  |
 307 | fatanpi  | arctan / pi              | FRT = atan(FRA) / pi     | Zarctrigpi  |
 308 | fsinh    | hyperbolic sin (radians) | FRT = sinh(FRA)          | Zfhyp       |
 309 | fcosh    | hyperbolic cos (radians) | FRT = cosh(FRA)          | Zfhyp       |
 310 | ftanh    | hyperbolic tan (radians) | FRT = tanh(FRA)          | Zfhyp       |
 311 | fasinh   | inverse hyperbolic sin   | FRT = asinh(FRA)         | Zfhyp       |
 312 | facosh   | inverse hyperbolic cos   | FRT = acosh(FRA)         | Zfhyp       |
 313 | fatanh   | inverse hyperbolic tan   | FRT = atanh(FRA)         | Zfhyp       |
 314
 315 [[!inline pages="openpower/power_trans_ops" raw=yes ]]
 316
 317 # Subsets
 318
 319 The full set is based on the Khronos OpenCL opcodes. If implemented
 320 entirely it would be too much for both Embedded and also 3D.
 321
 322 The subsets are organised by hardware complexity, need (3D, HPC), however
 323 due to synthesis producing inaccurate results at the range limits,
 324 the less common subsets are still required for IEEE754 HPC.
 325
 326 MALI Midgard, an embedded / mobile 3D GPU, for example only has the
 327 following opcodes:
 328
 329     E8 - fatan_pt2
 330     F0 - frcp (reciprocal)
 331     F2 - frsqrt (inverse square root, 1/sqrt(x))
 332     F3 - fsqrt (square root)
 333     F4 - fexp2 (2^x)
 334     F5 - flog2
 335     F6 - fsin1pi
 336     F7 - fcos1pi
 337     F9 - fatan_pt1
 338
 339 These in FP32 and FP16 only: no FP64 hardware, at all.
 340
 341 Vivante Embedded/Mobile 3D (etnaviv
 342 <https://github.com/laanwj/etna_viv/blob/master/rnndb/isa.xml>)
 343 only has the following:
 344
 345     sin, cos2pi
 346     cos, sin2pi
 347     log2, exp
 348     sqrt and rsqrt
 349     recip.
 350
 351 It also has fast variants of some of these, as a CSR Mode.
 352
 353 AMD's R600 GPU (R600\_Instruction\_Set\_Architecture.pdf) and the
 354 RDNA ISA (RDNA\_Shader\_ISA\_5August2019.pdf, Table 22, Section 6.3) have:
 355
 356     COS2PI (appx)
 357     EXP2
 358     LOG (IEEE754)
 359     RECIP
 360     RSQRT
 361     SQRT
 362     SIN2PI (appx)
 363
 364 AMD RDNA has F16 and F32 variants of all the above, and also has F64
 365 variants of SQRT, RSQRT and RECIP.  It is interesting that even the
 366 modern high-end AMD GPU does not have TAN or ATAN, where MALI Midgard
 367 does.
 368
 369 Also a general point, that customised optimised hardware targetting
 370 FP32 3D with less accuracy simply can neither be used for IEEE754 nor
 371 for FP64 (except as a starting point for hardware or software driven
 372 Newton Raphson or other iterative method).
 373
 374 Also in cost/area sensitive applications even the extra ROM lookup tables
 375 for certain algorithms may be too costly.
 376
 377 These wildly differing and incompatible driving factors lead to the
 378 subset subdivisions, below.
 379
 380 ## Transcendental Subsets
 381
 382 ### Zftrans
 383
 384 LOG2 EXP2 RECIP RSQRT
 385
 386 Zftrans contains the minimum standard transcendentals best suited to
 387 3D. They are also the minimum subset for synthesising log10, exp10,
 388 exp1m, log1p, the hyperbolic trigonometric functions sinh and so on.
 389
 390 They are therefore considered "base" (essential) transcendentals.
 391
 392 ### ZftransExt
 393
 394 LOG, EXP, EXP10, LOG10, LOGP1, EXP1M
 395
 396 These are extra transcendental functions that are useful, not generally
 397 needed for 3D, however for Numerical Computation they may be useful.
 398
 399 Although they can be synthesised using Ztrans (LOG2 multiplied
 400 by a constant), there is both a performance penalty as well as an
 401 accuracy penalty towards the limits, which for IEEE754 compliance is
 402 unacceptable. In particular, LOG(1+FRA) in hardware may give much better
 403 accuracy at the lower end (very small FRA) than LOG(FRA).
 404
 405 Their forced inclusion would be inappropriate as it would penalise
 406 embedded systems with tight power and area budgets.  However if they
 407 were completely excluded the HPC applications would be penalised on
 408 performance and accuracy.
 409
 410 Therefore they are their own subset extension.
 411
 412 ### Zfhyp
 413
 414 SINH, COSH, TANH, ASINH, ACOSH, ATANH
 415
 416 These are the hyperbolic/inverse-hyperbolic functions. Their use in 3D
 417 is limited.
 418
 419 They can all be synthesised using LOG, SQRT and so on, so depend
 420 on Zftrans.  However, once again, at the limits of the range, IEEE754
 421 compliance becomes impossible, and thus a hardware implementation may
 422 be required.
 423
 424 HPC and high-end GPUs are likely markets for these.
 425
 426 ### ZftransAdv
 427
 428 CBRT, POW, POWN, POWR, ROOTN
 429
 430 These are simply much more complex to implement in hardware, and typically
 431 will only be put into HPC applications.
 432
 433 * **Zfrsqrt**: Reciprocal square-root.
 434
 435 ## Trigonometric subsets
 436
 437 ### Ztrigpi vs Ztrignpi
 438
 439 * **Ztrigpi**: SINPI COSPI TANPI
 440 * **Ztrignpi**: SIN COS TAN
 441
 442 Ztrignpi are the basic trigonometric functions through which all others
 443 could be synthesised, and they are typically the base trigonometrics
 444 provided by GPUs for 3D, warranting their own subset.
 445
 446 (programmerjake: actually, all other GPU ISAs mentioned in this document have sinpi/cospi or equivalent, and often not sin/cos, because sinpi/cospi are actually *waay* easier to implement because range reduction is simply a bitwise mask, whereas for sin/cos range reduction is a full division by pi)
 447
 448 (Mitch: My patent USPTO 10,761,806 shows that the above statement is no longer true.)
 449
 450
 451 In the case of the Ztrigpi subset, these are commonly used in for loops
 452 with a power of two number of subdivisions, and the cost of multiplying
 453 by PI inside each loop (or cumulative addition, resulting in cumulative
 454 errors) is not acceptable.
 455
 456 In for example CORDIC the multiplication by PI may be moved outside of
 457 the hardware algorithm as a loop invariant, with no power or area penalty.
 458
 459 Again, therefore, if SINPI (etc.) were excluded, programmers would be
 460 penalised by being forced to divide by PI in some circumstances. Likewise
 461 if SIN were excluded, programmers would be penaslised by being forced
 462 to *multiply* by PI in some circumstances.
 463
 464 Thus again, a slightly different application of the same general argument
 465 applies to give Ztrignpi and Ztrigpi as subsets.  3D GPUs will almost
 466 certainly provide both.
 467
 468 ### Zarctrigpi and Zarctrignpi
 469
 470 * **Zarctrigpi**: ATAN2PI ASINPI ACOSPI
 471 * **Zarctrignpi**: ATAN2 ACOS ASIN
 472
 473 These are extra trigonometric functions that are useful in some
 474 applications, but even for 3D GPUs, particularly embedded and mobile class
 475 GPUs, they are not so common and so are typically synthesised, there.
 476
 477 Although they can be synthesised using Ztrigpi and Ztrignpi, there is,
 478 once again, both a performance penalty as well as an accuracy penalty
 479 towards the limits, which for IEEE754 compliance is unacceptable, yet
 480 is acceptable for 3D.
 481
 482 Therefore they are their own subset extensions.
 483
 484 # Synthesis, Pseudo-code ops and macro-ops
 485
 486 The pseudo-ops are best left up to the compiler rather than being actual
 487 pseudo-ops, by allocating one scalar FP register for use as a constant
 488 (loop invariant) set to "1.0" at the beginning of a function or other
 489 suitable code block.
 490
 491 * fsincos - fused macro-op between fsin and fcos (issued in that order).
 492 * fsincospi - fused macro-op between fsinpi and fcospi (issued in that order).
 493
 494 fatanpi example pseudo-code:
 495
 496     fmvis ft0, 0x3F80 // upper bits of f32 1.0 (BF16)
 497     fatan2pis FRT, FRA, ft0
 498
 499 Hyperbolic function example (obviates need for Zfhyp except for
 500 high-performance or correctly-rounding):
 501
 502     ASINH( x ) = ln( x + SQRT(x**2+1))
 503
 504 # Evaluation and commentary
 505
 506 Moved to [[discussion]]
 507