add min/max/minmag/maxmag/fmod/remainder ops
[libreriscv.git] / openpower / transcendentals.mdwn
1 # DRAFT Scalar Transcendentals
2
3 Summary:
4
5 *This proposal extends Power ISA scalar floating point operations to
6 add IEEE754 transcendental functions (pow, log etc) and trigonometric
7 functions (sin, cos etc). These functions are also 98% shared with the
8 Khronos Group OpenCL Extended Instruction Set.*
9
10 Authors/Contributors:
11
12 * Luke Kenneth Casson Leighton
13 * Jacob Lifshay
14 * Dan Petroski
15 * Mitch Alsup
16 * Allen Baum
17 * Andrew Waterman
18 * Luis Vitorio Cargnini
19
20 [[!toc levels=2]]
21
22 See:
23
24 * <http://bugs.libre-soc.org/show_bug.cgi?id=127>
25 * <https://bugs.libre-soc.org/show_bug.cgi?id=923> under review
26 * <https://www.khronos.org/registry/spir-v/specs/unified1/OpenCL.ExtendedInstructionSet.100.html>
27 * [[power_trans_ops]] for opcode listing.
28
29 Extension subsets:
30
31 TODO: rename extension subsets -- we're not on RISC-V anymore.
32
33 * **Zftrans**: standard transcendentals (best suited to 3D)
34 * **ZftransExt**: extra functions (useful, not generally needed for 3D,
35 can be synthesised using Ztrans)
36 * **Ztrigpi**: trig. xxx-pi sinpi cospi tanpi
37 * **Ztrignpi**: trig non-xxx-pi sin cos tan
38 * **Zarctrigpi**: arc-trig. a-xxx-pi: atan2pi asinpi acospi
39 * **Zarctrignpi**: arc-trig. non-a-xxx-pi: atan2, asin, acos
40 * **Zfhyp**: hyperbolic/inverse-hyperbolic. sinh, cosh, tanh, asinh,
41 acosh, atanh (can be synthesised - see below)
42 * **ZftransAdv**: much more complex to implement in hardware
43 * **Zfrsqrt**: Reciprocal square-root.
44
45 Minimum recommended requirements for 3D: Zftrans, Ztrignpi,
46 Zarctrignpi, with Ztrigpi and Zarctrigpi as augmentations.
47
48 Minimum recommended requirements for Mobile-Embedded 3D:
49 Ztrignpi, Zftrans, with Ztrigpi as an augmentation.
50
51 The Platform Requirements for 3D are driven by cost competitive
52 factors and it is the Trademarked Vulkan Specification that provides
53 clear direction for 3D GPU markets, but nothing else (IEEE754).
54 Implementors must note that minimum
55 Compliance with the Third Party Vulkan Specification (for power-area competitive
56 reasons with other 3D GPU manufacturers) will not qualify for strict IEEE754 accuracy Compliance or vice-versa.
57
58 Implementors **must** make it clear which accuracy level is implemented and provide a switching mechanism and throw Illegal Instruction traps if fully compliant accuracy cannot be achieved.
59 It is also the Implementor's responsibility to comply with all Third Party Certification Marks and Trademarks (Vulkan, OpenCL). Nothing in this specification in any way implies that any Third Party Certification Mark Compliance is granted, nullified, altered or overridden by this document.
60
61
62 # TODO:
63
64 * Decision on accuracy, moved to [[zfpacc_proposal]]
65 <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-August/002355.html>
66 * Errors **MUST** be repeatable.
67 * How about four Platform Specifications? 3DUNIX, UNIX, 3DEmbedded and Embedded?
68 <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-August/002361.html>
69 Accuracy requirements for dual (triple) purpose implementations must
70 meet the higher standard.
71 * Reciprocal Square-root is in its own separate extension (Zfrsqrt) as
72 it is desirable on its own by other implementors. This to be evaluated.
73
74 # Requirements <a name="requirements"></a>
75
76 This proposal is designed to meet a wide range of extremely diverse
77 needs, allowing implementors from all of them to benefit from the tools
78 and hardware cost reductions associated with common standards adoption
79 in Power ISA (primarily IEEE754 and Vulkan).
80
81 **The use-cases are**:
82
83 * 3D GPUs
84 * Numerical Computation
85 * (Potentially) A.I. / Machine-learning (1)
86
87 (1) although approximations suffice in this field, making it more likely
88 to use a custom extension. High-end ML would inherently definitely
89 be excluded.
90
91 **The power and die-area requirements vary from**:
92
93 * Ultra-low-power (smartwatches where GPU power budgets are in milliwatts)
94 * Mobile-Embedded (good performance with high efficiency for battery life)
95 * Desktop Computing
96 * Server / HPC / Supercomputing
97
98 **The software requirements are**:
99
100 * Full public integration into GNU math libraries (libm)
101 * Full public integration into well-known Numerical Computation systems (numpy)
102 * Full public integration into upstream GNU and LLVM Compiler toolchains
103 * Full public integration into Khronos OpenCL SPIR-V compatible Compilers
104 seeking public Certification and Endorsement from the Khronos Group
105 under their Trademarked Certification Programme.
106
107 # Proposed Opcodes vs Khronos OpenCL vs IEEE754-2019<a name="khronos_equiv"></a>
108
109 This list shows the (direct) equivalence between proposed opcodes,
110 their Khronos OpenCL equivalents, and their IEEE754-2019 equivalents.
111 98% of the opcodes in this proposal that are in the IEEE754-2019 standard
112 are present in the Khronos Extended Instruction Set.
113
114 See
115 <https://www.khronos.org/registry/spir-v/specs/unified1/OpenCL.ExtendedInstructionSet.100.html>
116 and <https://ieeexplore.ieee.org/document/8766229>
117
118 * Special FP16 opcodes are *not* being proposed, except by indirect / inherent
119 use of elwidth overrides that is already present in the SVP64 Specification.
120 * "Native" opcodes are *not* being proposed: implementors will be expected
121 to use the (equivalent) proposed opcode covering the same function.
122 * "Fast" opcodes are *not* being proposed, because the Khronos Specification
123 fast\_length, fast\_normalise and fast\_distance OpenCL opcodes require
124 vectors (or can be done as scalar operations using other Power ISA
125 instructions).
126
127 The OpenCL FP32 opcodes are **direct** equivalents to the proposed opcodes.
128 Deviation from conformance with the Khronos Specification - including the
129 Khronos Specification accuracy requirements - is not an option, as it
130 results in non-compliance, and the vendor may not use the Trademarked words
131 "Vulkan" etc. in conjunction with their product.
132
133 IEEE754-2019 Table 9.1 lists "additional mathematical operations".
134 Interestingly the only functions missing when compared to OpenCL are
135 compound, exp2m1, exp10m1, log2p1, log10p1, pown (integer power) and powr.
136
137 |opcode |OpenCL FP32|OpenCL FP16|OpenCL native|IEEE754 |Power ISA |
138 |------------|-----------|-----------|-------------|-------------- |------------------------|
139 |fsin |sin |half\_sin |native\_sin |sin |NONE |
140 |fcos |cos |half\_cos |native\_cos |cos |NONE |
141 |ftan |tan |half\_tan |native\_tan |tan |NONE |
142 |NONE (1) |sincos |NONE |NONE |NONE |NONE |
143 |fasin |asin |NONE |NONE |asin |NONE |
144 |facos |acos |NONE |NONE |acos |NONE |
145 |fatan |atan |NONE |NONE |atan |NONE |
146 |fsinpi |sinpi |NONE |NONE |sinPi |NONE |
147 |fcospi |cospi |NONE |NONE |cosPi |NONE |
148 |ftanpi |tanpi |NONE |NONE |tanPi |NONE |
149 |fasinpi |asinpi |NONE |NONE |asinPi |NONE |
150 |facospi |acospi |NONE |NONE |acosPi |NONE |
151 |fatanpi |atanpi |NONE |NONE |atanPi |NONE |
152 |fsinh |sinh |NONE |NONE |sinh |NONE |
153 |fcosh |cosh |NONE |NONE |cosh |NONE |
154 |ftanh |tanh |NONE |NONE |tanh |NONE |
155 |fasinh |asinh |NONE |NONE |asinh |NONE |
156 |facosh |acosh |NONE |NONE |acosh |NONE |
157 |fatanh |atanh |NONE |NONE |atanh |NONE |
158 |fatan2 |atan2 |NONE |NONE |atan2 |NONE |
159 |fatan2pi |atan2pi |NONE |NONE |atan2pi |NONE |
160 |frsqrt |rsqrt |half\_rsqrt|native\_rsqrt|rSqrt |fsqrte, fsqrtes (4) |
161 |fcbrt |cbrt |NONE |NONE |NONE (2) |NONE |
162 |fexp2 |exp2 |half\_exp2 |native\_exp2 |exp2 |NONE |
163 |flog2 |log2 |half\_log2 |native\_log2 |log2 |NONE |
164 |fexpm1 |expm1 |NONE |NONE |expm1 |NONE |
165 |flog1p |log1p |NONE |NONE |logp1 |NONE |
166 |fexp |exp |half\_exp |native\_exp |exp |NONE |
167 |flog |log |half\_log |native\_log |log |NONE |
168 |fexp10 |exp10 |half\_exp10|native\_exp10|exp10 |NONE |
169 |flog10 |log10 |half\_log10|native\_log10|log10 |NONE |
170 |fpow |pow |NONE |NONE |pow |NONE |
171 |fpown |pown |NONE |NONE |pown |NONE |
172 |fpowr |powr |half\_powr |native\_powr |powr |NONE |
173 |frootn |rootn |NONE |NONE |rootn |NONE |
174 |fhypot |hypot |NONE |NONE |hypot |NONE |
175 |frecip |NONE |half\_recip|native\_recip|NONE (3) |fre, fres (4) |
176 |NONE |NONE |NONE |NONE |compound |NONE |
177 |fexp2m1 |NONE |NONE |NONE |exp2m1 |NONE |
178 |fexp10m1 |NONE |NONE |NONE |exp10m1 |NONE |
179 |flog2p1 |NONE |NONE |NONE |log2p1 |NONE |
180 |flog10p1 |NONE |NONE |NONE |log10p1 |NONE |
181 |fminnum08 |fmin |fmin |NONE |minNum |xsmindp (5) |
182 |fmaxnum08 |fmax |fmax |NONE |maxNum |xsmaxdp (5) |
183 |fmin19 |fmin |fmin |NONE |minimum |NONE |
184 |fmax19 |fmax |fmax |NONE |maximum |NONE |
185 |fminnum19 |fmin |fmin |NONE |minimumNumber |vminfp (6), xsminjdp (5)|
186 |fmaxnum19 |fmax |fmax |NONE |maximumNumber |vmaxfp (6), xsmaxjdp (5)|
187 |fminc |fmin |fmin |NONE |NONE |xsmincdp (5) |
188 |fmaxc |fmax |fmax |NONE |NONE |xsmaxcdp (5) |
189 |fminmagnum08|minmag |minmag |NONE |minNumMag |NONE |
190 |fmaxmagnum08|maxmag |maxmag |NONE |maxNumMag |NONE |
191 |fminmag19 |minmag |minmag |NONE |minimumMagnitude |NONE |
192 |fmaxmag19 |maxmag |maxmag |NONE |maximumMagnitude |NONE |
193 |fminmagnum19|minmag |minmag |NONE |minimumMagnitudeNumber|NONE |
194 |fmaxmagnum19|maxmag |maxmag |NONE |maximumMagnitudeNumber|NONE |
195 |fminmagc |minmag |minmag |NONE |NONE |NONE |
196 |fmaxmagc |maxmag |maxmag |NONE |NONE |NONE |
197 |fmod |fmod |fmod | |NONE |NONE |
198 |fremainder |remainder |remainder | |remainder |NONE |
199
200 Note (1) fsincos is macro-op fused (see below).
201
202 Note (2) synthesised in IEEE754-2019 as "rootn(x, 3)"
203
204 Note (3) synthesised in IEEE754-2019 using "1.0 / x"
205
206 Note (4) these are estimate opcodes that help accelerate
207 software emulation
208
209 Note (5) f64-only (though can be used on f32 stored in f64 format), requires VSX.
210
211 Note (6) 4xf32-only, requires VMX.
212
213 ## List of 2-arg opcodes
214
215 | opcode | Description | pseudocode | Extension |
216 | ------ | ---------------- | ---------------- | ----------- |
217 | fatan2 | atan2 arc tangent | FRT = atan2(FRB, FRA) | Zarctrignpi |
218 | fatan2pi | atan2 arc tangent / pi | FRT = atan2(FRB, FRA) / pi | Zarctrigpi |
219 | fpow | x power of y | FRT = pow(FRA, FRB) | ZftransAdv |
220 | fpown | x power of n (n int) | FRT = pow(FRA, RB) | ZftransAdv |
221 | fpowr | x power of y (x +ve) | FRT = exp(FRA log(FRB)) | ZftransAdv |
222 | frootn | x power 1/n (n integer) | FRT = pow(FRA, 1/RB) | ZftransAdv |
223 | fhypot | hypotenuse | FRT = sqrt(FRA^2 + FRB^2) | ZftransAdv |
224 | fminnum08 | IEEE 754-2008 minNum | FRT = minNum(FRA, FRB) (1) | TBD |
225 | fmaxnum08 | IEEE 754-2008 maxNum | FRT = maxNum(FRA, FRB) (1) | TBD |
226 | fmin19 | IEEE 754-2019 minimum | FRT = minimum(FRA, FRB) | TBD |
227 | fmax19 | IEEE 754-2019 maximum | FRT = maximum(FRA, FRB) | TBD |
228 | fminnum19 | IEEE 754-2019 minimumNumber | FRT = minimumNumber(FRA, FRB) | TBD |
229 | fmaxnum19 | IEEE 754-2019 maximumNumber | FRT = maximumNumber(FRA, FRB) | TBD |
230 | fminc | C ternary-op minimum | FRT = FRA \< FRB ? FRA : FRB | TBD |
231 | fmaxc | C ternary-op maximum | FRT = FRA > FRB ? FRA : FRB | TBD |
232 | fminmagnum08 | IEEE 754-2008 minNumMag | FRT = minmaxmag(FRA, FRB, False, fminnum08) (2)| TBD |
233 | fmaxmagnum08 | IEEE 754-2008 maxNumMag | FRT = minmaxmag(FRA, FRB, True, fmaxnum08) (2) | TBD |
234 | fminmag19 | IEEE 754-2019 minimumMagnitude | FRT = minmaxmag(FRA, FRB, False, fmin19) (2) | TBD |
235 | fmaxmag19 | IEEE 754-2019 maximumMagnitude | FRT = minmaxmag(FRA, FRB, True, fmax19) (2) | TBD |
236 | fminmagnum19 | IEEE 754-2019 minimumMagnitudeNumber | FRT = minmaxmag(FRA, FRB, False, fminnum19) (2)| TBD |
237 | fmaxmagnum19 | IEEE 754-2019 maximumMagnitudeNumber | FRT = minmaxmag(FRA, FRB, True, fmaxnum19) (2) | TBD |
238 | fminmagc | C ternary-op minimum magnitude | FRT = minmaxmag(FRA, FRB, False, fminc) (2) | TBD |
239 | fmaxmagc | C ternary-op maximum magnitude | FRT = minmaxmag(FRA, FRB, True, fmaxc) (2) | TBD |
240 | fmod | modulus | FRT = fmod(FRA, FRB) | TBD |
241 | fremainder | IEEE 754 remainder | FRT = remainder(FRA, FRB) | TBD |
242
243 Note (1): for the purposes of minNum/maxNum, -0.0 is defined to be less than +0.0. This is not unspecified in IEEE 754-2008.
244
245 Note (2): minmaxmag(x, y, cmp, fallback) is defined as:
246
247 ```python
248 def minmaxmag(x, y, is_max, fallback):
249 a = abs(x) < abs(y)
250 b = abs(x) > abs(y)
251 if is_max:
252 a, b = b, a # swap
253 if a:
254 return x
255 if b:
256 return y
257 # equal magnitudes, or NaN input(s)
258 return fallback(x, y)
259 ```
260
261 ## List of 1-arg transcendental opcodes
262
263 | opcode | Description | pseudocode | Extension |
264 | ------ | ---------------- | ---------------- | ---------- |
265 | frsqrt | Reciprocal Square-root | FRT = sqrt(FRA) | Zfrsqrt |
266 | fcbrt | Cube Root | FRT = pow(FRA, 1.0 / 3) | ZftransAdv |
267 | frecip | Reciprocal | FRT = 1.0 / FRA | Zftrans |
268 | fexp2m1 | power-2 minus 1 | FRT = pow(2, FRA) - 1.0 | ZftransExt |
269 | flog2p1 | log2 plus 1 | FRT = log(2, 1 + FRA) | ZftransExt |
270 | fexp2 | power-of-2 | FRT = pow(2, FRA) | Zftrans |
271 | flog2 | log2 | FRT = log(2. FRA) | Zftrans |
272 | fexpm1 | exponential minus 1 | FRT = pow(e, FRA) - 1.0 | ZftransExt |
273 | flog1p | log plus 1 | FRT = log(e, 1 + FRA) | ZftransExt |
274 | fexp | exponential | FRT = pow(e, FRA) | ZftransExt |
275 | flog | natural log (base e) | FRT = log(e, FRA) | ZftransExt |
276 | fexp10m1 | power-10 minus 1 | FRT = pow(10, FRA) - 1.0 | ZftransExt |
277 | flog10p1 | log10 plus 1 | FRT = log(10, 1 + FRA) | ZftransExt |
278 | fexp10 | power-of-10 | FRT = pow(10, FRA) | ZftransExt |
279 | flog10 | log base 10 | FRT = log(10, FRA) | ZftransExt |
280
281 ## List of 1-arg trigonometric opcodes
282
283 | opcode | Description | pseudocode | Extension |
284 | -------- | ------------------------ | ------------------------ | ----------- |
285 | fsin | sin (radians) | FRT = sin(FRA) | Ztrignpi |
286 | fcos | cos (radians) | FRT = cos(FRA) | Ztrignpi |
287 | ftan | tan (radians) | FRT = tan(FRA) | Ztrignpi |
288 | fasin | arcsin (radians) | FRT = asin(FRA) | Zarctrignpi |
289 | facos | arccos (radians) | FRT = acos(FRA) | Zarctrignpi |
290 | fatan | arctan (radians) | FRT = atan(FRA) | Zarctrignpi |
291 | fsinpi | sin times pi | FRT = sin(pi * FRA) | Ztrigpi |
292 | fcospi | cos times pi | FRT = cos(pi * FRA) | Ztrigpi |
293 | ftanpi | tan times pi | FRT = tan(pi * FRA) | Ztrigpi |
294 | fasinpi | arcsin / pi | FRT = asin(FRA) / pi | Zarctrigpi |
295 | facospi | arccos / pi | FRT = acos(FRA) / pi | Zarctrigpi |
296 | fatanpi | arctan / pi | FRT = atan(FRA) / pi | Zarctrigpi |
297 | fsinh | hyperbolic sin (radians) | FRT = sinh(FRA) | Zfhyp |
298 | fcosh | hyperbolic cos (radians) | FRT = cosh(FRA) | Zfhyp |
299 | ftanh | hyperbolic tan (radians) | FRT = tanh(FRA) | Zfhyp |
300 | fasinh | inverse hyperbolic sin | FRT = asinh(FRA) | Zfhyp |
301 | facosh | inverse hyperbolic cos | FRT = acosh(FRA) | Zfhyp |
302 | fatanh | inverse hyperbolic tan | FRT = atanh(FRA) | Zfhyp |
303
304 [[!inline pages="openpower/power_trans_ops" raw=yes ]]
305
306 # Subsets
307
308 The full set is based on the Khronos OpenCL opcodes. If implemented
309 entirely it would be too much for both Embedded and also 3D.
310
311 The subsets are organised by hardware complexity, need (3D, HPC), however
312 due to synthesis producing inaccurate results at the range limits,
313 the less common subsets are still required for IEEE754 HPC.
314
315 MALI Midgard, an embedded / mobile 3D GPU, for example only has the
316 following opcodes:
317
318 E8 - fatan_pt2
319 F0 - frcp (reciprocal)
320 F2 - frsqrt (inverse square root, 1/sqrt(x))
321 F3 - fsqrt (square root)
322 F4 - fexp2 (2^x)
323 F5 - flog2
324 F6 - fsin1pi
325 F7 - fcos1pi
326 F9 - fatan_pt1
327
328 These in FP32 and FP16 only: no FP64 hardware, at all.
329
330 Vivante Embedded/Mobile 3D (etnaviv
331 <https://github.com/laanwj/etna_viv/blob/master/rnndb/isa.xml>)
332 only has the following:
333
334 sin, cos2pi
335 cos, sin2pi
336 log2, exp
337 sqrt and rsqrt
338 recip.
339
340 It also has fast variants of some of these, as a CSR Mode.
341
342 AMD's R600 GPU (R600\_Instruction\_Set\_Architecture.pdf) and the
343 RDNA ISA (RDNA\_Shader\_ISA\_5August2019.pdf, Table 22, Section 6.3) have:
344
345 COS2PI (appx)
346 EXP2
347 LOG (IEEE754)
348 RECIP
349 RSQRT
350 SQRT
351 SIN2PI (appx)
352
353 AMD RDNA has F16 and F32 variants of all the above, and also has F64
354 variants of SQRT, RSQRT and RECIP. It is interesting that even the
355 modern high-end AMD GPU does not have TAN or ATAN, where MALI Midgard
356 does.
357
358 Also a general point, that customised optimised hardware targetting
359 FP32 3D with less accuracy simply can neither be used for IEEE754 nor
360 for FP64 (except as a starting point for hardware or software driven
361 Newton Raphson or other iterative method).
362
363 Also in cost/area sensitive applications even the extra ROM lookup tables
364 for certain algorithms may be too costly.
365
366 These wildly differing and incompatible driving factors lead to the
367 subset subdivisions, below.
368
369 ## Transcendental Subsets
370
371 ### Zftrans
372
373 LOG2 EXP2 RECIP RSQRT
374
375 Zftrans contains the minimum standard transcendentals best suited to
376 3D. They are also the minimum subset for synthesising log10, exp10,
377 exp1m, log1p, the hyperbolic trigonometric functions sinh and so on.
378
379 They are therefore considered "base" (essential) transcendentals.
380
381 ### ZftransExt
382
383 LOG, EXP, EXP10, LOG10, LOGP1, EXP1M
384
385 These are extra transcendental functions that are useful, not generally
386 needed for 3D, however for Numerical Computation they may be useful.
387
388 Although they can be synthesised using Ztrans (LOG2 multiplied
389 by a constant), there is both a performance penalty as well as an
390 accuracy penalty towards the limits, which for IEEE754 compliance is
391 unacceptable. In particular, LOG(1+FRA) in hardware may give much better
392 accuracy at the lower end (very small FRA) than LOG(FRA).
393
394 Their forced inclusion would be inappropriate as it would penalise
395 embedded systems with tight power and area budgets. However if they
396 were completely excluded the HPC applications would be penalised on
397 performance and accuracy.
398
399 Therefore they are their own subset extension.
400
401 ### Zfhyp
402
403 SINH, COSH, TANH, ASINH, ACOSH, ATANH
404
405 These are the hyperbolic/inverse-hyperbolic functions. Their use in 3D
406 is limited.
407
408 They can all be synthesised using LOG, SQRT and so on, so depend
409 on Zftrans. However, once again, at the limits of the range, IEEE754
410 compliance becomes impossible, and thus a hardware implementation may
411 be required.
412
413 HPC and high-end GPUs are likely markets for these.
414
415 ### ZftransAdv
416
417 CBRT, POW, POWN, POWR, ROOTN
418
419 These are simply much more complex to implement in hardware, and typically
420 will only be put into HPC applications.
421
422 * **Zfrsqrt**: Reciprocal square-root.
423
424 ## Trigonometric subsets
425
426 ### Ztrigpi vs Ztrignpi
427
428 * **Ztrigpi**: SINPI COSPI TANPI
429 * **Ztrignpi**: SIN COS TAN
430
431 Ztrignpi are the basic trigonometric functions through which all others
432 could be synthesised, and they are typically the base trigonometrics
433 provided by GPUs for 3D, warranting their own subset.
434
435 (programmerjake: actually, all other GPU ISAs mentioned in this document have sinpi/cospi or equivalent, and often not sin/cos, because sinpi/cospi are actually *waay* easier to implement because range reduction is simply a bitwise mask, whereas for sin/cos range reduction is a full division by pi)
436
437 In the case of the Ztrigpi subset, these are commonly used in for loops
438 with a power of two number of subdivisions, and the cost of multiplying
439 by PI inside each loop (or cumulative addition, resulting in cumulative
440 errors) is not acceptable.
441
442 In for example CORDIC the multiplication by PI may be moved outside of
443 the hardware algorithm as a loop invariant, with no power or area penalty.
444
445 Again, therefore, if SINPI (etc.) were excluded, programmers would be
446 penalised by being forced to divide by PI in some circumstances. Likewise
447 if SIN were excluded, programmers would be penaslised by being forced
448 to *multiply* by PI in some circumstances.
449
450 Thus again, a slightly different application of the same general argument
451 applies to give Ztrignpi and Ztrigpi as subsets. 3D GPUs will almost
452 certainly provide both.
453
454 ### Zarctrigpi and Zarctrignpi
455
456 * **Zarctrigpi**: ATAN2PI ASINPI ACOSPI
457 * **Zarctrignpi**: ATAN2 ACOS ASIN
458
459 These are extra trigonometric functions that are useful in some
460 applications, but even for 3D GPUs, particularly embedded and mobile class
461 GPUs, they are not so common and so are typically synthesised, there.
462
463 Although they can be synthesised using Ztrigpi and Ztrignpi, there is,
464 once again, both a performance penalty as well as an accuracy penalty
465 towards the limits, which for IEEE754 compliance is unacceptable, yet
466 is acceptable for 3D.
467
468 Therefore they are their own subset extensions.
469
470 # Synthesis, Pseudo-code ops and macro-ops
471
472 The pseudo-ops are best left up to the compiler rather than being actual
473 pseudo-ops, by allocating one scalar FP register for use as a constant
474 (loop invariant) set to "1.0" at the beginning of a function or other
475 suitable code block.
476
477 * fsincos - fused macro-op between fsin and fcos (issued in that order).
478 * fsincospi - fused macro-op between fsinpi and fcospi (issued in that order).
479
480 fatanpi example pseudo-code:
481
482 fmvis ft0, 0x3F800 // upper bits of f32 1.0 (BF16)
483 fatan2pis FRT, FRA, ft0
484
485 Hyperbolic function example (obviates need for Zfhyp except for
486 high-performance or correctly-rounding):
487
488 ASINH( x ) = ln( x + SQRT(x**2+1))
489
490 # Evaluation and commentary
491
492 Moved to [[discussion]]
493