openpower/transcendentals.mdwn

   1 # DRAFT Scalar Transcendentals
   2
   3 Summary:
   4
   5 *This proposal extends Power ISA scalar floating point operations to
   6 add IEEE754 transcendental functions (pow, log etc) and trigonometric
   7 functions (sin, cos etc). These functions are also 98% shared with the
   8 Khronos Group OpenCL Extended Instruction Set.*
   9
  10 Authors/Contributors:
  11
  12 * Luke Kenneth Casson Leighton
  13 * Jacob Lifshay
  14 * Dan Petroski
  15 * Mitch Alsup
  16 * Allen Baum
  17 * Andrew Waterman
  18 * Luis Vitorio Cargnini
  19
  20 [[!toc levels=2]]
  21
  22 See:
  23
  24 * <http://bugs.libre-soc.org/show_bug.cgi?id=127>
  25 * <https://bugs.libre-soc.org/show_bug.cgi?id=923> under review
  26 * <https://www.khronos.org/registry/spir-v/specs/unified1/OpenCL.ExtendedInstructionSet.100.html>
  27 * [[power_trans_ops]] for opcode listing.
  28
  29 Extension subsets:
  30
  31 TODO: rename extension subsets -- we're not on RISC-V anymore.
  32
  33 * **Zftrans**: standard transcendentals (best suited to 3D)
  34 * **ZftransExt**: extra functions (useful, not generally needed for 3D,
  35   can be synthesised using Ztrans)
  36 * **Ztrigpi**: trig. xxx-pi sinpi cospi tanpi
  37 * **Ztrignpi**: trig non-xxx-pi sin cos tan
  38 * **Zarctrigpi**: arc-trig. a-xxx-pi: atan2pi asinpi acospi
  39 * **Zarctrignpi**: arc-trig. non-a-xxx-pi: atan2, asin, acos
  40 * **Zfhyp**: hyperbolic/inverse-hyperbolic.  sinh, cosh, tanh, asinh,
  41   acosh, atanh (can be synthesised - see below)
  42 * **ZftransAdv**: much more complex to implement in hardware
  43 * **Zfrsqrt**: Reciprocal square-root.
  44
  45 Minimum recommended requirements for 3D: Zftrans, Ztrignpi,
  46 Zarctrignpi, with Ztrigpi and Zarctrigpi as augmentations.
  47
  48 Minimum recommended requirements for Mobile-Embedded 3D:
  49 Ztrignpi, Zftrans, with Ztrigpi as an augmentation.
  50
  51 The Platform Requirements for 3D are driven by cost competitive
  52 factors and it is the Trademarked Vulkan Specification that provides
  53 clear direction for 3D GPU markets, but nothing else (IEEE754).
  54 Implementors must note that minimum
  55 Compliance with the Third Party Vulkan Specification (for power-area competitive
  56 reasons with other 3D GPU manufacturers) will not qualify for strict IEEE754 accuracy Compliance or vice-versa.
  57
  58 Implementors **must** make it clear which accuracy level is implemented and provide a switching mechanism and throw Illegal Instruction traps if fully compliant accuracy cannot be achieved.
  59 It is also the Implementor's responsibility to comply with all Third Party Certification Marks and Trademarks (Vulkan, OpenCL). Nothing in this specification in any way implies that any Third Party Certification Mark Compliance is granted, nullified, altered or overridden by this document.
  60
  61
  62 # TODO:
  63
  64 * Decision on accuracy, moved to [[zfpacc_proposal]]
  65 <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-August/002355.html>
  66 * Errors **MUST** be repeatable.
  67 * How about four Platform Specifications? 3DUNIX, UNIX, 3DEmbedded and Embedded?
  68 <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-August/002361.html>
  69   Accuracy requirements for dual (triple) purpose implementations must
  70   meet the higher standard.
  71 * Reciprocal Square-root is in its own separate extension (Zfrsqrt) as
  72   it is desirable on its own by other implementors.  This to be evaluated.
  73
  74 # Requirements <a name="requirements"></a>
  75
  76 This proposal is designed to meet a wide range of extremely diverse
  77 needs, allowing implementors from all of them to benefit from the tools
  78 and hardware cost reductions associated with common standards adoption
  79 in Power ISA (primarily IEEE754 and Vulkan).
  80
  81 **The use-cases are**:
  82
  83 * 3D GPUs
  84 * Numerical Computation
  85 * (Potentially) A.I. / Machine-learning (1)
  86
  87 (1) although approximations suffice in this field, making it more likely
  88 to use a custom extension.  High-end ML would inherently definitely
  89 be excluded.
  90
  91 **The power and die-area requirements vary from**:
  92
  93 * Ultra-low-power (smartwatches where GPU power budgets are in milliwatts)
  94 * Mobile-Embedded (good performance with high efficiency for battery life)
  95 * Desktop Computing
  96 * Server / HPC / Supercomputing
  97
  98 **The software requirements are**:
  99
 100 * Full public integration into GNU math libraries (libm)
 101 * Full public integration into well-known Numerical Computation systems (numpy)
 102 * Full public integration into upstream GNU and LLVM Compiler toolchains
 103 * Full public integration into Khronos OpenCL SPIR-V compatible Compilers
 104   seeking public Certification and Endorsement from the Khronos Group
 105   under their Trademarked Certification Programme.
 106
 107 # Proposed Opcodes vs Khronos OpenCL vs IEEE754-2019<a name="khronos_equiv"></a>
 108
 109 This list shows the (direct) equivalence between proposed opcodes,
 110 their Khronos OpenCL equivalents, and their IEEE754-2019 equivalents.
 111 98% of the opcodes in this proposal that are in the IEEE754-2019 standard
 112 are present in the Khronos Extended Instruction Set.
 113
 114 See
 115 <https://www.khronos.org/registry/spir-v/specs/unified1/OpenCL.ExtendedInstructionSet.100.html>
 116 and <https://ieeexplore.ieee.org/document/8766229>
 117
 118 * Special FP16 opcodes are *not* being proposed, except by indirect / inherent
 119   use of elwidth overrides that is already present in the SVP64 Specification.
 120 * "Native" opcodes are *not* being proposed: implementors will be expected
 121   to use the (equivalent) proposed opcode covering the same function.
 122 * "Fast" opcodes are *not* being proposed, because the Khronos Specification
 123   fast\_length, fast\_normalise and fast\_distance OpenCL opcodes require
 124   vectors (or can be done as scalar operations using other Power ISA
 125   instructions).
 126
 127 The OpenCL FP32 opcodes are **direct** equivalents to the proposed opcodes.
 128 Deviation from conformance with the Khronos Specification - including the
 129 Khronos Specification accuracy requirements - is not an option, as it
 130 results in non-compliance, and the vendor may not use the Trademarked words
 131 "Vulkan" etc. in conjunction with their product.
 132
 133 IEEE754-2019 Table 9.1 lists "additional mathematical operations".
 134 Interestingly the only functions missing when compared to OpenCL are
 135 compound, exp2m1, exp10m1, log2p1, log10p1, pown (integer power) and powr.
 136
 137 |opcode      |OpenCL FP32|OpenCL FP16|OpenCL native|IEEE754               |Power ISA               |
 138 |------------|-----------|-----------|-------------|--------------        |------------------------|
 139 |fsin        |sin        |half\_sin  |native\_sin  |sin                   |NONE                    |
 140 |fcos        |cos        |half\_cos  |native\_cos  |cos                   |NONE                    |
 141 |ftan        |tan        |half\_tan  |native\_tan  |tan                   |NONE                    |
 142 |NONE (1)    |sincos     |NONE       |NONE         |NONE                  |NONE                    |
 143 |fasin       |asin       |NONE       |NONE         |asin                  |NONE                    |
 144 |facos       |acos       |NONE       |NONE         |acos                  |NONE                    |
 145 |fatan       |atan       |NONE       |NONE         |atan                  |NONE                    |
 146 |fsinpi      |sinpi      |NONE       |NONE         |sinPi                 |NONE                    |
 147 |fcospi      |cospi      |NONE       |NONE         |cosPi                 |NONE                    |
 148 |ftanpi      |tanpi      |NONE       |NONE         |tanPi                 |NONE                    |
 149 |fasinpi     |asinpi     |NONE       |NONE         |asinPi                |NONE                    |
 150 |facospi     |acospi     |NONE       |NONE         |acosPi                |NONE                    |
 151 |fatanpi     |atanpi     |NONE       |NONE         |atanPi                |NONE                    |
 152 |fsinh       |sinh       |NONE       |NONE         |sinh                  |NONE                    |
 153 |fcosh       |cosh       |NONE       |NONE         |cosh                  |NONE                    |
 154 |ftanh       |tanh       |NONE       |NONE         |tanh                  |NONE                    |
 155 |fasinh      |asinh      |NONE       |NONE         |asinh                 |NONE                    |
 156 |facosh      |acosh      |NONE       |NONE         |acosh                 |NONE                    |
 157 |fatanh      |atanh      |NONE       |NONE         |atanh                 |NONE                    |
 158 |fatan2      |atan2      |NONE       |NONE         |atan2                 |NONE                    |
 159 |fatan2pi    |atan2pi    |NONE       |NONE         |atan2pi               |NONE                    |
 160 |frsqrt      |rsqrt      |half\_rsqrt|native\_rsqrt|rSqrt                 |fsqrte, fsqrtes (4)     |
 161 |fcbrt       |cbrt       |NONE       |NONE         |NONE (2)              |NONE                    |
 162 |fexp2       |exp2       |half\_exp2 |native\_exp2 |exp2                  |NONE                    |
 163 |flog2       |log2       |half\_log2 |native\_log2 |log2                  |NONE                    |
 164 |fexpm1      |expm1      |NONE       |NONE         |expm1                 |NONE                    |
 165 |flog1p      |log1p      |NONE       |NONE         |logp1                 |NONE                    |
 166 |fexp        |exp        |half\_exp  |native\_exp  |exp                   |NONE                    |
 167 |flog        |log        |half\_log  |native\_log  |log                   |NONE                    |
 168 |fexp10      |exp10      |half\_exp10|native\_exp10|exp10                 |NONE                    |
 169 |flog10      |log10      |half\_log10|native\_log10|log10                 |NONE                    |
 170 |fpow        |pow        |NONE       |NONE         |pow                   |NONE                    |
 171 |fpown       |pown       |NONE       |NONE         |pown                  |NONE                    |
 172 |fpowr       |powr       |half\_powr |native\_powr |powr                  |NONE                    |
 173 |frootn      |rootn      |NONE       |NONE         |rootn                 |NONE                    |
 174 |fhypot      |hypot      |NONE       |NONE         |hypot                 |NONE                    |
 175 |frecip      |NONE       |half\_recip|native\_recip|NONE (3)              |fre, fres (4)           |
 176 |NONE        |NONE       |NONE       |NONE         |compound              |NONE                    |
 177 |fexp2m1     |NONE       |NONE       |NONE         |exp2m1                |NONE                    |
 178 |fexp10m1    |NONE       |NONE       |NONE         |exp10m1               |NONE                    |
 179 |flog2p1     |NONE       |NONE       |NONE         |log2p1                |NONE                    |
 180 |flog10p1    |NONE       |NONE       |NONE         |log10p1               |NONE                    |
 181
 182 Note (1) fsincos is macro-op fused (see below).
 183
 184 Note (2) synthesised in IEEE754-2019 as "rootn(x, 3)"
 185
 186 Note (3) synthesised in IEEE754-2019 using "1.0 / x"
 187
 188 Note (4) these are estimate opcodes that help accelerate
 189 software emulation
 190
 191 ## List of 2-arg opcodes
 192
 193 | opcode       | Description                          | pseudocode                                     | Extension   |
 194 | ------       | ----------------                     | ----------------                               | ----------- |
 195 | fatan2       | atan2 arc tangent                    | FRT = atan2(FRB, FRA)                          | Zarctrignpi |
 196 | fatan2pi     | atan2 arc tangent / pi               | FRT = atan2(FRB, FRA) / pi                     | Zarctrigpi  |
 197 | fpow         | x power of y                         | FRT = pow(FRA, FRB)                            | ZftransAdv  |
 198 | fpown        | x power of n (n int)                 | FRT = pow(FRA, RB)                             | ZftransAdv  |
 199 | fpowr        | x power of y (x +ve)                 | FRT = exp(FRA log(FRB))                        | ZftransAdv  |
 200 | frootn       | x power 1/n (n integer)              | FRT = pow(FRA, 1/RB)                           | ZftransAdv  |
 201 | fhypot       | hypotenuse                           | FRT = sqrt(FRA^2 + FRB^2)                      | ZftransAdv  |
 202
 203 ## List of 1-arg transcendental opcodes
 204
 205 | opcode   | Description            | pseudocode               | Extension  |
 206 | ------   | ----------------       | ----------------         | ---------- |
 207 | frsqrt   | Reciprocal Square-root | FRT = sqrt(FRA)          | Zfrsqrt    |
 208 | fcbrt    | Cube Root              | FRT = pow(FRA, 1.0 / 3)  | ZftransAdv |
 209 | frecip   | Reciprocal             | FRT = 1.0 / FRA          | Zftrans    |
 210 | fexp2m1  | power-2 minus 1        | FRT = pow(2, FRA) - 1.0  | ZftransExt |
 211 | flog2p1  | log2 plus 1            | FRT = log(2, 1 + FRA)    | ZftransExt |
 212 | fexp2    | power-of-2             | FRT = pow(2, FRA)        | Zftrans    |
 213 | flog2    | log2                   | FRT = log(2. FRA)        | Zftrans    |
 214 | fexpm1   | exponential minus 1    | FRT = pow(e, FRA) - 1.0  | ZftransExt |
 215 | flog1p   | log plus 1             | FRT = log(e, 1 + FRA)    | ZftransExt |
 216 | fexp     | exponential            | FRT = pow(e, FRA)        | ZftransExt |
 217 | flog     | natural log (base e)   | FRT = log(e, FRA)        | ZftransExt |
 218 | fexp10m1 | power-10 minus 1       | FRT = pow(10, FRA) - 1.0 | ZftransExt |
 219 | flog10p1 | log10 plus 1           | FRT = log(10, 1 + FRA)   | ZftransExt |
 220 | fexp10   | power-of-10            | FRT = pow(10, FRA)       | ZftransExt |
 221 | flog10   | log base 10            | FRT = log(10, FRA)       | ZftransExt |
 222
 223 ## List of 1-arg trigonometric opcodes
 224
 225 | opcode   | Description              | pseudocode               | Extension   |
 226 | -------- | ------------------------ | ------------------------ | ----------- |
 227 | fsin     | sin (radians)            | FRT = sin(FRA)           | Ztrignpi    |
 228 | fcos     | cos (radians)            | FRT = cos(FRA)           | Ztrignpi    |
 229 | ftan     | tan (radians)            | FRT = tan(FRA)           | Ztrignpi    |
 230 | fasin    | arcsin (radians)         | FRT = asin(FRA)          | Zarctrignpi |
 231 | facos    | arccos (radians)         | FRT = acos(FRA)          | Zarctrignpi |
 232 | fatan    | arctan (radians)         | FRT = atan(FRA)          | Zarctrignpi |
 233 | fsinpi   | sin times pi             | FRT = sin(pi * FRA)      | Ztrigpi     |
 234 | fcospi   | cos times pi             | FRT = cos(pi * FRA)      | Ztrigpi     |
 235 | ftanpi   | tan times pi             | FRT = tan(pi * FRA)      | Ztrigpi     |
 236 | fasinpi  | arcsin / pi              | FRT = asin(FRA) / pi     | Zarctrigpi  |
 237 | facospi  | arccos / pi              | FRT = acos(FRA) / pi     | Zarctrigpi  |
 238 | fatanpi  | arctan / pi              | FRT = atan(FRA) / pi     | Zarctrigpi  |
 239 | fsinh    | hyperbolic sin (radians) | FRT = sinh(FRA)          | Zfhyp       |
 240 | fcosh    | hyperbolic cos (radians) | FRT = cosh(FRA)          | Zfhyp       |
 241 | ftanh    | hyperbolic tan (radians) | FRT = tanh(FRA)          | Zfhyp       |
 242 | fasinh   | inverse hyperbolic sin   | FRT = asinh(FRA)         | Zfhyp       |
 243 | facosh   | inverse hyperbolic cos   | FRT = acosh(FRA)         | Zfhyp       |
 244 | fatanh   | inverse hyperbolic tan   | FRT = atanh(FRA)         | Zfhyp       |
 245
 246 [[!inline pages="openpower/power_trans_ops" raw=yes ]]
 247
 248 # Subsets
 249
 250 The full set is based on the Khronos OpenCL opcodes. If implemented
 251 entirely it would be too much for both Embedded and also 3D.
 252
 253 The subsets are organised by hardware complexity, need (3D, HPC), however
 254 due to synthesis producing inaccurate results at the range limits,
 255 the less common subsets are still required for IEEE754 HPC.
 256
 257 MALI Midgard, an embedded / mobile 3D GPU, for example only has the
 258 following opcodes:
 259
 260     E8 - fatan_pt2
 261     F0 - frcp (reciprocal)
 262     F2 - frsqrt (inverse square root, 1/sqrt(x))
 263     F3 - fsqrt (square root)
 264     F4 - fexp2 (2^x)
 265     F5 - flog2
 266     F6 - fsin1pi
 267     F7 - fcos1pi
 268     F9 - fatan_pt1
 269
 270 These in FP32 and FP16 only: no FP64 hardware, at all.
 271
 272 Vivante Embedded/Mobile 3D (etnaviv
 273 <https://github.com/laanwj/etna_viv/blob/master/rnndb/isa.xml>)
 274 only has the following:
 275
 276     sin, cos2pi
 277     cos, sin2pi
 278     log2, exp
 279     sqrt and rsqrt
 280     recip.
 281
 282 It also has fast variants of some of these, as a CSR Mode.
 283
 284 AMD's R600 GPU (R600\_Instruction\_Set\_Architecture.pdf) and the
 285 RDNA ISA (RDNA\_Shader\_ISA\_5August2019.pdf, Table 22, Section 6.3) have:
 286
 287     COS2PI (appx)
 288     EXP2
 289     LOG (IEEE754)
 290     RECIP
 291     RSQRT
 292     SQRT
 293     SIN2PI (appx)
 294
 295 AMD RDNA has F16 and F32 variants of all the above, and also has F64
 296 variants of SQRT, RSQRT and RECIP.  It is interesting that even the
 297 modern high-end AMD GPU does not have TAN or ATAN, where MALI Midgard
 298 does.
 299
 300 Also a general point, that customised optimised hardware targetting
 301 FP32 3D with less accuracy simply can neither be used for IEEE754 nor
 302 for FP64 (except as a starting point for hardware or software driven
 303 Newton Raphson or other iterative method).
 304
 305 Also in cost/area sensitive applications even the extra ROM lookup tables
 306 for certain algorithms may be too costly.
 307
 308 These wildly differing and incompatible driving factors lead to the
 309 subset subdivisions, below.
 310
 311 ## Transcendental Subsets
 312
 313 ### Zftrans
 314
 315 LOG2 EXP2 RECIP RSQRT
 316
 317 Zftrans contains the minimum standard transcendentals best suited to
 318 3D. They are also the minimum subset for synthesising log10, exp10,
 319 exp1m, log1p, the hyperbolic trigonometric functions sinh and so on.
 320
 321 They are therefore considered "base" (essential) transcendentals.
 322
 323 ### ZftransExt
 324
 325 LOG, EXP, EXP10, LOG10, LOGP1, EXP1M
 326
 327 These are extra transcendental functions that are useful, not generally
 328 needed for 3D, however for Numerical Computation they may be useful.
 329
 330 Although they can be synthesised using Ztrans (LOG2 multiplied
 331 by a constant), there is both a performance penalty as well as an
 332 accuracy penalty towards the limits, which for IEEE754 compliance is
 333 unacceptable. In particular, LOG(1+FRA) in hardware may give much better
 334 accuracy at the lower end (very small FRA) than LOG(FRA).
 335
 336 Their forced inclusion would be inappropriate as it would penalise
 337 embedded systems with tight power and area budgets.  However if they
 338 were completely excluded the HPC applications would be penalised on
 339 performance and accuracy.
 340
 341 Therefore they are their own subset extension.
 342
 343 ### Zfhyp
 344
 345 SINH, COSH, TANH, ASINH, ACOSH, ATANH
 346
 347 These are the hyperbolic/inverse-hyperbolic functions. Their use in 3D
 348 is limited.
 349
 350 They can all be synthesised using LOG, SQRT and so on, so depend
 351 on Zftrans.  However, once again, at the limits of the range, IEEE754
 352 compliance becomes impossible, and thus a hardware implementation may
 353 be required.
 354
 355 HPC and high-end GPUs are likely markets for these.
 356
 357 ### ZftransAdv
 358
 359 CBRT, POW, POWN, POWR, ROOTN
 360
 361 These are simply much more complex to implement in hardware, and typically
 362 will only be put into HPC applications.
 363
 364 * **Zfrsqrt**: Reciprocal square-root.
 365
 366 ## Trigonometric subsets
 367
 368 ### Ztrigpi vs Ztrignpi
 369
 370 * **Ztrigpi**: SINPI COSPI TANPI
 371 * **Ztrignpi**: SIN COS TAN
 372
 373 Ztrignpi are the basic trigonometric functions through which all others
 374 could be synthesised, and they are typically the base trigonometrics
 375 provided by GPUs for 3D, warranting their own subset.
 376
 377 (programmerjake: actually, all other GPU ISAs mentioned in this document have sinpi/cospi or equivalent, and often not sin/cos, because sinpi/cospi are actually *waay* easier to implement because range reduction is simply a bitwise mask, whereas for sin/cos range reduction is a full division by pi)
 378
 379 In the case of the Ztrigpi subset, these are commonly used in for loops
 380 with a power of two number of subdivisions, and the cost of multiplying
 381 by PI inside each loop (or cumulative addition, resulting in cumulative
 382 errors) is not acceptable.
 383
 384 In for example CORDIC the multiplication by PI may be moved outside of
 385 the hardware algorithm as a loop invariant, with no power or area penalty.
 386
 387 Again, therefore, if SINPI (etc.) were excluded, programmers would be
 388 penalised by being forced to divide by PI in some circumstances. Likewise
 389 if SIN were excluded, programmers would be penaslised by being forced
 390 to *multiply* by PI in some circumstances.
 391
 392 Thus again, a slightly different application of the same general argument
 393 applies to give Ztrignpi and Ztrigpi as subsets.  3D GPUs will almost
 394 certainly provide both.
 395
 396 ### Zarctrigpi and Zarctrignpi
 397
 398 * **Zarctrigpi**: ATAN2PI ASINPI ACOSPI
 399 * **Zarctrignpi**: ATAN2 ACOS ASIN
 400
 401 These are extra trigonometric functions that are useful in some
 402 applications, but even for 3D GPUs, particularly embedded and mobile class
 403 GPUs, they are not so common and so are typically synthesised, there.
 404
 405 Although they can be synthesised using Ztrigpi and Ztrignpi, there is,
 406 once again, both a performance penalty as well as an accuracy penalty
 407 towards the limits, which for IEEE754 compliance is unacceptable, yet
 408 is acceptable for 3D.
 409
 410 Therefore they are their own subset extensions.
 411
 412 # Synthesis, Pseudo-code ops and macro-ops
 413
 414 The pseudo-ops are best left up to the compiler rather than being actual
 415 pseudo-ops, by allocating one scalar FP register for use as a constant
 416 (loop invariant) set to "1.0" at the beginning of a function or other
 417 suitable code block.
 418
 419 * fsincos - fused macro-op between fsin and fcos (issued in that order).
 420 * fsincospi - fused macro-op between fsinpi and fcospi (issued in that order).
 421
 422 fatanpi example pseudo-code:
 423
 424     fmvis ft0, 0x3F800 // upper bits of f32 1.0 (BF16)
 425     fatan2pis FRT, FRA, ft0
 426
 427 Hyperbolic function example (obviates need for Zfhyp except for
 428 high-performance or correctly-rounding):
 429
 430     ASINH( x ) = ln( x + SQRT(x**2+1))
 431
 432 # Evaluation and commentary
 433
 434 Moved to [[discussion]]
 435