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[libreriscv.git]
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openpower.mdwn
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# Evaluation
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* FP32 is converted to FP64. Requires SV to be active.
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* FP16 needed
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* FCVT between 16/32/64 needed
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* c++11 atomics not very efficient
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* no 16/48/64 opcodes, needs a shuffle of opcodes
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* needs escape sequencing (ISAMUX/NS)