be862e429baabf4ebd7ebee1cfd0a566a42093f3
2 * Copyright (c) 2003 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
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14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Steve Reinhardt
35 * Definitions of page table.
41 #include "base/bitfield.hh"
42 #include "base/intmath.hh"
43 #include "base/trace.hh"
44 #include "config/the_isa.hh"
45 #include "debug/MMU.hh"
46 #include "mem/page_table.hh"
47 #include "sim/faults.hh"
48 #include "sim/sim_object.hh"
51 using namespace TheISA
;
53 PageTable::PageTable(const std::string
&__name
, uint64_t _pid
, Addr _pageSize
)
54 : pageSize(_pageSize
), offsetMask(mask(floorLog2(_pageSize
))),
55 pid(_pid
), _name(__name
)
57 assert(isPowerOf2(pageSize
));
58 pTableCache
[0].vaddr
= 0;
59 pTableCache
[1].vaddr
= 0;
60 pTableCache
[2].vaddr
= 0;
63 PageTable::~PageTable()
68 PageTable::map(Addr vaddr
, Addr paddr
, int64_t size
, bool clobber
)
70 // starting address must be page aligned
71 assert(pageOffset(vaddr
) == 0);
73 DPRINTF(MMU
, "Allocating Page: %#x-%#x\n", vaddr
, vaddr
+ size
);
75 for (; size
> 0; size
-= pageSize
, vaddr
+= pageSize
, paddr
+= pageSize
) {
76 if (!clobber
&& (pTable
.find(vaddr
) != pTable
.end())) {
78 fatal("PageTable::allocate: address 0x%x already mapped", vaddr
);
81 pTable
[vaddr
] = TheISA::TlbEntry(pid
, vaddr
, paddr
);
82 updateCache(vaddr
, pTable
[vaddr
]);
87 PageTable::remap(Addr vaddr
, int64_t size
, Addr new_vaddr
)
89 assert(pageOffset(vaddr
) == 0);
90 assert(pageOffset(new_vaddr
) == 0);
92 DPRINTF(MMU
, "moving pages from vaddr %08p to %08p, size = %d\n", vaddr
,
95 for (; size
> 0; size
-= pageSize
, vaddr
+= pageSize
, new_vaddr
+= pageSize
) {
96 assert(pTable
.find(vaddr
) != pTable
.end());
98 pTable
[new_vaddr
] = pTable
[vaddr
];
100 pTable
[new_vaddr
].updateVaddr(new_vaddr
);
101 updateCache(new_vaddr
, pTable
[new_vaddr
]);
106 PageTable::unmap(Addr vaddr
, int64_t size
)
108 assert(pageOffset(vaddr
) == 0);
110 DPRINTF(MMU
, "Unmapping page: %#x-%#x\n", vaddr
, vaddr
+ size
);
112 for (; size
> 0; size
-= pageSize
, vaddr
+= pageSize
) {
113 assert(pTable
.find(vaddr
) != pTable
.end());
121 PageTable::isUnmapped(Addr vaddr
, int64_t size
)
123 // starting address must be page aligned
124 assert(pageOffset(vaddr
) == 0);
126 for (; size
> 0; size
-= pageSize
, vaddr
+= pageSize
) {
127 if (pTable
.find(vaddr
) != pTable
.end()) {
136 PageTable::lookup(Addr vaddr
, TheISA::TlbEntry
&entry
)
138 Addr page_addr
= pageAlign(vaddr
);
140 if (pTableCache
[0].vaddr
== page_addr
) {
141 entry
= pTableCache
[0].entry
;
144 if (pTableCache
[1].vaddr
== page_addr
) {
145 entry
= pTableCache
[1].entry
;
148 if (pTableCache
[2].vaddr
== page_addr
) {
149 entry
= pTableCache
[2].entry
;
153 PTableItr iter
= pTable
.find(page_addr
);
155 if (iter
== pTable
.end()) {
159 updateCache(page_addr
, iter
->second
);
160 entry
= iter
->second
;
165 PageTable::translate(Addr vaddr
, Addr
&paddr
)
167 TheISA::TlbEntry entry
;
168 if (!lookup(vaddr
, entry
)) {
169 DPRINTF(MMU
, "Couldn't Translate: %#x\n", vaddr
);
172 paddr
= pageOffset(vaddr
) + entry
.pageStart();
173 DPRINTF(MMU
, "Translating: %#x->%#x\n", vaddr
, paddr
);
178 PageTable::translate(RequestPtr req
)
181 assert(pageAlign(req
->getVaddr() + req
->getSize() - 1)
182 == pageAlign(req
->getVaddr()));
183 if (!translate(req
->getVaddr(), paddr
)) {
184 return Fault(new GenericPageTableFault(req
->getVaddr()));
186 req
->setPaddr(paddr
);
187 if ((paddr
& (pageSize
- 1)) + req
->getSize() > pageSize
) {
188 panic("Request spans page boundaries!\n");
195 PageTable::serialize(std::ostream
&os
)
197 paramOut(os
, "ptable.size", pTable
.size());
199 PTable::size_type count
= 0;
201 PTableItr iter
= pTable
.begin();
202 PTableItr end
= pTable
.end();
203 while (iter
!= end
) {
204 os
<< "\n[" << csprintf("%s.Entry%d", name(), count
) << "]\n";
206 paramOut(os
, "vaddr", iter
->first
);
207 iter
->second
.serialize(os
);
212 assert(count
== pTable
.size());
216 PageTable::unserialize(Checkpoint
*cp
, const std::string
§ion
)
219 paramIn(cp
, section
, "ptable.size", count
);
224 TheISA::TlbEntry
*entry
;
227 paramIn(cp
, csprintf("%s.Entry%d", name(), i
), "vaddr", vaddr
);
228 entry
= new TheISA::TlbEntry();
229 entry
->unserialize(cp
, csprintf("%s.Entry%d", name(), i
));
230 pTable
[vaddr
] = *entry
;