blackbox: re-use existing Module::makeblackbox() method
[yosys.git] / passes / cmds / blackbox.cc
1 /*
2 * yosys -- Yosys Open SYnthesis Suite
3 *
4 * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at>
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 *
18 */
19
20 #include "kernel/yosys.h"
21
22 USING_YOSYS_NAMESPACE
23 PRIVATE_NAMESPACE_BEGIN
24
25 struct BlackboxPass : public Pass {
26 BlackboxPass() : Pass("blackbox", "convert modules into blackbox modules") { }
27 void help() YS_OVERRIDE
28 {
29 // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
30 log("\n");
31 log(" blackbox [options] [selection]\n");
32 log("\n");
33 log("Convert modules into blackbox modules (remove contents and set the blackbox\n");
34 log("module attribute).\n");
35 log("\n");
36 }
37 void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
38 {
39 size_t argidx;
40 for (argidx = 1; argidx < args.size(); argidx++)
41 {
42 // if (args[argidx] == "-???") {
43 // continue;
44 // }
45 break;
46 }
47 extra_args(args, argidx, design);
48
49 for (auto module : design->selected_whole_modules_warn())
50 {
51 module->makeblackbox();
52 module->set_bool_attribute(ID::blackbox);
53 }
54 }
55 } BlackboxPass;
56
57 PRIVATE_NAMESPACE_END