Merge remote-tracking branch 'origin/master' into eddie/fix_1262
[yosys.git] / passes / equiv / equiv_opt.cc
1 /*
2 * yosys -- Yosys Open SYnthesis Suite
3 *
4 * Copyright (C) 2018 whitequark <whitequark@whitequark.org>
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 *
18 */
19
20 #include "kernel/register.h"
21
22 USING_YOSYS_NAMESPACE
23 PRIVATE_NAMESPACE_BEGIN
24
25 struct EquivOptPass:public ScriptPass
26 {
27 EquivOptPass() : ScriptPass("equiv_opt", "prove equivalence for optimized circuit") { }
28
29 void help() YS_OVERRIDE
30 {
31 // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
32 log("\n");
33 log(" equiv_opt [options] [command]\n");
34 log("\n");
35 log("This command checks circuit equivalence before and after an optimization pass.\n");
36 log("\n");
37 log(" -run <from_label>:<to_label>\n");
38 log(" only run the commands between the labels (see below). an empty\n");
39 log(" from label is synonymous to the start of the command list, and empty to\n");
40 log(" label is synonymous to the end of the command list.\n");
41 log("\n");
42 log(" -map <filename>\n");
43 log(" expand the modules in this file before proving equivalence. this is\n");
44 log(" useful for handling architecture-specific primitives.\n");
45 log("\n");
46 log(" -assert\n");
47 log(" produce an error if the circuits are not equivalent.\n");
48 log("\n");
49 log(" -undef\n");
50 log(" enable modelling of undef states during equiv_induct.\n");
51 log("\n");
52 log("The following commands are executed by this verification command:\n");
53 help_script();
54 log("\n");
55 }
56
57 std::string command, techmap_opts;
58 bool assert, undef;
59
60 void clear_flags() YS_OVERRIDE
61 {
62 command = "";
63 techmap_opts = "";
64 assert = false;
65 undef = false;
66 }
67
68 void execute(std::vector < std::string > args, RTLIL::Design * design) YS_OVERRIDE
69 {
70 string run_from, run_to;
71 clear_flags();
72
73 size_t argidx;
74 for (argidx = 1; argidx < args.size(); argidx++) {
75 if (args[argidx] == "-run" && argidx + 1 < args.size()) {
76 size_t pos = args[argidx + 1].find(':');
77 if (pos == std::string::npos)
78 break;
79 run_from = args[++argidx].substr(0, pos);
80 run_to = args[argidx].substr(pos + 1);
81 continue;
82 }
83 if (args[argidx] == "-map" && argidx + 1 < args.size()) {
84 techmap_opts += " -map " + args[++argidx];
85 continue;
86 }
87 if (args[argidx] == "-assert") {
88 assert = true;
89 continue;
90 }
91 if (args[argidx] == "-undef") {
92 undef = true;
93 continue;
94 }
95 break;
96 }
97
98 for (; argidx < args.size(); argidx++) {
99 if (command.empty()) {
100 if (args[argidx].compare(0, 1, "-") == 0)
101 cmd_error(args, argidx, "Unknown option.");
102 } else {
103 command += " ";
104 }
105 command += args[argidx];
106 }
107
108 if (command.empty())
109 log_cmd_error("No optimization pass specified!\n");
110
111 if (!design->full_selection())
112 log_cmd_error("This command only operates on fully selected designs!\n");
113
114 log_header(design, "Executing EQUIV_OPT pass.\n");
115 log_push();
116
117 run_script(design, run_from, run_to);
118
119 log_pop();
120 }
121
122 void script() YS_OVERRIDE
123 {
124 if (check_label("run_pass")) {
125 run("hierarchy -auto-top");
126 run("design -save preopt");
127 if (help_mode)
128 run("[command]");
129 else
130 run(command);
131 run("design -stash postopt");
132 }
133
134 if (check_label("prepare")) {
135 run("design -copy-from preopt -as gold A:top");
136 run("design -copy-from postopt -as gate A:top");
137 }
138
139 if ((!techmap_opts.empty() || help_mode) && check_label("techmap", "(only with -map)")) {
140 string opts;
141 if (help_mode)
142 opts = " -map <filename> ...";
143 else
144 opts = techmap_opts;
145 run("techmap -wb -D EQUIV -autoproc" + opts);
146 }
147
148 if (check_label("prove")) {
149 run("equiv_make gold gate equiv");
150 if (help_mode)
151 run("equiv_induct [-undef] equiv");
152 else if (undef)
153 run("equiv_induct -undef equiv");
154 else
155 run("equiv_induct equiv");
156 if (help_mode)
157 run("equiv_status [-assert] equiv");
158 else if (assert)
159 run("equiv_status -assert equiv");
160 else
161 run("equiv_status equiv");
162 }
163
164 if (check_label("restore")) {
165 run("design -load preopt");
166 }
167 }
168 } EquivOptPass;
169
170 PRIVATE_NAMESPACE_END