passes/pmgen/peepopt_dffmux.pmg

   1 pattern dffmux
   2
   3 state <IdString> cemuxAB rstmuxBA
   4 state <SigSpec> sigD
   5
   6 match dff
   7         select dff->type == $dff
   8         select GetSize(port(dff, \D)) > 1
   9 endmatch
  10
  11 code sigD
  12         sigD = port(dff, \D);
  13 endcode
  14
  15 match rstmux
  16         select rstmux->type == $mux
  17         select GetSize(port(rstmux, \Y)) > 1
  18         index <SigSpec> port(rstmux, \Y) === sigD
  19         choice <IdString> BA {\B, \A}
  20         select port(rstmux, BA).is_fully_const()
  21         set rstmuxBA BA
  22         semioptional
  23 endmatch
  24
  25 code sigD
  26         if (rstmux)
  27                 sigD = port(rstmux, rstmuxBA == \B ? \A : \B);
  28 endcode
  29
  30 match cemux
  31         select cemux->type == $mux
  32         select GetSize(port(cemux, \Y)) > 1
  33         index <SigSpec> port(cemux, \Y) === sigD
  34         choice <IdString> AB {\A, \B}
  35         index <SigSpec> port(cemux, AB) === port(dff, \Q)
  36         set cemuxAB AB
  37         semioptional
  38 endmatch
  39
  40 code
  41         if (!cemux && !rstmux)
  42                 reject;
  43 endcode
  44
  45 code
  46         Const rst;
  47         SigSpec D;
  48         if (cemux) {
  49                 D = port(cemux, cemuxAB == \A ? \B : \A);
  50                 if (rstmux)
  51                         rst = port(rstmux, rstmuxBA).as_const();
  52                 else
  53                         rst = Const(State::Sx, GetSize(D));
  54         }
  55         else {
  56                 log_assert(rstmux);
  57                 D = port(rstmux, rstmuxBA  == \B ? \A : \B);
  58                 rst = port(rstmux, rstmuxBA).as_const();
  59         }
  60         SigSpec Q = port(dff, \Q);
  61         int width = GetSize(D);
  62
  63         SigSpec &dffD = dff->connections_.at(\D);
  64         SigSpec &dffQ = dff->connections_.at(\Q);
  65         Const init;
  66         for (const auto &b : Q) {
  67                 auto it = b.wire->attributes.find(\init);
  68                 init.bits.push_back(it == b.wire->attributes.end() ? State::Sx : it->second[b.offset]);
  69         }
  70
  71         auto cmpx = [=](State lhs, State rhs) {
  72                 if (lhs == State::Sx || rhs == State::Sx)
  73                         return true;
  74                 return lhs == rhs;
  75         };
  76
  77         int i = width-1;
  78         while (i > 1) {
  79                 log_dump(i, D[i], D[i-1], rst[i], rst[i-1], init[i], init[i-1]);
  80                 if (D[i] != D[i-1])
  81                         break;
  82                 if (!cmpx(rst[i], rst[i-1]))
  83                         break;
  84                 if (!cmpx(init[i], init[i-1]))
  85                         break;
  86                 if (!cmpx(rst[i], init[i]))
  87                         break;
  88                 module->connect(Q[i], Q[i-1]);
  89                 i--;
  90         }
  91         if (i < width-1) {
  92                 did_something = true;
  93                 if (cemux) {
  94                         SigSpec &ceA = cemux->connections_.at(\A);
  95                         SigSpec &ceB = cemux->connections_.at(\B);
  96                         SigSpec &ceY = cemux->connections_.at(\Y);
  97                         ceA.remove(i, width-1-i);
  98                         ceB.remove(i, width-1-i);
  99                         ceY.remove(i, width-1-i);
 100                         cemux->fixup_parameters();
 101                 }
 102                 if (rstmux) {
 103                         SigSpec &rstA = rstmux->connections_.at(\A);
 104                         SigSpec &rstB = rstmux->connections_.at(\B);
 105                         SigSpec &rstY = rstmux->connections_.at(\Y);
 106                         rstA.remove(i, width-1-i);
 107                         rstB.remove(i, width-1-i);
 108                         rstY.remove(i, width-1-i);
 109                         rstmux->fixup_parameters();
 110                 }
 111                 dffD.remove(i, width-1-i);
 112                 dffQ.remove(i, width-1-i);
 113                 dff->fixup_parameters();
 114
 115                 log("dffcemux pattern in %s: dff=%s, cemux=%s, rstmux=%s; removed top %d bits.\n", log_id(module), log_id(dff), log_id(cemux, "n/a"), log_id(rstmux, "n/a"), width-1-i);
 116                 width = i+1;
 117         }
 118         if (cemux) {
 119                 SigSpec &ceA = cemux->connections_.at(\A);
 120                 SigSpec &ceB = cemux->connections_.at(\B);
 121                 SigSpec &ceY = cemux->connections_.at(\Y);
 122
 123                 int count = 0;
 124                 for (int i = width-1; i >= 0; i--) {
 125                         if (D[i].wire)
 126                                 continue;
 127                         if (cmpx(rst[i], D[i].data) && cmpx(init[i], D[i].data)) {
 128                                 count++;
 129                                 module->connect(Q[i], D[i]);
 130                                 ceA.remove(i);
 131                                 ceB.remove(i);
 132                                 ceY.remove(i);
 133                                 dffD.remove(i);
 134                                 dffQ.remove(i);
 135                         }
 136                 }
 137                 if (count > 0) {
 138                         did_something = true;
 139                         cemux->fixup_parameters();
 140                         dff->fixup_parameters();
 141                         log("dffcemux pattern in %s: dff=%s, cemux=%s, rstmux=%s; removed %d constant bits.\n", log_id(module), log_id(dff), log_id(cemux), log_id(rstmux, "n/a"), count);
 142                 }
 143         }
 144
 145         if (did_something)
 146                 accept;
 147 endcode