passes/proc/proc_rmdead.cc

   1 /*
   2  *  yosys -- Yosys Open SYnthesis Suite
   3  *
   4  *  Copyright (C) 2012  Clifford Wolf <clifford@clifford.at>
   5  *
   6  *  Permission to use, copy, modify, and/or distribute this software for any
   7  *  purpose with or without fee is hereby granted, provided that the above
   8  *  copyright notice and this permission notice appear in all copies.
   9  *
  10  *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13  *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15  *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16  *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  *
  18  */
  19
  20 #include "kernel/register.h"
  21 #include "kernel/bitpattern.h"
  22 #include "kernel/log.h"
  23 #include <sstream>
  24 #include <stdlib.h>
  25 #include <stdio.h>
  26 #include <set>
  27
  28 USING_YOSYS_NAMESPACE
  29 PRIVATE_NAMESPACE_BEGIN
  30
  31 void proc_rmdead(RTLIL::SwitchRule *sw, int &counter, int &full_case_counter)
  32 {
  33         BitPatternPool pool(sw->signal);
  34
  35         for (size_t i = 0; i < sw->cases.size(); i++)
  36         {
  37                 bool is_default = GetSize(sw->cases[i]->compare) == 0 && (!pool.empty() || GetSize(sw->signal) == 0);
  38
  39                 for (size_t j = 0; j < sw->cases[i]->compare.size(); j++) {
  40                         RTLIL::SigSpec sig = sw->cases[i]->compare[j];
  41                         if (!sig.is_fully_const())
  42                                 continue;
  43                         if (!pool.take(sig))
  44                                 sw->cases[i]->compare.erase(sw->cases[i]->compare.begin() + (j--));
  45                 }
  46
  47                 if (!is_default) {
  48                         if (sw->cases[i]->compare.size() == 0) {
  49                                 delete sw->cases[i];
  50                                 sw->cases.erase(sw->cases.begin() + (i--));
  51                                 counter++;
  52                                 continue;
  53                         }
  54                         // if (pool.empty())
  55                         //      sw->cases[i]->compare.clear();
  56                 }
  57
  58                 for (auto switch_it : sw->cases[i]->switches)
  59                         proc_rmdead(switch_it, counter, full_case_counter);
  60
  61                 if (is_default)
  62                         pool.take_all();
  63         }
  64
  65         if (pool.empty() && !sw->get_bool_attribute("\\full_case")) {
  66                 sw->set_bool_attribute("\\full_case");
  67                 full_case_counter++;
  68         }
  69 }
  70
  71 struct ProcRmdeadPass : public Pass {
  72         ProcRmdeadPass() : Pass("proc_rmdead", "eliminate dead trees in decision trees") { }
  73         void help() YS_OVERRIDE
  74         {
  75                 //   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
  76                 log("\n");
  77                 log("    proc_rmdead [selection]\n");
  78                 log("\n");
  79                 log("This pass identifies unreachable branches in decision trees and removes them.\n");
  80                 log("\n");
  81         }
  82         void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
  83         {
  84                 log_header(design, "Executing PROC_RMDEAD pass (remove dead branches from decision trees).\n");
  85
  86                 extra_args(args, 1, design);
  87
  88                 int total_counter = 0;
  89                 for (auto mod : design->modules()) {
  90                         if (!design->selected(mod))
  91                                 continue;
  92                         for (auto &proc_it : mod->processes) {
  93                                 if (!design->selected(mod, proc_it.second))
  94                                         continue;
  95                                 int counter = 0, full_case_counter = 0;
  96                                 for (auto switch_it : proc_it.second->root_case.switches)
  97                                         proc_rmdead(switch_it, counter, full_case_counter);
  98                                 if (counter > 0)
  99                                         log("Removed %d dead cases from process %s in module %s.\n", counter,
 100                                                         log_id(proc_it.first), log_id(mod));
 101                                 if (full_case_counter > 0)
 102                                         log("Marked %d switch rules as full_case in process %s in module %s.\n",
 103                                                         full_case_counter, log_id(proc_it.first), log_id(mod));
 104                                 total_counter += counter;
 105                         }
 106                 }
 107
 108                 log("Removed a total of %d dead cases.\n", total_counter);
 109         }
 110 } ProcRmdeadPass;
 111
 112 PRIVATE_NAMESPACE_END