update slides
[libreriscv.git] / pinmux / pinmux_chennai_2018.tex
1 \documentclass[slidestop]{beamer}
2 \usepackage{beamerthemesplit}
3 \usepackage{graphics}
4 \usepackage{pstricks}
5
6 \title{SIMD}
7 \author{Rishabh Jain}
8 \author{Luke Kenneth Casson Leighton}
9
10
11 \begin{document}
12
13 \frame{
14 \begin{center}
15 \huge{Pin Multiplexer}\\
16 \vspace{32pt}
17 \Large{Auto-generating documentation, code \\
18 and resources for a Pinmux}\\
19 \vspace{24pt}
20 \Large{[proposed for] Chennai 9th RISC-V Workshop}\\
21 \vspace{16pt}
22 \large{\today}
23 \end{center}
24 }
25
26
27 \frame{\frametitle{Credits and Acknowledgements}
28
29 \begin{itemize}
30 \item TODO\vspace{10pt}
31 \end{itemize}
32 }
33
34
35 \frame{\frametitle{Glossary}
36
37 \begin{itemize}
38 \item Pin: an I/O pad. May be driven (input) or may drive (output).
39 \item FN: term for a single-wire "function", such as UART\_TX,
40 I2C\_SDA, SDMMC\_D0 etc. may be an input, output or both
41 (bi-directional case: two wires are always allocated, one
42 for input to the function and one for output from the function).
43 \item TODO\vspace{10pt}
44 \end{itemize}
45 }
46
47
48 \frame{\frametitle{Muxer cases to handle}
49
50 \begin{itemize}
51 \item Many FN outputs to Many Pins: no problem\\
52 (weird configuration by end-user, but no damage to ASIC)\vspace{10pt}
53 \item One Pin to Many FN inputs: no problem\\
54 (weird configuration by end-user, but no damage to ASIC)\vspace{10pt}
55 \item Many Pins to One FN input {\bf Priority Mux needed}\\
56 No priority mux: Pin1 = HI, Pin0 = LO, ASIC is damaged\vspace{10pt}
57 \item Some FNs (I2C\_SDA, SD\_D0..3) are I/O Buses\\
58 Bi-directional control of the Pin must be handed to the
59 FN\vspace{10pt}
60 \item TODO\vspace{10pt}
61 \end{itemize}
62 }
63
64
65 \frame{\frametitle{Standard GPIO 4-way in/out Mux and I/O pad}
66 \begin{center}
67 \includegraphics[height=2.5in]{../shakti/m_class/mygpiomux.jpg}\\
68 {\bf 4-in, 4-out, pullup/down, hysteresis, edge-detection (EINT)}
69 \end{center}
70 }
71
72
73 \frame{\frametitle{Register-to-pad "control" settings}
74 \begin{center}
75 \includegraphics[height=2.5in]{reg_gpio_cap_ctrl.jpg}\\
76 {\bf pullup/down, hysteresis, current, edge-detection}
77 \end{center}
78 }
79
80
81 \frame{\frametitle{In/Out muxing, direction control}
82 \begin{center}
83 \includegraphics[height=2.5in]{reg_gpio_fn_ctrl.jpg}\\
84 {\bf Note: function can control I/O direction}
85 \end{center}
86 }
87
88
89 \frame{\frametitle{Simplified I/O pad Block Diagram}
90 \begin{center}
91 \includegraphics[height=2.5in]{reg_gpio_pinblock.jpg}\\
92 {\bf 3 wires: IN, OUT, OUTEN (also = !INEN) }
93 \end{center}
94 }
95
96
97 \frame{\frametitle{Output (and OUTEN) Wiring. 2 pins, 2 GPIO, 2 Fns}
98 \begin{center}
99 \includegraphics[height=2.5in]{reg_gpio_out_wiring.jpg}\\
100 {\bf Reg0 for Pin0, Reg1 for Pin1, Output and OUTEN same mux }
101 \end{center}
102 }
103
104
105 \frame{\frametitle{Input Selection and Priority Muxing}
106 \begin{center}
107 \includegraphics[height=0.75in]{reg_gpio_comparator.jpg}\\
108 {\bf Muxer enables input selection}\\
109 \vspace{10pt}
110 \includegraphics[height=1.25in]{reg_gpio_in_prioritymux.jpg}\\
111 {\bf However multiple inputs must be prioritised }
112 \end{center}
113 }
114
115
116 \frame{\frametitle{Input Mux Wiring}
117 \begin{center}
118 \includegraphics[height=2.5in]{reg_gpio_in_wiring.jpg}\\
119 {\bf Pin Mux selection vals NOT same as FN selection vals}
120 \end{center}
121 }
122
123
124 \frame{\frametitle{Summary}
125
126 \begin{itemize}
127 \item TODO
128 \end{itemize}
129 }
130
131
132 \frame{
133 \begin{center}
134 {\Huge The end\vspace{20pt}\\
135 Thank you\vspace{20pt}\\
136 Questions?\vspace{20pt}
137 }
138 \end{center}
139
140 \begin{itemize}
141 \item http://libre-riscv.org/shakti/m\_class/pinmux/
142 \end{itemize}
143 }
144
145
146 \end{document}