3 This proposal adds a standardised extension instructions to the RV
4 instruction set by introducing a fixed small number N (e.g. N = 8) of
5 R-type opcodes xcmd0 rd, rs1, rs2, .. , xcmd<N> rd, rs1, rs2, that are intended to be used as "overloadable" (slightly crippled) R-type instructions for independently developed extensions in the form of non standard CPU extensions, IP tiles, or closely coupled external devices.
7 Tl;DR see below for a C description of how this is supposed to work.
9 The input value of an xcmd instruction in rs2 is arbitrary. The content of the first input rs1, however, is divided in a 12bit "logical unit" (lun) together with xlen - 12 bits of additional data.
10 The lun bits in rs1, determines a specific (sub)device, and the CPU routes the command to this device with rs1 and rs2 as input, and rd as output. Effectively, the xcmd0, ... xcmd7 instructions are "virtual method" opcodes, overloaded for different extension (sub)devices.
12 The specific value of the lun is supposed to be convenient for the cpu and is thus unstandardised. Portable software therefore constructs the lun, with a further R-type instruction xext. It takes a 20 bit universally unique identifier (UUID) that identifies an interface with upto N R-type instructions with the signature of xcmd. An optional sequence number identifies a specific enumerated device on the cpu that implements the interface as a subdevice. For convenience, xext also or's bits rs2[0..XLEN-12]. If the UUID is not recognised 0 is returned. , but implemented by the extension (sub)device. Note that this scheme gives an easy work around the restriction on N (e.g. 8 ) commands: an implementing device can simply implement several interfaces as routable subdevices, indeed is expected to do so.
14 The net effect is that a sequence like
21 acts like a single namespaced instruction cmd0_EDCBA rd rs1 rs2 with the annoying caveat that rs1 can only use bits 0..XLEN-12 (the sequence is also not indivisible but the crucial semantics that you might want to be indivisible is in xcmd0). Delegation is expected to come at a small
22 additional performance price compared to a "native" instruction. This should, however, be an acceptable tradeoff in many cases.
25 Programatically the instructions in the interface are just a set of glorified assembler macros
27 org.tinker.tinker:RocknRoll{
29 rock rd rs1 rs2 : xcmd0 rd rs1 rs2
30 roll rd rs1 rs2 : xcmd1 rd rs1 rs2
33 so that the above sequence is more clearly written as
35 import(org.tinker.tinker:RocknRoll)
37 lui rd org.tinker.tinker:RocknRoll:uuid
39 org.tinker.tinker:RocknRoll:rock rd rd rs2
41 (Quite possibly even glorified standard assembler macros are overkill and it is easier to just use defines or ordinary macro's with long names. E.g. writing
43 #define org_tinker_tinker__RocknRoll__uuid 0xABCDE
44 #define org_tinker_tinker__RocknRoll__rock(rd, rs1, rs2) xcmd0 rd, rs1, rs2
45 #define org_tinker_tinker__RocknRoll__roll(rd, rs1, rs2) xcmd1 rd, rs1, rs2
47 allows the same sequence to be written as
49 lui rd org_tinker_tinker__RocknRoll__uuid
51 org_tinker_tinker__RocknRoll__rock(rd, rd, rs2)
53 Readability of assembler is no big deal for a compiler, but people are supposed to _document_ the interface and its semantics. In particular a semantics specified like the semantics of the cpu would be most welcome.)
56 If several instructions of the same interface are used, one can also use instruction sequences like
58 lui t1 org_tinker_tinker__RocknRoll_uuid
60 xcmd0 a5, t1, a0 // org_tinker_tinker__RocknRoll__rock(a5, t1, a0)
61 xcmd1 t2, t1, a1 // org_tinker_tinker__RocknRoll__roll(t2, t1, a5)
62 xcmd0 a0, t1, t2 // org_tinker_tinker__RocknRoll__rock(a0, t1, t2)
64 This amortises the cost of the xext instruction.
66 ==Implications for the RiscV ecosystem ==
69 The proposal allows independent groups to define one or more extension
70 interfaces of (slightly crippled) R-type instructions implemented by an
71 extension device. Such an extension device would be an native but non standard
72 extension of the CPU, an IP tile or a closely coupled external chip and would
73 be configured at manufacturing time or bootup of the CPU.
75 Having a standardised overloadable interface simply avoids much of the
76 need for isa extensions for hardware with non standard interfaces and
77 semantics. This is analogous to the way that the standardised overloadable
78 ioctl interface of the kernel almost completely avoids the need for
79 extending the kernel with syscalls for the myriad of hardware devices
80 with their specific interfaces and semantics.
82 The expanded flexibility comes at the cost: the standard can specify the
83 semantics of the delegation mechanism and the interfacing with the rest
84 of the cpu, but the actual semantics of the overloaded instructions can
85 only be defined by the designer of the interface. Likewise, a device
86 can be conforming as far as delegation and interaction with the CPU
87 is concerned, but whether the hardware is conforming to the semantics
88 of the interface is outside the scope of spec. Being able to specify
89 that semantics using the methods used for RV itself is clearly very
90 valuable. One impetus for doing that is using it for purposes of its own,
91 effectively freeing opcode space for other purposes. Also, some interfaces
92 may become de facto or de jure standards themselves, necessitating
93 hardware to implement competing interfaces. I.e., facilitating a free
94 for all, may lead to standards proliferation. C'est la vie.
96 The only "ISA-collisions" that can still occur are in the 20 bit (~10^6)
97 interface identifier space, with 12 more bits to identify a device on
98 a hart that implements the interface. One suggestion is setting aside
99 2^19 id's that are handed out for a small fee by a central (automated)
100 registration (making sure the space is not just claimed), while the
101 remaining 2^19 are used as a good hash on a long, plausibly globally
102 unique human readable interface name. This gives implementors the choice
103 between a guaranteed private identifier paying a fee, or relying on low
104 probabilities. On RV64 the UUID can also be extended to 52 bits (> 10^15).
107 ==== Description of the extension as C functions.==
109 /* register format of rs1 for xext instructions */
110 typedef struct uuid_device{
112 long uuid: 8*sizeof(long) - 12;
115 /* register format for rd of xext and rs1 for xcmd instructions, packs lun and data */
116 typedef struct lun_data{
118 long data: 8*sizeof(long) - 12;
121 /* proposed R-type instructions
129 lun_data_t xext(uuid_dev_t rs1, long rs2);
130 long xcmd0(lun_data_t rs1, long rs2);
131 long xcmd1(lun_data_t rs1, long rs2);
133 long xcmd<N>(lun_data_t rs1, long rs2);
135 /* hardware interface presented by an implementing device. */
137 long device_fn(unsigned short subdevice_xcmd, lun_data_t rs1, long rs2);
139 /* cpu internal datatypes */
141 enum privilege = {user = 0b0001, super = 0b0010, hyper = 0b0100, mach = 0b1000};
143 /* cpu internal, does what is on the label */
145 enum privilege cpu__current_privilege_level()
152 struct uuid_device_priv2lun{
155 enum privilege reqpriv;
160 struct device_subdevice{
161 device_fn* device_addr;
162 unsigned short subdeviceId:12;
165 struct lun_priv2device_subdevice{
168 enum privilege reqpriv
170 struct device_subdevice devAddr_subdevId;
174 struct uuid_device_priv2lun cpu__lun_map[];
177 map (UUID, device, privilege) to a 12 bit lun,
178 return (lun_t){0} on unknown (at acces level)
180 does associative memory lookup and tests privilege.
183 lun_t cpu__lookup_lun(const struct uuid_device_priv2lun* lun_map, uuid_dev_t uuid_dev, enum privilege priv);
187 lun_data_t xext(uuid_dev_t rs1, long rs2)
189 lun_t lun = cpu__lookup_lun(lun_map, rs1, current_privilege_level());
191 return (lun_data_t){.lun = lun.id, .data = rs2 % (1<< (8*sizeof(long) - 12))}
197 struct lun_priv2device_subdevice cpu__device_subdevice_map[];
199 /* map (lun, priv) to struct device_subdevice pair.
200 For lun = 0, or unknown (lun, priv) pair, returns (struct device_subdevice){NULL,0}
203 device_subdevice_t cpu__lookup_device_subdevice(const struct lun_priv2device_subdevice_map* dev_subdev_map,
204 lun_t lun, enum privileges priv);
206 /* functional description of the delegating xcmd0 .. xcmd7 instructions */
207 template<k = 0..N-1> //pretend this is C
208 long xcmd<k>(lun_data_t rs1, long rs2)
210 struct device_subdevice dev_subdev = cpu__lookup_device_subdevice(device_subdevice_map, rs1.lun, current_privilege());
211 if(dev_subdev.devAddr == NULL)
212 trap(“Illegal instruction”);
214 return dev_subdev.devAddr(dev_subdev.subdevId | k << 12, rs1, rs2);
221 #define com_bigbucks__Frobate__uuid 0xABCDE
222 #define org_tinker_tinker__RocknRoll__uuid 0x12345
223 #define org_tinker_tinker__Jazz__uuid 0xD0B0D
225 com.bigbucks:Frobate{
226 uuid: com_bigbucks__Frobate__uuid
227 frobate rd rs1 rs2 : cmd0 rd rs1 rs2
228 foo rd rs1 rs2 : cmd1 rd rs1 rs2
229 bar rd rs1 rs2 : cmd1 rd rs1 rs2
232 org.tinker.tinker:RocknRoll{
233 uuid: org_tinker_tinker__RocknRoll__uuid
234 rock rd rs1 rs2: cmd0 rd rs1 rs2
235 roll rd rs1 rs2: cmd1 rd rs1 rs2
238 long com_bigbucks__device1(short subdevice_xcmd, lun_data_t rs1, long rs2)
240 switch(subdevice_xcmd) {
241 case 0 | 0 << 12 /* com.bigbucks:Frobate:frobate */ : return device1_frobate(rs1, rs2);
242 case 42| 0 << 12 /* com.bigbucks:FrobateMach:frobate : return device1_frobate_machine_level(rs1, rs2);
243 case 0 | 1 << 12 /* com.bigbucks:Frobate:foo */ : return device1_foo(rs1, rs2);
244 case 0 | 2 << 12 /* com.bigbucks:Frobate:bar */ : return device1_bar(rs1, rs2);
245 case 1 | 0 << 12 /* org.tinker.tinker:RocknRoll:rock */ : return device1_rock(rs1, rs2);
246 case 1 | 1 << 12 /* org.tinker.tinker:RocknRoll:roll */ : return device1_roll(rs1, rs2);
247 default: trap(“hardware configuration error”);
252 org.tinker.tinker:Jazz{
253 uuid: org_tinker_tinker__Jazz__uuid
254 boogy rd rs1 rs2: cmd0 rd rs1 rs2
258 long org_tinker_tinker__device2(short subdevice_xcmd, lun_data_t rs1, long rs2)
260 switch(dev_cmd.interfId){
261 case 0 | 0 << 12 /* com.bigbucks:Frobate:frobate */: return device2_frobate(rs1, rs2);
262 case 0 | 1 << 12 /* com.bigbucks:Frobate:foo */ : return device2_foo(rs1, rs2);
263 case 0 | 2 << 12 /* com.bigbucks:Frobate:bar */ : return device2_foo(rs1, rs2);
264 case 1 | 0 << 12 /* org_tinker_tinker:Jazz:boogy */: return device2_boogy(rs1, rs2);
265 default: trap(“hardware configuration error”);
269 /* struct uuid_dev2lun_map[] */
271 {{.uuid_devId = {org_RiscV__Fallback__ReturnZero__uuid , 0}, .priv = user}, .lun = 1},
272 {{.uuid_devId = {org_RiscV__Fallback__ReturnZero__uuid , 0}, .priv = super}, .lun = 1},
273 {{.uuid_devId = {org_RiscV__Fallback__ReturnZero__uuid , 0}, .priv = hyper}, .lun = 1},
274 {{.uuid_devId = {org_RiscV__Fallback__ReturnZero__uuid , 0}, .priv = mach} .lun = 1},
275 {{.uuid_devId = {org_RiscV__Fallback__ReturnMinusOne__uuid, 0}, .priv = user}, .lun = 2},
276 {{.uuid_devId = {org_RiscV__Fallback__ReturnMinusOne__uuid, 0}, .priv = super}, .lun = 2},
277 {{.uuid_devId = {org_RiscV__Fallback__ReturnMinusOne__uuid, 0}, .priv = hyper}, .lun = 2},
278 {{.uuid_devId = {org_RiscV__Fallback__ReturnMinusOne__uuid, 0}, .priv = mach}, .lun = 2},
279 {{.uuid_devId = {com_bigbucks__Frobate__uuid, 0}, .priv = user} .lun = 32}, //32 sic!
280 {{.uuid_devId = {com_bigbucks__Frobate__uuid, 1}, .priv = super} .lun = 32},
281 {{.uuid_devId = {com_bigbucks__Frobate__uuid, 1}, .priv = hyper} .lun = 32},
282 {{.uuid_devId = {com_bigbucks__Frobate__uuid, 1}, .priv = mach} .lun = 32},
283 {{.uuid_devId = {com_bigbucks__Frobate__uuid, 0}, .priv = super} .lun = 34}, //34 sic!
284 {{.uuid_devId = {com_bigbucks__Frobate__uuid, 0}, .priv = hyper} .lun = 34},
285 {{.uuid_devId = {com_bigbucks__Frobate__uuid, 0}, .priv = mach} .lun = 34},
286 {{.uuid_devId = {org_tinker_tinker__RocknRoll__uuid, 0}, .priv = user} .lun = 33}, //33 sic!
287 {{.uuid_devId = {org_tinker_tinker__RocknRoll__uuid, 0}, .priv = super} .lun = 33},
288 {{.uuid_devId = {org_tinker_tinker__RocknRoll__uuid, 0}, .priv = hyper} .lun = 33},
289 {{.uuid_devId = {org_tinker_tinker__RocknRoll__uuid, 0}, .priv = super}, .lun = 35},
290 {{.uuid_devId = {org_tinker_tinker__RocknRoll__uuid, 0}, .priv = hyper}, .lun = 35},
293 /* struct lun2dev_subdevice_map[] */
294 dev_subdevice_map = {
295 // {.lun = 0, error and falls back to trapping xcmd
296 {{.lun = 1, .priv = user}, .devAddr_interfId = {fallback, 0 /* ReturnZero */}},
297 {{.lun = 1, .priv = super}, .devAddr_interfId = {fallback, 0 /* ReturnZero */}},
298 {{.lun = 1, .priv = hyper}, .devAddr_interfId = {fallback, 0 /* ReturnZero */}},
299 {{.lun = 1, .priv = mach}, .devAddr_interfId = {fallback, 0 /* ReturnZero */}},
300 {{.lun = 2, .priv = user}, .devAddr_interfId = {fallback, 1 /* ReturnMinusOne*/}},
301 {{.lun = 2, .priv = super}, .devAddr_interfId = {fallback, 1 /* ReturnMinusOne*/}},
302 {{.lun = 2, .priv = hyper}, .devAddr_interfId = {fallback, 1 /* ReturnMinusOne*/}},
303 {{.lun = 2, .priv = mach}, .devAddr_interfId = {fallback, 1 /* ReturnMinusOne*/}},
304 // .lun = 3 .. 7 reserved for other fallback RV interfaces
305 // .lun = 8 .. 30 reserved as error numbers, c.li t1 31; bltu rd t1 L_fail tests errors
306 // .lun = 31 reserved out of caution
307 {{.lun = 32, .priv = user}, .devAddr_interfId = {device1, 0 /* Frobate interface */}},
308 {{.lun = 32, .priv = super}, .devAddr_interfId = {device1, 0 /* Frobate interface */}},
309 {{.lun = 32, .priv = hyper}, .devAddr_interfId = {device1, 0 /* Frobate interface */}},
310 {{.lun = 32, .priv = mach}, .devAddr_interfId = {device1,64 /* Frobate machine level interface */}},
311 {{.lun = 33, .priv = user}, .devAddr_InterfId = {device1, 1 /* RocknRoll interface */}},
312 {{.lun = 33, .priv = super}, .devAddr_InterfId = {device1, 1 /* RocknRoll interface */}},
313 {{.lun = 33, .priv = hyper}, .devAddr_InterfId = {device1, 1 /* RocknRoll interface */}},
314 {{.lun = 34, .priv = super}, .devAddr_interfId = {device2, 0 /* Frobate interface */}},
315 {{.lun = 34, .priv = hyper}, .devAddr_interfId = {device2, 0 /* Frobate interface */}},
316 {{.lun = 34, .priv = mach}, .devAddr_interfId = {device2, 0 /* Frobate interface */}},
317 {{.lun = 35, .priv = super}, .devAddr_interfId = {device2, 1 /* Jazz interface */}},
318 {{.lun = 35, .priv = hyper}, .devAddr_interfId = {device2, 1 /* Jazz interface */}},