1 # Resources and Specifications
3 This page aims to collect all the resources and specifications we need
4 in one place for quick access. We will try our best to keep links here
5 up-to-date. Feel free to add more links here.
9 * <https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0>
10 * <https://openpowerfoundation.org/?resource_lib=ibm-power-isa-version-2-07-b>
12 # RISC-V Instruction Set Architecture
14 The Libre RISC-V Project is building a hybrid CPU/GPU SoC. As the name
15 of the project implies, we will be following the RISC-V ISA due to it
16 being open-source and also because of the huge software and hardware
17 ecosystem building around it. There are other open-source ISAs but none
18 of them have the same momentum and energy behind it as RISC-V.
20 To fully take advantage of the RISC-V ecosystem, it is important to be
21 compliant with the RISC-V standards. Doing so will allow us to to reuse
22 most software as-is and avoid major forks.
24 * Official compiled PDFs of RISC-V ISA Manual:
25 <https://github.com/riscv/riscv-isa-manual/releases/latest>
26 * Working draft of the proposed RISC-V Bitmanipulation extension:
27 <https://github.com/riscv/riscv-bitmanip/blob/master/bitmanip-draft.pdf>
28 * RISC-V "V" Vector Extension:
29 <https://riscv.github.io/documents/riscv-v-spec/>
31 Note: As far as I know, we aren't using the RISC-V V Extension directly
32 at the moment. However, there are many wiki pages that make a reference
33 to the V extension so it would be good to include it here as a reference
34 for comparative/informative purposes with regard to Simple-V.
36 # IEEE Standard for Floating-Point Arithmetic (IEEE 754)
38 Almost all modern computers follow the IEEE Floating-Point Standard. Of
39 course, we will follow it as well for interoperability.
41 * IEEE 754-2019: <https://standards.ieee.org/standard/754-2019.html>
43 Note: Even though this is such an important standard used by everyone,
44 it is unfortunately not freely available and requires a payment to
45 access. However, each of the Libre RISC-V members already have access
50 The Khronos Group creates open standards for authoring and acceleration
51 of graphics, media, and computation. It is a requirement for our hybrid
52 CPU/GPU to be compliant with these standards *as well* as with IEEE754,
53 in order to be commercially-competitive in both areas: especially Vulkan
54 and OpenCL being the most important. SPIR-V is also important for the
57 Thus the [[zfpacc_proposal]] has been created which permits runtime dynamic
58 switching between different accuracy levels, in userspace applications.
60 **SPIR-V Main Page <https://www.khronos.org/registry/spir-v/>**
62 * SPIR-V 1.5 Specification Revision 1:
63 <https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html>
64 * SPIR-V OpenCL Extended Instruction Set:
65 <https://www.khronos.org/registry/spir-v/specs/unified1/OpenCL.ExtendedInstructionSet.100.html>
66 * SPIR-V GLSL Extended Instruction Set:
67 <https://www.khronos.org/registry/spir-v/specs/unified1/GLSL.std.450.html>
69 **Vulkan Main Page <https://www.khronos.org/registry/vulkan/>**
72 <https://www.khronos.org/registry/vulkan/specs/1.1-extensions/html/index.html>
74 **OpenCL Main Page <https://www.khronos.org/registry/OpenCL/>**
76 * OpenCL 2.2 API Specification:
77 <https://www.khronos.org/registry/OpenCL/specs/2.2/html/OpenCL_API.html>
78 * OpenCL 2.2 Extension Specification:
79 <https://www.khronos.org/registry/OpenCL/specs/2.2/html/OpenCL_Ext.html>
80 * OpenCL 2.2 SPIR-V Environment Specification:
81 <https://www.khronos.org/registry/OpenCL/specs/2.2/html/OpenCL_Env.html>
83 Note: We are implementing hardware accelerated Vulkan and
84 OpenCL while relying on other software projects to translate APIs to
85 Vulkan. E.g. Zink allows for OpenGL-to-Vulkan in software.
87 # Graphics and Compute API Stack
89 I found this informative post that mentions Kazan and a whole bunch of
90 other stuff. It looks like *many* APIs can be emulated on top of Vulkan,
91 although performance is not evaluated.
93 <https://synappsis.wordpress.com/2017/06/03/opengl-over-vulkan-dev/>
95 # Free Silicon Conference
97 The conference brought together experts and enthusiasts who want to build
98 a complete Free and Open Source CAD ecosystem for designing analog and
99 digital integrated circuits. The conference covered the full spectrum of
100 the design process, from system architecture, to layout and verification.
102 * <https://wiki.f-si.org/index.php/FSiC2019#Foundries.2C_PDKs_and_cell_libraries>
104 * LIP6's Coriolis - a set of backend design tools:
105 <https://www-soc.lip6.fr/equipe-cian/logiciels/coriolis/>
107 Note: The rest of LIP6's website is in French, but there is a UK flag
108 in the corner that gives the English version.
110 * KLayout - Layout viewer and editor: <https://www.klayout.de/>
112 # The OpenROAD Project
114 OpenROAD seeks to develop and foster an autonomous, 24-hour, open-source
115 layout generation flow (RTL-to-GDS).
117 * <https://theopenroadproject.org/>
119 # Other RISC-V GPU attempts
121 * <https://fossi-foundation.org/2019/09/03/gsoc-64b-pointers-in-rv32>
123 * <http://bjump.org/manycore/>
125 * <https://resharma.github.io/RISCV32-GPU/>
127 TODO: Get in touch and discuss collaboration
129 # Tests, Benchmarks, Conformance, Compliance, Verification, etc.
133 RISC-V Foundation is in the process of creating an official conformance
134 test. It's still in development as far as I can tell.
136 * //TODO LINK TO RISC-V CONFORMANCE TEST
140 IEEE 754 has no official tests for floating-point but there are several
141 well-known third party tools to check such as John Hauser's SoftFloat
144 * <http://www.jhauser.us/arithmetic/>
146 Jacob is also making a Rust library to check IEEE 754 operations.
148 * <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-September/002737.html>
150 A cool paper I came across in my research is "IeeeCC754++ : An Advanced
151 Set of Tools to Check IEEE 754-2008 Conformity" by Dr. Matthias Hüsken.
153 * Direct link to PDF:
154 <http://elpub.bib.uni-wuppertal.de/servlets/DerivateServlet/Derivate-7505/dc1735.pdf>
158 OpenCL Conformance Tests
160 * <https://github.com/KhronosGroup/OpenCL-CTS>
162 Vulkan Conformance Tests
164 * <https://github.com/KhronosGroup/VK-GL-CTS>
166 MAJOR NOTE: We are **not** allowed to say we are compliant with any of
167 the Khronos standards until we actually make an official submission,
168 do the paperwork, and pay the relevant fees.
170 ## Formal Verification
172 Formal verification of Libre RISC-V ensures that it is bug-free in
173 regards to what we specify. Of course, it is important to do the formal
174 verification as a final step in the development process before we produce
175 thousands or millions of silicon.
177 Some learning resources I found in the community:
179 * ZipCPU: <http://zipcpu.com/>
181 ZipCPU provides a comprehensive tutorial for beginners and many exercises/quizzes/slides: <http://zipcpu.com/tutorial/>
184 * Western Digital's SweRV CPU blog (I recommend looking at all their posts): <https://tomverbeure.github.io/>
186 <https://tomverbeure.github.io/risc-v/2018/11/19/A-Bug-Free-RISC-V-Core-without-Simulation.html>
188 <https://tomverbeure.github.io/rtl/2019/01/04/Under-the-Hood-of-Formal-Verification.html>
192 * <https://www.ohwr.org/project/wishbone-gen>
196 ## Adding new instructions:
198 * <https://archive.fosdem.org/2015/schedule/event/llvm_internal_asm/>
202 * <https://danluu.com/branch-prediction/>
205 # Information Resources and Tutorials
207 This section is primarily a series of useful links found online
209 * FSiC2019 <https://wiki.f-si.org/index.php/FSiC2019>
210 * Fundamentals to learn to get started [[3d_gpu/tutorial]]
211 * <https://github.com/timvideos/litex-buildenv/wiki/LiteX-for-Hardware-Engineers>
212 * <https://jeffrey.co.in/blog/2014/01/d-flip-flop-using-migen/>
213 * <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-March/000705.html>
214 * <https://chisel.eecs.berkeley.edu/api/latest/chisel3/util/DecoupledIO.html>
215 * <http://www.clifford.at/papers/2016/yosys-synth-formal/slides.pdf>
216 * <http://blog.lambdaconcept.com/doku.php?id=migen:tutorial>
217 * Samuel's KC5 code <http://chiselapp.com/user/kc5tja/repository/kestrel-3/dir?ci=6c559135a301f321&name=cores/cpu>
218 * <https://chips4makers.io/blog/>
219 * <https://hackaday.io/project/7817-zynqberry>
220 * <https://wiki.f-si.org/index.php/FSiC2019>
221 * <https://github.com/efabless/raven-picorv32> - <https://efabless.com>
222 * <https://efabless.com/design_catalog/default>
223 * <https://toyota-ai.ventures/>
224 * <https://github.com/lambdaconcept/minerva>
225 * <https://en.wikipedia.org/wiki/Liskov_substitution_principle>
226 * <https://en.wikipedia.org/wiki/Principle_of_least_astonishment>
227 * <https://peertube.f-si.org/videos/watch/379ef007-40b7-4a51-ba1a-0db4f48e8b16>
228 * <https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.md>
229 * <https://mshahrad.github.io/openpiton-asplos16.html>
230 * <https://wiki.f-si.org/index.php/The_Raven_chip:_First-time_silicon_success_with_qflow_and_efabless>
231 * <http://smallcultfollowing.com/babysteps/blog/2019/04/19/aic-adventures-in-consensus/>
232 * <http://www.crnhq.org/12-Skills-Summary.aspx?rw=c>
233 * <http://bugs.libre-riscv.org/buglist.cgi?columnlist=assigned_to%2Cbug_status%2Cresolution%2Cshort_desc%2Ccf_budget&f1=cf_nlnet_milestone&o1=equals&query_format=advanced&resolution=---&v1=NLnet.2019.02>
234 * <https://pdfs.semanticscholar.org/5060/4e9aff0e37089c4ab9a376c3f35761ffe28b.pdf>
235 * <http://www.acsel-lab.com/arithmetic/arith15/papers/ARITH15_Takagi.pdf>
236 * <https://youtu.be/o5Ihqg72T3c>
237 * <http://flopoco.gforge.inria.fr/>
238 * Fundamentals of Modern VLSI Devices <https://groups.google.com/a/groups.riscv.org/d/msg/hw-dev/b4pPvlzBzu0/7hDfxArEAgAJ>
242 * <https://github.com/Isotel/mixedsim>
243 * <http://www.vlsiacademy.org/open-source-cad-tools.html>
244 * <http://ngspice.sourceforge.net/adms.html>
245 * <https://en.wikipedia.org/wiki/Verilog-AMS#Open_Source_Implementations>
247 # Libre-RISC-V Standards
249 This list auto-generated from a page tag "standards":
251 [[!inline pages="tagged(standards)" actions="no" archive="yes" quick="yes"]]
255 [[resources/server-setup/git-mirroring]]