3 #include "debug_module.h"
4 #include "debug_defines.h"
8 #include "debug_rom/debug_rom.h"
9 #include "debug_rom_defines.h"
17 ///////////////////////// debug_module_t
19 debug_module_t::debug_module_t(sim_t
*sim
, unsigned progbufsize
, unsigned max_bus_master_bits
,
20 bool require_authentication
) :
21 progbufsize(progbufsize
),
22 program_buffer_bytes(4 + 4*progbufsize
),
23 max_bus_master_bits(max_bus_master_bits
),
24 require_authentication(require_authentication
),
25 debug_progbuf_start(debug_data_start
- program_buffer_bytes
),
26 debug_abstract_start(debug_progbuf_start
- debug_abstract_size
*4),
29 D(fprintf(stderr
, "debug_data_start=0x%x\n", debug_data_start
));
30 D(fprintf(stderr
, "debug_progbuf_start=0x%x\n", debug_progbuf_start
));
31 D(fprintf(stderr
, "debug_abstract_start=0x%x\n", debug_abstract_start
));
33 program_buffer
= new uint8_t[program_buffer_bytes
];
35 memset(halted
, 0, sizeof(halted
));
36 memset(debug_rom_flags
, 0, sizeof(debug_rom_flags
));
37 memset(resumeack
, 0, sizeof(resumeack
));
38 memset(havereset
, 0, sizeof(havereset
));
39 memset(program_buffer
, 0, program_buffer_bytes
);
40 program_buffer
[4*progbufsize
] = ebreak();
41 program_buffer
[4*progbufsize
+1] = ebreak() >> 8;
42 program_buffer
[4*progbufsize
+2] = ebreak() >> 16;
43 program_buffer
[4*progbufsize
+3] = ebreak() >> 24;
44 memset(dmdata
, 0, sizeof(dmdata
));
46 write32(debug_rom_whereto
, 0,
47 jal(ZERO
, debug_abstract_start
- DEBUG_ROM_WHERETO
));
49 memset(debug_abstract
, 0, sizeof(debug_abstract
));
54 debug_module_t::~debug_module_t()
56 delete[] program_buffer
;
59 void debug_module_t::reset()
61 for (unsigned i
= 0; i
< sim
->nprocs(); i
++) {
62 processor_t
*proc
= sim
->get_core(i
);
64 proc
->halt_request
= false;
70 dmstatus
.impebreak
= true;
71 dmstatus
.authenticated
= !require_authentication
;
75 abstractcs
.datacount
= sizeof(dmdata
) / 4;
76 abstractcs
.progbufsize
= progbufsize
;
81 if (max_bus_master_bits
> 0) {
83 sbcs
.asize
= sizeof(reg_t
) * 8;
85 if (max_bus_master_bits
>= 64)
87 if (max_bus_master_bits
>= 32)
89 if (max_bus_master_bits
>= 16)
91 if (max_bus_master_bits
>= 8)
97 void debug_module_t::add_device(bus_t
*bus
) {
98 bus
->add_device(DEBUG_START
, this);
101 bool debug_module_t::load(reg_t addr
, size_t len
, uint8_t* bytes
)
103 addr
= DEBUG_START
+ addr
;
105 if (addr
>= DEBUG_ROM_ENTRY
&&
106 (addr
+ len
) <= (DEBUG_ROM_ENTRY
+ debug_rom_raw_len
)) {
107 memcpy(bytes
, debug_rom_raw
+ addr
- DEBUG_ROM_ENTRY
, len
);
111 if (addr
>= DEBUG_ROM_WHERETO
&& (addr
+ len
) <= (DEBUG_ROM_WHERETO
+ 4)) {
112 memcpy(bytes
, debug_rom_whereto
+ addr
- DEBUG_ROM_WHERETO
, len
);
116 if (addr
>= DEBUG_ROM_FLAGS
&& ((addr
+ len
) <= DEBUG_ROM_FLAGS
+ 1024)) {
117 memcpy(bytes
, debug_rom_flags
+ addr
- DEBUG_ROM_FLAGS
, len
);
121 if (addr
>= debug_abstract_start
&& ((addr
+ len
) <= (debug_abstract_start
+ sizeof(debug_abstract
)))) {
122 memcpy(bytes
, debug_abstract
+ addr
- debug_abstract_start
, len
);
126 if (addr
>= debug_data_start
&& (addr
+ len
) <= (debug_data_start
+ sizeof(dmdata
))) {
127 memcpy(bytes
, dmdata
+ addr
- debug_data_start
, len
);
131 if (addr
>= debug_progbuf_start
&& ((addr
+ len
) <= (debug_progbuf_start
+ program_buffer_bytes
))) {
132 memcpy(bytes
, program_buffer
+ addr
- debug_progbuf_start
, len
);
136 fprintf(stderr
, "ERROR: invalid load from debug module: %zd bytes at 0x%016"
137 PRIx64
"\n", len
, addr
);
142 bool debug_module_t::store(reg_t addr
, size_t len
, const uint8_t* bytes
)
147 fprintf(stderr
, "store(addr=0x%lx, len=%d, bytes=0x%08x); "
148 "hartsel=0x%x\n", addr
, (unsigned) len
, *(uint32_t *) bytes
,
152 fprintf(stderr
, "store(addr=0x%lx, len=%d, bytes=...); "
153 "hartsel=0x%x\n", addr
, (unsigned) len
, dmcontrol
.hartsel
);
161 memcpy(id_bytes
, bytes
, 4);
162 id
= read32(id_bytes
, 0);
165 addr
= DEBUG_START
+ addr
;
167 if (addr
>= debug_data_start
&& (addr
+ len
) <= (debug_data_start
+ sizeof(dmdata
))) {
168 memcpy(dmdata
+ addr
- debug_data_start
, bytes
, len
);
172 if (addr
>= debug_progbuf_start
&& ((addr
+ len
) <= (debug_progbuf_start
+ program_buffer_bytes
))) {
173 memcpy(program_buffer
+ addr
- debug_progbuf_start
, bytes
, len
);
178 if (addr
== DEBUG_ROM_HALTED
) {
181 if (dmcontrol
.hartsel
== id
) {
182 if (0 == (debug_rom_flags
[id
] & (1 << DEBUG_ROM_FLAG_GO
))){
183 if (dmcontrol
.hartsel
== id
) {
184 abstractcs
.busy
= false;
191 if (addr
== DEBUG_ROM_GOING
) {
192 debug_rom_flags
[dmcontrol
.hartsel
] &= ~(1 << DEBUG_ROM_FLAG_GO
);
196 if (addr
== DEBUG_ROM_RESUMING
) {
199 resumeack
[id
] = true;
200 debug_rom_flags
[id
] &= ~(1 << DEBUG_ROM_FLAG_RESUME
);
204 if (addr
== DEBUG_ROM_EXCEPTION
) {
205 if (abstractcs
.cmderr
== CMDERR_NONE
) {
206 abstractcs
.cmderr
= CMDERR_EXCEPTION
;
211 fprintf(stderr
, "ERROR: invalid store to debug module: %zd bytes at 0x%016"
212 PRIx64
"\n", len
, addr
);
216 void debug_module_t::write32(uint8_t *memory
, unsigned int index
, uint32_t value
)
218 uint8_t* base
= memory
+ index
* 4;
219 base
[0] = value
& 0xff;
220 base
[1] = (value
>> 8) & 0xff;
221 base
[2] = (value
>> 16) & 0xff;
222 base
[3] = (value
>> 24) & 0xff;
225 uint32_t debug_module_t::read32(uint8_t *memory
, unsigned int index
)
227 uint8_t* base
= memory
+ index
* 4;
228 uint32_t value
= ((uint32_t) base
[0]) |
229 (((uint32_t) base
[1]) << 8) |
230 (((uint32_t) base
[2]) << 16) |
231 (((uint32_t) base
[3]) << 24);
235 processor_t
*debug_module_t::current_proc() const
237 processor_t
*proc
= NULL
;
239 proc
= sim
->get_core(dmcontrol
.hartsel
);
240 } catch (const std::out_of_range
&) {
245 unsigned debug_module_t::sb_access_bits()
247 return 8 << sbcs
.sbaccess
;
250 void debug_module_t::sb_autoincrement()
252 if (!sbcs
.autoincrement
|| !max_bus_master_bits
)
255 uint64_t value
= sbaddress
[0] + sb_access_bits() / 8;
256 sbaddress
[0] = value
;
257 uint32_t carry
= value
>> 32;
259 value
= sbaddress
[1] + carry
;
260 sbaddress
[1] = value
;
263 value
= sbaddress
[2] + carry
;
264 sbaddress
[2] = value
;
267 sbaddress
[3] += carry
;
270 void debug_module_t::sb_read()
272 reg_t address
= ((uint64_t) sbaddress
[1] << 32) | sbaddress
[0];
274 if (sbcs
.sbaccess
== 0 && max_bus_master_bits
>= 8) {
275 sbdata
[0] = sim
->debug_mmu
->load_uint8(address
);
276 } else if (sbcs
.sbaccess
== 1 && max_bus_master_bits
>= 16) {
277 sbdata
[0] = sim
->debug_mmu
->load_uint16(address
);
278 } else if (sbcs
.sbaccess
== 2 && max_bus_master_bits
>= 32) {
279 sbdata
[0] = sim
->debug_mmu
->load_uint32(address
);
280 } else if (sbcs
.sbaccess
== 3 && max_bus_master_bits
>= 64) {
281 uint64_t value
= sim
->debug_mmu
->load_uint32(address
);
283 sbdata
[1] = value
>> 32;
287 } catch (trap_load_access_fault
& t
) {
292 void debug_module_t::sb_write()
294 reg_t address
= ((uint64_t) sbaddress
[1] << 32) | sbaddress
[0];
295 D(fprintf(stderr
, "sb_write() 0x%x @ 0x%lx\n", sbdata
[0], address
));
296 if (sbcs
.sbaccess
== 0 && max_bus_master_bits
>= 8) {
297 sim
->debug_mmu
->store_uint8(address
, sbdata
[0]);
298 } else if (sbcs
.sbaccess
== 1 && max_bus_master_bits
>= 16) {
299 sim
->debug_mmu
->store_uint16(address
, sbdata
[0]);
300 } else if (sbcs
.sbaccess
== 2 && max_bus_master_bits
>= 32) {
301 sim
->debug_mmu
->store_uint32(address
, sbdata
[0]);
302 } else if (sbcs
.sbaccess
== 3 && max_bus_master_bits
>= 64) {
303 sim
->debug_mmu
->store_uint64(address
,
304 (((uint64_t) sbdata
[1]) << 32) | sbdata
[0]);
310 bool debug_module_t::dmi_read(unsigned address
, uint32_t *value
)
313 D(fprintf(stderr
, "dmi_read(0x%x) -> ", address
));
314 if (address
>= DMI_DATA0
&& address
< DMI_DATA0
+ abstractcs
.datacount
) {
315 unsigned i
= address
- DMI_DATA0
;
316 result
= read32(dmdata
, i
);
317 if (abstractcs
.busy
) {
319 fprintf(stderr
, "\ndmi_read(0x%02x (data[%d]) -> -1 because abstractcs.busy==true\n", address
, i
);
322 if (abstractcs
.busy
&& abstractcs
.cmderr
== CMDERR_NONE
) {
323 abstractcs
.cmderr
= CMDERR_BUSY
;
326 if (!abstractcs
.busy
&& ((abstractauto
.autoexecdata
>> i
) & 1)) {
327 perform_abstract_command();
329 } else if (address
>= DMI_PROGBUF0
&& address
< DMI_PROGBUF0
+ progbufsize
) {
330 unsigned i
= address
- DMI_PROGBUF0
;
331 result
= read32(program_buffer
, i
);
332 if (abstractcs
.busy
) {
334 fprintf(stderr
, "\ndmi_read(0x%02x (progbuf[%d]) -> -1 because abstractcs.busy==true\n", address
, i
);
336 if (!abstractcs
.busy
&& ((abstractauto
.autoexecprogbuf
>> i
) & 1)) {
337 perform_abstract_command();
344 processor_t
*proc
= current_proc();
346 dmcontrol
.haltreq
= proc
->halt_request
;
348 result
= set_field(result
, DMI_DMCONTROL_HALTREQ
, dmcontrol
.haltreq
);
349 result
= set_field(result
, DMI_DMCONTROL_RESUMEREQ
, dmcontrol
.resumereq
);
350 result
= set_field(result
, ((1L<<hartsellen
)-1) <<
351 DMI_DMCONTROL_HARTSEL_OFFSET
, dmcontrol
.hartsel
);
352 result
= set_field(result
, DMI_DMCONTROL_HARTRESET
, dmcontrol
.hartreset
);
353 result
= set_field(result
, DMI_DMCONTROL_NDMRESET
, dmcontrol
.ndmreset
);
354 result
= set_field(result
, DMI_DMCONTROL_DMACTIVE
, dmcontrol
.dmactive
);
359 processor_t
*proc
= current_proc();
361 dmstatus
.allnonexistant
= false;
362 dmstatus
.allunavail
= false;
363 dmstatus
.allrunning
= false;
364 dmstatus
.allhalted
= false;
365 dmstatus
.allresumeack
= false;
367 if (halted
[dmcontrol
.hartsel
]) {
368 dmstatus
.allhalted
= true;
370 dmstatus
.allrunning
= true;
373 dmstatus
.allnonexistant
= true;
375 dmstatus
.anynonexistant
= dmstatus
.allnonexistant
;
376 dmstatus
.anyunavail
= dmstatus
.allunavail
;
377 dmstatus
.anyrunning
= dmstatus
.allrunning
;
378 dmstatus
.anyhalted
= dmstatus
.allhalted
;
380 if (resumeack
[dmcontrol
.hartsel
]) {
381 dmstatus
.allresumeack
= true;
383 dmstatus
.allresumeack
= false;
386 dmstatus
.allresumeack
= false;
389 result
= set_field(result
, DMI_DMSTATUS_IMPEBREAK
,
391 result
= set_field(result
, DMI_DMSTATUS_ALLHAVERESET
,
392 havereset
[dmcontrol
.hartsel
]);
393 result
= set_field(result
, DMI_DMSTATUS_ANYHAVERESET
,
394 havereset
[dmcontrol
.hartsel
]);
395 result
= set_field(result
, DMI_DMSTATUS_ALLNONEXISTENT
, dmstatus
.allnonexistant
);
396 result
= set_field(result
, DMI_DMSTATUS_ALLUNAVAIL
, dmstatus
.allunavail
);
397 result
= set_field(result
, DMI_DMSTATUS_ALLRUNNING
, dmstatus
.allrunning
);
398 result
= set_field(result
, DMI_DMSTATUS_ALLHALTED
, dmstatus
.allhalted
);
399 result
= set_field(result
, DMI_DMSTATUS_ALLRESUMEACK
, dmstatus
.allresumeack
);
400 result
= set_field(result
, DMI_DMSTATUS_ANYNONEXISTENT
, dmstatus
.anynonexistant
);
401 result
= set_field(result
, DMI_DMSTATUS_ANYUNAVAIL
, dmstatus
.anyunavail
);
402 result
= set_field(result
, DMI_DMSTATUS_ANYRUNNING
, dmstatus
.anyrunning
);
403 result
= set_field(result
, DMI_DMSTATUS_ANYHALTED
, dmstatus
.anyhalted
);
404 result
= set_field(result
, DMI_DMSTATUS_ANYRESUMEACK
, dmstatus
.anyresumeack
);
405 result
= set_field(result
, DMI_DMSTATUS_AUTHENTICATED
, dmstatus
.authenticated
);
406 result
= set_field(result
, DMI_DMSTATUS_AUTHBUSY
, dmstatus
.authbusy
);
407 result
= set_field(result
, DMI_DMSTATUS_VERSION
, dmstatus
.version
);
411 result
= set_field(result
, DMI_ABSTRACTCS_CMDERR
, abstractcs
.cmderr
);
412 result
= set_field(result
, DMI_ABSTRACTCS_BUSY
, abstractcs
.busy
);
413 result
= set_field(result
, DMI_ABSTRACTCS_DATACOUNT
, abstractcs
.datacount
);
414 result
= set_field(result
, DMI_ABSTRACTCS_PROGBUFSIZE
,
415 abstractcs
.progbufsize
);
417 case DMI_ABSTRACTAUTO
:
418 result
= set_field(result
, DMI_ABSTRACTAUTO_AUTOEXECPROGBUF
, abstractauto
.autoexecprogbuf
);
419 result
= set_field(result
, DMI_ABSTRACTAUTO_AUTOEXECDATA
, abstractauto
.autoexecdata
);
425 result
= set_field(result
, DMI_HARTINFO_NSCRATCH
, 1);
426 result
= set_field(result
, DMI_HARTINFO_DATAACCESS
, 1);
427 result
= set_field(result
, DMI_HARTINFO_DATASIZE
, abstractcs
.datacount
);
428 result
= set_field(result
, DMI_HARTINFO_DATAADDR
, debug_data_start
);
431 result
= set_field(result
, DMI_SBCS_SBVERSION
, sbcs
.version
);
432 result
= set_field(result
, DMI_SBCS_SBREADONADDR
, sbcs
.readonaddr
);
433 result
= set_field(result
, DMI_SBCS_SBACCESS
, sbcs
.sbaccess
);
434 result
= set_field(result
, DMI_SBCS_SBAUTOINCREMENT
, sbcs
.autoincrement
);
435 result
= set_field(result
, DMI_SBCS_SBREADONDATA
, sbcs
.readondata
);
436 result
= set_field(result
, DMI_SBCS_SBERROR
, sbcs
.error
);
437 result
= set_field(result
, DMI_SBCS_SBASIZE
, sbcs
.asize
);
438 result
= set_field(result
, DMI_SBCS_SBACCESS128
, sbcs
.access128
);
439 result
= set_field(result
, DMI_SBCS_SBACCESS64
, sbcs
.access64
);
440 result
= set_field(result
, DMI_SBCS_SBACCESS32
, sbcs
.access32
);
441 result
= set_field(result
, DMI_SBCS_SBACCESS16
, sbcs
.access16
);
442 result
= set_field(result
, DMI_SBCS_SBACCESS8
, sbcs
.access8
);
445 result
= sbaddress
[0];
448 result
= sbaddress
[1];
451 result
= sbaddress
[2];
454 result
= sbaddress
[3];
458 if (sbcs
.error
== 0) {
460 if (sbcs
.readondata
) {
479 D(fprintf(stderr
, "Unexpected. Returning Error."));
483 D(fprintf(stderr
, "0x%x\n", result
));
488 bool debug_module_t::perform_abstract_command()
490 if (abstractcs
.cmderr
!= CMDERR_NONE
)
492 if (abstractcs
.busy
) {
493 abstractcs
.cmderr
= CMDERR_BUSY
;
497 if ((command
>> 24) == 0) {
499 unsigned size
= get_field(command
, AC_ACCESS_REGISTER_SIZE
);
500 bool write
= get_field(command
, AC_ACCESS_REGISTER_WRITE
);
501 unsigned regno
= get_field(command
, AC_ACCESS_REGISTER_REGNO
);
503 if (!halted
[dmcontrol
.hartsel
]) {
504 abstractcs
.cmderr
= CMDERR_HALTRESUME
;
509 if (get_field(command
, AC_ACCESS_REGISTER_TRANSFER
)) {
511 if (regno
< 0x1000 && progbufsize
< 2) {
512 // Make the debugger use the program buffer if it's available, so it
513 // can test both use cases.
514 write32(debug_abstract
, i
++, csrw(S0
, CSR_DSCRATCH
));
519 write32(debug_abstract
, i
++, lw(S0
, ZERO
, debug_data_start
));
522 write32(debug_abstract
, i
++, ld(S0
, ZERO
, debug_data_start
));
525 abstractcs
.cmderr
= CMDERR_NOTSUP
;
528 write32(debug_abstract
, i
++, csrw(S0
, regno
));
531 write32(debug_abstract
, i
++, csrr(S0
, regno
));
534 write32(debug_abstract
, i
++, sw(S0
, ZERO
, debug_data_start
));
537 write32(debug_abstract
, i
++, sd(S0
, ZERO
, debug_data_start
));
540 abstractcs
.cmderr
= CMDERR_NOTSUP
;
544 write32(debug_abstract
, i
++, csrr(S0
, CSR_DSCRATCH
));
546 } else if (regno
>= 0x1000 && regno
< 0x1020) {
547 unsigned regnum
= regno
- 0x1000;
552 write32(debug_abstract
, i
++, lw(regnum
, ZERO
, debug_data_start
));
554 write32(debug_abstract
, i
++, sw(regnum
, ZERO
, debug_data_start
));
558 write32(debug_abstract
, i
++, ld(regnum
, ZERO
, debug_data_start
));
560 write32(debug_abstract
, i
++, sd(regnum
, ZERO
, debug_data_start
));
563 abstractcs
.cmderr
= CMDERR_NOTSUP
;
567 } else if (regno
>= 0x1020 && regno
< 0x1040) {
568 // Don't force the debugger to use progbuf if it exists, so the
569 // debugger has to make the decision not to use abstract commands to
570 // access 64-bit FPRs on 32-bit targets.
571 unsigned fprnum
= regno
- 0x1020;
576 write32(debug_abstract
, i
++, flw(fprnum
, ZERO
, debug_data_start
));
579 write32(debug_abstract
, i
++, fld(fprnum
, ZERO
, debug_data_start
));
582 abstractcs
.cmderr
= CMDERR_NOTSUP
;
589 write32(debug_abstract
, i
++, fsw(fprnum
, ZERO
, debug_data_start
));
592 write32(debug_abstract
, i
++, fsd(fprnum
, ZERO
, debug_data_start
));
595 abstractcs
.cmderr
= CMDERR_NOTSUP
;
601 abstractcs
.cmderr
= CMDERR_NOTSUP
;
606 if (get_field(command
, AC_ACCESS_REGISTER_POSTEXEC
)) {
607 write32(debug_abstract
, i
,
608 jal(ZERO
, debug_progbuf_start
- debug_abstract_start
- 4 * i
));
611 write32(debug_abstract
, i
++, ebreak());
614 debug_rom_flags
[dmcontrol
.hartsel
] |= 1 << DEBUG_ROM_FLAG_GO
;
616 abstractcs
.busy
= true;
618 abstractcs
.cmderr
= CMDERR_NOTSUP
;
623 bool debug_module_t::dmi_write(unsigned address
, uint32_t value
)
625 D(fprintf(stderr
, "dmi_write(0x%x, 0x%x)\n", address
, value
));
627 if (!dmstatus
.authenticated
&& address
!= DMI_AUTHDATA
&&
628 address
!= DMI_DMCONTROL
)
631 if (address
>= DMI_DATA0
&& address
< DMI_DATA0
+ abstractcs
.datacount
) {
632 unsigned i
= address
- DMI_DATA0
;
633 if (!abstractcs
.busy
)
634 write32(dmdata
, address
- DMI_DATA0
, value
);
636 if (abstractcs
.busy
&& abstractcs
.cmderr
== CMDERR_NONE
) {
637 abstractcs
.cmderr
= CMDERR_BUSY
;
640 if (!abstractcs
.busy
&& ((abstractauto
.autoexecdata
>> i
) & 1)) {
641 perform_abstract_command();
645 } else if (address
>= DMI_PROGBUF0
&& address
< DMI_PROGBUF0
+ progbufsize
) {
646 unsigned i
= address
- DMI_PROGBUF0
;
648 if (!abstractcs
.busy
)
649 write32(program_buffer
, i
, value
);
651 if (!abstractcs
.busy
&& ((abstractauto
.autoexecprogbuf
>> i
) & 1)) {
652 perform_abstract_command();
660 if (!dmcontrol
.dmactive
&& get_field(value
, DMI_DMCONTROL_DMACTIVE
))
662 dmcontrol
.dmactive
= get_field(value
, DMI_DMCONTROL_DMACTIVE
);
663 if (!dmstatus
.authenticated
)
665 if (dmcontrol
.dmactive
) {
666 dmcontrol
.haltreq
= get_field(value
, DMI_DMCONTROL_HALTREQ
);
667 dmcontrol
.resumereq
= get_field(value
, DMI_DMCONTROL_RESUMEREQ
);
668 dmcontrol
.hartreset
= get_field(value
, DMI_DMCONTROL_HARTRESET
);
669 dmcontrol
.ndmreset
= get_field(value
, DMI_DMCONTROL_NDMRESET
);
670 dmcontrol
.hartsel
= get_field(value
, ((1L<<hartsellen
)-1) <<
671 DMI_DMCONTROL_HARTSEL_OFFSET
);
672 if (get_field(value
, DMI_DMCONTROL_ACKHAVERESET
)) {
673 havereset
[dmcontrol
.hartsel
] = false;
676 processor_t
*proc
= current_proc();
678 proc
->halt_request
= dmcontrol
.haltreq
;
679 if (dmcontrol
.resumereq
) {
680 debug_rom_flags
[dmcontrol
.hartsel
] |= (1 << DEBUG_ROM_FLAG_RESUME
);
681 resumeack
[dmcontrol
.hartsel
] = false;
683 if (dmcontrol
.hartreset
) {
687 if (dmcontrol
.ndmreset
) {
688 for (size_t i
= 0; i
< sim
->nprocs(); i
++) {
689 proc
= sim
->get_core(i
);
698 return perform_abstract_command();
701 abstractcs
.cmderr
= (cmderr_t
) (((uint32_t) (abstractcs
.cmderr
)) & (~(uint32_t)(get_field(value
, DMI_ABSTRACTCS_CMDERR
))));
704 case DMI_ABSTRACTAUTO
:
705 abstractauto
.autoexecprogbuf
= get_field(value
,
706 DMI_ABSTRACTAUTO_AUTOEXECPROGBUF
);
707 abstractauto
.autoexecdata
= get_field(value
,
708 DMI_ABSTRACTAUTO_AUTOEXECDATA
);
711 sbcs
.readonaddr
= get_field(value
, DMI_SBCS_SBREADONADDR
);
712 sbcs
.sbaccess
= get_field(value
, DMI_SBCS_SBACCESS
);
713 sbcs
.autoincrement
= get_field(value
, DMI_SBCS_SBAUTOINCREMENT
);
714 sbcs
.readondata
= get_field(value
, DMI_SBCS_SBREADONDATA
);
715 sbcs
.error
&= ~get_field(value
, DMI_SBCS_SBERROR
);
718 sbaddress
[0] = value
;
719 if (sbcs
.error
== 0 && sbcs
.readonaddr
) {
724 sbaddress
[1] = value
;
727 sbaddress
[2] = value
;
730 sbaddress
[3] = value
;
734 if (sbcs
.error
== 0) {
736 if (sbcs
.autoincrement
&& sbcs
.error
== 0) {
751 D(fprintf(stderr
, "debug authentication: got 0x%x; 0x%x unlocks\n", value
,
752 challenge
+ secret
));
753 if (require_authentication
) {
754 if (value
== challenge
+ secret
) {
755 dmstatus
.authenticated
= true;
757 dmstatus
.authenticated
= false;
758 challenge
= random();
767 void debug_module_t::proc_reset(unsigned id
)
769 havereset
[id
] = true;