riscv/decode.h

   1 #ifndef _RISCV_DECODE_H
   2 #define _RISCV_DECODE_H
   3
   4 #include <stdint.h>
   5 typedef int int128_t __attribute__((mode(TI)));
   6 typedef unsigned int uint128_t __attribute__((mode(TI)));
   7
   8 #define support_64bit 1
   9 typedef int64_t sreg_t;
  10 typedef uint64_t reg_t;
  11
  12 union freg_t
  13 {
  14   float sp;
  15   double dp;
  16   uint64_t bits;
  17 };
  18
  19 const int OPCODE_BITS = 7;
  20 const int JTYPE_OPCODE_BITS = 5;
  21
  22 const int GPR_BITS = 8*sizeof(reg_t);
  23 const int GPRID_BITS = 5;
  24 const int NGPR = 1 << GPRID_BITS;
  25
  26 const int FPR_BITS = 64;
  27 const int FPRID_BITS = 5;
  28 const int NFPR = 1 << FPRID_BITS;
  29
  30 const int IMM_BITS = 12;
  31 const int TARGET_BITS = 27;
  32 const int SHAMT_BITS = 6;
  33 const int FUNCT_BITS = 3;
  34 const int FFUNCT_BITS = 5;
  35 const int BIGIMM_BITS = 20;
  36
  37 #define SR_ET    0x0000000000000001ULL
  38 #define SR_PS    0x0000000000000004ULL
  39 #define SR_S     0x0000000000000008ULL
  40 #define SR_EF    0x0000000000000010ULL
  41 #define SR_UX    0x0000000000000020ULL
  42 #define SR_KX    0x0000000000000040ULL
  43 #define SR_IM    0x000000000000FF00ULL
  44 #define SR_ZERO  0xFFFFFFFFFFFF0082ULL
  45
  46 // note: bit fields are in little-endian order
  47 struct itype_t
  48 {
  49   unsigned imm : IMM_BITS;
  50   unsigned funct : FUNCT_BITS;
  51   unsigned rb : GPRID_BITS;
  52   unsigned ra : GPRID_BITS;
  53   unsigned opcode : OPCODE_BITS;
  54 };
  55
  56 struct jtype_t
  57 {
  58   unsigned target : TARGET_BITS;
  59   unsigned jump_opcode : JTYPE_OPCODE_BITS;
  60 };
  61
  62 struct rtype_t
  63 {
  64   unsigned rc : GPRID_BITS;
  65   unsigned shamt : SHAMT_BITS;
  66   unsigned unused : 1;
  67   unsigned funct : FUNCT_BITS;
  68   unsigned rb : GPRID_BITS;
  69   unsigned ra : GPRID_BITS;
  70   unsigned opcode : OPCODE_BITS;
  71 };
  72
  73 struct btype_t
  74 {
  75   unsigned bigimm : BIGIMM_BITS;
  76   unsigned rt : GPRID_BITS;
  77   unsigned opcode : OPCODE_BITS;
  78 };
  79
  80 struct ftype_t
  81 {
  82   unsigned rc : FPRID_BITS;
  83   unsigned rd : FPRID_BITS;
  84   unsigned ffunct : FFUNCT_BITS;
  85   unsigned rb : FPRID_BITS;
  86   unsigned ra : FPRID_BITS;
  87   unsigned opcode : OPCODE_BITS;
  88 };
  89
  90 union insn_t
  91 {
  92   itype_t itype;
  93   jtype_t jtype;
  94   rtype_t rtype;
  95   btype_t btype;
  96   ftype_t ftype;
  97   uint32_t bits;
  98 };
  99
 100 // helpful macros, etc
 101 #define RA R[insn.rtype.ra]
 102 #define RB R[insn.rtype.rb]
 103 #define RC R[insn.rtype.rc]
 104 #define FRA FR[insn.ftype.ra]
 105 #define FRB FR[insn.ftype.rb]
 106 #define FRC FR[insn.ftype.rc]
 107 #define FRD FR[insn.ftype.rd]
 108 #define BIGIMM insn.btype.bigimm
 109 #define IMM insn.itype.imm
 110 #define SIMM ((int32_t)((uint32_t)insn.itype.imm<<(32-IMM_BITS))>>(32-IMM_BITS))
 111 #define SHAMT insn.rtype.shamt
 112 #define TARGET insn.jtype.target
 113 #define BRANCH_TARGET (npc + (SIMM*sizeof(insn_t)))
 114 #define JUMP_TARGET ((npc & ~((1<<TARGET_BITS)*sizeof(insn_t)-1)) + TARGET*sizeof(insn_t))
 115
 116 #define require_supervisor if(!(sr & SR_S)) throw trap_privileged_instruction
 117 #define require64 if(gprlen != 64) throw trap_illegal_instruction
 118 #define require_fp if(!(sr & SR_EF)) throw trap_fp_disabled
 119 #define cmp_trunc(reg) (reg_t(reg) << (64-gprlen))
 120
 121 static inline sreg_t sext32(int32_t arg)
 122 {
 123   return arg;
 124 }
 125
 126 #endif