6 #include <sys/socket.h>
17 #include "gdbserver.h"
20 #define C_EBREAK 0x9002
21 #define EBREAK 0x00100073
23 //////////////////////////////////////// Utility Functions
32 const int debug_gdbserver
= 0;
34 void die(const char* msg
)
36 fprintf(stderr
, "gdbserver code died: %s\n", msg
);
40 // gdb's register list is defined in riscv_gdb_reg_names gdb/riscv-tdep.c in
41 // its source tree. We must interpret the numbers the same here.
53 //////////////////////////////////////// Functions to generate RISC-V opcodes.
55 // TODO: Does this already exist somewhere?
58 // Using regnames.cc as source. The RVG Calling Convention of the 2.0 RISC-V
59 // spec says it should be 2 and 3.
62 static uint32_t bits(uint32_t value
, unsigned int hi
, unsigned int lo
) {
63 return (value
>> lo
) & ((1 << (hi
+1-lo
)) - 1);
66 static uint32_t bit(uint32_t value
, unsigned int b
) {
67 return (value
>> b
) & 1;
70 static uint32_t jal(unsigned int rd
, uint32_t imm
) {
71 return (bit(imm
, 20) << 31) |
72 (bits(imm
, 10, 1) << 21) |
73 (bit(imm
, 11) << 20) |
74 (bits(imm
, 19, 12) << 12) |
79 static uint32_t csrsi(unsigned int csr
, uint16_t imm
) {
81 (bits(imm
, 4, 0) << 15) |
85 static uint32_t csrci(unsigned int csr
, uint16_t imm
) {
87 (bits(imm
, 4, 0) << 15) |
91 static uint32_t csrr(unsigned int rd
, unsigned int csr
) {
92 return (csr
<< 20) | (rd
<< 7) | MATCH_CSRRS
;
95 static uint32_t csrw(unsigned int source
, unsigned int csr
) {
96 return (csr
<< 20) | (source
<< 15) | MATCH_CSRRW
;
99 static uint32_t fence_i()
101 return MATCH_FENCE_I
;
104 static uint32_t sb(unsigned int src
, unsigned int base
, uint16_t offset
)
106 return (bits(offset
, 11, 5) << 25) |
109 (bits(offset
, 4, 0) << 7) |
113 static uint32_t sh(unsigned int src
, unsigned int base
, uint16_t offset
)
115 return (bits(offset
, 11, 5) << 25) |
118 (bits(offset
, 4, 0) << 7) |
122 static uint32_t sw(unsigned int src
, unsigned int base
, uint16_t offset
)
124 return (bits(offset
, 11, 5) << 25) |
127 (bits(offset
, 4, 0) << 7) |
131 static uint32_t sd(unsigned int src
, unsigned int base
, uint16_t offset
)
133 return (bits(offset
, 11, 5) << 25) |
134 (bits(src
, 4, 0) << 20) |
136 (bits(offset
, 4, 0) << 7) |
140 static uint32_t sq(unsigned int src
, unsigned int base
, uint16_t offset
)
143 return (bits(offset
, 11, 5) << 25) |
144 (bits(src
, 4, 0) << 20) |
146 (bits(offset
, 4, 0) << 7) |
153 static uint32_t lq(unsigned int rd
, unsigned int base
, uint16_t offset
)
156 return (bits(offset
, 11, 0) << 20) |
158 (bits(rd
, 4, 0) << 7) |
165 static uint32_t ld(unsigned int rd
, unsigned int base
, uint16_t offset
)
167 return (bits(offset
, 11, 0) << 20) |
169 (bits(rd
, 4, 0) << 7) |
173 static uint32_t lw(unsigned int rd
, unsigned int base
, uint16_t offset
)
175 return (bits(offset
, 11, 0) << 20) |
177 (bits(rd
, 4, 0) << 7) |
181 static uint32_t lh(unsigned int rd
, unsigned int base
, uint16_t offset
)
183 return (bits(offset
, 11, 0) << 20) |
185 (bits(rd
, 4, 0) << 7) |
189 static uint32_t lb(unsigned int rd
, unsigned int base
, uint16_t offset
)
191 return (bits(offset
, 11, 0) << 20) |
193 (bits(rd
, 4, 0) << 7) |
197 static uint32_t fsw(unsigned int src
, unsigned int base
, uint16_t offset
)
199 return (bits(offset
, 11, 5) << 25) |
200 (bits(src
, 4, 0) << 20) |
202 (bits(offset
, 4, 0) << 7) |
206 static uint32_t fsd(unsigned int src
, unsigned int base
, uint16_t offset
)
208 return (bits(offset
, 11, 5) << 25) |
209 (bits(src
, 4, 0) << 20) |
211 (bits(offset
, 4, 0) << 7) |
215 static uint32_t flw(unsigned int src
, unsigned int base
, uint16_t offset
)
217 return (bits(offset
, 11, 5) << 25) |
218 (bits(src
, 4, 0) << 20) |
220 (bits(offset
, 4, 0) << 7) |
224 static uint32_t fld(unsigned int src
, unsigned int base
, uint16_t offset
)
226 return (bits(offset
, 11, 5) << 25) |
227 (bits(src
, 4, 0) << 20) |
229 (bits(offset
, 4, 0) << 7) |
233 static uint32_t addi(unsigned int dest
, unsigned int src
, uint16_t imm
)
235 return (bits(imm
, 11, 0) << 20) |
241 static uint32_t ori(unsigned int dest
, unsigned int src
, uint16_t imm
)
243 return (bits(imm
, 11, 0) << 20) |
249 static uint32_t xori(unsigned int dest
, unsigned int src
, uint16_t imm
)
251 return (bits(imm
, 11, 0) << 20) |
257 static uint32_t srli(unsigned int dest
, unsigned int src
, uint8_t shamt
)
259 return (bits(shamt
, 4, 0) << 20) |
266 static uint32_t nop()
268 return addi(0, 0, 0);
271 template <typename T
>
272 unsigned int circular_buffer_t
<T
>::size() const
277 return end
+ capacity
- start
;
280 template <typename T
>
281 void circular_buffer_t
<T
>::consume(unsigned int bytes
)
283 start
= (start
+ bytes
) % capacity
;
286 template <typename T
>
287 unsigned int circular_buffer_t
<T
>::contiguous_empty_size() const
291 return capacity
- end
- 1;
293 return capacity
- end
;
295 return start
- end
- 1;
298 template <typename T
>
299 unsigned int circular_buffer_t
<T
>::contiguous_data_size() const
304 return capacity
- start
;
307 template <typename T
>
308 void circular_buffer_t
<T
>::data_added(unsigned int bytes
)
311 assert(end
<= capacity
);
316 template <typename T
>
317 void circular_buffer_t
<T
>::reset()
323 template <typename T
>
324 void circular_buffer_t
<T
>::append(const T
*src
, unsigned int count
)
326 unsigned int copy
= std::min(count
, contiguous_empty_size());
327 memcpy(contiguous_empty(), src
, copy
* sizeof(T
));
331 assert(count
< contiguous_empty_size());
332 memcpy(contiguous_empty(), src
, count
* sizeof(T
));
337 ////////////////////////////// Debug Operations
339 class halt_op_t
: public operation_t
342 halt_op_t(gdbserver_t
& gdbserver
, bool send_status
=false) :
343 operation_t(gdbserver
), send_status(send_status
),
346 void write_dpc_program() {
347 gs
.dr_write32(0, csrsi(CSR_DCSR
, DCSR_HALT
));
348 gs
.dr_write32(1, csrr(S0
, CSR_DPC
));
349 gs
.dr_write_store(2, S0
, SLOT_DATA0
);
354 bool perform_step(unsigned int step
) {
358 gs
.dr_write32(0, xori(S1
, ZERO
, -1));
359 gs
.dr_write32(1, srli(S1
, S1
, 31));
360 // 0x00000001 0x00000001:ffffffff 0x00000001:ffffffff:ffffffff:ffffffff
361 gs
.dr_write32(2, sw(S1
, ZERO
, DEBUG_RAM_START
));
362 gs
.dr_write32(3, srli(S1
, S1
, 31));
363 // 0x00000000 0x00000000:00000003 0x00000000:00000003:ffffffff:ffffffff
364 gs
.dr_write32(4, sw(S1
, ZERO
, DEBUG_RAM_START
+ 4));
377 uint32_t word0
= gs
.dr_read32(0);
378 uint32_t word1
= gs
.dr_read32(1);
380 if (word0
== 1 && word1
== 0) {
382 } else if (word0
== 0xffffffff && word1
== 3) {
384 } else if (word0
== 0xffffffff && word1
== 0xffffffff) {
394 gs
.dpc
= gs
.dr_read(SLOT_DATA0
);
395 fprintf(stderr
, "dpc=0x%lx\n", gs
.dpc
);
396 gs
.dr_write32(0, csrr(S0
, CSR_MSTATUS
));
397 gs
.dr_write_store(1, S0
, SLOT_DATA0
);
404 gs
.mstatus
= gs
.dr_read(SLOT_DATA0
);
405 gs
.dr_write32(0, csrr(S0
, CSR_DCSR
));
406 gs
.dr_write32(1, sw(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
413 gs
.dcsr
= gs
.dr_read32(4);
415 gs
.sptbr_valid
= false;
416 gs
.pte_cache
.clear();
419 switch (get_field(gs
.dcsr
, DCSR_CAUSE
)) {
420 case DCSR_CAUSE_NONE
:
421 fprintf(stderr
, "Internal error. Processor halted without reason.\n");
424 case DCSR_CAUSE_DEBUGINT
:
425 gs
.send_packet("S02"); // Pretend program received SIGINT.
428 case DCSR_CAUSE_HWBP
:
429 case DCSR_CAUSE_STEP
:
430 case DCSR_CAUSE_HALT
:
431 // There's no gdb code for this.
432 gs
.send_packet("T05");
434 case DCSR_CAUSE_SWBP
:
435 gs
.send_packet("T05swbreak:;");
457 class continue_op_t
: public operation_t
460 continue_op_t(gdbserver_t
& gdbserver
, bool single_step
) :
461 operation_t(gdbserver
), single_step(single_step
) {};
463 bool perform_step(unsigned int step
) {
466 gs
.dr_write_load(0, S0
, SLOT_DATA0
);
467 gs
.dr_write32(1, csrw(S0
, CSR_DPC
));
468 // TODO: Isn't there a fence.i in Debug ROM already?
469 if (gs
.fence_i_required
) {
470 gs
.dr_write32(2, fence_i());
472 gs
.fence_i_required
= false;
476 gs
.dr_write(SLOT_DATA0
, gs
.dpc
);
481 gs
.dr_write_load(0, S0
, SLOT_DATA0
);
482 gs
.dr_write32(1, csrw(S0
, CSR_MSTATUS
));
484 gs
.dr_write(SLOT_DATA0
, gs
.mstatus
);
489 gs
.dr_write32(0, lw(S0
, 0, (uint16_t) DEBUG_RAM_START
+16));
490 gs
.dr_write32(1, csrw(S0
, CSR_DCSR
));
493 reg_t dcsr
= set_field(gs
.dcsr
, DCSR_HALT
, 0);
494 dcsr
= set_field(dcsr
, DCSR_STEP
, single_step
);
495 // Software breakpoints should go here.
496 dcsr
= set_field(dcsr
, DCSR_EBREAKM
, 1);
497 dcsr
= set_field(dcsr
, DCSR_EBREAKH
, 1);
498 dcsr
= set_field(dcsr
, DCSR_EBREAKS
, 1);
499 dcsr
= set_field(dcsr
, DCSR_EBREAKU
, 1);
500 gs
.dr_write32(4, dcsr
);
512 class general_registers_read_op_t
: public operation_t
514 // Register order that gdb expects is:
515 // "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
516 // "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
517 // "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",
518 // "x24", "x25", "x26", "x27", "x28", "x29", "x30", "x31",
520 // Each byte of register data is described by two hex digits. The bytes with
521 // the register are transmitted in target byte order. The size of each
522 // register and their position within the ‘g’ packet are determined by the
523 // gdb internal gdbarch functions DEPRECATED_REGISTER_RAW_SIZE and
524 // gdbarch_register_name.
527 general_registers_read_op_t(gdbserver_t
& gdbserver
) :
528 operation_t(gdbserver
) {};
530 bool perform_step(unsigned int step
)
532 D(fprintf(stderr
, "register_read step %d\n", step
));
536 // x0 is always zero.
538 gs
.send((uint32_t) 0);
540 gs
.send((uint64_t) 0);
543 gs
.dr_write_store(0, 1, SLOT_DATA0
);
544 gs
.dr_write_store(1, 2, SLOT_DATA1
);
551 gs
.send((uint32_t) gs
.dr_read(SLOT_DATA0
));
553 gs
.send((uint64_t) gs
.dr_read(SLOT_DATA0
));
561 gs
.send((uint32_t) gs
.dr_read(SLOT_DATA1
));
563 gs
.send((uint64_t) gs
.dr_read(SLOT_DATA1
));
566 unsigned int current_reg
= 2 * step
+ 1;
568 if (current_reg
== S1
) {
569 gs
.dr_write_load(i
++, S1
, SLOT_DATA_LAST
);
571 gs
.dr_write_store(i
++, current_reg
, SLOT_DATA0
);
572 if (current_reg
+ 1 == S0
) {
573 gs
.dr_write32(i
++, csrr(S0
, CSR_DSCRATCH
));
576 gs
.dr_write_store(i
++, current_reg
+1, SLOT_DATA1
);
585 class register_read_op_t
: public operation_t
588 register_read_op_t(gdbserver_t
& gdbserver
, unsigned int reg
) :
589 operation_t(gdbserver
), reg(reg
) {};
591 bool perform_step(unsigned int step
)
595 if (reg
>= REG_XPR0
&& reg
<= REG_XPR31
) {
596 die("handle_register_read");
597 // send(p->state.XPR[reg - REG_XPR0]);
598 } else if (reg
== REG_PC
) {
601 gs
.send((uint32_t) gs
.dpc
);
607 } else if (reg
>= REG_FPR0
&& reg
<= REG_FPR31
) {
608 // send(p->state.FPR[reg - REG_FPR0]);
610 gs
.dr_write32(0, fsw(reg
- REG_FPR0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
612 gs
.dr_write32(0, fsd(reg
- REG_FPR0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
615 } else if (reg
>= REG_CSR0
&& reg
<= REG_CSR4095
) {
616 gs
.dr_write32(0, csrr(S0
, reg
- REG_CSR0
));
617 gs
.dr_write_store(1, S0
, SLOT_DATA0
);
619 // If we hit an exception reading the CSR, we'll end up returning ~0 as
620 // the register's value, which is what we want. (Right?)
621 gs
.dr_write(SLOT_DATA0
, ~(uint64_t) 0);
623 gs
.send_packet("E02");
632 gs
.send(gs
.dr_read32(4));
634 gs
.send(gs
.dr_read(SLOT_DATA0
));
646 class register_write_op_t
: public operation_t
649 register_write_op_t(gdbserver_t
& gdbserver
, unsigned int reg
, reg_t value
) :
650 operation_t(gdbserver
), reg(reg
), value(value
) {};
652 bool perform_step(unsigned int step
)
654 gs
.dr_write_load(0, S0
, SLOT_DATA0
);
655 gs
.dr_write(SLOT_DATA0
, value
);
657 gs
.dr_write32(1, csrw(S0
, CSR_DSCRATCH
));
659 } else if (reg
== S1
) {
660 gs
.dr_write_store(1, S0
, SLOT_DATA_LAST
);
662 } else if (reg
>= REG_XPR0
&& reg
<= REG_XPR31
) {
663 gs
.dr_write32(1, addi(reg
, S0
, 0));
665 } else if (reg
== REG_PC
) {
668 } else if (reg
>= REG_FPR0
&& reg
<= REG_FPR31
) {
670 gs
.dr_write32(0, flw(reg
- REG_FPR0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
672 gs
.dr_write32(0, fld(reg
- REG_FPR0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
675 } else if (reg
>= REG_CSR0
&& reg
<= REG_CSR4095
) {
676 gs
.dr_write32(1, csrw(S0
, reg
- REG_CSR0
));
678 if (reg
== REG_CSR0
+ CSR_SPTBR
) {
680 gs
.sptbr_valid
= true;
683 gs
.send_packet("E02");
687 gs
.send_packet("OK");
696 class memory_read_op_t
: public operation_t
699 // Read length bytes from vaddr, storing the result into data.
700 // If data is NULL, send the result straight to gdb.
701 memory_read_op_t(gdbserver_t
& gdbserver
, reg_t vaddr
, unsigned int length
,
702 unsigned char *data
=NULL
) :
703 operation_t(gdbserver
), vaddr(vaddr
), length(length
), data(data
) {};
705 bool perform_step(unsigned int step
)
708 // address goes in S0
709 paddr
= gs
.translate(vaddr
);
710 access_size
= gs
.find_access_size(paddr
, length
);
712 gs
.dr_write_load(0, S0
, SLOT_DATA0
);
713 switch (access_size
) {
715 gs
.dr_write32(1, lb(S1
, S0
, 0));
718 gs
.dr_write32(1, lh(S1
, S0
, 0));
721 gs
.dr_write32(1, lw(S1
, S0
, 0));
724 gs
.dr_write32(1, ld(S1
, S0
, 0));
727 gs
.dr_write_store(2, S1
, SLOT_DATA1
);
729 gs
.dr_write(SLOT_DATA0
, paddr
);
739 reg_t value
= gs
.dr_read(SLOT_DATA1
);
740 for (unsigned int i
= 0; i
< access_size
; i
++) {
742 *(data
++) = value
& 0xff;
743 D(fprintf(stderr
, "%02x", (unsigned int) (value
& 0xff)));
745 sprintf(buffer
, "%02x", (unsigned int) (value
& 0xff));
750 if (data
&& debug_gdbserver
) {
751 D(fprintf(stderr
, "\n"));
753 length
-= access_size
;
754 paddr
+= access_size
;
762 gs
.dr_write(SLOT_DATA0
, paddr
);
773 unsigned int access_size
;
776 class memory_write_op_t
: public operation_t
779 memory_write_op_t(gdbserver_t
& gdbserver
, reg_t vaddr
, unsigned int length
,
780 const unsigned char *data
) :
781 operation_t(gdbserver
), vaddr(vaddr
), offset(0), length(length
), data(data
) {};
783 ~memory_write_op_t() {
787 bool perform_step(unsigned int step
)
789 reg_t paddr
= gs
.translate(vaddr
);
791 unsigned int data_offset
;
794 data_offset
= slot_offset32
[SLOT_DATA1
];
797 data_offset
= slot_offset64
[SLOT_DATA1
];
800 data_offset
= slot_offset128
[SLOT_DATA1
];
807 access_size
= gs
.find_access_size(paddr
, length
);
809 D(fprintf(stderr
, "write to 0x%lx -> 0x%lx (access=%d): ", vaddr
, paddr
,
811 for (unsigned int i
= 0; i
< length
; i
++) {
812 D(fprintf(stderr
, "%02x", data
[i
]));
814 D(fprintf(stderr
, "\n"));
816 // address goes in S0
817 gs
.dr_write_load(0, S0
, SLOT_DATA0
);
818 switch (access_size
) {
820 gs
.dr_write32(1, lb(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 4*data_offset
));
821 gs
.dr_write32(2, sb(S1
, S0
, 0));
822 gs
.dr_write32(data_offset
, data
[0]);
825 gs
.dr_write32(1, lh(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 4*data_offset
));
826 gs
.dr_write32(2, sh(S1
, S0
, 0));
827 gs
.dr_write32(data_offset
, data
[0] | (data
[1] << 8));
830 gs
.dr_write32(1, lw(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 4*data_offset
));
831 gs
.dr_write32(2, sw(S1
, S0
, 0));
832 gs
.dr_write32(data_offset
, data
[0] | (data
[1] << 8) |
833 (data
[2] << 16) | (data
[3] << 24));
836 gs
.dr_write32(1, ld(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 4*data_offset
));
837 gs
.dr_write32(2, sd(S1
, S0
, 0));
838 gs
.dr_write32(data_offset
, data
[0] | (data
[1] << 8) |
839 (data
[2] << 16) | (data
[3] << 24));
840 gs
.dr_write32(data_offset
+1, data
[4] | (data
[5] << 8) |
841 (data
[6] << 16) | (data
[7] << 24));
844 fprintf(stderr
, "gdbserver error: write %d bytes to 0x%lx -> 0x%lx; "
845 "access_size=%d\n", length
, vaddr
, paddr
, access_size
);
846 gs
.send_packet("E12");
850 gs
.dr_write(SLOT_DATA0
, paddr
);
856 if (gs
.dr_read32(DEBUG_RAM_SIZE
/ 4 - 1)) {
857 fprintf(stderr
, "Exception happened while writing to 0x%lx -> 0x%lx\n",
861 offset
+= access_size
;
862 if (offset
>= length
) {
863 gs
.send_packet("OK");
866 const unsigned char *d
= data
+ offset
;
867 switch (access_size
) {
869 gs
.dr_write32(data_offset
, d
[0]);
872 gs
.dr_write32(data_offset
, d
[0] | (d
[1] << 8));
875 gs
.dr_write32(data_offset
, d
[0] | (d
[1] << 8) |
876 (d
[2] << 16) | (d
[3] << 24));
879 gs
.dr_write32(data_offset
, d
[0] | (d
[1] << 8) |
880 (d
[2] << 16) | (d
[3] << 24));
881 gs
.dr_write32(data_offset
+1, d
[4] | (d
[5] << 8) |
882 (d
[6] << 16) | (d
[7] << 24));
885 gs
.send_packet("E13");
888 gs
.dr_write(SLOT_DATA0
, paddr
+ offset
);
898 unsigned int access_size
;
899 const unsigned char *data
;
902 class collect_translation_info_op_t
: public operation_t
905 // Read sufficient information from the target into gdbserver structures so
906 // that it's possible to translate vaddr, vaddr+length, and all addresses
907 // in between to physical addresses.
908 collect_translation_info_op_t(gdbserver_t
& gdbserver
, reg_t vaddr
, size_t length
) :
909 operation_t(gdbserver
), state(STATE_START
), vaddr(vaddr
), length(length
) {};
911 bool perform_step(unsigned int step
)
913 unsigned int vm
= gs
.virtual_memory();
918 // Nothing to be done.
940 sprintf(buf
, "VM mode %d is not supported by gdbserver.cc.", vm
);
942 return true; // die doesn't return, but gcc doesn't know that.
947 // Perform any reads from the just-completed action.
951 case STATE_READ_SPTBR
:
952 gs
.sptbr
= ((uint64_t) gs
.dr_read32(5) << 32) | gs
.dr_read32(4);
953 gs
.sptbr_valid
= true;
956 gs
.pte_cache
[pte_addr
] = ((uint64_t) gs
.dr_read32(5) << 32) |
958 D(fprintf(stderr
, "pte_cache[0x%lx] = 0x%lx\n", pte_addr
, gs
.pte_cache
[pte_addr
]));
962 // Set up the next action.
963 // We only get here for VM_SV32/39/38.
965 if (!gs
.sptbr_valid
) {
966 state
= STATE_READ_SPTBR
;
967 gs
.dr_write32(0, csrr(S0
, CSR_SPTBR
));
968 gs
.dr_write32(1, sd(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
969 gs
.dr_write32(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
974 reg_t base
= gs
.sptbr
<< PGSHIFT
;
975 int ptshift
= (levels
- 1) * ptidxbits
;
976 for (unsigned int i
= 0; i
< levels
; i
++, ptshift
-= ptidxbits
) {
977 reg_t idx
= (vaddr
>> (PGSHIFT
+ ptshift
)) & ((1 << ptidxbits
) - 1);
979 pte_addr
= base
+ idx
* ptesize
;
980 auto it
= gs
.pte_cache
.find(pte_addr
);
981 if (it
== gs
.pte_cache
.end()) {
982 state
= STATE_READ_PTE
;
984 gs
.dr_write32(0, lw(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
985 gs
.dr_write32(1, lw(S1
, S0
, 0));
986 gs
.dr_write32(2, sw(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
988 assert(gs
.xlen
>= 64);
989 gs
.dr_write32(0, ld(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
990 gs
.dr_write32(1, ld(S1
, S0
, 0));
991 gs
.dr_write32(2, sd(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
993 gs
.dr_write32(3, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*3))));
994 gs
.dr_write32(4, pte_addr
);
995 gs
.dr_write32(5, pte_addr
>> 32);
1000 reg_t pte
= gs
.pte_cache
[pte_addr
];
1001 reg_t ppn
= pte
>> PTE_PPN_SHIFT
;
1003 if (PTE_TABLE(pte
)) { // next level of page table
1004 base
= ppn
<< PGSHIFT
;
1006 // We've collected all the data required for the translation.
1011 "ERROR: gdbserver couldn't find appropriate PTEs to translate 0x%lx\n",
1024 unsigned int levels
;
1025 unsigned int ptidxbits
;
1026 unsigned int ptesize
;
1030 ////////////////////////////// gdbserver itself
1032 gdbserver_t::gdbserver_t(uint16_t port
, sim_t
*sim
) :
1036 recv_buf(64 * 1024), send_buf(64 * 1024)
1038 socket_fd
= socket(AF_INET
, SOCK_STREAM
, 0);
1039 if (socket_fd
== -1) {
1040 fprintf(stderr
, "failed to make socket: %s (%d)\n", strerror(errno
), errno
);
1044 fcntl(socket_fd
, F_SETFL
, O_NONBLOCK
);
1046 if (setsockopt(socket_fd
, SOL_SOCKET
, SO_REUSEADDR
, &reuseaddr
,
1047 sizeof(int)) == -1) {
1048 fprintf(stderr
, "failed setsockopt: %s (%d)\n", strerror(errno
), errno
);
1052 struct sockaddr_in addr
;
1053 memset(&addr
, 0, sizeof(addr
));
1054 addr
.sin_family
= AF_INET
;
1055 addr
.sin_addr
.s_addr
= INADDR_ANY
;
1056 addr
.sin_port
= htons(port
);
1058 if (bind(socket_fd
, (struct sockaddr
*) &addr
, sizeof(addr
)) == -1) {
1059 fprintf(stderr
, "failed to bind socket: %s (%d)\n", strerror(errno
), errno
);
1063 if (listen(socket_fd
, 1) == -1) {
1064 fprintf(stderr
, "failed to listen on socket: %s (%d)\n", strerror(errno
), errno
);
1069 unsigned int gdbserver_t::find_access_size(reg_t address
, int length
)
1071 reg_t composite
= address
| length
;
1072 if ((composite
& 0x7) == 0 && xlen
>= 64)
1074 if ((composite
& 0x3) == 0)
1079 reg_t
gdbserver_t::translate(reg_t vaddr
)
1081 unsigned int vm
= virtual_memory();
1082 unsigned int levels
, ptidxbits
, ptesize
;
1107 sprintf(buf
, "VM mode %d is not supported by gdbserver.cc.", vm
);
1109 return true; // die doesn't return, but gcc doesn't know that.
1113 // Handle page tables here. There's a bunch of duplicated code with
1114 // collect_translation_info_op_t. :-(
1115 reg_t base
= sptbr
<< PGSHIFT
;
1116 int ptshift
= (levels
- 1) * ptidxbits
;
1117 for (unsigned int i
= 0; i
< levels
; i
++, ptshift
-= ptidxbits
) {
1118 reg_t idx
= (vaddr
>> (PGSHIFT
+ ptshift
)) & ((1 << ptidxbits
) - 1);
1120 reg_t pte_addr
= base
+ idx
* ptesize
;
1121 auto it
= pte_cache
.find(pte_addr
);
1122 if (it
== pte_cache
.end()) {
1123 fprintf(stderr
, "ERROR: gdbserver tried to translate 0x%lx without first "
1124 "collecting the relevant PTEs.\n", vaddr
);
1125 die("gdbserver_t::translate()");
1128 reg_t pte
= pte_cache
[pte_addr
];
1129 reg_t ppn
= pte
>> PTE_PPN_SHIFT
;
1131 if (PTE_TABLE(pte
)) { // next level of page table
1132 base
= ppn
<< PGSHIFT
;
1134 // We've collected all the data required for the translation.
1135 reg_t vpn
= vaddr
>> PGSHIFT
;
1136 reg_t paddr
= (ppn
| (vpn
& ((reg_t(1) << ptshift
) - 1))) << PGSHIFT
;
1137 paddr
+= vaddr
& (PGSIZE
-1);
1138 D(fprintf(stderr
, "gdbserver translate 0x%lx -> 0x%lx\n", vaddr
, paddr
));
1143 fprintf(stderr
, "ERROR: gdbserver tried to translate 0x%lx but the relevant "
1144 "PTEs are invalid.\n", vaddr
);
1145 // TODO: Is it better to throw an exception here?
1149 unsigned int gdbserver_t::privilege_mode()
1151 unsigned int mode
= get_field(dcsr
, DCSR_PRV
);
1152 if (get_field(mstatus
, MSTATUS_MPRV
))
1153 mode
= get_field(mstatus
, MSTATUS_MPP
);
1157 unsigned int gdbserver_t::virtual_memory()
1159 unsigned int mode
= privilege_mode();
1162 return get_field(mstatus
, MSTATUS_VM
);
1165 void gdbserver_t::dr_write32(unsigned int index
, uint32_t value
)
1167 sim
->debug_module
.ram_write32(index
, value
);
1170 void gdbserver_t::dr_write64(unsigned int index
, uint64_t value
)
1172 dr_write32(index
, value
);
1173 dr_write32(index
+1, value
>> 32);
1176 void gdbserver_t::dr_write(enum slot slot
, uint64_t value
)
1180 dr_write32(slot_offset32
[slot
], value
);
1183 dr_write64(slot_offset64
[slot
], value
);
1191 void gdbserver_t::dr_write_jump(unsigned int index
)
1193 dr_write32(index
, jal(0,
1194 (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*index
))));
1197 void gdbserver_t::dr_write_store(unsigned int index
, unsigned int reg
, enum slot slot
)
1199 assert(slot
!= SLOT_INST0
|| index
> 2);
1200 assert(slot
!= SLOT_DATA0
|| index
< 4 || index
> 6);
1201 assert(slot
!= SLOT_DATA1
|| index
< 5 || index
> 10);
1202 assert(slot
!= SLOT_DATA_LAST
|| index
< 6 || index
> 14);
1205 return dr_write32(index
,
1206 sw(reg
, 0, (uint16_t) DEBUG_RAM_START
+ 4 * slot_offset32
[slot
]));
1208 return dr_write32(index
,
1209 sd(reg
, 0, (uint16_t) DEBUG_RAM_START
+ 4 * slot_offset64
[slot
]));
1211 return dr_write32(index
,
1212 sq(reg
, 0, (uint16_t) DEBUG_RAM_START
+ 4 * slot_offset128
[slot
]));
1214 fprintf(stderr
, "xlen is %d!\n", xlen
);
1219 void gdbserver_t::dr_write_load(unsigned int index
, unsigned int reg
, enum slot slot
)
1223 return dr_write32(index
,
1224 lw(reg
, 0, (uint16_t) DEBUG_RAM_START
+ 4 * slot_offset32
[slot
]));
1226 return dr_write32(index
,
1227 ld(reg
, 0, (uint16_t) DEBUG_RAM_START
+ 4 * slot_offset64
[slot
]));
1229 return dr_write32(index
,
1230 lq(reg
, 0, (uint16_t) DEBUG_RAM_START
+ 4 * slot_offset128
[slot
]));
1232 fprintf(stderr
, "xlen is %d!\n", xlen
);
1237 uint32_t gdbserver_t::dr_read32(unsigned int index
)
1239 uint32_t value
= sim
->debug_module
.ram_read32(index
);
1240 D(fprintf(stderr
, "read32(%d) -> 0x%x\n", index
, value
));
1244 uint64_t gdbserver_t::dr_read64(unsigned int index
)
1246 return ((uint64_t) dr_read32(index
+1) << 32) | dr_read32(index
);
1249 uint64_t gdbserver_t::dr_read(enum slot slot
)
1253 return dr_read32(slot_offset32
[slot
]);
1255 return dr_read64(slot_offset64
[slot
]);
1263 void gdbserver_t::add_operation(operation_t
* operation
)
1265 operation_queue
.push(operation
);
1268 void gdbserver_t::accept()
1270 client_fd
= ::accept(socket_fd
, NULL
, NULL
);
1271 if (client_fd
== -1) {
1272 if (errno
== EAGAIN
) {
1273 // No client waiting to connect right now.
1275 fprintf(stderr
, "failed to accept on socket: %s (%d)\n", strerror(errno
),
1280 fcntl(client_fd
, F_SETFL
, O_NONBLOCK
);
1283 extended_mode
= false;
1285 // gdb wants the core to be halted when it attaches.
1286 add_operation(new halt_op_t(*this));
1290 void gdbserver_t::read()
1292 // Reading from a non-blocking socket still blocks if there is no data
1295 size_t count
= recv_buf
.contiguous_empty_size();
1297 ssize_t bytes
= ::read(client_fd
, recv_buf
.contiguous_empty(), count
);
1299 if (errno
== EAGAIN
) {
1300 // We'll try again the next call.
1302 fprintf(stderr
, "failed to read on socket: %s (%d)\n", strerror(errno
), errno
);
1305 } else if (bytes
== 0) {
1306 // The remote disconnected.
1308 processor_t
*p
= sim
->get_core(0);
1309 // TODO p->set_halted(false, HR_NONE);
1313 recv_buf
.data_added(bytes
);
1317 void gdbserver_t::write()
1319 if (send_buf
.empty())
1322 while (!send_buf
.empty()) {
1323 unsigned int count
= send_buf
.contiguous_data_size();
1325 ssize_t bytes
= ::write(client_fd
, send_buf
.contiguous_data(), count
);
1327 fprintf(stderr
, "failed to write to socket: %s (%d)\n", strerror(errno
), errno
);
1329 } else if (bytes
== 0) {
1330 // Client can't take any more data right now.
1333 D(fprintf(stderr
, "wrote %ld bytes: ", bytes
));
1334 for (unsigned int i
= 0; i
< bytes
; i
++) {
1335 D(fprintf(stderr
, "%c", send_buf
[i
]));
1337 D(fprintf(stderr
, "\n"));
1338 send_buf
.consume(bytes
);
1343 void print_packet(const std::vector
<uint8_t> &packet
)
1345 for (uint8_t c
: packet
) {
1346 if (c
>= ' ' and c
<= '~')
1347 fprintf(stderr
, "%c", c
);
1349 fprintf(stderr
, "\\x%02x", c
);
1351 fprintf(stderr
, "\n");
1354 uint8_t compute_checksum(const std::vector
<uint8_t> &packet
)
1356 uint8_t checksum
= 0;
1357 for (auto i
= packet
.begin() + 1; i
!= packet
.end() - 3; i
++ ) {
1363 uint8_t character_hex_value(uint8_t character
)
1365 if (character
>= '0' && character
<= '9')
1366 return character
- '0';
1367 if (character
>= 'a' && character
<= 'f')
1368 return 10 + character
- 'a';
1369 if (character
>= 'A' && character
<= 'F')
1370 return 10 + character
- 'A';
1374 uint8_t extract_checksum(const std::vector
<uint8_t> &packet
)
1376 return character_hex_value(*(packet
.end() - 1)) +
1377 16 * character_hex_value(*(packet
.end() - 2));
1380 void gdbserver_t::process_requests()
1382 // See https://sourceware.org/gdb/onlinedocs/gdb/Remote-Protocol.html
1384 while (!recv_buf
.empty()) {
1385 std::vector
<uint8_t> packet
;
1386 for (unsigned int i
= 0; i
< recv_buf
.size(); i
++) {
1387 uint8_t b
= recv_buf
[i
];
1389 if (packet
.empty() && expect_ack
&& b
== '+') {
1390 recv_buf
.consume(1);
1394 if (packet
.empty() && b
== 3) {
1395 D(fprintf(stderr
, "Received interrupt\n"));
1396 recv_buf
.consume(1);
1402 // Start of new packet.
1403 if (!packet
.empty()) {
1404 fprintf(stderr
, "Received malformed %ld-byte packet from debug client: ",
1406 print_packet(packet
);
1407 recv_buf
.consume(i
);
1412 packet
.push_back(b
);
1414 // Packets consist of $<packet-data>#<checksum>
1415 // where <checksum> is
1416 if (packet
.size() >= 4 &&
1417 packet
[packet
.size()-3] == '#') {
1418 handle_packet(packet
);
1419 recv_buf
.consume(i
+1);
1423 // There's a partial packet in the buffer. Wait until we get more data to
1425 if (packet
.size()) {
1431 void gdbserver_t::handle_halt_reason(const std::vector
<uint8_t> &packet
)
1436 void gdbserver_t::handle_general_registers_read(const std::vector
<uint8_t> &packet
)
1438 add_operation(new general_registers_read_op_t(*this));
1441 void gdbserver_t::set_interrupt(uint32_t hartid
) {
1442 sim
->debug_module
.set_interrupt(hartid
);
1445 // First byte is the most-significant one.
1446 // Eg. "08675309" becomes 0x08675309.
1447 uint64_t consume_hex_number(std::vector
<uint8_t>::const_iterator
&iter
,
1448 std::vector
<uint8_t>::const_iterator end
)
1452 while (iter
!= end
) {
1454 uint64_t c_value
= character_hex_value(c
);
1464 // First byte is the least-significant one.
1465 // Eg. "08675309" becomes 0x09536708
1466 uint64_t consume_hex_number_le(std::vector
<uint8_t>::const_iterator
&iter
,
1467 std::vector
<uint8_t>::const_iterator end
)
1470 unsigned int shift
= 4;
1472 while (iter
!= end
) {
1474 uint64_t c_value
= character_hex_value(c
);
1478 value
|= c_value
<< shift
;
1479 if ((shift
% 8) == 0)
1487 void consume_string(std::string
&str
, std::vector
<uint8_t>::const_iterator
&iter
,
1488 std::vector
<uint8_t>::const_iterator end
, uint8_t separator
)
1490 while (iter
!= end
&& *iter
!= separator
) {
1491 str
.append(1, (char) *iter
);
1496 void gdbserver_t::handle_register_read(const std::vector
<uint8_t> &packet
)
1500 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1501 unsigned int n
= consume_hex_number(iter
, packet
.end());
1503 return send_packet("E01");
1505 add_operation(new register_read_op_t(*this, n
));
1508 void gdbserver_t::handle_register_write(const std::vector
<uint8_t> &packet
)
1512 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1513 unsigned int n
= consume_hex_number(iter
, packet
.end());
1515 return send_packet("E05");
1518 reg_t value
= consume_hex_number_le(iter
, packet
.end());
1520 return send_packet("E06");
1522 processor_t
*p
= sim
->get_core(0);
1524 add_operation(new register_write_op_t(*this, n
, value
));
1526 return send_packet("OK");
1529 void gdbserver_t::handle_memory_read(const std::vector
<uint8_t> &packet
)
1532 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1533 reg_t address
= consume_hex_number(iter
, packet
.end());
1535 return send_packet("E10");
1537 reg_t length
= consume_hex_number(iter
, packet
.end());
1539 return send_packet("E11");
1541 add_operation(new collect_translation_info_op_t(*this, address
, length
));
1542 add_operation(new memory_read_op_t(*this, address
, length
));
1545 void gdbserver_t::handle_memory_binary_write(const std::vector
<uint8_t> &packet
)
1547 // X addr,length:XX...
1548 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1549 reg_t address
= consume_hex_number(iter
, packet
.end());
1551 return send_packet("E20");
1553 reg_t length
= consume_hex_number(iter
, packet
.end());
1555 return send_packet("E21");
1559 return send_packet("OK");
1562 unsigned char *data
= new unsigned char[length
];
1563 for (unsigned int i
= 0; i
< length
; i
++) {
1564 if (iter
== packet
.end()) {
1565 return send_packet("E22");
1570 // The binary data representation uses 7d (ascii ‘}’) as an escape
1571 // character. Any escaped byte is transmitted as the escape character
1572 // followed by the original character XORed with 0x20. For example, the
1573 // byte 0x7d would be transmitted as the two bytes 0x7d 0x5d. The bytes
1574 // 0x23 (ascii ‘#’), 0x24 (ascii ‘$’), and 0x7d (ascii ‘}’) must always
1576 if (iter
== packet
.end()) {
1577 return send_packet("E23");
1585 return send_packet("E4b"); // EOVERFLOW
1587 add_operation(new collect_translation_info_op_t(*this, address
, length
));
1588 add_operation(new memory_write_op_t(*this, address
, length
, data
));
1591 void gdbserver_t::handle_continue(const std::vector
<uint8_t> &packet
)
1594 processor_t
*p
= sim
->get_core(0);
1595 if (packet
[2] != '#') {
1596 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1597 dpc
= consume_hex_number(iter
, packet
.end());
1599 return send_packet("E30");
1602 add_operation(new continue_op_t(*this, false));
1605 void gdbserver_t::handle_step(const std::vector
<uint8_t> &packet
)
1608 if (packet
[2] != '#') {
1609 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1611 //p->state.pc = consume_hex_number(iter, packet.end());
1613 return send_packet("E40");
1616 add_operation(new continue_op_t(*this, true));
1619 void gdbserver_t::handle_kill(const std::vector
<uint8_t> &packet
)
1622 // The exact effect of this packet is not specified.
1623 // Looks like OpenOCD disconnects?
1627 void gdbserver_t::handle_extended(const std::vector
<uint8_t> &packet
)
1629 // Enable extended mode. In extended mode, the remote server is made
1630 // persistent. The ‘R’ packet is used to restart the program being debugged.
1632 extended_mode
= true;
1635 void gdbserver_t::handle_breakpoint(const std::vector
<uint8_t> &packet
)
1637 // insert: Z type,addr,kind
1638 // remove: z type,addr,kind
1640 software_breakpoint_t bp
;
1641 bool insert
= (packet
[1] == 'Z');
1642 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1643 int type
= consume_hex_number(iter
, packet
.end());
1645 return send_packet("E50");
1647 bp
.address
= consume_hex_number(iter
, packet
.end());
1649 return send_packet("E51");
1651 bp
.size
= consume_hex_number(iter
, packet
.end());
1652 // There may be more options after a ; here, but we don't support that.
1654 return send_packet("E52");
1657 // Only software breakpoints are supported.
1658 return send_packet("");
1661 if (bp
.size
!= 2 && bp
.size
!= 4) {
1662 return send_packet("E53");
1665 fence_i_required
= true;
1666 add_operation(new collect_translation_info_op_t(*this, bp
.address
, bp
.size
));
1668 unsigned char* swbp
= new unsigned char[4];
1670 swbp
[0] = C_EBREAK
& 0xff;
1671 swbp
[1] = (C_EBREAK
>> 8) & 0xff;
1673 swbp
[0] = EBREAK
& 0xff;
1674 swbp
[1] = (EBREAK
>> 8) & 0xff;
1675 swbp
[2] = (EBREAK
>> 16) & 0xff;
1676 swbp
[3] = (EBREAK
>> 24) & 0xff;
1679 breakpoints
[bp
.address
] = new software_breakpoint_t(bp
);
1680 add_operation(new memory_read_op_t(*this, bp
.address
, bp
.size
,
1681 breakpoints
[bp
.address
]->instruction
));
1682 add_operation(new memory_write_op_t(*this, bp
.address
, bp
.size
, swbp
));
1685 software_breakpoint_t
*found_bp
;
1686 found_bp
= breakpoints
[bp
.address
];
1687 unsigned char* instruction
= new unsigned char[4];
1688 memcpy(instruction
, found_bp
->instruction
, 4);
1689 add_operation(new memory_write_op_t(*this, found_bp
->address
,
1690 found_bp
->size
, instruction
));
1691 breakpoints
.erase(bp
.address
);
1695 return send_packet("OK");
1698 void gdbserver_t::handle_query(const std::vector
<uint8_t> &packet
)
1701 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1703 consume_string(name
, iter
, packet
.end(), ':');
1704 if (iter
!= packet
.end())
1706 if (name
== "Supported") {
1708 while (iter
!= packet
.end()) {
1709 std::string feature
;
1710 consume_string(feature
, iter
, packet
.end(), ';');
1711 if (iter
!= packet
.end())
1713 if (feature
== "swbreak+") {
1717 send("PacketSize=131072;");
1718 return end_packet();
1721 D(fprintf(stderr
, "Unsupported query %s\n", name
.c_str()));
1722 return send_packet("");
1725 void gdbserver_t::handle_packet(const std::vector
<uint8_t> &packet
)
1727 if (compute_checksum(packet
) != extract_checksum(packet
)) {
1728 fprintf(stderr
, "Received %ld-byte packet with invalid checksum\n", packet
.size());
1729 fprintf(stderr
, "Computed checksum: %x\n", compute_checksum(packet
));
1730 print_packet(packet
);
1735 D(fprintf(stderr
, "Received %ld-byte packet from debug client: ", packet
.size()));
1736 D(print_packet(packet
));
1739 switch (packet
[1]) {
1741 return handle_extended(packet
);
1743 return handle_halt_reason(packet
);
1745 return handle_general_registers_read(packet
);
1747 // return handle_kill(packet);
1749 return handle_memory_read(packet
);
1751 // return handle_memory_write(packet);
1753 return handle_memory_binary_write(packet
);
1755 return handle_register_read(packet
);
1757 return handle_register_write(packet
);
1759 return handle_continue(packet
);
1761 return handle_step(packet
);
1764 return handle_breakpoint(packet
);
1767 return handle_query(packet
);
1771 D(fprintf(stderr
, "** Unsupported packet: "));
1772 D(print_packet(packet
));
1776 void gdbserver_t::handle_interrupt()
1778 processor_t
*p
= sim
->get_core(0);
1779 add_operation(new halt_op_t(*this, true));
1782 void gdbserver_t::handle()
1784 if (client_fd
> 0) {
1785 processor_t
*p
= sim
->get_core(0);
1787 bool interrupt
= sim
->debug_module
.get_interrupt(0);
1789 if (!interrupt
&& !operation_queue
.empty()) {
1790 operation_t
*operation
= operation_queue
.front();
1791 if (operation
->step()) {
1792 operation_queue
.pop();
1797 bool halt_notification
= sim
->debug_module
.get_halt_notification(0);
1798 if (halt_notification
) {
1799 sim
->debug_module
.clear_halt_notification(0);
1800 add_operation(new halt_op_t(*this, true));
1810 if (operation_queue
.empty()) {
1811 this->process_requests();
1815 void gdbserver_t::send(const char* msg
)
1817 unsigned int length
= strlen(msg
);
1818 for (const char *c
= msg
; *c
; c
++)
1819 running_checksum
+= *c
;
1820 send_buf
.append((const uint8_t *) msg
, length
);
1823 void gdbserver_t::send(uint64_t value
)
1826 for (unsigned int i
= 0; i
< 8; i
++) {
1827 sprintf(buffer
, "%02x", (int) (value
& 0xff));
1833 void gdbserver_t::send(uint32_t value
)
1836 for (unsigned int i
= 0; i
< 4; i
++) {
1837 sprintf(buffer
, "%02x", (int) (value
& 0xff));
1843 void gdbserver_t::send_packet(const char* data
)
1851 void gdbserver_t::start_packet()
1854 running_checksum
= 0;
1857 void gdbserver_t::end_packet(const char* data
)
1863 char checksum_string
[4];
1864 sprintf(checksum_string
, "#%02x", running_checksum
);
1865 send(checksum_string
);