6 #include <sys/socket.h>
17 #include "gdbserver.h"
20 #define C_EBREAK 0x9002
21 #define EBREAK 0x00100073
23 //////////////////////////////////////// Utility Functions
25 void die(const char* msg
)
27 fprintf(stderr
, "gdbserver code died: %s\n", msg
);
31 // gdb's register list is defined in riscv_gdb_reg_names gdb/riscv-tdep.c in
32 // its source tree. We must interpret the numbers the same here.
44 //////////////////////////////////////// Functions to generate RISC-V opcodes.
46 // TODO: Does this already exist somewhere?
48 // Using regnames.cc as source. The RVG Calling Convention of the 2.0 RISC-V
49 // spec says it should be 2 and 3.
52 static uint32_t bits(uint32_t value
, unsigned int hi
, unsigned int lo
) {
53 return (value
>> lo
) & ((1 << (hi
+1-lo
)) - 1);
56 static uint32_t bit(uint32_t value
, unsigned int b
) {
57 return (value
>> b
) & 1;
60 static uint32_t jal(unsigned int rd
, uint32_t imm
) {
61 return (bit(imm
, 20) << 31) |
62 (bits(imm
, 10, 1) << 21) |
63 (bit(imm
, 11) << 20) |
64 (bits(imm
, 19, 12) << 12) |
69 static uint32_t csrsi(unsigned int csr
, uint8_t imm
) {
71 (bits(imm
, 4, 0) << 15) |
75 static uint32_t csrci(unsigned int csr
, uint8_t imm
) {
77 (bits(imm
, 4, 0) << 15) |
81 static uint32_t csrr(unsigned int rd
, unsigned int csr
) {
82 return (csr
<< 20) | (rd
<< 7) | MATCH_CSRRS
;
85 static uint32_t csrw(unsigned int source
, unsigned int csr
) {
86 return (csr
<< 20) | (source
<< 15) | MATCH_CSRRW
;
89 static uint32_t sb(unsigned int src
, unsigned int base
, uint16_t offset
)
91 return (bits(offset
, 11, 5) << 25) |
94 (bits(offset
, 4, 0) << 7) |
98 static uint32_t sh(unsigned int src
, unsigned int base
, uint16_t offset
)
100 return (bits(offset
, 11, 5) << 25) |
103 (bits(offset
, 4, 0) << 7) |
107 static uint32_t sw(unsigned int src
, unsigned int base
, uint16_t offset
)
109 return (bits(offset
, 11, 5) << 25) |
112 (bits(offset
, 4, 0) << 7) |
116 static uint32_t sd(unsigned int src
, unsigned int base
, uint16_t offset
)
118 return (bits(offset
, 11, 5) << 25) |
119 (bits(src
, 4, 0) << 20) |
121 (bits(offset
, 4, 0) << 7) |
125 static uint32_t ld(unsigned int rd
, unsigned int base
, uint16_t offset
)
127 return (bits(offset
, 11, 0) << 20) |
129 (bits(rd
, 4, 0) << 7) |
133 static uint32_t lw(unsigned int rd
, unsigned int base
, uint16_t offset
)
135 return (bits(offset
, 11, 0) << 20) |
137 (bits(rd
, 4, 0) << 7) |
141 static uint32_t lh(unsigned int rd
, unsigned int base
, uint16_t offset
)
143 return (bits(offset
, 11, 0) << 20) |
145 (bits(rd
, 4, 0) << 7) |
149 static uint32_t lb(unsigned int rd
, unsigned int base
, uint16_t offset
)
151 return (bits(offset
, 11, 0) << 20) |
153 (bits(rd
, 4, 0) << 7) |
157 static uint32_t fsd(unsigned int src
, unsigned int base
, uint16_t offset
)
159 return (bits(offset
, 11, 5) << 25) |
160 (bits(src
, 4, 0) << 20) |
162 (bits(offset
, 4, 0) << 7) |
166 static uint32_t addi(unsigned int dest
, unsigned int src
, uint16_t imm
)
168 return (bits(imm
, 11, 0) << 20) |
174 static uint32_t nop()
176 return addi(0, 0, 0);
179 template <typename T
>
180 unsigned int circular_buffer_t
<T
>::size() const
185 return end
+ capacity
- start
;
188 template <typename T
>
189 void circular_buffer_t
<T
>::consume(unsigned int bytes
)
191 start
= (start
+ bytes
) % capacity
;
194 template <typename T
>
195 unsigned int circular_buffer_t
<T
>::contiguous_empty_size() const
199 return capacity
- end
- 1;
201 return capacity
- end
;
203 return start
- end
- 1;
206 template <typename T
>
207 unsigned int circular_buffer_t
<T
>::contiguous_data_size() const
212 return capacity
- start
;
215 template <typename T
>
216 void circular_buffer_t
<T
>::data_added(unsigned int bytes
)
219 assert(end
<= capacity
);
224 template <typename T
>
225 void circular_buffer_t
<T
>::reset()
231 template <typename T
>
232 void circular_buffer_t
<T
>::append(const T
*src
, unsigned int count
)
234 unsigned int copy
= std::min(count
, contiguous_empty_size());
235 memcpy(contiguous_empty(), src
, copy
* sizeof(T
));
239 assert(count
< contiguous_empty_size());
240 memcpy(contiguous_empty(), src
, count
* sizeof(T
));
245 ////////////////////////////// Debug Operations
247 class halt_op_t
: public operation_t
250 halt_op_t(gdbserver_t
& gdbserver
) : operation_t(gdbserver
) {};
254 // TODO: For now we just assume the target is 64-bit.
255 gs
.write_debug_ram(0, csrsi(DCSR_ADDRESS
, DCSR_HALT_MASK
));
256 gs
.write_debug_ram(1, csrr(S0
, DPC_ADDRESS
));
257 gs
.write_debug_ram(2, sd(S0
, 0, (uint16_t) DEBUG_RAM_START
));
258 gs
.write_debug_ram(3, csrr(S0
, CSR_MBADADDR
));
259 gs
.write_debug_ram(4, sd(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 8));
260 gs
.write_debug_ram(5, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*5))));
262 // We could read mcause here as well, but only on 64-bit targets. I'm
263 // trying to keep The patterns here usable for 32-bit ISAs as well. (On a
264 // 32-bit ISA 8 words are required, while the minimum Debug RAM size is 7
272 if (state
== READ_DPC
) {
273 gs
.saved_dpc
= ((uint64_t) gs
.read_debug_ram(1) << 32) | gs
.read_debug_ram(0);
274 gs
.saved_mbadaddr
= ((uint64_t) gs
.read_debug_ram(3) << 32) | gs
.read_debug_ram(2);
275 gs
.write_debug_ram(0, csrr(S0
, CSR_MCAUSE
));
276 gs
.write_debug_ram(1, sd(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
277 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
282 gs
.saved_mcause
= ((uint64_t) gs
.read_debug_ram(1) << 32) | gs
.read_debug_ram(0);
294 class continue_op_t
: public operation_t
297 continue_op_t(gdbserver_t
& gdbserver
) : operation_t(gdbserver
) {};
301 gs
.write_debug_ram(0, ld(S0
, 0, (uint16_t) DEBUG_RAM_START
+16));
302 gs
.write_debug_ram(1, csrw(S0
, DPC_ADDRESS
));
303 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
304 gs
.write_debug_ram(4, gs
.saved_dpc
);
305 gs
.write_debug_ram(5, gs
.saved_dpc
>> 32);
313 if (state
== WRITE_DPC
) {
314 gs
.write_debug_ram(0, ld(S0
, 0, (uint16_t) DEBUG_RAM_START
+16));
315 gs
.write_debug_ram(1, csrw(S0
, CSR_MBADADDR
));
316 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
317 gs
.write_debug_ram(4, gs
.saved_mbadaddr
);
318 gs
.write_debug_ram(5, gs
.saved_mbadaddr
>> 32);
320 state
= WRITE_MBADADDR
;
323 gs
.write_debug_ram(0, ld(S0
, 0, (uint16_t) DEBUG_RAM_START
+16));
324 gs
.write_debug_ram(1, csrw(S0
, CSR_MCAUSE
));
325 gs
.write_debug_ram(2, csrci(DCSR_ADDRESS
, DCSR_HALT_MASK
));
326 gs
.write_debug_ram(3, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*3))));
327 gs
.write_debug_ram(4, gs
.saved_mcause
);
328 gs
.write_debug_ram(5, gs
.saved_mcause
>> 32);
341 class general_registers_read_op_t
: public operation_t
343 // Register order that gdb expects is:
344 // "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
345 // "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
346 // "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",
347 // "x24", "x25", "x26", "x27", "x28", "x29", "x30", "x31",
349 // Each byte of register data is described by two hex digits. The bytes with
350 // the register are transmitted in target byte order. The size of each
351 // register and their position within the ‘g’ packet are determined by the
352 // gdb internal gdbarch functions DEPRECATED_REGISTER_RAW_SIZE and
353 // gdbarch_register_name.
356 general_registers_read_op_t(gdbserver_t
& gdbserver
) :
357 operation_t(gdbserver
), current_reg(0) {};
363 // x0 is always zero.
366 gs
.write_debug_ram(0, sd(1, 0, (uint16_t) DEBUG_RAM_START
+ 16));
367 gs
.write_debug_ram(1, sd(2, 0, (uint16_t) DEBUG_RAM_START
+ 0));
368 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
376 fprintf(stderr
, "step %d\n", current_reg
);
377 gs
.send(((uint64_t) gs
.read_debug_ram(5) << 32) | gs
.read_debug_ram(4));
378 if (current_reg
>= 31) {
383 gs
.send(((uint64_t) gs
.read_debug_ram(1) << 32) | gs
.read_debug_ram(0));
387 if (current_reg
== S1
) {
388 gs
.write_debug_ram(i
++, ld(S1
, 0, (uint16_t) DEBUG_RAM_END
- 8));
390 gs
.write_debug_ram(i
++, sd(current_reg
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
391 if (current_reg
+ 1 == S0
) {
392 gs
.write_debug_ram(i
++, csrr(S0
, CSR_DSCRATCH
));
394 gs
.write_debug_ram(i
++, sd(current_reg
+1, 0, (uint16_t) DEBUG_RAM_START
+ 0));
395 gs
.write_debug_ram(i
, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*i
))));
402 unsigned int current_reg
;
405 class register_read_op_t
: public operation_t
408 register_read_op_t(gdbserver_t
& gdbserver
, unsigned int reg
) :
409 operation_t(gdbserver
), reg(reg
) {};
413 if (reg
>= REG_XPR0
&& reg
<= REG_XPR31
) {
414 die("handle_register_read");
415 // send(p->state.XPR[reg - REG_XPR0]);
416 } else if (reg
== REG_PC
) {
418 gs
.send(gs
.saved_dpc
);
421 } else if (reg
>= REG_FPR0
&& reg
<= REG_FPR31
) {
422 // send(p->state.FPR[reg - REG_FPR0]);
423 gs
.write_debug_ram(0, fsd(reg
- REG_FPR0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
424 gs
.write_debug_ram(1, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*1))));
425 } else if (reg
== REG_CSR0
+ CSR_MBADADDR
) {
427 gs
.send(gs
.saved_mbadaddr
);
430 } else if (reg
== REG_CSR0
+ CSR_MCAUSE
) {
432 gs
.send(gs
.saved_mcause
);
435 } else if (reg
>= REG_CSR0
&& reg
<= REG_CSR4095
) {
436 gs
.write_debug_ram(0, csrr(S0
, reg
- REG_CSR0
));
437 gs
.write_debug_ram(1, sd(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
438 gs
.write_debug_ram(2, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*2))));
439 // If we hit an exception reading the CSR, we'll end up returning ~0 as
440 // the register's value, which is what we want. (Right?)
441 gs
.write_debug_ram(4, 0xffffffff);
442 gs
.write_debug_ram(5, 0xffffffff);
444 gs
.send_packet("E02");
456 gs
.send(((uint64_t) gs
.read_debug_ram(5) << 32) | gs
.read_debug_ram(4));
465 class memory_read_op_t
: public operation_t
468 memory_read_op_t(gdbserver_t
& gdbserver
, reg_t addr
, unsigned int length
) :
469 operation_t(gdbserver
), addr(addr
), length(length
) {};
473 // address goes in S0
474 access_size
= (addr
% length
);
475 if (access_size
== 0)
476 access_size
= length
;
478 gs
.write_debug_ram(0, ld(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
479 switch (access_size
) {
481 gs
.write_debug_ram(1, lb(S1
, S0
, 0));
484 gs
.write_debug_ram(1, lh(S1
, S0
, 0));
487 gs
.write_debug_ram(1, lw(S1
, S0
, 0));
490 gs
.write_debug_ram(1, ld(S1
, S0
, 0));
493 gs
.send_packet("E12");
496 gs
.write_debug_ram(2, sd(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 24));
497 gs
.write_debug_ram(3, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*3))));
498 gs
.write_debug_ram(4, addr
);
499 gs
.write_debug_ram(5, addr
>> 32);
510 reg_t value
= ((uint64_t) gs
.read_debug_ram(7) << 32) | gs
.read_debug_ram(6);
511 for (unsigned int i
= 0; i
< access_size
; i
++) {
512 sprintf(buffer
, "%02x", (unsigned int) (value
& 0xff));
516 length
-= access_size
;
523 gs
.write_debug_ram(4, addr
);
524 gs
.write_debug_ram(5, addr
>> 32);
533 unsigned int access_size
;
536 class memory_write_op_t
: public operation_t
539 memory_write_op_t(gdbserver_t
& gdbserver
, reg_t addr
, unsigned int length
,
540 unsigned char *data
) :
541 operation_t(gdbserver
), addr(addr
), offset(0), length(length
), data(data
) {};
543 ~memory_write_op_t() {
549 // address goes in S0
550 access_size
= (addr
% length
);
551 if (access_size
== 0)
552 access_size
= length
;
554 gs
.write_debug_ram(0, ld(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
555 switch (access_size
) {
557 gs
.write_debug_ram(1, lb(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 24));
558 gs
.write_debug_ram(2, sb(S1
, S0
, 0));
559 gs
.write_debug_ram(6, data
[0]);
562 gs
.write_debug_ram(1, lh(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 24));
563 gs
.write_debug_ram(2, sh(S1
, S0
, 0));
564 gs
.write_debug_ram(6, data
[0] | (data
[1] << 8));
567 gs
.write_debug_ram(1, lw(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 24));
568 gs
.write_debug_ram(2, sw(S1
, S0
, 0));
569 gs
.write_debug_ram(6, data
[0] | (data
[1] << 8) |
570 (data
[2] << 16) | (data
[3] << 24));
573 gs
.write_debug_ram(1, ld(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 24));
574 gs
.write_debug_ram(2, sd(S1
, S0
, 0));
575 gs
.write_debug_ram(6, data
[0] | (data
[1] << 8) |
576 (data
[2] << 16) | (data
[3] << 24));
577 gs
.write_debug_ram(7, data
[4] | (data
[5] << 8) |
578 (data
[6] << 16) | (data
[7] << 24));
581 gs
.send_packet("E12");
584 gs
.write_debug_ram(3, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*3))));
585 gs
.write_debug_ram(4, addr
);
586 gs
.write_debug_ram(5, addr
>> 32);
594 offset
+= access_size
;
595 if (offset
>= length
) {
596 gs
.send_packet("OK");
599 const unsigned char *d
= data
+ offset
;
600 switch (access_size
) {
602 gs
.write_debug_ram(6, d
[0]);
605 gs
.write_debug_ram(6, d
[0] | (d
[1] << 8));
608 gs
.write_debug_ram(6, d
[0] | (d
[1] << 8) |
609 (d
[2] << 16) | (d
[3] << 24));
612 gs
.write_debug_ram(6, d
[0] | (d
[1] << 8) |
613 (d
[2] << 16) | (d
[3] << 24));
614 gs
.write_debug_ram(7, d
[4] | (d
[5] << 8) |
615 (d
[6] << 16) | (d
[7] << 24));
618 gs
.send_packet("E12");
621 gs
.write_debug_ram(4, addr
+ offset
);
622 gs
.write_debug_ram(5, (addr
+ offset
) >> 32);
632 unsigned int access_size
;
636 ////////////////////////////// gdbserver itself
638 gdbserver_t::gdbserver_t(uint16_t port
, sim_t
*sim
) :
641 recv_buf(64 * 1024), send_buf(64 * 1024),
644 socket_fd
= socket(AF_INET
, SOCK_STREAM
, 0);
645 if (socket_fd
== -1) {
646 fprintf(stderr
, "failed to make socket: %s (%d)\n", strerror(errno
), errno
);
650 fcntl(socket_fd
, F_SETFL
, O_NONBLOCK
);
652 if (setsockopt(socket_fd
, SOL_SOCKET
, SO_REUSEADDR
, &reuseaddr
,
653 sizeof(int)) == -1) {
654 fprintf(stderr
, "failed setsockopt: %s (%d)\n", strerror(errno
), errno
);
658 struct sockaddr_in addr
;
659 memset(&addr
, 0, sizeof(addr
));
660 addr
.sin_family
= AF_INET
;
661 addr
.sin_addr
.s_addr
= INADDR_ANY
;
662 addr
.sin_port
= htons(port
);
664 if (bind(socket_fd
, (struct sockaddr
*) &addr
, sizeof(addr
)) == -1) {
665 fprintf(stderr
, "failed to bind socket: %s (%d)\n", strerror(errno
), errno
);
669 if (listen(socket_fd
, 1) == -1) {
670 fprintf(stderr
, "failed to listen on socket: %s (%d)\n", strerror(errno
), errno
);
675 void gdbserver_t::write_debug_ram(unsigned int index
, uint32_t value
)
677 sim
->debug_module
.ram_write32(index
, value
);
680 uint32_t gdbserver_t::read_debug_ram(unsigned int index
)
682 return sim
->debug_module
.ram_read32(index
);
685 void gdbserver_t::set_operation(operation_t
* operation
)
687 assert(this->operation
== NULL
|| operation
== NULL
);
688 if (operation
&& operation
->start()) {
691 this->operation
= operation
;
695 void gdbserver_t::accept()
697 client_fd
= ::accept(socket_fd
, NULL
, NULL
);
698 if (client_fd
== -1) {
699 if (errno
== EAGAIN
) {
700 // No client waiting to connect right now.
702 fprintf(stderr
, "failed to accept on socket: %s (%d)\n", strerror(errno
),
707 fcntl(client_fd
, F_SETFL
, O_NONBLOCK
);
710 extended_mode
= false;
712 // gdb wants the core to be halted when it attaches.
713 set_operation(new halt_op_t(*this));
717 void gdbserver_t::read()
719 // Reading from a non-blocking socket still blocks if there is no data
722 size_t count
= recv_buf
.contiguous_empty_size();
724 ssize_t bytes
= ::read(client_fd
, recv_buf
.contiguous_empty(), count
);
726 if (errno
== EAGAIN
) {
727 // We'll try again the next call.
729 fprintf(stderr
, "failed to read on socket: %s (%d)\n", strerror(errno
), errno
);
732 } else if (bytes
== 0) {
733 // The remote disconnected.
735 processor_t
*p
= sim
->get_core(0);
736 // TODO p->set_halted(false, HR_NONE);
740 recv_buf
.data_added(bytes
);
744 void gdbserver_t::write()
746 if (send_buf
.empty())
749 while (!send_buf
.empty()) {
750 unsigned int count
= send_buf
.contiguous_data_size();
752 ssize_t bytes
= ::write(client_fd
, send_buf
.contiguous_data(), count
);
754 fprintf(stderr
, "failed to write to socket: %s (%d)\n", strerror(errno
), errno
);
756 } else if (bytes
== 0) {
757 // Client can't take any more data right now.
760 fprintf(stderr
, "wrote %ld bytes: ", bytes
);
761 for (unsigned int i
= 0; i
< bytes
; i
++) {
762 fprintf(stderr
, "%c", send_buf
[i
]);
764 fprintf(stderr
, "\n");
765 send_buf
.consume(bytes
);
770 void print_packet(const std::vector
<uint8_t> &packet
)
772 for (uint8_t c
: packet
) {
773 if (c
>= ' ' and c
<= '~')
774 fprintf(stderr
, "%c", c
);
776 fprintf(stderr
, "\\x%x", c
);
778 fprintf(stderr
, "\n");
781 uint8_t compute_checksum(const std::vector
<uint8_t> &packet
)
783 uint8_t checksum
= 0;
784 for (auto i
= packet
.begin() + 1; i
!= packet
.end() - 3; i
++ ) {
790 uint8_t character_hex_value(uint8_t character
)
792 if (character
>= '0' && character
<= '9')
793 return character
- '0';
794 if (character
>= 'a' && character
<= 'f')
795 return 10 + character
- 'a';
796 if (character
>= 'A' && character
<= 'F')
797 return 10 + character
- 'A';
801 uint8_t extract_checksum(const std::vector
<uint8_t> &packet
)
803 return character_hex_value(*(packet
.end() - 1)) +
804 16 * character_hex_value(*(packet
.end() - 2));
807 void gdbserver_t::process_requests()
809 // See https://sourceware.org/gdb/onlinedocs/gdb/Remote-Protocol.html
811 while (!recv_buf
.empty()) {
812 std::vector
<uint8_t> packet
;
813 for (unsigned int i
= 0; i
< recv_buf
.size(); i
++) {
814 uint8_t b
= recv_buf
[i
];
816 if (packet
.empty() && expect_ack
&& b
== '+') {
821 if (packet
.empty() && b
== 3) {
822 fprintf(stderr
, "Received interrupt\n");
829 // Start of new packet.
830 if (!packet
.empty()) {
831 fprintf(stderr
, "Received malformed %ld-byte packet from debug client: ",
833 print_packet(packet
);
841 // Packets consist of $<packet-data>#<checksum>
842 // where <checksum> is
843 if (packet
.size() >= 4 &&
844 packet
[packet
.size()-3] == '#') {
845 handle_packet(packet
);
846 recv_buf
.consume(i
+1);
850 // There's a partial packet in the buffer. Wait until we get more data to
858 void gdbserver_t::handle_halt_reason(const std::vector
<uint8_t> &packet
)
863 void gdbserver_t::handle_general_registers_read(const std::vector
<uint8_t> &packet
)
865 set_operation(new general_registers_read_op_t(*this));
868 void gdbserver_t::set_interrupt(uint32_t hartid
) {
869 sim
->debug_module
.set_interrupt(hartid
);
872 // First byte is the most-significant one.
873 // Eg. "08675309" becomes 0x08675309.
874 uint64_t consume_hex_number(std::vector
<uint8_t>::const_iterator
&iter
,
875 std::vector
<uint8_t>::const_iterator end
)
879 while (iter
!= end
) {
881 uint64_t c_value
= character_hex_value(c
);
891 // First byte is the least-significant one.
892 // Eg. "08675309" becomes 0x09536708
893 uint64_t consume_hex_number_le(std::vector
<uint8_t>::const_iterator
&iter
,
894 std::vector
<uint8_t>::const_iterator end
)
897 unsigned int shift
= 4;
899 while (iter
!= end
) {
901 uint64_t c_value
= character_hex_value(c
);
905 value
|= c_value
<< shift
;
906 if ((shift
% 8) == 0)
914 void consume_string(std::string
&str
, std::vector
<uint8_t>::const_iterator
&iter
,
915 std::vector
<uint8_t>::const_iterator end
, uint8_t separator
)
917 while (iter
!= end
&& *iter
!= separator
) {
918 str
.append(1, (char) *iter
);
923 void gdbserver_t::handle_register_read(const std::vector
<uint8_t> &packet
)
927 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
928 unsigned int n
= consume_hex_number(iter
, packet
.end());
930 return send_packet("E01");
932 set_operation(new register_read_op_t(*this, n
));
935 void gdbserver_t::handle_register_write(const std::vector
<uint8_t> &packet
)
939 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
940 unsigned int n
= consume_hex_number(iter
, packet
.end());
942 return send_packet("E05");
945 reg_t value
= consume_hex_number_le(iter
, packet
.end());
947 return send_packet("E06");
949 processor_t
*p
= sim
->get_core(0);
951 die("handle_register_write");
953 if (n >= REG_XPR0 && n <= REG_XPR31) {
954 p->state.XPR.write(n - REG_XPR0, value);
955 } else if (n == REG_PC) {
957 } else if (n >= REG_FPR0 && n <= REG_FPR31) {
958 p->state.FPR.write(n - REG_FPR0, value);
959 } else if (n >= REG_CSR0 && n <= REG_CSR4095) {
961 p->set_csr(n - REG_CSR0, value);
963 return send_packet("EFF");
966 return send_packet("E07");
970 return send_packet("OK");
973 void gdbserver_t::handle_memory_read(const std::vector
<uint8_t> &packet
)
976 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
977 reg_t address
= consume_hex_number(iter
, packet
.end());
979 return send_packet("E10");
981 reg_t length
= consume_hex_number(iter
, packet
.end());
983 return send_packet("E11");
985 set_operation(new memory_read_op_t(*this, address
, length
));
988 void gdbserver_t::handle_memory_binary_write(const std::vector
<uint8_t> &packet
)
990 // X addr,length:XX...
991 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
992 reg_t address
= consume_hex_number(iter
, packet
.end());
994 return send_packet("E20");
996 reg_t length
= consume_hex_number(iter
, packet
.end());
998 return send_packet("E21");
1002 return send_packet("OK");
1005 unsigned char *data
= new unsigned char[length
];
1006 for (unsigned int i
= 0; i
< length
; i
++) {
1007 if (iter
== packet
.end()) {
1008 return send_packet("E22");
1014 return send_packet("E4b"); // EOVERFLOW
1016 set_operation(new memory_write_op_t(*this, address
, length
, data
));
1019 void gdbserver_t::handle_continue(const std::vector
<uint8_t> &packet
)
1022 processor_t
*p
= sim
->get_core(0);
1023 if (packet
[2] != '#') {
1024 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1025 saved_dpc
= consume_hex_number(iter
, packet
.end());
1027 return send_packet("E30");
1030 set_operation(new continue_op_t(*this));
1033 void gdbserver_t::handle_step(const std::vector
<uint8_t> &packet
)
1036 if (packet
[2] != '#') {
1037 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1039 //p->state.pc = consume_hex_number(iter, packet.end());
1041 return send_packet("E40");
1044 // TODO: p->set_single_step(true);
1045 // TODO running = true;
1048 void gdbserver_t::handle_kill(const std::vector
<uint8_t> &packet
)
1051 // The exact effect of this packet is not specified.
1052 // Looks like OpenOCD disconnects?
1056 void gdbserver_t::handle_extended(const std::vector
<uint8_t> &packet
)
1058 // Enable extended mode. In extended mode, the remote server is made
1059 // persistent. The ‘R’ packet is used to restart the program being debugged.
1061 extended_mode
= true;
1064 void software_breakpoint_t::insert(mmu_t
* mmu
)
1067 instruction
= mmu
->load_uint16(address
);
1068 mmu
->store_uint16(address
, C_EBREAK
);
1070 instruction
= mmu
->load_uint32(address
);
1071 mmu
->store_uint32(address
, EBREAK
);
1073 fprintf(stderr
, ">>> Read %x from %lx\n", instruction
, address
);
1076 void software_breakpoint_t::remove(mmu_t
* mmu
)
1078 fprintf(stderr
, ">>> write %x to %lx\n", instruction
, address
);
1080 mmu
->store_uint16(address
, instruction
);
1082 mmu
->store_uint32(address
, instruction
);
1086 void gdbserver_t::handle_breakpoint(const std::vector
<uint8_t> &packet
)
1088 // insert: Z type,addr,kind
1089 // remove: z type,addr,kind
1091 software_breakpoint_t bp
;
1092 bool insert
= (packet
[1] == 'Z');
1093 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1094 int type
= consume_hex_number(iter
, packet
.end());
1096 return send_packet("E50");
1098 bp
.address
= consume_hex_number(iter
, packet
.end());
1100 return send_packet("E51");
1102 bp
.size
= consume_hex_number(iter
, packet
.end());
1103 // There may be more options after a ; here, but we don't support that.
1105 return send_packet("E52");
1107 if (bp
.size
!= 2 && bp
.size
!= 4) {
1108 return send_packet("E53");
1111 processor_t
*p
= sim
->get_core(0);
1112 die("handle_breakpoint");
1114 mmu_t* mmu = p->mmu;
1117 breakpoints[bp.address] = bp;
1120 bp = breakpoints[bp.address];
1122 breakpoints.erase(bp.address);
1124 mmu->flush_icache();
1125 sim->debug_mmu->flush_icache();
1127 return send_packet("OK");
1130 void gdbserver_t::handle_query(const std::vector
<uint8_t> &packet
)
1133 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1135 consume_string(name
, iter
, packet
.end(), ':');
1136 if (iter
!= packet
.end())
1138 if (name
== "Supported") {
1140 while (iter
!= packet
.end()) {
1141 std::string feature
;
1142 consume_string(feature
, iter
, packet
.end(), ';');
1143 if (iter
!= packet
.end())
1145 if (feature
== "swbreak+") {
1149 return end_packet();
1152 fprintf(stderr
, "Unsupported query %s\n", name
.c_str());
1153 return send_packet("");
1156 void gdbserver_t::handle_packet(const std::vector
<uint8_t> &packet
)
1158 if (compute_checksum(packet
) != extract_checksum(packet
)) {
1159 fprintf(stderr
, "Received %ld-byte packet with invalid checksum\n", packet
.size());
1160 fprintf(stderr
, "Computed checksum: %x\n", compute_checksum(packet
));
1161 print_packet(packet
);
1166 fprintf(stderr
, "Received %ld-byte packet from debug client: ", packet
.size());
1167 print_packet(packet
);
1170 switch (packet
[1]) {
1172 return handle_extended(packet
);
1174 return handle_halt_reason(packet
);
1176 return handle_general_registers_read(packet
);
1178 return handle_kill(packet
);
1180 return handle_memory_read(packet
);
1182 // return handle_memory_write(packet);
1184 return handle_memory_binary_write(packet
);
1186 return handle_register_read(packet
);
1188 return handle_register_write(packet
);
1190 return handle_continue(packet
);
1192 return handle_step(packet
);
1195 return handle_breakpoint(packet
);
1198 return handle_query(packet
);
1202 fprintf(stderr
, "** Unsupported packet: ");
1203 print_packet(packet
);
1207 void gdbserver_t::handle_interrupt()
1209 processor_t
*p
= sim
->get_core(0);
1210 // TODO p->set_halted(true, HR_INTERRUPT);
1211 send_packet("S02"); // Pretend program received SIGINT.
1212 // TODO running = false;
1215 void gdbserver_t::handle()
1217 if (client_fd
> 0) {
1218 processor_t
*p
= sim
->get_core(0);
1220 bool interrupt
= sim
->debug_module
.get_interrupt(0);
1223 if (operation
&& operation
->step()) {
1225 set_operation(NULL
);
1231 // gdb requested a halt and now it's done.
1233 fprintf(stderr, "DPC: 0x%x\n", read_debug_ram(0));
1234 fprintf(stderr, "DCSR: 0x%x\n", read_debug_ram(2));
1235 state = STATE_HALTED;
1242 if (running && p->halted) {
1243 // The core was running, but now it's halted. Better tell gdb.
1244 switch (p->halt_reason) {
1246 fprintf(stderr, "Internal error. Processor halted without reason.\n");
1252 // There's no gdb code for this.
1256 send_packet("T05swbreak:;");
1260 // TODO: Actually include register values here
1273 this->process_requests();
1277 void gdbserver_t::send(const char* msg
)
1279 unsigned int length
= strlen(msg
);
1280 for (const char *c
= msg
; *c
; c
++)
1281 running_checksum
+= *c
;
1282 send_buf
.append((const uint8_t *) msg
, length
);
1285 void gdbserver_t::send(uint64_t value
)
1288 for (unsigned int i
= 0; i
< 8; i
++) {
1289 sprintf(buffer
, "%02x", (int) (value
& 0xff));
1295 void gdbserver_t::send(uint32_t value
)
1298 for (unsigned int i
= 0; i
< 4; i
++) {
1299 sprintf(buffer
, "%02x", (int) (value
& 0xff));
1305 void gdbserver_t::send_packet(const char* data
)
1313 void gdbserver_t::start_packet()
1316 running_checksum
= 0;
1319 void gdbserver_t::end_packet(const char* data
)
1325 char checksum_string
[4];
1326 sprintf(checksum_string
, "#%02x", running_checksum
);
1327 send(checksum_string
);