4 // this file models a simple cache to estimate hit/miss rates.
5 // it is currently unused.
15 lfsr_t(const lfsr_t
& lfsr
) : reg(lfsr
.reg
) {}
16 uint32_t next() { return reg
= (reg
>>1)^(-(reg
&1) & 0xd0000001); }
24 icsim_t(size_t sets
, size_t ways
, size_t linesz
, const char* name
);
25 icsim_t(const icsim_t
& rhs
);
28 void tick(uint64_t pc
, int insnlen
, bool store
);
41 uint64_t read_accesses
;
44 uint64_t write_accesses
;
45 uint64_t write_misses
;
46 uint64_t bytes_written
;
51 static const uint64_t VALID
= 1ULL << 63;
52 static const uint64_t DIRTY
= 1ULL << 62;