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e6e26b3d944d904db6ca6fe258df626a323ec941
[riscv-isa-sim.git]
/
riscv
/
insns
/
c_le_s.h
1
require_fp
;
2
RC
=
f32_le
(
FRA
,
FRB
);
3
set_fp_exceptions
;