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d645626761ea12caee6ca38d91a8eee300be0968
[riscv-isa-sim.git]
/
riscv
/
insns
/
setpcr.h
1
require_supervisor
;
2
reg_t temp
=
get_pcr
(
insn
.
rtype
.
rs1
);
3
set_pcr
(
insn
.
rtype
.
rs1
,
temp
|
SIMM
);
4
RD
=
temp
;