projects
/
riscv-isa-sim.git
/ blob
commit
grep
author
committer
pickaxe
?
search:
re
777964544e3c1cd9f978ae8a3be38ec50d21de53
[riscv-isa-sim.git]
/
riscv
/
insns
/
vf.h
1
require_vector
;
2
for
(
int
i
=
0
;
i
<
VL
;
i
++)
3
{
4
uts
[
i
]->
pc
=
RS1
+
SIMM
;
5
uts
[
i
]->
utmode
=
true
;
6
while
(
uts
[
i
]->
utmode
)
7
uts
[
i
]->
step
(
1
,
false
);
// XXX
8
}