dad32ef493234637a3531c1971d57d7cc4aa7aa6
1 // See LICENSE for license details.
11 #include "gdbserver.h"
16 // this class encapsulates the processors and memory in a RISC-V machine.
20 sim_t(const char* isa
, size_t _nprocs
, size_t mem_mb
, bool halted
,
21 const std::vector
<std::string
>& htif_args
);
24 // run the simulation to completion
27 void set_debug(bool value
);
28 void set_log(bool value
);
29 void set_histogram(bool value
);
30 void set_procs_debug(bool value
);
31 void set_gdbserver(gdbserver_t
* gdbserver
) { this->gdbserver
= gdbserver
; }
32 htif_isasim_t
* get_htif() { return htif
.get(); }
33 const char* get_config_string() { return config_string
.c_str(); }
35 // returns the number of processors in this simulator
36 size_t num_cores() { return procs
.size(); }
37 processor_t
* get_core(size_t i
) { return procs
.at(i
); }
40 std::unique_ptr
<htif_isasim_t
> htif
;
41 char* mem
; // main memory
42 size_t memsz
; // memory size in bytes
43 mmu_t
* debug_mmu
; // debug port into main memory
44 std::vector
<processor_t
*> procs
;
45 std::string config_string
;
46 std::unique_ptr
<rom_device_t
> boot_rom
;
47 std::unique_ptr
<rtc_t
> rtc
;
50 processor_t
* get_core(const std::string
& i
);
51 void step(size_t n
); // step through simulation
52 static const size_t INTERLEAVE
= 5000;
53 static const size_t INSNS_PER_RTC_TICK
= 100; // 10 MHz clock for 1 BIPS core
58 bool histogram_enabled
; // provide a histogram of PCs
59 gdbserver_t
* gdbserver
;
61 // memory-mapped I/O routines
62 bool addr_is_mem(reg_t addr
) {
63 return addr
>= DRAM_BASE
&& addr
< DRAM_BASE
+ memsz
;
65 char* addr_to_mem(reg_t addr
) { return mem
+ addr
- DRAM_BASE
; }
66 reg_t
mem_to_addr(char* x
) { return x
- mem
+ DRAM_BASE
; }
67 bool mmio_load(reg_t addr
, size_t len
, uint8_t* bytes
);
68 bool mmio_store(reg_t addr
, size_t len
, const uint8_t* bytes
);
69 void make_config_string();
71 // presents a prompt for introspection into the simulation
74 // functions that help implement interactive()
75 void interactive_help(const std::string
& cmd
, const std::vector
<std::string
>& args
);
76 void interactive_quit(const std::string
& cmd
, const std::vector
<std::string
>& args
);
77 void interactive_run(const std::string
& cmd
, const std::vector
<std::string
>& args
, bool noisy
);
78 void interactive_run_noisy(const std::string
& cmd
, const std::vector
<std::string
>& args
);
79 void interactive_run_silent(const std::string
& cmd
, const std::vector
<std::string
>& args
);
80 void interactive_reg(const std::string
& cmd
, const std::vector
<std::string
>& args
);
81 void interactive_fregs(const std::string
& cmd
, const std::vector
<std::string
>& args
);
82 void interactive_fregd(const std::string
& cmd
, const std::vector
<std::string
>& args
);
83 void interactive_pc(const std::string
& cmd
, const std::vector
<std::string
>& args
);
84 void interactive_mem(const std::string
& cmd
, const std::vector
<std::string
>& args
);
85 void interactive_str(const std::string
& cmd
, const std::vector
<std::string
>& args
);
86 void interactive_until(const std::string
& cmd
, const std::vector
<std::string
>& args
);
87 reg_t
get_reg(const std::vector
<std::string
>& args
);
88 reg_t
get_freg(const std::vector
<std::string
>& args
);
89 reg_t
get_mem(const std::vector
<std::string
>& args
);
90 reg_t
get_pc(const std::vector
<std::string
>& args
);
92 friend class htif_isasim_t
;
93 friend class processor_t
;
95 friend class gdbserver_t
;
98 extern volatile bool ctrlc_pressed
;