Merge pull request #164 from mikey/tags
[microwatt.git] / scripts / dependencies.py
1 #!/usr/bin/python3
2
3 # Create makefile dependencies for VHDL files, looking for "use work" and
4 # "entity work" declarations
5
6 import sys
7 import re
8 import os
9 from collections import defaultdict
10
11 if len(sys.argv) == 1 and sys.argv[1] == '--help':
12 print("Usage: dependencies.py [--synth]")
13 sys.exit(1)
14
15 synth = False
16 args = sys.argv[1:]
17 if sys.argv[1] == '--synth':
18 synth = True
19 args = sys.argv[2:]
20
21 # Look at what a file provides
22 entity = re.compile('entity (.*) is')
23 package = re.compile('package (.*) is')
24
25 # Look at what a file depends on
26 work = re.compile('use work\.([^.]+)\.')
27 entity_work = re.compile('entity work\.([^;]+)')
28
29 # Synthesis targets
30 synth_provides = {
31 "dmi_dtm" : "dmi_dtm_dummy.vhdl",
32 "clock_generator" : "fpga/clk_gen_bypass.vhd",
33 "main_bram" : "fpga/main_bram.vhdl",
34 "pp_soc_uart" : "fpga/pp_soc_uart.vhd"
35 }
36
37 # Simulation targets
38 sim_provides = {
39 "dmi_dtm" : "dmi_dtm_xilinx.vhdl",
40 "clock_generator" : "fpga/clk_gen_bypass.vhd",
41 "main_bram" : "sim_bram.vhdl",
42 "pp_soc_uart" : "sim_uart.vhdl"
43 }
44
45 if synth:
46 provides = synth_provides
47 else:
48 provides = sim_provides
49
50 dependencies = defaultdict(set)
51
52 for filename in args:
53 with open(filename, 'r') as f:
54 for line in f:
55 l = line.rstrip(os.linesep)
56 m = entity.search(l)
57 if m:
58 p = m.group(1)
59 if p not in provides:
60 provides[p] = filename
61
62 m = package.search(l)
63 if m:
64 p = m.group(1)
65 if p not in provides:
66 provides[p] = filename
67
68 m = work.search(l)
69 if m:
70 dependency = m.group(1)
71 dependencies[filename].add(dependency)
72
73 m = entity_work.search(l)
74 if m:
75 dependency = m.group(1)
76 dependencies[filename].add(dependency)
77
78
79 emitted = set()
80 def chase_dependencies(filename):
81 if filename not in dependencies:
82 if filename not in emitted:
83 print("%s " % (filename), end="")
84 emitted.add(filename)
85 else:
86 for dep in dependencies[filename]:
87 f = provides[dep]
88 chase_dependencies(f)
89 if f not in emitted:
90 print("%s " % (f), end="")
91 emitted.add(f)
92
93
94 if synth:
95 chase_dependencies("fpga/toplevel.vhdl")
96 print("fpga/toplevel.vhdl")
97 else:
98 for filename in dependencies:
99 (basename, suffix) = filename.split('.')
100 print("%s.o:" % (basename), end="")
101 for dependency in dependencies[filename]:
102 p = provides[dependency]
103 (basename2, suffix2) = p.split('.')
104 print(" %s.o" % (basename2), end="")
105 print("")