4 * PHY (to be determined)
12 * <https://opencores.org/project,ulpi_wrapper> (GPL'd)
13 * <https://github.com/mossmann/daisho/blob/master/sw/fpga/common/usb3/usb2_ulpi.v> (BSD)
14 * <https://opencores.org/project,usb>
15 * <https://github.com/alexforencich/verilog-wishbone>