sim/Makefile.in

   1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
   2 # @configure_input@
   3
   4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
   5
   6 # This Makefile.in is free software; the Free Software Foundation
   7 # gives unlimited permission to copy and/or distribute it,
   8 # with or without modifications, as long as this notice is preserved.
   9
  10 # This program is distributed in the hope that it will be useful,
  11 # but WITHOUT ANY WARRANTY, to the extent permitted by law; without
  12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
  13 # PARTICULAR PURPOSE.
  14
  15 @SET_MAKE@
  16
  17 #   Copyright (C) 1993-2023 Free Software Foundation, Inc.
  18 #
  19 # This program is free software; you can redistribute it and/or modify
  20 # it under the terms of the GNU General Public License as published by
  21 # the Free Software Foundation; either version 3 of the License, or
  22 # (at your option) any later version.
  23 #
  24 # This program is distributed in the hope that it will be useful,
  25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  27 # GNU General Public License for more details.
  28 #
  29 # You should have received a copy of the GNU General Public License
  30 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
  31
  32
  33
  34
  35 VPATH = @srcdir@
  36 am__is_gnu_make = { \
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  47 am__make_running_with_option = \
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  54   has_opt=no; \
  55   sane_makeflags=$$MAKEFLAGS; \
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  67   strip_trailopt () \
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  89 am__make_dryrun = (target_option=n; $(am__make_running_with_option))
  90 am__make_keepgoing = (target_option=k; $(am__make_running_with_option))
  91 pkgdatadir = $(datadir)/@PACKAGE@
  92 pkgincludedir = $(includedir)/@PACKAGE@
  93 pkglibdir = $(libdir)/@PACKAGE@
  94 pkglibexecdir = $(libexecdir)/@PACKAGE@
  95 am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
  96 install_sh_DATA = $(install_sh) -c -m 644
  97 install_sh_PROGRAM = $(install_sh) -c
  98 install_sh_SCRIPT = $(install_sh) -c
  99 INSTALL_HEADER = $(INSTALL_DATA)
 100 transform = $(program_transform_name)
 101 NORMAL_INSTALL = :
 102 PRE_INSTALL = :
 103 POST_INSTALL = :
 104 NORMAL_UNINSTALL = :
 105 PRE_UNINSTALL = :
 106 POST_UNINSTALL = :
 107 build_triplet = @build@
 108 host_triplet = @host@
 109 target_triplet = @target@
 110 check_PROGRAMS = $(am__EXEEXT_8) $(am__EXEEXT_9)
 111 noinst_PROGRAMS = $(am__EXEEXT_10) $(am__EXEEXT_11) $(am__EXEEXT_12) \
 112         $(am__EXEEXT_13) $(am__EXEEXT_14) $(am__EXEEXT_15) \
 113         $(am__EXEEXT_16) $(am__EXEEXT_17) $(am__EXEEXT_18) \
 114         $(am__EXEEXT_19) $(am__EXEEXT_20) $(am__EXEEXT_21) \
 115         $(am__EXEEXT_22) $(am__EXEEXT_23) $(am__EXEEXT_24) \
 116         $(am__EXEEXT_25) $(am__EXEEXT_26) $(am__EXEEXT_27) \
 117         $(am__EXEEXT_28) $(am__EXEEXT_29) $(am__EXEEXT_30) \
 118         $(am__EXEEXT_31) $(am__EXEEXT_32) $(am__EXEEXT_33) \
 119         $(am__EXEEXT_34) $(am__EXEEXT_35) $(am__EXEEXT_36) \
 120         $(am__EXEEXT_37) $(am__EXEEXT_38) $(am__EXEEXT_39) \
 121         $(am__EXEEXT_40) $(am__EXEEXT_41)
 122 EXTRA_PROGRAMS = $(am__EXEEXT_2) testsuite/common/bits-gen$(EXEEXT) \
 123         testsuite/common/fpu-tst$(EXEEXT) $(am__EXEEXT_3) \
 124         $(am__EXEEXT_4) $(am__EXEEXT_5) $(am__EXEEXT_6) \
 125         $(am__EXEEXT_7)
 126 @ENABLE_SIM_TRUE@am__append_1 = \
 127 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/callback.h \
 128 @ENABLE_SIM_TRUE@       $(srcroot)/include/sim/sim.h
 129
 130 @SIM_ENABLE_HW_TRUE@am__append_2 = \
 131 @SIM_ENABLE_HW_TRUE@    $(SIM_COMMON_HW_OBJS) \
 132 @SIM_ENABLE_HW_TRUE@    $(SIM_HW_SOCKSER)
 133
 134 @SIM_ENABLE_HW_TRUE@am__append_3 = SIM_HW_DEVICES_="$(SIM_HW_DEVICES)"
 135 @SIM_ENABLE_IGEN_TRUE@am__append_4 = $(IGEN)
 136 @SIM_ENABLE_IGEN_TRUE@am__append_5 = igen/libigen.a
 137 @SIM_ENABLE_IGEN_TRUE@am__append_6 = $(igen_IGEN_TOOLS)
 138 @SIM_ENABLE_IGEN_TRUE@am__append_7 = $(igen_IGEN_TOOLS)
 139 TESTS = testsuite/common/bits32m0$(EXEEXT) \
 140         testsuite/common/bits32m31$(EXEEXT) \
 141         testsuite/common/bits64m0$(EXEEXT) \
 142         testsuite/common/bits64m63$(EXEEXT) \
 143         testsuite/common/alu-tst$(EXEEXT)
 144 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_8 = aarch64/libsim.a
 145 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_9 = aarch64/run
 146 @SIM_ENABLE_ARCH_arm_TRUE@am__append_10 = arm/libsim.a
 147 @SIM_ENABLE_ARCH_arm_TRUE@am__append_11 = arm/run
 148 @SIM_ENABLE_ARCH_avr_TRUE@am__append_12 = avr/libsim.a
 149 @SIM_ENABLE_ARCH_avr_TRUE@am__append_13 = avr/run
 150 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_14 = bfin/libsim.a
 151 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_15 = bfin/run
 152 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_16 = bfin_SIM_EXTRA_HW_DEVICES="$(bfin_SIM_EXTRA_HW_DEVICES)"
 153 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = bpf/libsim.a
 154 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_18 = bpf/run
 155 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_19 = \
 156 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/eng-le.h \
 157 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/eng-be.h
 158
 159 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_20 = $(bpf_BUILD_OUTPUTS)
 160 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_21 = $(bpf_BUILD_OUTPUTS)
 161 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = cr16/libsim.a
 162 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_23 = cr16/run
 163 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_24 = cr16/simops.h
 164 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_25 = $(cr16_BUILD_OUTPUTS)
 165 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_26 = cr16/gencode
 166 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_27 = $(cr16_BUILD_OUTPUTS)
 167 @SIM_ENABLE_ARCH_cris_TRUE@am__append_28 = cris/libsim.a
 168 @SIM_ENABLE_ARCH_cris_TRUE@am__append_29 = cris/run
 169 @SIM_ENABLE_ARCH_cris_TRUE@am__append_30 = cris_SIM_EXTRA_HW_DEVICES="$(cris_SIM_EXTRA_HW_DEVICES)"
 170 @SIM_ENABLE_ARCH_cris_TRUE@am__append_31 = cris/rvdummy
 171 @SIM_ENABLE_ARCH_cris_TRUE@am__append_32 = \
 172 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv10.h \
 173 @SIM_ENABLE_ARCH_cris_TRUE@     cris/engv32.h
 174
 175 @SIM_ENABLE_ARCH_cris_TRUE@am__append_33 = $(cris_BUILD_OUTPUTS)
 176 @SIM_ENABLE_ARCH_cris_TRUE@am__append_34 = $(cris_BUILD_OUTPUTS)
 177 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_35 = d10v/libsim.a
 178 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_36 = d10v/run
 179 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_37 = d10v/simops.h
 180 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_38 = $(d10v_BUILD_OUTPUTS)
 181 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_39 = d10v/gencode
 182 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_40 = $(d10v_BUILD_OUTPUTS)
 183 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_41 = erc32/libsim.a
 184 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_42 = erc32/run erc32/sis
 185 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_43 = sim-%D-install-exec-local
 186 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_44 = sim-erc32-uninstall-local
 187 @SIM_ENABLE_ARCH_examples_TRUE@am__append_45 = example-synacor/libsim.a
 188 @SIM_ENABLE_ARCH_examples_TRUE@am__append_46 = example-synacor/run
 189 @SIM_ENABLE_ARCH_frv_TRUE@am__append_47 = frv/libsim.a
 190 @SIM_ENABLE_ARCH_frv_TRUE@am__append_48 = frv/run
 191 @SIM_ENABLE_ARCH_frv_TRUE@am__append_49 = frv/eng.h
 192 @SIM_ENABLE_ARCH_frv_TRUE@am__append_50 = $(frv_BUILD_OUTPUTS)
 193 @SIM_ENABLE_ARCH_frv_TRUE@am__append_51 = $(frv_BUILD_OUTPUTS)
 194 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_52 = ft32/libsim.a
 195 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_53 = ft32/run
 196 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_54 = h8300/libsim.a
 197 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_55 = h8300/run
 198 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_56 = iq2000/run
 199 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_57 = iq2000/eng.h
 200 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_58 = $(iq2000_BUILD_OUTPUTS)
 201 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_59 = $(iq2000_BUILD_OUTPUTS)
 202 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_60 = lm32/run
 203 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_61 = lm32_SIM_EXTRA_HW_DEVICES="$(lm32_SIM_EXTRA_HW_DEVICES)"
 204 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_62 = lm32/eng.h
 205 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_63 = $(lm32_BUILD_OUTPUTS)
 206 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_64 = $(lm32_BUILD_OUTPUTS)
 207 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_65 = m32c/run
 208 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_66 = $(m32c_BUILD_OUTPUTS)
 209 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_67 = m32c/opc2c
 210 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_68 = \
 211 @SIM_ENABLE_ARCH_m32c_TRUE@     $(m32c_BUILD_OUTPUTS) \
 212 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c.log \
 213 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c.log
 214
 215 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_69 = m32r/run
 216 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_70 = m32r_SIM_EXTRA_HW_DEVICES="$(m32r_SIM_EXTRA_HW_DEVICES)"
 217 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_71 = \
 218 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng.h \
 219 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/engx.h \
 220 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/eng2.h
 221
 222 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_72 = $(m32r_BUILD_OUTPUTS)
 223 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_73 = $(m32r_BUILD_OUTPUTS)
 224 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_74 = m68hc11/run
 225 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_75 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)"
 226 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_76 = $(m68hc11_BUILD_OUTPUTS)
 227 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_77 = m68hc11/gencode
 228 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_78 = $(m68hc11_BUILD_OUTPUTS)
 229 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_79 = mcore/run
 230 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_80 = microblaze/run
 231 @SIM_ENABLE_ARCH_mips_TRUE@am__append_81 = mips/run
 232 @SIM_ENABLE_ARCH_mips_TRUE@am__append_82 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)"
 233 @SIM_ENABLE_ARCH_mips_TRUE@am__append_83 = mips/itable.h \
 234 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_MIPS_MULTI_SRC)
 235 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_84 = \
 236 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
 237 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@      mips/stamp-gen-mode-single
 238
 239 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_85 = \
 240 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
 241 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
 242 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
 243 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
 244
 245 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_86 = \
 246 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       $(SIM_MIPS_MULTI_SRC) \
 247 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-igen \
 248 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@       mips/stamp-gen-mode-multi-run
 249
 250 @SIM_ENABLE_ARCH_mips_TRUE@am__append_87 = $(mips_BUILD_OUTPUTS)
 251 @SIM_ENABLE_ARCH_mips_TRUE@am__append_88 = $(mips_BUILD_OUTPUTS)
 252 @SIM_ENABLE_ARCH_mips_TRUE@am__append_89 = mips/multi-include.h mips/multi-run.c
 253 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_90 = mn10300/run
 254 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_91 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
 255 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_92 = \
 256 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
 257 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
 258 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
 259 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
 260 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
 261 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
 262 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h
 263
 264 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_93 = $(mn10300_BUILD_OUTPUTS)
 265 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_94 = $(mn10300_BUILD_OUTPUTS)
 266 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_95 = moxie/run
 267 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_96 = msp430/run
 268 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_97 = or1k/run
 269 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_98 = or1k/eng.h
 270 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_99 = $(or1k_BUILD_OUTPUTS)
 271 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_100 = $(or1k_BUILD_OUTPUTS)
 272 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_101 = ppc/run ppc/psim
 273 @SIM_ENABLE_ARCH_pru_TRUE@am__append_102 = pru/run
 274 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_103 = riscv/run
 275 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_104 = rl78/run
 276 @SIM_ENABLE_ARCH_rx_TRUE@am__append_105 = rx/run
 277 @SIM_ENABLE_ARCH_sh_TRUE@am__append_106 = sh/run
 278 @SIM_ENABLE_ARCH_sh_TRUE@am__append_107 = \
 279 @SIM_ENABLE_ARCH_sh_TRUE@       sh/code.c \
 280 @SIM_ENABLE_ARCH_sh_TRUE@       sh/ppi.c
 281
 282 @SIM_ENABLE_ARCH_sh_TRUE@am__append_108 = $(sh_BUILD_OUTPUTS)
 283 @SIM_ENABLE_ARCH_sh_TRUE@am__append_109 = sh/gencode
 284 @SIM_ENABLE_ARCH_sh_TRUE@am__append_110 = $(sh_BUILD_OUTPUTS)
 285 @SIM_ENABLE_ARCH_v850_TRUE@am__append_111 = v850/run
 286 @SIM_ENABLE_ARCH_v850_TRUE@am__append_112 = \
 287 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
 288 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
 289 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
 290 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
 291 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
 292 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
 293 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h
 294
 295 @SIM_ENABLE_ARCH_v850_TRUE@am__append_113 = $(v850_BUILD_OUTPUTS)
 296 @SIM_ENABLE_ARCH_v850_TRUE@am__append_114 = $(v850_BUILD_OUTPUTS)
 297 subdir = .
 298 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
 299 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
 300         $(top_srcdir)/../config/depstand.m4 \
 301         $(top_srcdir)/../config/lead-dot.m4 \
 302         $(top_srcdir)/../config/override.m4 \
 303         $(top_srcdir)/../config/pkg.m4 $(top_srcdir)/../libtool.m4 \
 304         $(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
 305         $(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
 306         $(top_srcdir)/m4/sim_ac_option_alignment.m4 \
 307         $(top_srcdir)/m4/sim_ac_option_assert.m4 \
 308         $(top_srcdir)/m4/sim_ac_option_cgen_maint.m4 \
 309         $(top_srcdir)/m4/sim_ac_option_debug.m4 \
 310         $(top_srcdir)/m4/sim_ac_option_endian.m4 \
 311         $(top_srcdir)/m4/sim_ac_option_environment.m4 \
 312         $(top_srcdir)/m4/sim_ac_option_hardware.m4 \
 313         $(top_srcdir)/m4/sim_ac_option_inline.m4 \
 314         $(top_srcdir)/m4/sim_ac_option_profile.m4 \
 315         $(top_srcdir)/m4/sim_ac_option_reserved_bits.m4 \
 316         $(top_srcdir)/m4/sim_ac_option_scache.m4 \
 317         $(top_srcdir)/m4/sim_ac_option_smp.m4 \
 318         $(top_srcdir)/m4/sim_ac_option_stdio.m4 \
 319         $(top_srcdir)/m4/sim_ac_option_trace.m4 \
 320         $(top_srcdir)/m4/sim_ac_option_warnings.m4 \
 321         $(top_srcdir)/m4/sim_ac_platform.m4 \
 322         $(top_srcdir)/m4/sim_ac_toolchain.m4 \
 323         $(top_srcdir)/frv/acinclude.m4 $(top_srcdir)/mips/acinclude.m4 \
 324         $(top_srcdir)/riscv/acinclude.m4 $(top_srcdir)/rx/acinclude.m4 \
 325         $(top_srcdir)/configure.ac
 326 am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
 327         $(ACLOCAL_M4)
 328 DIST_COMMON = $(srcdir)/Makefile.am $(top_srcdir)/configure \
 329         $(am__configure_deps) $(am__pkginclude_HEADERS_DIST)
 330 am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \
 331  configure.lineno config.status.lineno
 332 mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs
 333 CONFIG_HEADER = config.h
 334 CONFIG_CLEAN_FILES = Make-common.sim aarch64/Makefile.sim \
 335         aarch64/.gdbinit arm/Makefile.sim arm/.gdbinit \
 336         avr/Makefile.sim avr/.gdbinit bfin/Makefile.sim bfin/.gdbinit \
 337         bpf/Makefile.sim bpf/.gdbinit cr16/Makefile.sim cr16/.gdbinit \
 338         cris/Makefile.sim cris/.gdbinit d10v/Makefile.sim \
 339         d10v/.gdbinit frv/Makefile.sim frv/.gdbinit ft32/Makefile.sim \
 340         ft32/.gdbinit h8300/Makefile.sim h8300/.gdbinit \
 341         iq2000/Makefile.sim iq2000/.gdbinit lm32/Makefile.sim \
 342         lm32/.gdbinit m32c/Makefile.sim m32c/.gdbinit \
 343         m32r/Makefile.sim m32r/.gdbinit m68hc11/Makefile.sim \
 344         m68hc11/.gdbinit mcore/Makefile.sim mcore/.gdbinit \
 345         microblaze/Makefile.sim microblaze/.gdbinit mips/Makefile.sim \
 346         mips/.gdbinit mn10300/Makefile.sim mn10300/.gdbinit \
 347         moxie/Makefile.sim moxie/.gdbinit msp430/Makefile.sim \
 348         msp430/.gdbinit or1k/Makefile.sim or1k/.gdbinit ppc/.gdbinit \
 349         pru/Makefile.sim pru/.gdbinit riscv/Makefile.sim \
 350         riscv/.gdbinit rl78/Makefile.sim rl78/.gdbinit rx/Makefile.sim \
 351         rx/.gdbinit sh/Makefile.sim sh/.gdbinit erc32/Makefile.sim \
 352         erc32/.gdbinit v850/Makefile.sim v850/.gdbinit \
 353         example-synacor/Makefile.sim example-synacor/.gdbinit \
 354         arch-subdir.mk .gdbinit
 355 CONFIG_CLEAN_VPATH_FILES =
 356 LIBRARIES = $(noinst_LIBRARIES)
 357 ARFLAGS = cru
 358 AM_V_AR = $(am__v_AR_@AM_V@)
 359 am__v_AR_ = $(am__v_AR_@AM_DEFAULT_V@)
 360 am__v_AR_0 = @echo "  AR      " $@;
 361 am__v_AR_1 =
 362 aarch64_libsim_a_AR = $(AR) $(ARFLAGS)
 363 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_DEPENDENCIES =  \
 364 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst \
 365 @SIM_ENABLE_ARCH_aarch64_TRUE@  %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
 366 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst \
 367 @SIM_ENABLE_ARCH_aarch64_TRUE@  %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
 368 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/cpustate.o \
 369 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/interp.o \
 370 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/memory.o \
 371 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/modules.o \
 372 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/sim-resume.o \
 373 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/simulator.o
 374 am_aarch64_libsim_a_OBJECTS =
 375 aarch64_libsim_a_OBJECTS = $(am_aarch64_libsim_a_OBJECTS)
 376 am__dirstamp = $(am__leading_dot)dirstamp
 377 arm_libsim_a_AR = $(AR) $(ARFLAGS)
 378 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_DEPENDENCIES = arm/wrapper.o \
 379 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst \
 380 @SIM_ENABLE_ARCH_arm_TRUE@      %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
 381 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst \
 382 @SIM_ENABLE_ARCH_arm_TRUE@      %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
 383 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu.o arm/armemu32.o \
 384 @SIM_ENABLE_ARCH_arm_TRUE@      arm/arminit.o arm/armos.o \
 385 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armsupp.o arm/armvirt.o \
 386 @SIM_ENABLE_ARCH_arm_TRUE@      arm/thumbemu.o arm/armcopro.o \
 387 @SIM_ENABLE_ARCH_arm_TRUE@      arm/maverick.o arm/iwmmxt.o \
 388 @SIM_ENABLE_ARCH_arm_TRUE@      arm/modules.o
 389 am_arm_libsim_a_OBJECTS =
 390 arm_libsim_a_OBJECTS = $(am_arm_libsim_a_OBJECTS)
 391 avr_libsim_a_AR = $(AR) $(ARFLAGS)
 392 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_DEPENDENCIES = avr/interp.o \
 393 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst \
 394 @SIM_ENABLE_ARCH_avr_TRUE@      %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
 395 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst \
 396 @SIM_ENABLE_ARCH_avr_TRUE@      %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
 397 @SIM_ENABLE_ARCH_avr_TRUE@      avr/modules.o avr/sim-resume.o
 398 am_avr_libsim_a_OBJECTS =
 399 avr_libsim_a_OBJECTS = $(am_avr_libsim_a_OBJECTS)
 400 bfin_libsim_a_AR = $(AR) $(ARFLAGS)
 401 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_DEPENDENCIES = $(patsubst \
 402 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
 403 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst \
 404 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
 405 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst \
 406 @SIM_ENABLE_ARCH_bfin_TRUE@     %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
 407 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/bfin-sim.o bfin/devices.o \
 408 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/gui.o bfin/interp.o \
 409 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/machs.o bfin/modules.o \
 410 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/sim-resume.o
 411 am_bfin_libsim_a_OBJECTS =
 412 bfin_libsim_a_OBJECTS = $(am_bfin_libsim_a_OBJECTS)
 413 bpf_libsim_a_AR = $(AR) $(ARFLAGS)
 414 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_DEPENDENCIES = $(patsubst \
 415 @SIM_ENABLE_ARCH_bpf_TRUE@      %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
 416 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst \
 417 @SIM_ENABLE_ARCH_bpf_TRUE@      %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
 418 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/modules.o bpf/cgen-run.o \
 419 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-scache.o bpf/cgen-trace.o \
 420 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-utils.o bpf/arch.o \
 421 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cpu.o bpf/decode-le.o \
 422 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-be.o bpf/sem-le.o \
 423 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-be.o bpf/mloop-le.o \
 424 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.o bpf/bpf.o \
 425 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf-helpers.o bpf/sim-if.o \
 426 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/traps.o
 427 am_bpf_libsim_a_OBJECTS =
 428 bpf_libsim_a_OBJECTS = $(am_bpf_libsim_a_OBJECTS)
 429 common_libcommon_a_AR = $(AR) $(ARFLAGS)
 430 common_libcommon_a_LIBADD =
 431 am_common_libcommon_a_OBJECTS = common/callback.$(OBJEXT) \
 432         common/portability.$(OBJEXT) common/sim-load.$(OBJEXT) \
 433         common/syscall.$(OBJEXT) common/target-newlib-errno.$(OBJEXT) \
 434         common/target-newlib-open.$(OBJEXT) \
 435         common/target-newlib-signal.$(OBJEXT) \
 436         common/target-newlib-syscall.$(OBJEXT) \
 437         common/version.$(OBJEXT)
 438 common_libcommon_a_OBJECTS = $(am_common_libcommon_a_OBJECTS)
 439 cr16_libsim_a_AR = $(AR) $(ARFLAGS)
 440 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_DEPENDENCIES =  \
 441 @SIM_ENABLE_ARCH_cr16_TRUE@     $(common_libcommon_a_OBJECTS) \
 442 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst \
 443 @SIM_ENABLE_ARCH_cr16_TRUE@     %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
 444 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst \
 445 @SIM_ENABLE_ARCH_cr16_TRUE@     %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
 446 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/interp.o cr16/modules.o \
 447 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/sim-resume.o cr16/simops.o \
 448 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.o
 449 am_cr16_libsim_a_OBJECTS =
 450 cr16_libsim_a_OBJECTS = $(am_cr16_libsim_a_OBJECTS)
 451 cris_libsim_a_AR = $(AR) $(ARFLAGS)
 452 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_DEPENDENCIES =  \
 453 @SIM_ENABLE_ARCH_cris_TRUE@     $(common_libcommon_a_OBJECTS) \
 454 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst \
 455 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
 456 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst \
 457 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
 458 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst \
 459 @SIM_ENABLE_ARCH_cris_TRUE@     %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
 460 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modules.o cris/cgen-run.o \
 461 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-scache.o \
 462 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-trace.o cris/cgen-utils.o \
 463 @SIM_ENABLE_ARCH_cris_TRUE@     cris/arch.o cris/crisv10f.o \
 464 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv10.o cris/decodev10.o \
 465 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv10.o cris/mloopv10f.o \
 466 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv32f.o cris/cpuv32.o \
 467 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev32.o cris/modelv32.o \
 468 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.o cris/sim-if.o \
 469 @SIM_ENABLE_ARCH_cris_TRUE@     cris/traps.o
 470 am_cris_libsim_a_OBJECTS =
 471 cris_libsim_a_OBJECTS = $(am_cris_libsim_a_OBJECTS)
 472 d10v_libsim_a_AR = $(AR) $(ARFLAGS)
 473 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_DEPENDENCIES =  \
 474 @SIM_ENABLE_ARCH_d10v_TRUE@     $(common_libcommon_a_OBJECTS) \
 475 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/interp.o $(patsubst \
 476 @SIM_ENABLE_ARCH_d10v_TRUE@     %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
 477 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst \
 478 @SIM_ENABLE_ARCH_d10v_TRUE@     %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
 479 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/endian.o d10v/modules.o \
 480 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/sim-resume.o d10v/simops.o \
 481 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.o
 482 am_d10v_libsim_a_OBJECTS =
 483 d10v_libsim_a_OBJECTS = $(am_d10v_libsim_a_OBJECTS)
 484 erc32_libsim_a_AR = $(AR) $(ARFLAGS)
 485 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_DEPENDENCIES =  \
 486 @SIM_ENABLE_ARCH_erc32_TRUE@    $(common_libcommon_a_OBJECTS) \
 487 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/erc32.o erc32/exec.o \
 488 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/float.o erc32/func.o \
 489 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/help.o erc32/interf.o \
 490 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/modules.o
 491 am_erc32_libsim_a_OBJECTS =
 492 erc32_libsim_a_OBJECTS = $(am_erc32_libsim_a_OBJECTS)
 493 example_synacor_libsim_a_AR = $(AR) $(ARFLAGS)
 494 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_DEPENDENCIES =  \
 495 @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_OBJECTS) \
 496 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
 497 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
 498 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
 499 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
 500 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
 501 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.o \
 502 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
 503 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
 504 am_example_synacor_libsim_a_OBJECTS =
 505 example_synacor_libsim_a_OBJECTS =  \
 506         $(am_example_synacor_libsim_a_OBJECTS)
 507 frv_libsim_a_AR = $(AR) $(ARFLAGS)
 508 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_DEPENDENCIES =  \
 509 @SIM_ENABLE_ARCH_frv_TRUE@      $(common_libcommon_a_OBJECTS) \
 510 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst \
 511 @SIM_ENABLE_ARCH_frv_TRUE@      %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
 512 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst \
 513 @SIM_ENABLE_ARCH_frv_TRUE@      %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
 514 @SIM_ENABLE_ARCH_frv_TRUE@      frv/modules.o frv/cgen-accfp.o \
 515 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-fpu.o frv/cgen-run.o \
 516 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-scache.o frv/cgen-trace.o \
 517 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-utils.o frv/arch.o \
 518 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-par.o frv/cpu.o \
 519 @SIM_ENABLE_ARCH_frv_TRUE@      frv/decode.o frv/frv.o frv/mloop.o \
 520 @SIM_ENABLE_ARCH_frv_TRUE@      frv/model.o frv/sem.o frv/cache.o \
 521 @SIM_ENABLE_ARCH_frv_TRUE@      frv/interrupts.o frv/memory.o \
 522 @SIM_ENABLE_ARCH_frv_TRUE@      frv/options.o frv/pipeline.o \
 523 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile.o frv/profile-fr400.o \
 524 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr450.o \
 525 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr500.o \
 526 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr550.o frv/registers.o \
 527 @SIM_ENABLE_ARCH_frv_TRUE@      frv/reset.o frv/sim-if.o frv/traps.o
 528 am_frv_libsim_a_OBJECTS =
 529 frv_libsim_a_OBJECTS = $(am_frv_libsim_a_OBJECTS)
 530 ft32_libsim_a_AR = $(AR) $(ARFLAGS)
 531 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_DEPENDENCIES =  \
 532 @SIM_ENABLE_ARCH_ft32_TRUE@     $(common_libcommon_a_OBJECTS) \
 533 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst \
 534 @SIM_ENABLE_ARCH_ft32_TRUE@     %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
 535 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst \
 536 @SIM_ENABLE_ARCH_ft32_TRUE@     %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
 537 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/interp.o ft32/modules.o \
 538 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/sim-resume.o
 539 am_ft32_libsim_a_OBJECTS =
 540 ft32_libsim_a_OBJECTS = $(am_ft32_libsim_a_OBJECTS)
 541 h8300_libsim_a_AR = $(AR) $(ARFLAGS)
 542 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_DEPENDENCIES =  \
 543 @SIM_ENABLE_ARCH_h8300_TRUE@    $(common_libcommon_a_OBJECTS) \
 544 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/compile.o $(patsubst \
 545 @SIM_ENABLE_ARCH_h8300_TRUE@    %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
 546 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst \
 547 @SIM_ENABLE_ARCH_h8300_TRUE@    %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
 548 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/modules.o h8300/sim-resume.o
 549 am_h8300_libsim_a_OBJECTS =
 550 h8300_libsim_a_OBJECTS = $(am_h8300_libsim_a_OBJECTS)
 551 igen_libigen_a_AR = $(AR) $(ARFLAGS)
 552 igen_libigen_a_LIBADD =
 553 @SIM_ENABLE_IGEN_TRUE@am_igen_libigen_a_OBJECTS =  \
 554 @SIM_ENABLE_IGEN_TRUE@  igen/table.$(OBJEXT) igen/lf.$(OBJEXT) \
 555 @SIM_ENABLE_IGEN_TRUE@  igen/misc.$(OBJEXT) \
 556 @SIM_ENABLE_IGEN_TRUE@  igen/filter_host.$(OBJEXT) \
 557 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode.$(OBJEXT) \
 558 @SIM_ENABLE_IGEN_TRUE@  igen/ld-cache.$(OBJEXT) \
 559 @SIM_ENABLE_IGEN_TRUE@  igen/filter.$(OBJEXT) \
 560 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn.$(OBJEXT) \
 561 @SIM_ENABLE_IGEN_TRUE@  igen/gen-model.$(OBJEXT) \
 562 @SIM_ENABLE_IGEN_TRUE@  igen/gen-itable.$(OBJEXT) \
 563 @SIM_ENABLE_IGEN_TRUE@  igen/gen-icache.$(OBJEXT) \
 564 @SIM_ENABLE_IGEN_TRUE@  igen/gen-semantics.$(OBJEXT) \
 565 @SIM_ENABLE_IGEN_TRUE@  igen/gen-idecode.$(OBJEXT) \
 566 @SIM_ENABLE_IGEN_TRUE@  igen/gen-support.$(OBJEXT) \
 567 @SIM_ENABLE_IGEN_TRUE@  igen/gen-engine.$(OBJEXT) \
 568 @SIM_ENABLE_IGEN_TRUE@  igen/gen.$(OBJEXT)
 569 igen_libigen_a_OBJECTS = $(am_igen_libigen_a_OBJECTS)
 570 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) \
 571 @SIM_ENABLE_IGEN_TRUE@  igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \
 572 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode$(EXEEXT) \
 573 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn$(EXEEXT) \
 574 @SIM_ENABLE_IGEN_TRUE@  igen/table$(EXEEXT)
 575 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_2 = $(am__EXEEXT_1)
 576 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_3 = cr16/gencode$(EXEEXT)
 577 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_4 = d10v/gencode$(EXEEXT)
 578 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_5 = m32c/opc2c$(EXEEXT)
 579 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_6 = m68hc11/gencode$(EXEEXT)
 580 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_7 = sh/gencode$(EXEEXT)
 581 am__EXEEXT_8 = testsuite/common/bits32m0$(EXEEXT) \
 582         testsuite/common/bits32m31$(EXEEXT) \
 583         testsuite/common/bits64m0$(EXEEXT) \
 584         testsuite/common/bits64m63$(EXEEXT) \
 585         testsuite/common/alu-tst$(EXEEXT)
 586 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_9 = cris/rvdummy$(EXEEXT)
 587 @SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_10 = aarch64/run$(EXEEXT)
 588 @SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_11 = arm/run$(EXEEXT)
 589 @SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_12 = avr/run$(EXEEXT)
 590 @SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_13 = bfin/run$(EXEEXT)
 591 @SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_14 = bpf/run$(EXEEXT)
 592 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_15 = cr16/run$(EXEEXT)
 593 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_16 = cris/run$(EXEEXT)
 594 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_17 = d10v/run$(EXEEXT)
 595 @SIM_ENABLE_ARCH_erc32_TRUE@am__EXEEXT_18 = erc32/run$(EXEEXT) \
 596 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis$(EXEEXT)
 597 @SIM_ENABLE_ARCH_examples_TRUE@am__EXEEXT_19 =  \
 598 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/run$(EXEEXT)
 599 @SIM_ENABLE_ARCH_frv_TRUE@am__EXEEXT_20 = frv/run$(EXEEXT)
 600 @SIM_ENABLE_ARCH_ft32_TRUE@am__EXEEXT_21 = ft32/run$(EXEEXT)
 601 @SIM_ENABLE_ARCH_h8300_TRUE@am__EXEEXT_22 = h8300/run$(EXEEXT)
 602 @SIM_ENABLE_ARCH_iq2000_TRUE@am__EXEEXT_23 = iq2000/run$(EXEEXT)
 603 @SIM_ENABLE_ARCH_lm32_TRUE@am__EXEEXT_24 = lm32/run$(EXEEXT)
 604 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_25 = m32c/run$(EXEEXT)
 605 @SIM_ENABLE_ARCH_m32r_TRUE@am__EXEEXT_26 = m32r/run$(EXEEXT)
 606 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_27 = m68hc11/run$(EXEEXT)
 607 @SIM_ENABLE_ARCH_mcore_TRUE@am__EXEEXT_28 = mcore/run$(EXEEXT)
 608 @SIM_ENABLE_ARCH_microblaze_TRUE@am__EXEEXT_29 =  \
 609 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/run$(EXEEXT)
 610 @SIM_ENABLE_ARCH_mips_TRUE@am__EXEEXT_30 = mips/run$(EXEEXT)
 611 @SIM_ENABLE_ARCH_mn10300_TRUE@am__EXEEXT_31 = mn10300/run$(EXEEXT)
 612 @SIM_ENABLE_ARCH_moxie_TRUE@am__EXEEXT_32 = moxie/run$(EXEEXT)
 613 @SIM_ENABLE_ARCH_msp430_TRUE@am__EXEEXT_33 = msp430/run$(EXEEXT)
 614 @SIM_ENABLE_ARCH_or1k_TRUE@am__EXEEXT_34 = or1k/run$(EXEEXT)
 615 @SIM_ENABLE_ARCH_ppc_TRUE@am__EXEEXT_35 = ppc/run$(EXEEXT) \
 616 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/psim$(EXEEXT)
 617 @SIM_ENABLE_ARCH_pru_TRUE@am__EXEEXT_36 = pru/run$(EXEEXT)
 618 @SIM_ENABLE_ARCH_riscv_TRUE@am__EXEEXT_37 = riscv/run$(EXEEXT)
 619 @SIM_ENABLE_ARCH_rl78_TRUE@am__EXEEXT_38 = rl78/run$(EXEEXT)
 620 @SIM_ENABLE_ARCH_rx_TRUE@am__EXEEXT_39 = rx/run$(EXEEXT)
 621 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_40 = sh/run$(EXEEXT)
 622 @SIM_ENABLE_ARCH_v850_TRUE@am__EXEEXT_41 = v850/run$(EXEEXT)
 623 PROGRAMS = $(noinst_PROGRAMS)
 624 am_aarch64_run_OBJECTS =
 625 aarch64_run_OBJECTS = $(am_aarch64_run_OBJECTS)
 626 am__DEPENDENCIES_1 = $(BFD_LIB) $(OPCODES_LIB) $(LIBIBERTY_LIB)
 627 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_DEPENDENCIES =  \
 628 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/nrun.o aarch64/libsim.a \
 629 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(am__DEPENDENCIES_1)
 630 AM_V_lt = $(am__v_lt_@AM_V@)
 631 am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@)
 632 am__v_lt_0 = --silent
 633 am__v_lt_1 =
 634 am_arm_run_OBJECTS =
 635 arm_run_OBJECTS = $(am_arm_run_OBJECTS)
 636 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_DEPENDENCIES = arm/nrun.o \
 637 @SIM_ENABLE_ARCH_arm_TRUE@      arm/libsim.a $(am__DEPENDENCIES_1)
 638 am_avr_run_OBJECTS =
 639 avr_run_OBJECTS = $(am_avr_run_OBJECTS)
 640 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_DEPENDENCIES = avr/nrun.o \
 641 @SIM_ENABLE_ARCH_avr_TRUE@      avr/libsim.a $(am__DEPENDENCIES_1)
 642 am_bfin_run_OBJECTS =
 643 bfin_run_OBJECTS = $(am_bfin_run_OBJECTS)
 644 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_DEPENDENCIES = bfin/nrun.o \
 645 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/libsim.a $(am__DEPENDENCIES_1)
 646 am_bpf_run_OBJECTS =
 647 bpf_run_OBJECTS = $(am_bpf_run_OBJECTS)
 648 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_DEPENDENCIES = bpf/nrun.o \
 649 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/libsim.a $(am__DEPENDENCIES_1)
 650 @SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_gencode_OBJECTS =  \
 651 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/gencode.$(OBJEXT)
 652 cr16_gencode_OBJECTS = $(am_cr16_gencode_OBJECTS)
 653 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_DEPENDENCIES =  \
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 985 # and print each of them once, without duplicates.  Input order is
 986 # *not* preserved.
 987 am__uniquify_input = $(AWK) '\
 988   BEGIN { nonempty = 0; } \
 989   { items[$$0] = 1; nonempty = 1; } \
 990   END { if (nonempty) { for (i in items) print i; }; } \
 991 '
 992 # Make sure the list of sources is unique.  This is necessary because,
 993 # e.g., the same source file might be shared among _SOURCES variables
 994 # for different programs/libraries.
 995 am__define_uniq_tagged_files = \
 996   list='$(am__tagged_files)'; \
 997   unique=`for i in $$list; do \
 998     if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
 999   done | $(am__uniquify_input)`
1000 ETAGS = etags
1001 CTAGS = ctags
1002 CSCOPE = cscope
1003 DEJATOOL = $(PACKAGE)
1004 RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
1005 EXPECT = expect
1006 RUNTEST = runtest
1007 am__tty_colors_dummy = \
1008   mgn= red= grn= lgn= blu= brg= std=; \
1009   am__color_tests=no
1010 am__tty_colors = { \
1011   $(am__tty_colors_dummy); \
1012   if test "X$(AM_COLOR_TESTS)" = Xno; then \
1013     am__color_tests=no; \
1014   elif test "X$(AM_COLOR_TESTS)" = Xalways; then \
1015     am__color_tests=yes; \
1016   elif test "X$$TERM" != Xdumb && { test -t 1; } 2>/dev/null; then \
1017     am__color_tests=yes; \
1018   fi; \
1019   if test $$am__color_tests = yes; then \
1020     red='\e[0;31m'; \
1021     grn='\e[0;32m'; \
1022     lgn='\e[1;32m'; \
1023     blu='\e[1;34m'; \
1024     mgn='\e[0;35m'; \
1025     brg='\e[1m'; \
1026     std='\e[m'; \
1027   fi; \
1028 }
1029 am__recheck_rx = ^[     ]*:recheck:[    ]*
1030 am__global_test_result_rx = ^[  ]*:global-test-result:[         ]*
1031 am__copy_in_global_log_rx = ^[  ]*:copy-in-global-log:[         ]*
1032 # A command that, given a newline-separated list of test names on the
1033 # standard input, print the name of the tests that are to be re-run
1034 # upon "make recheck".
1035 am__list_recheck_tests = $(AWK) '{ \
1036   recheck = 1; \
1037   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1038     { \
1039       if (rc < 0) \
1040         { \
1041           if ((getline line2 < ($$0 ".log")) < 0) \
1042             recheck = 0; \
1043           break; \
1044         } \
1045       else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
1046         { \
1047           recheck = 0; \
1048           break; \
1049         } \
1050       else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \
1051         { \
1052           break; \
1053         } \
1054     }; \
1055   if (recheck) \
1056     print $$0; \
1057   close ($$0 ".trs"); \
1058   close ($$0 ".log"); \
1059 }'
1060 # A command that, given a newline-separated list of test names on the
1061 # standard input, create the global log from their .trs and .log files.
1062 am__create_global_log = $(AWK) ' \
1063 function fatal(msg) \
1064 { \
1065   print "fatal: making $@: " msg | "cat >&2"; \
1066   exit 1; \
1067 } \
1068 function rst_section(header) \
1069 { \
1070   print header; \
1071   len = length(header); \
1072   for (i = 1; i <= len; i = i + 1) \
1073     printf "="; \
1074   printf "\n\n"; \
1075 } \
1076 { \
1077   copy_in_global_log = 1; \
1078   global_test_result = "RUN"; \
1079   while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1080     { \
1081       if (rc < 0) \
1082          fatal("failed to read from " $$0 ".trs"); \
1083       if (line ~ /$(am__global_test_result_rx)/) \
1084         { \
1085           sub("$(am__global_test_result_rx)", "", line); \
1086           sub("[        ]*$$", "", line); \
1087           global_test_result = line; \
1088         } \
1089       else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
1090         copy_in_global_log = 0; \
1091     }; \
1092   if (copy_in_global_log) \
1093     { \
1094       rst_section(global_test_result ": " $$0); \
1095       while ((rc = (getline line < ($$0 ".log"))) != 0) \
1096       { \
1097         if (rc < 0) \
1098           fatal("failed to read from " $$0 ".log"); \
1099         print line; \
1100       }; \
1101       printf "\n"; \
1102     }; \
1103   close ($$0 ".trs"); \
1104   close ($$0 ".log"); \
1105 }'
1106 # Restructured Text title.
1107 am__rst_title = { sed 's/.*/   &   /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; }
1108 # Solaris 10 'make', and several other traditional 'make' implementations,
1109 # pass "-e" to $(SHELL), and POSIX 2008 even requires this.  Work around it
1110 # by disabling -e (using the XSI extension "set +e") if it's set.
1111 am__sh_e_setup = case $$- in *e*) set +e;; esac
1112 # Default flags passed to test drivers.
1113 am__common_driver_flags = \
1114   --color-tests "$$am__color_tests" \
1115   --enable-hard-errors "$$am__enable_hard_errors" \
1116   --expect-failure "$$am__expect_failure"
1117 # To be inserted before the command running the test.  Creates the
1118 # directory for the log if needed.  Stores in $dir the directory
1119 # containing $f, in $tst the test, in $log the log.  Executes the
1120 # developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
1121 # passes TESTS_ENVIRONMENT.  Set up options for the wrapper that
1122 # will run the test scripts (or their associated LOG_COMPILER, if
1123 # thy have one).
1124 am__check_pre = \
1125 $(am__sh_e_setup);                                      \
1126 $(am__vpath_adj_setup) $(am__vpath_adj)                 \
1127 $(am__tty_colors);                                      \
1128 srcdir=$(srcdir); export srcdir;                        \
1129 case "$@" in                                            \
1130   */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;;    \
1131     *) am__odir=.;;                                     \
1132 esac;                                                   \
1133 test "x$$am__odir" = x"." || test -d "$$am__odir"       \
1134   || $(MKDIR_P) "$$am__odir" || exit $$?;               \
1135 if test -f "./$$f"; then dir=./;                        \
1136 elif test -f "$$f"; then dir=;                          \
1137 else dir="$(srcdir)/"; fi;                              \
1138 tst=$$dir$$f; log='$@';                                 \
1139 if test -n '$(DISABLE_HARD_ERRORS)'; then               \
1140   am__enable_hard_errors=no;                            \
1141 else                                                    \
1142   am__enable_hard_errors=yes;                           \
1143 fi;                                                     \
1144 case " $(XFAIL_TESTS) " in                              \
1145   *[\ \ ]$$f[\ \        ]* | *[\ \      ]$$dir$$f[\ \   ]*) \
1146     am__expect_failure=yes;;                            \
1147   *)                                                    \
1148     am__expect_failure=no;;                             \
1149 esac;                                                   \
1150 $(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
1151 # A shell command to get the names of the tests scripts with any registered
1152 # extension removed (i.e., equivalently, the names of the test logs, with
1153 # the '.log' extension removed).  The result is saved in the shell variable
1154 # '$bases'.  This honors runtime overriding of TESTS and TEST_LOGS.  Sadly,
1155 # we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
1156 # since that might cause problem with VPATH rewrites for suffix-less tests.
1157 # See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
1158 am__set_TESTS_bases = \
1159   bases='$(TEST_LOGS)'; \
1160   bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
1161   bases=`echo $$bases`
1162 RECHECK_LOGS = $(TEST_LOGS)
1163 TEST_SUITE_LOG = test-suite.log
1164 TEST_EXTENSIONS = @EXEEXT@ .test
1165 LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1166 LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS)
1167 am__set_b = \
1168   case '$@' in \
1169     */*) \
1170       case '$*' in \
1171         */*) b='$*';; \
1172           *) b=`echo '$@' | sed 's/\.log$$//'`; \
1173        esac;; \
1174     *) \
1175       b='$*';; \
1176   esac
1177 am__test_logs1 = $(TESTS:=.log)
1178 am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
1179 TEST_LOGS = $(am__test_logs2:.test.log=.log)
1180 TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1181 TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
1182         $(TEST_LOG_FLAGS)
1183 DIST_SUBDIRS = $(SUBDIRS)
1184 ACLOCAL = @ACLOCAL@
1185 AMTAR = @AMTAR@
1186 AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
1187 AR = @AR@
1188 AR_FOR_BUILD = @AR_FOR_BUILD@
1189 AS_FOR_TARGET = @AS_FOR_TARGET@
1190 AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
1191 AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
1192 AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
1193 AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
1194 AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
1195 AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
1196 AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
1197 AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
1198 AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
1199 AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1200 AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
1201 AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
1202 AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
1203 AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
1204 AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
1205 AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
1206 AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
1207 AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
1208 AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
1209 AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
1210 AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
1211 AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
1212 AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
1213 AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
1214 AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
1215 AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
1216 AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
1217 AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
1218 AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
1219 AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
1220 AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
1221 AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
1222 AUTOCONF = @AUTOCONF@
1223 AUTOHEADER = @AUTOHEADER@
1224 AUTOMAKE = @AUTOMAKE@
1225 AWK = @AWK@
1226 CC = @CC@
1227 CCDEPMODE = @CCDEPMODE@
1228 CC_FOR_BUILD = @CC_FOR_BUILD@
1229 CC_FOR_TARGET = @CC_FOR_TARGET@
1230 CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
1231 CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
1232 CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
1233 CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
1234 CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
1235 CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
1236 CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
1237 CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
1238 CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
1239 CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1240 CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
1241 CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
1242 CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
1243 CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
1244 CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
1245 CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
1246 CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
1247 CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
1248 CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
1249 CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
1250 CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
1251 CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
1252 CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
1253 CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
1254 CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
1255 CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
1256 CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
1257 CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
1258 CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
1259 CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
1260 CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
1261 CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
1262 CFLAGS = @CFLAGS@
1263 CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
1264 CGEN_MAINT = @CGEN_MAINT@
1265 CPP = @CPP@
1266 CPPFLAGS = @CPPFLAGS@
1267 CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
1268 CYGPATH_W = @CYGPATH_W@
1269 C_DIALECT = @C_DIALECT@
1270 DEFS = @DEFS@
1271 DEPDIR = @DEPDIR@
1272 DSYMUTIL = @DSYMUTIL@
1273 DTC = @DTC@
1274 DUMPBIN = @DUMPBIN@
1275 ECHO_C = @ECHO_C@
1276 ECHO_N = @ECHO_N@
1277 ECHO_T = @ECHO_T@
1278 EGREP = @EGREP@
1279 EXEEXT = @EXEEXT@
1280 FGREP = @FGREP@
1281 GREP = @GREP@
1282 IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@
1283 INSTALL = @INSTALL@
1284 INSTALL_DATA = @INSTALL_DATA@
1285 INSTALL_PROGRAM = @INSTALL_PROGRAM@
1286 INSTALL_SCRIPT = @INSTALL_SCRIPT@
1287 INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
1288 LD = @LD@
1289 LDFLAGS = @LDFLAGS@
1290 LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
1291 LD_FOR_TARGET = @LD_FOR_TARGET@
1292 LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
1293 LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
1294 LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
1295 LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
1296 LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
1297 LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
1298 LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
1299 LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
1300 LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
1301 LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1302 LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
1303 LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
1304 LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
1305 LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
1306 LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
1307 LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
1308 LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
1309 LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
1310 LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
1311 LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
1312 LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
1313 LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
1314 LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
1315 LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
1316 LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
1317 LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
1318 LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
1319 LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
1320 LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
1321 LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
1322 LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
1323 LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
1324 LIBOBJS = @LIBOBJS@
1325 LIBS = @LIBS@
1326 LIBTOOL = @LIBTOOL@
1327 LIPO = @LIPO@
1328 LN_S = @LN_S@
1329 LTLIBOBJS = @LTLIBOBJS@
1330 MAINT = @MAINT@
1331 MAKEINFO = @MAKEINFO@
1332 MKDIR_P = @MKDIR_P@
1333 NM = @NM@
1334 NMEDIT = @NMEDIT@
1335 OBJDUMP = @OBJDUMP@
1336 OBJEXT = @OBJEXT@
1337 OTOOL = @OTOOL@
1338 OTOOL64 = @OTOOL64@
1339 PACKAGE = @PACKAGE@
1340 PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
1341 PACKAGE_NAME = @PACKAGE_NAME@
1342 PACKAGE_STRING = @PACKAGE_STRING@
1343 PACKAGE_TARNAME = @PACKAGE_TARNAME@
1344 PACKAGE_URL = @PACKAGE_URL@
1345 PACKAGE_VERSION = @PACKAGE_VERSION@
1346 PATH_SEPARATOR = @PATH_SEPARATOR@
1347 PKGVERSION = @PKGVERSION@
1348 PKG_CONFIG = @PKG_CONFIG@
1349 PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
1350 PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
1351 RANLIB = @RANLIB@
1352 RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
1353 READLINE_CFLAGS = @READLINE_CFLAGS@
1354 READLINE_LIB = @READLINE_LIB@
1355 REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
1356 REPORT_BUGS_TO = @REPORT_BUGS_TO@
1357 SDL_CFLAGS = @SDL_CFLAGS@
1358 SDL_LIBS = @SDL_LIBS@
1359 SED = @SED@
1360 SET_MAKE = @SET_MAKE@
1361 SHELL = @SHELL@
1362 SIM_COMMON_BUILD_FALSE = @SIM_COMMON_BUILD_FALSE@
1363 SIM_COMMON_BUILD_TRUE = @SIM_COMMON_BUILD_TRUE@
1364 SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
1365 SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
1366 SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
1367 SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
1368 SIM_INLINE = @SIM_INLINE@
1369 SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
1370 SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
1371 SIM_MIPS_GEN = @SIM_MIPS_GEN@
1372 SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
1373 SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
1374 SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
1375 SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
1376 SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
1377 SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
1378 SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
1379 SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
1380 SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
1381 SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
1382 SIM_SUBDIRS = @SIM_SUBDIRS@
1383 SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
1384 STRIP = @STRIP@
1385 TERMCAP_LIB = @TERMCAP_LIB@
1386 VERSION = @VERSION@
1387 WARN_CFLAGS = @WARN_CFLAGS@
1388 WERROR_CFLAGS = @WERROR_CFLAGS@
1389 abs_builddir = @abs_builddir@
1390 abs_srcdir = @abs_srcdir@
1391 abs_top_builddir = @abs_top_builddir@
1392 abs_top_srcdir = @abs_top_srcdir@
1393 ac_ct_CC = @ac_ct_CC@
1394 ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
1395 am__include = @am__include@
1396 am__leading_dot = @am__leading_dot@
1397 am__quote = @am__quote@
1398 am__tar = @am__tar@
1399 am__untar = @am__untar@
1400 bindir = @bindir@
1401 build = @build@
1402 build_alias = @build_alias@
1403 build_cpu = @build_cpu@
1404 build_os = @build_os@
1405 build_vendor = @build_vendor@
1406 builddir = @builddir@
1407 cgen = @cgen@
1408 cgendir = @cgendir@
1409 datadir = @datadir@
1410 datarootdir = @datarootdir@
1411 docdir = @docdir@
1412 dvidir = @dvidir@
1413 exec_prefix = @exec_prefix@
1414 host = @host@
1415 host_alias = @host_alias@
1416 host_cpu = @host_cpu@
1417 host_os = @host_os@
1418 host_vendor = @host_vendor@
1419 htmldir = @htmldir@
1420 includedir = @includedir@
1421 infodir = @infodir@
1422 install_sh = @install_sh@
1423 libdir = @libdir@
1424 libexecdir = @libexecdir@
1425 localedir = @localedir@
1426 localstatedir = @localstatedir@
1427 mandir = @mandir@
1428 mkdir_p = @mkdir_p@
1429 oldincludedir = @oldincludedir@
1430 pdfdir = @pdfdir@
1431 prefix = @prefix@
1432 program_transform_name = @program_transform_name@
1433 psdir = @psdir@
1434 sbindir = @sbindir@
1435 sharedstatedir = @sharedstatedir@
1436 sim_bitsize = @sim_bitsize@
1437 sim_float = @sim_float@
1438 srcdir = @srcdir@
1439 subdirs = @subdirs@
1440 sysconfdir = @sysconfdir@
1441 target = @target@
1442 target_alias = @target_alias@
1443 target_cpu = @target_cpu@
1444 target_os = @target_os@
1445 target_vendor = @target_vendor@
1446 top_build_prefix = @top_build_prefix@
1447 top_builddir = @top_builddir@
1448 top_srcdir = @top_srcdir@
1449 AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
1450 ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
1451 GNULIB_PARENT_DIR = ..
1452 srccom = $(srcdir)/common
1453 srcroot = $(srcdir)/..
1454 SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
1455 AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \
1456         $(am__append_3) $(am__append_16) $(am__append_30) \
1457         $(am__append_61) $(am__append_70) $(am__append_75) \
1458         $(am__append_82) $(am__append_91)
1459 pkginclude_HEADERS = $(am__append_1)
1460 noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \
1461         $(am__append_10) $(am__append_12) $(am__append_14) \
1462         $(am__append_17) $(am__append_22) $(am__append_28) \
1463         $(am__append_35) $(am__append_41) $(am__append_45) \
1464         $(am__append_47) $(am__append_52) $(am__append_54)
1465 BUILT_SOURCES = $(am__append_19) $(am__append_24) $(am__append_32) \
1466         $(am__append_37) $(am__append_49) $(am__append_57) \
1467         $(am__append_62) $(am__append_71) $(am__append_83) \
1468         $(am__append_92) $(am__append_98) $(am__append_107) \
1469         $(am__append_112)
1470 CLEANFILES = common/version.c common/version.c-stamp \
1471         testsuite/common/bits-gen testsuite/common/bits32m0.c \
1472         testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1473         testsuite/common/bits64m63.c
1474 DISTCLEANFILES = $(am__append_89)
1475 MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \
1476         %,%/stamp-hw,$(SIM_ENABLED_ARCHES)) \
1477         $(common_GEN_MODULES_C_TARGETS) $(patsubst \
1478         %,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_7) \
1479         site-sim-config.exp testrun.log testrun.sum $(am__append_21) \
1480         $(am__append_27) $(am__append_34) $(am__append_40) \
1481         $(am__append_51) $(am__append_59) $(am__append_64) \
1482         $(am__append_68) $(am__append_73) $(am__append_78) \
1483         $(am__append_88) $(am__append_94) $(am__append_100) \
1484         $(am__append_110) $(am__append_114)
1485 AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
1486 AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
1487         $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
1488         -DSIM_COMMON_BUILD
1489 AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
1490         $(SIM_INLINE) -I$(srcdir)/common
1491 COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
1492 LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
1493 SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
1494         $(common_HW_CONFIG_H_TARGETS) $(common_GEN_MODULES_C_TARGETS) \
1495         $(am__append_4) $(am__append_20) $(am__append_25) \
1496         $(am__append_33) $(am__append_38) $(am__append_50) \
1497         $(am__append_58) $(am__append_63) $(am__append_66) \
1498         $(am__append_72) $(am__append_76) $(am__append_87) \
1499         $(am__append_93) $(am__append_99) $(am__append_108) \
1500         $(am__append_113)
1501 SIM_INSTALL_DATA_LOCAL_DEPS =
1502 SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_43)
1503 SIM_UNINSTALL_LOCAL_DEPS = $(am__append_44)
1504 common_libcommon_a_SOURCES = \
1505         common/callback.c \
1506         common/portability.c \
1507         common/sim-load.c \
1508         common/syscall.c \
1509         common/target-newlib-errno.c \
1510         common/target-newlib-open.c \
1511         common/target-newlib-signal.c \
1512         common/target-newlib-syscall.c \
1513         common/version.c
1514
1515 SIM_COMMON_HW_OBJS = \
1516         hw-alloc.o \
1517         hw-base.o \
1518         hw-device.o \
1519         hw-events.o \
1520         hw-handles.o \
1521         hw-instances.o \
1522         hw-ports.o \
1523         hw-properties.o \
1524         hw-tree.o \
1525         sim-hw.o
1526
1527 SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
1528         sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1529         sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1530         sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1531         sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1532         sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1533         sim-watch.o $(am__append_2)
1534 SIM_HW_DEVICES = cfi core pal glue
1535 common_HW_CONFIG_H_TARGETS = $(patsubst %,%/hw-config.h,$(SIM_ENABLED_ARCHES))
1536 am_arch_d = $(subst -,_,$(@D))
1537 GEN_MODULES_C_SRCS = \
1538         $(wildcard \
1539                 $(patsubst %.o,$(abs_srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \
1540                 $(filter-out %.o,$(patsubst $(@D)/%.o,$(abs_srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD))))
1541
1542 common_GEN_MODULES_C_TARGETS = $(patsubst %,%/modules.c,$(filter-out ppc,$(SIM_ENABLED_ARCHES)))
1543 LIBIBERTY_LIB = ../libiberty/libiberty.a
1544 BFD_LIB = ../bfd/libbfd.la
1545 OPCODES_LIB = ../opcodes/libopcodes.la
1546 SIM_COMMON_LIBS = \
1547         $(BFD_LIB) \
1548         $(OPCODES_LIB) \
1549         $(LIBIBERTY_LIB) \
1550         $(LIBGNU) \
1551         $(LIBGNU_EXTRA_LIBS)
1552
1553 GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
1554 CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
1555 CGENFLAGS = -v
1556 CGEN_CPU_DIR = $(cgendir)/cpu
1557 CPU_DIR = $(srcroot)/cpu
1558 CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
1559 CGEN_READ_SCM = $(cgendir)/sim.scm
1560 CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
1561 CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
1562 CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
1563 CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
1564 CGEN_CPU_EXTR = /extr/
1565 CGEN_CPU_READ = /read/
1566 CGEN_CPU_WRITE = /write/
1567 CGEN_CPU_SEM = /sem/
1568 CGEN_CPU_SEMSW = /semsw/
1569 CGEN_WRAPPER = $(srccom)/cgen.sh
1570 CGEN_GEN_ARCH = \
1571         $(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
1572                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1573                 $(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
1574                 $(CGEN_ARCHFILE) ignored
1575
1576 CGEN_GEN_CPU = \
1577         $(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
1578                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1579                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1580                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1581
1582 CGEN_GEN_DEFS = \
1583         $(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
1584                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1585                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1586                 $(CGEN_ARCHFILE) ignored
1587
1588 CGEN_GEN_DECODE = \
1589         $(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
1590                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1591                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1592                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1593
1594 CGEN_GEN_CPU_DECODE = \
1595         $(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
1596                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1597                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1598                 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1599
1600 CGEN_GEN_CPU_DESC = \
1601         $(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
1602                 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1603                 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1604                 $(CGEN_ARCHFILE) ignored $$opcfile
1605
1606
1607 # igen leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
1608 # leak detection while running it.
1609 @SIM_ENABLE_IGEN_TRUE@IGEN = igen/igen$(EXEEXT)
1610 @SIM_ENABLE_IGEN_TRUE@IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP)
1611 @SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES = \
1612 @SIM_ENABLE_IGEN_TRUE@  igen/table.c \
1613 @SIM_ENABLE_IGEN_TRUE@  igen/lf.c \
1614 @SIM_ENABLE_IGEN_TRUE@  igen/misc.c \
1615 @SIM_ENABLE_IGEN_TRUE@  igen/filter_host.c \
1616 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode.c \
1617 @SIM_ENABLE_IGEN_TRUE@  igen/ld-cache.c \
1618 @SIM_ENABLE_IGEN_TRUE@  igen/filter.c \
1619 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn.c \
1620 @SIM_ENABLE_IGEN_TRUE@  igen/gen-model.c \
1621 @SIM_ENABLE_IGEN_TRUE@  igen/gen-itable.c \
1622 @SIM_ENABLE_IGEN_TRUE@  igen/gen-icache.c \
1623 @SIM_ENABLE_IGEN_TRUE@  igen/gen-semantics.c \
1624 @SIM_ENABLE_IGEN_TRUE@  igen/gen-idecode.c \
1625 @SIM_ENABLE_IGEN_TRUE@  igen/gen-support.c \
1626 @SIM_ENABLE_IGEN_TRUE@  igen/gen-engine.c \
1627 @SIM_ENABLE_IGEN_TRUE@  igen/gen.c
1628
1629 @SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES = igen/igen.c
1630 @SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD = igen/libigen.a
1631 @SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES =
1632 @SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD = igen/filter-main.o igen/libigen.a
1633 @SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES =
1634 @SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD = igen/gen-main.o igen/libigen.a
1635 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES =
1636 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
1637 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES =
1638 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
1639 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES =
1640 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
1641 @SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES =
1642 @SIM_ENABLE_IGEN_TRUE@igen_table_LDADD = igen/table-main.o igen/libigen.a
1643 @SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS = \
1644 @SIM_ENABLE_IGEN_TRUE@  $(IGEN) \
1645 @SIM_ENABLE_IGEN_TRUE@  igen/filter \
1646 @SIM_ENABLE_IGEN_TRUE@  igen/gen \
1647 @SIM_ENABLE_IGEN_TRUE@  igen/ld-cache \
1648 @SIM_ENABLE_IGEN_TRUE@  igen/ld-decode \
1649 @SIM_ENABLE_IGEN_TRUE@  igen/ld-insn \
1650 @SIM_ENABLE_IGEN_TRUE@  igen/table
1651
1652 EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp
1653
1654 # Custom verbose test variables that automake doesn't provide (yet?).
1655 AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
1656 AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
1657 AM_V_RUNTEST_0 = @echo "  RUNTEST  $(RUNTESTFLAGS) $*";
1658 AM_V_RUNTEST_1 =
1659 DO_RUNTEST = \
1660         LC_ALL=C; export LC_ALL; \
1661         EXPECT=${EXPECT} ; export EXPECT ; \
1662         runtest=$(RUNTEST); \
1663         $$runtest $(RUNTESTFLAGS)
1664
1665 testsuite_common_CPPFLAGS = \
1666         -I$(srcdir)/common \
1667         -I$(srcroot)/include \
1668         -I../bfd
1669
1670 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES =
1671 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD = \
1672 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(common_libcommon_a_OBJECTS) \
1673 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
1674 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(patsubst %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
1675 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/cpustate.o \
1676 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/interp.o \
1677 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/memory.o \
1678 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/modules.o \
1679 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/sim-resume.o \
1680 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/simulator.o
1681
1682 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES =
1683 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
1684 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/nrun.o \
1685 @SIM_ENABLE_ARCH_aarch64_TRUE@  aarch64/libsim.a \
1686 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(SIM_COMMON_LIBS)
1687
1688 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES =
1689 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD = \
1690 @SIM_ENABLE_ARCH_arm_TRUE@      $(common_libcommon_a_OBJECTS) \
1691 @SIM_ENABLE_ARCH_arm_TRUE@      arm/wrapper.o \
1692 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
1693 @SIM_ENABLE_ARCH_arm_TRUE@      $(patsubst %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
1694 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu.o \
1695 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armemu32.o arm/arminit.o arm/armos.o arm/armsupp.o \
1696 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armvirt.o arm/thumbemu.o \
1697 @SIM_ENABLE_ARCH_arm_TRUE@      arm/armcopro.o arm/maverick.o arm/iwmmxt.o \
1698 @SIM_ENABLE_ARCH_arm_TRUE@      arm/modules.o
1699
1700 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES =
1701 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
1702 @SIM_ENABLE_ARCH_arm_TRUE@      arm/nrun.o \
1703 @SIM_ENABLE_ARCH_arm_TRUE@      arm/libsim.a \
1704 @SIM_ENABLE_ARCH_arm_TRUE@      $(SIM_COMMON_LIBS)
1705
1706 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
1707 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
1708 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES =
1709 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD = \
1710 @SIM_ENABLE_ARCH_avr_TRUE@      $(common_libcommon_a_OBJECTS) \
1711 @SIM_ENABLE_ARCH_avr_TRUE@      avr/interp.o \
1712 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
1713 @SIM_ENABLE_ARCH_avr_TRUE@      $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
1714 @SIM_ENABLE_ARCH_avr_TRUE@      avr/modules.o \
1715 @SIM_ENABLE_ARCH_avr_TRUE@      avr/sim-resume.o
1716
1717 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES =
1718 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
1719 @SIM_ENABLE_ARCH_avr_TRUE@      avr/nrun.o \
1720 @SIM_ENABLE_ARCH_avr_TRUE@      avr/libsim.a \
1721 @SIM_ENABLE_ARCH_avr_TRUE@      $(SIM_COMMON_LIBS)
1722
1723 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES =
1724 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD = \
1725 @SIM_ENABLE_ARCH_bfin_TRUE@     $(common_libcommon_a_OBJECTS) \
1726 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
1727 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
1728 @SIM_ENABLE_ARCH_bfin_TRUE@     $(patsubst %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
1729 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/bfin-sim.o \
1730 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/devices.o \
1731 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/gui.o \
1732 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/interp.o \
1733 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/machs.o \
1734 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/modules.o \
1735 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/sim-resume.o
1736
1737 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES =
1738 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
1739 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/nrun.o \
1740 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin/libsim.a \
1741 @SIM_ENABLE_ARCH_bfin_TRUE@     $(SIM_COMMON_LIBS)
1742
1743 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \
1744 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_cec \
1745 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ctimer \
1746 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dma \
1747 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_dmac \
1748 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_amc \
1749 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_ddrc \
1750 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ebiu_sdc \
1751 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_emac \
1752 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_eppi \
1753 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_evt \
1754 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio \
1755 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gpio2 \
1756 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_gptimer \
1757 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_jtag \
1758 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_mmu \
1759 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_nfc \
1760 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_otp \
1761 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pfmon \
1762 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pint \
1763 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_pll \
1764 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_ppi \
1765 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_rtc \
1766 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_sic \
1767 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_spi \
1768 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_trace \
1769 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_twi \
1770 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart \
1771 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_uart2 \
1772 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wdog \
1773 @SIM_ENABLE_ARCH_bfin_TRUE@     bfin_wp \
1774 @SIM_ENABLE_ARCH_bfin_TRUE@     eth_phy
1775
1776 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES =
1777 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \
1778 @SIM_ENABLE_ARCH_bpf_TRUE@      $(common_libcommon_a_OBJECTS) \
1779 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
1780 @SIM_ENABLE_ARCH_bpf_TRUE@      $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
1781 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/modules.o \
1782 @SIM_ENABLE_ARCH_bpf_TRUE@      \
1783 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-run.o \
1784 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-scache.o \
1785 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-trace.o \
1786 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cgen-utils.o \
1787 @SIM_ENABLE_ARCH_bpf_TRUE@      \
1788 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/arch.o \
1789 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/cpu.o \
1790 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-le.o \
1791 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/decode-be.o \
1792 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-le.o \
1793 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sem-be.o \
1794 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-le.o \
1795 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.o \
1796 @SIM_ENABLE_ARCH_bpf_TRUE@      \
1797 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf.o \
1798 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/bpf-helpers.o \
1799 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/sim-if.o \
1800 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/traps.o
1801
1802 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES =
1803 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
1804 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/nrun.o \
1805 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/libsim.a \
1806 @SIM_ENABLE_ARCH_bpf_TRUE@      $(SIM_COMMON_LIBS)
1807
1808 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
1809 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-le.c \
1810 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/stamp-mloop-le \
1811 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/mloop-be.c \
1812 @SIM_ENABLE_ARCH_bpf_TRUE@      bpf/stamp-mloop-be
1813
1814 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES =
1815 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD = \
1816 @SIM_ENABLE_ARCH_cr16_TRUE@     $(common_libcommon_a_OBJECTS) \
1817 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
1818 @SIM_ENABLE_ARCH_cr16_TRUE@     $(patsubst %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
1819 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/interp.o \
1820 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/modules.o \
1821 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/sim-resume.o \
1822 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/simops.o \
1823 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.o
1824
1825 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES =
1826 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
1827 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/nrun.o \
1828 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/libsim.a \
1829 @SIM_ENABLE_ARCH_cr16_TRUE@     $(SIM_COMMON_LIBS)
1830
1831 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
1832 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/gencode$(EXEEXT) \
1833 @SIM_ENABLE_ARCH_cr16_TRUE@     cr16/table.c
1834
1835 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
1836 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
1837 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES =
1838 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD = \
1839 @SIM_ENABLE_ARCH_cris_TRUE@     $(common_libcommon_a_OBJECTS) \
1840 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
1841 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
1842 @SIM_ENABLE_ARCH_cris_TRUE@     $(patsubst %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
1843 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modules.o \
1844 @SIM_ENABLE_ARCH_cris_TRUE@     \
1845 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-run.o \
1846 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-scache.o \
1847 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-trace.o \
1848 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cgen-utils.o \
1849 @SIM_ENABLE_ARCH_cris_TRUE@     \
1850 @SIM_ENABLE_ARCH_cris_TRUE@     cris/arch.o \
1851 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv10f.o \
1852 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv10.o \
1853 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev10.o \
1854 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv10.o \
1855 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.o \
1856 @SIM_ENABLE_ARCH_cris_TRUE@     cris/crisv32f.o \
1857 @SIM_ENABLE_ARCH_cris_TRUE@     cris/cpuv32.o \
1858 @SIM_ENABLE_ARCH_cris_TRUE@     cris/decodev32.o \
1859 @SIM_ENABLE_ARCH_cris_TRUE@     cris/modelv32.o \
1860 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.o \
1861 @SIM_ENABLE_ARCH_cris_TRUE@     \
1862 @SIM_ENABLE_ARCH_cris_TRUE@     cris/sim-if.o \
1863 @SIM_ENABLE_ARCH_cris_TRUE@     cris/traps.o
1864
1865 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES =
1866 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
1867 @SIM_ENABLE_ARCH_cris_TRUE@     cris/nrun.o \
1868 @SIM_ENABLE_ARCH_cris_TRUE@     cris/libsim.a \
1869 @SIM_ENABLE_ARCH_cris_TRUE@     $(SIM_COMMON_LIBS)
1870
1871 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
1872 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
1873 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
1874 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
1875 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv10f.c \
1876 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v10f \
1877 @SIM_ENABLE_ARCH_cris_TRUE@     cris/mloopv32f.c \
1878 @SIM_ENABLE_ARCH_cris_TRUE@     cris/stamp-mloop-v32f
1879
1880 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES =
1881 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD = \
1882 @SIM_ENABLE_ARCH_d10v_TRUE@     $(common_libcommon_a_OBJECTS) \
1883 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/interp.o \
1884 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
1885 @SIM_ENABLE_ARCH_d10v_TRUE@     $(patsubst %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
1886 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/endian.o \
1887 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/modules.o \
1888 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/sim-resume.o \
1889 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/simops.o \
1890 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.o
1891
1892 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES =
1893 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
1894 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/nrun.o \
1895 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/libsim.a \
1896 @SIM_ENABLE_ARCH_d10v_TRUE@     $(SIM_COMMON_LIBS)
1897
1898 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
1899 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/gencode$(EXEEXT) \
1900 @SIM_ENABLE_ARCH_d10v_TRUE@     d10v/table.c
1901
1902 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
1903 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
1904 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES =
1905 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD = \
1906 @SIM_ENABLE_ARCH_erc32_TRUE@    $(common_libcommon_a_OBJECTS) \
1907 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/erc32.o \
1908 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/exec.o \
1909 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/float.o \
1910 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/func.o \
1911 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/help.o \
1912 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/interf.o \
1913 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/modules.o
1914
1915 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES =
1916 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
1917 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/sis.o \
1918 @SIM_ENABLE_ARCH_erc32_TRUE@    erc32/libsim.a \
1919 @SIM_ENABLE_ARCH_erc32_TRUE@    $(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)
1920
1921 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
1922 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
1923 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES =
1924 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD = \
1925 @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_OBJECTS) \
1926 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
1927 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
1928 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
1929 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.o \
1930 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
1931 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
1932
1933 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES =
1934 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
1935 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
1936 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
1937 @SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS)
1938
1939 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES =
1940 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD = \
1941 @SIM_ENABLE_ARCH_frv_TRUE@      $(common_libcommon_a_OBJECTS) \
1942 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
1943 @SIM_ENABLE_ARCH_frv_TRUE@      $(patsubst %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
1944 @SIM_ENABLE_ARCH_frv_TRUE@      frv/modules.o \
1945 @SIM_ENABLE_ARCH_frv_TRUE@      \
1946 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-accfp.o \
1947 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-fpu.o \
1948 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-run.o \
1949 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-scache.o \
1950 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-trace.o \
1951 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-utils.o \
1952 @SIM_ENABLE_ARCH_frv_TRUE@      \
1953 @SIM_ENABLE_ARCH_frv_TRUE@      frv/arch.o \
1954 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cgen-par.o \
1955 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cpu.o \
1956 @SIM_ENABLE_ARCH_frv_TRUE@      frv/decode.o \
1957 @SIM_ENABLE_ARCH_frv_TRUE@      frv/frv.o \
1958 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.o \
1959 @SIM_ENABLE_ARCH_frv_TRUE@      frv/model.o \
1960 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sem.o \
1961 @SIM_ENABLE_ARCH_frv_TRUE@      \
1962 @SIM_ENABLE_ARCH_frv_TRUE@      frv/cache.o \
1963 @SIM_ENABLE_ARCH_frv_TRUE@      frv/interrupts.o \
1964 @SIM_ENABLE_ARCH_frv_TRUE@      frv/memory.o \
1965 @SIM_ENABLE_ARCH_frv_TRUE@      frv/options.o \
1966 @SIM_ENABLE_ARCH_frv_TRUE@      frv/pipeline.o \
1967 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile.o \
1968 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr400.o \
1969 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr450.o \
1970 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr500.o \
1971 @SIM_ENABLE_ARCH_frv_TRUE@      frv/profile-fr550.o \
1972 @SIM_ENABLE_ARCH_frv_TRUE@      frv/registers.o \
1973 @SIM_ENABLE_ARCH_frv_TRUE@      frv/reset.o \
1974 @SIM_ENABLE_ARCH_frv_TRUE@      frv/sim-if.o \
1975 @SIM_ENABLE_ARCH_frv_TRUE@      frv/traps.o
1976
1977 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES =
1978 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
1979 @SIM_ENABLE_ARCH_frv_TRUE@      frv/nrun.o \
1980 @SIM_ENABLE_ARCH_frv_TRUE@      frv/libsim.a \
1981 @SIM_ENABLE_ARCH_frv_TRUE@      $(SIM_COMMON_LIBS)
1982
1983 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
1984 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
1985 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
1986 @SIM_ENABLE_ARCH_frv_TRUE@      frv/mloop.c \
1987 @SIM_ENABLE_ARCH_frv_TRUE@      frv/stamp-mloop
1988
1989 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES =
1990 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD = \
1991 @SIM_ENABLE_ARCH_ft32_TRUE@     $(common_libcommon_a_OBJECTS) \
1992 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
1993 @SIM_ENABLE_ARCH_ft32_TRUE@     $(patsubst %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
1994 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/interp.o \
1995 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/modules.o \
1996 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/sim-resume.o
1997
1998 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES =
1999 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
2000 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/nrun.o \
2001 @SIM_ENABLE_ARCH_ft32_TRUE@     ft32/libsim.a \
2002 @SIM_ENABLE_ARCH_ft32_TRUE@     $(SIM_COMMON_LIBS)
2003
2004 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES =
2005 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD = \
2006 @SIM_ENABLE_ARCH_h8300_TRUE@    $(common_libcommon_a_OBJECTS) \
2007 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/compile.o \
2008 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
2009 @SIM_ENABLE_ARCH_h8300_TRUE@    $(patsubst %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
2010 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/modules.o \
2011 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/sim-resume.o
2012
2013 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES =
2014 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
2015 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/nrun.o \
2016 @SIM_ENABLE_ARCH_h8300_TRUE@    h8300/libsim.a \
2017 @SIM_ENABLE_ARCH_h8300_TRUE@    $(SIM_COMMON_LIBS)
2018
2019 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES =
2020 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
2021 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/nrun.o \
2022 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/libsim.a \
2023 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(SIM_COMMON_LIBS)
2024
2025 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
2026 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/mloop.c \
2027 @SIM_ENABLE_ARCH_iq2000_TRUE@   iq2000/stamp-mloop
2028
2029 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES =
2030 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
2031 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/nrun.o \
2032 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/libsim.a \
2033 @SIM_ENABLE_ARCH_lm32_TRUE@     $(SIM_COMMON_LIBS)
2034
2035 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart
2036 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
2037 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/mloop.c \
2038 @SIM_ENABLE_ARCH_lm32_TRUE@     lm32/stamp-mloop
2039
2040 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES =
2041 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
2042 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/main.o \
2043 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/libsim.a \
2044 @SIM_ENABLE_ARCH_m32c_TRUE@     $(SIM_COMMON_LIBS)
2045
2046 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
2047 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/opc2c$(EXEEXT) \
2048 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/m32c.c \
2049 @SIM_ENABLE_ARCH_m32c_TRUE@     m32c/r8c.c
2050
2051 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c
2052
2053 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
2054 # leak detection while running it.
2055 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
2056 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES =
2057 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
2058 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/nrun.o \
2059 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/libsim.a \
2060 @SIM_ENABLE_ARCH_m32r_TRUE@     $(SIM_COMMON_LIBS)
2061
2062 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
2063 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
2064 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop.c \
2065 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop \
2066 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloopx.c \
2067 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-x \
2068 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/mloop2.c \
2069 @SIM_ENABLE_ARCH_m32r_TRUE@     m32r/stamp-mloop-2
2070
2071 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES =
2072 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
2073 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/nrun.o \
2074 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/libsim.a \
2075 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(SIM_COMMON_LIBS)
2076
2077 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
2078 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
2079 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/gencode$(EXEEXT) \
2080 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc11int.c \
2081 @SIM_ENABLE_ARCH_m68hc11_TRUE@  m68hc11/m68hc12int.c
2082
2083 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
2084 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES =
2085 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
2086 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/nrun.o \
2087 @SIM_ENABLE_ARCH_mcore_TRUE@    mcore/libsim.a \
2088 @SIM_ENABLE_ARCH_mcore_TRUE@    $(SIM_COMMON_LIBS)
2089
2090 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES =
2091 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
2092 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/nrun.o \
2093 @SIM_ENABLE_ARCH_microblaze_TRUE@       microblaze/libsim.a \
2094 @SIM_ENABLE_ARCH_microblaze_TRUE@       $(SIM_COMMON_LIBS)
2095
2096 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES =
2097 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
2098 @SIM_ENABLE_ARCH_mips_TRUE@     mips/nrun.o \
2099 @SIM_ENABLE_ARCH_mips_TRUE@     mips/libsim.a \
2100 @SIM_ENABLE_ARCH_mips_TRUE@     $(SIM_COMMON_LIBS)
2101
2102 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
2103 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE = \
2104 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.h \
2105 @SIM_ENABLE_ARCH_mips_TRUE@     mips/itable.c
2106
2107 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
2108 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.h \
2109 @SIM_ENABLE_ARCH_mips_TRUE@     mips/icache.c \
2110 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.h \
2111 @SIM_ENABLE_ARCH_mips_TRUE@     mips/idecode.c \
2112 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.h \
2113 @SIM_ENABLE_ARCH_mips_TRUE@     mips/semantics.c \
2114 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.h \
2115 @SIM_ENABLE_ARCH_mips_TRUE@     mips/model.c \
2116 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.h \
2117 @SIM_ENABLE_ARCH_mips_TRUE@     mips/support.c \
2118 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.h \
2119 @SIM_ENABLE_ARCH_mips_TRUE@     mips/engine.c \
2120 @SIM_ENABLE_ARCH_mips_TRUE@     mips/irun.c
2121
2122 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
2123 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.h \
2124 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_icache.c \
2125 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.h \
2126 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_idecode.c \
2127 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.h \
2128 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_semantics.c \
2129 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.h \
2130 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_model.c \
2131 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.h \
2132 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16_support.c \
2133 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
2134 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.h \
2135 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_icache.c \
2136 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.h \
2137 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_idecode.c \
2138 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.h \
2139 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_semantics.c \
2140 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.h \
2141 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_model.c \
2142 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.h \
2143 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m32_support.c
2144
2145 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS =  \
2146 @SIM_ENABLE_ARCH_mips_TRUE@     $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
2147 @SIM_ENABLE_ARCH_mips_TRUE@     mips/stamp-igen-itable \
2148 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_84) $(am__append_85) \
2149 @SIM_ENABLE_ARCH_mips_TRUE@     $(am__append_86)
2150 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2151 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
2152 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
2153 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp.igen \
2154 @SIM_ENABLE_ARCH_mips_TRUE@     mips/dsp2.igen \
2155 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16.igen \
2156 @SIM_ENABLE_ARCH_mips_TRUE@     mips/m16e.igen \
2157 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mdmx.igen \
2158 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromipsdsp.igen \
2159 @SIM_ENABLE_ARCH_mips_TRUE@     mips/micromips.igen \
2160 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r2.igen \
2161 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3264r6.igen \
2162 @SIM_ENABLE_ARCH_mips_TRUE@     mips/mips3d.igen \
2163 @SIM_ENABLE_ARCH_mips_TRUE@     mips/sb1.igen \
2164 @SIM_ENABLE_ARCH_mips_TRUE@     mips/tx.igen \
2165 @SIM_ENABLE_ARCH_mips_TRUE@     mips/vr.igen
2166
2167 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
2168 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
2169 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
2170 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
2171 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES =
2172 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
2173 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/nrun.o \
2174 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/libsim.a \
2175 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(SIM_COMMON_LIBS)
2176
2177 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop
2178 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
2179 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.h \
2180 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/icache.c \
2181 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.h \
2182 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/idecode.c \
2183 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.h \
2184 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/semantics.c \
2185 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.h \
2186 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/model.c \
2187 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.h \
2188 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/support.c \
2189 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.h \
2190 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/itable.c \
2191 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.h \
2192 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/engine.c \
2193 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/irun.c
2194
2195 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
2196 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(mn10300_BUILT_SRC_FROM_IGEN) \
2197 @SIM_ENABLE_ARCH_mn10300_TRUE@  mn10300/stamp-igen
2198
2199 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2200 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
2201 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
2202 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
2203 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES =
2204 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
2205 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/nrun.o \
2206 @SIM_ENABLE_ARCH_moxie_TRUE@    moxie/libsim.a \
2207 @SIM_ENABLE_ARCH_moxie_TRUE@    $(SIM_COMMON_LIBS)
2208
2209 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
2210 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
2211 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES =
2212 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
2213 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/nrun.o \
2214 @SIM_ENABLE_ARCH_msp430_TRUE@   msp430/libsim.a \
2215 @SIM_ENABLE_ARCH_msp430_TRUE@   $(SIM_COMMON_LIBS)
2216
2217 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES =
2218 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
2219 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/nrun.o \
2220 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/libsim.a \
2221 @SIM_ENABLE_ARCH_or1k_TRUE@     $(SIM_COMMON_LIBS)
2222
2223 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
2224 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
2225 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
2226 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/mloop.c \
2227 @SIM_ENABLE_ARCH_or1k_TRUE@     or1k/stamp-mloop
2228
2229 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES =
2230 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
2231 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/main.o \
2232 @SIM_ENABLE_ARCH_ppc_TRUE@      ppc/libsim.a \
2233 @SIM_ENABLE_ARCH_ppc_TRUE@      $(SIM_COMMON_LIBS)
2234
2235 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
2236 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
2237 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES =
2238 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
2239 @SIM_ENABLE_ARCH_pru_TRUE@      pru/nrun.o \
2240 @SIM_ENABLE_ARCH_pru_TRUE@      pru/libsim.a \
2241 @SIM_ENABLE_ARCH_pru_TRUE@      $(SIM_COMMON_LIBS)
2242
2243 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES =
2244 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
2245 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/nrun.o \
2246 @SIM_ENABLE_ARCH_riscv_TRUE@    riscv/libsim.a \
2247 @SIM_ENABLE_ARCH_riscv_TRUE@    $(SIM_COMMON_LIBS)
2248
2249 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES =
2250 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
2251 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/main.o \
2252 @SIM_ENABLE_ARCH_rl78_TRUE@     rl78/libsim.a \
2253 @SIM_ENABLE_ARCH_rl78_TRUE@     $(SIM_COMMON_LIBS)
2254
2255 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES =
2256 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
2257 @SIM_ENABLE_ARCH_rx_TRUE@       rx/main.o \
2258 @SIM_ENABLE_ARCH_rx_TRUE@       rx/libsim.a \
2259 @SIM_ENABLE_ARCH_rx_TRUE@       $(SIM_COMMON_LIBS)
2260
2261 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
2262 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
2263 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =
2264 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
2265 @SIM_ENABLE_ARCH_sh_TRUE@       sh/nrun.o \
2266 @SIM_ENABLE_ARCH_sh_TRUE@       sh/libsim.a \
2267 @SIM_ENABLE_ARCH_sh_TRUE@       $(SIM_COMMON_LIBS)
2268
2269 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
2270 @SIM_ENABLE_ARCH_sh_TRUE@       sh/gencode$(EXEEXT) \
2271 @SIM_ENABLE_ARCH_sh_TRUE@       sh/table.c
2272
2273 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
2274 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =
2275 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
2276 @SIM_ENABLE_ARCH_v850_TRUE@     v850/nrun.o \
2277 @SIM_ENABLE_ARCH_v850_TRUE@     v850/libsim.a \
2278 @SIM_ENABLE_ARCH_v850_TRUE@     $(SIM_COMMON_LIBS)
2279
2280 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
2281 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.h \
2282 @SIM_ENABLE_ARCH_v850_TRUE@     v850/icache.c \
2283 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.h \
2284 @SIM_ENABLE_ARCH_v850_TRUE@     v850/idecode.c \
2285 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.h \
2286 @SIM_ENABLE_ARCH_v850_TRUE@     v850/semantics.c \
2287 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.h \
2288 @SIM_ENABLE_ARCH_v850_TRUE@     v850/model.c \
2289 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.h \
2290 @SIM_ENABLE_ARCH_v850_TRUE@     v850/support.c \
2291 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.h \
2292 @SIM_ENABLE_ARCH_v850_TRUE@     v850/itable.c \
2293 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.h \
2294 @SIM_ENABLE_ARCH_v850_TRUE@     v850/engine.c \
2295 @SIM_ENABLE_ARCH_v850_TRUE@     v850/irun.c
2296
2297 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
2298 @SIM_ENABLE_ARCH_v850_TRUE@     $(v850_BUILT_SRC_FROM_IGEN) \
2299 @SIM_ENABLE_ARCH_v850_TRUE@     v850/stamp-igen
2300
2301 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2302 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
2303 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
2304 all: $(BUILT_SOURCES) config.h
2305         $(MAKE) $(AM_MAKEFLAGS) all-recursive
2306
2307 .SUFFIXES:
2308 .SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
2309 am--refresh: Makefile
2310         @:
2311 $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
2312         @for dep in $?; do \
2313           case '$(am__configure_deps)' in \
2314             *$$dep*) \
2315               echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
2316               $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \
2317                 && exit 0; \
2318               exit 1;; \
2319           esac; \
2320         done; \
2321         echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
2322         $(am__cd) $(top_srcdir) && \
2323           $(AUTOMAKE) --foreign Makefile
2324 Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
2325         @case '$?' in \
2326           *config.status*) \
2327             echo ' $(SHELL) ./config.status'; \
2328             $(SHELL) ./config.status;; \
2329           *) \
2330             echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
2331             cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
2332         esac;
2333 $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
2334
2335 $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
2336         $(SHELL) ./config.status --recheck
2337
2338 $(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2339         $(am__cd) $(srcdir) && $(AUTOCONF)
2340 $(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
2341         $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
2342 $(am__aclocal_m4_deps):
2343
2344 config.h: stamp-h1
2345         @test -f $@ || rm -f stamp-h1
2346         @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1
2347
2348 stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status
2349         @rm -f stamp-h1
2350         cd $(top_builddir) && $(SHELL) ./config.status config.h
2351 $(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2352         ($(am__cd) $(top_srcdir) && $(AUTOHEADER))
2353         rm -f stamp-h1
2354         touch $@
2355
2356 distclean-hdr:
2357         -rm -f config.h stamp-h1
2358 Make-common.sim: $(top_builddir)/config.status $(top_srcdir)/common/Make-common.in
2359         cd $(top_builddir) && $(SHELL) ./config.status $@
2360 aarch64/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/aarch64/Makefile.in
2361         cd $(top_builddir) && $(SHELL) ./config.status $@
2362 aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2363         cd $(top_builddir) && $(SHELL) ./config.status $@
2364 arm/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/arm/Makefile.in
2365         cd $(top_builddir) && $(SHELL) ./config.status $@
2366 arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2367         cd $(top_builddir) && $(SHELL) ./config.status $@
2368 avr/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/avr/Makefile.in
2369         cd $(top_builddir) && $(SHELL) ./config.status $@
2370 avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2371         cd $(top_builddir) && $(SHELL) ./config.status $@
2372 bfin/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bfin/Makefile.in
2373         cd $(top_builddir) && $(SHELL) ./config.status $@
2374 bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2375         cd $(top_builddir) && $(SHELL) ./config.status $@
2376 bpf/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bpf/Makefile.in
2377         cd $(top_builddir) && $(SHELL) ./config.status $@
2378 bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2379         cd $(top_builddir) && $(SHELL) ./config.status $@
2380 cr16/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cr16/Makefile.in
2381         cd $(top_builddir) && $(SHELL) ./config.status $@
2382 cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2383         cd $(top_builddir) && $(SHELL) ./config.status $@
2384 cris/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cris/Makefile.in
2385         cd $(top_builddir) && $(SHELL) ./config.status $@
2386 cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2387         cd $(top_builddir) && $(SHELL) ./config.status $@
2388 d10v/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/d10v/Makefile.in
2389         cd $(top_builddir) && $(SHELL) ./config.status $@
2390 d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2391         cd $(top_builddir) && $(SHELL) ./config.status $@
2392 frv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/frv/Makefile.in
2393         cd $(top_builddir) && $(SHELL) ./config.status $@
2394 frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2395         cd $(top_builddir) && $(SHELL) ./config.status $@
2396 ft32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/ft32/Makefile.in
2397         cd $(top_builddir) && $(SHELL) ./config.status $@
2398 ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2399         cd $(top_builddir) && $(SHELL) ./config.status $@
2400 h8300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/h8300/Makefile.in
2401         cd $(top_builddir) && $(SHELL) ./config.status $@
2402 h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2403         cd $(top_builddir) && $(SHELL) ./config.status $@
2404 iq2000/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/iq2000/Makefile.in
2405         cd $(top_builddir) && $(SHELL) ./config.status $@
2406 iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2407         cd $(top_builddir) && $(SHELL) ./config.status $@
2408 lm32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/lm32/Makefile.in
2409         cd $(top_builddir) && $(SHELL) ./config.status $@
2410 lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2411         cd $(top_builddir) && $(SHELL) ./config.status $@
2412 m32c/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32c/Makefile.in
2413         cd $(top_builddir) && $(SHELL) ./config.status $@
2414 m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2415         cd $(top_builddir) && $(SHELL) ./config.status $@
2416 m32r/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32r/Makefile.in
2417         cd $(top_builddir) && $(SHELL) ./config.status $@
2418 m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2419         cd $(top_builddir) && $(SHELL) ./config.status $@
2420 m68hc11/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m68hc11/Makefile.in
2421         cd $(top_builddir) && $(SHELL) ./config.status $@
2422 m68hc11/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2423         cd $(top_builddir) && $(SHELL) ./config.status $@
2424 mcore/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mcore/Makefile.in
2425         cd $(top_builddir) && $(SHELL) ./config.status $@
2426 mcore/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2427         cd $(top_builddir) && $(SHELL) ./config.status $@
2428 microblaze/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/microblaze/Makefile.in
2429         cd $(top_builddir) && $(SHELL) ./config.status $@
2430 microblaze/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2431         cd $(top_builddir) && $(SHELL) ./config.status $@
2432 mips/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mips/Makefile.in
2433         cd $(top_builddir) && $(SHELL) ./config.status $@
2434 mips/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2435         cd $(top_builddir) && $(SHELL) ./config.status $@
2436 mn10300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mn10300/Makefile.in
2437         cd $(top_builddir) && $(SHELL) ./config.status $@
2438 mn10300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2439         cd $(top_builddir) && $(SHELL) ./config.status $@
2440 moxie/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/moxie/Makefile.in
2441         cd $(top_builddir) && $(SHELL) ./config.status $@
2442 moxie/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2443         cd $(top_builddir) && $(SHELL) ./config.status $@
2444 msp430/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/msp430/Makefile.in
2445         cd $(top_builddir) && $(SHELL) ./config.status $@
2446 msp430/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2447         cd $(top_builddir) && $(SHELL) ./config.status $@
2448 or1k/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/or1k/Makefile.in
2449         cd $(top_builddir) && $(SHELL) ./config.status $@
2450 or1k/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2451         cd $(top_builddir) && $(SHELL) ./config.status $@
2452 ppc/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2453         cd $(top_builddir) && $(SHELL) ./config.status $@
2454 pru/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/pru/Makefile.in
2455         cd $(top_builddir) && $(SHELL) ./config.status $@
2456 pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2457         cd $(top_builddir) && $(SHELL) ./config.status $@
2458 riscv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/riscv/Makefile.in
2459         cd $(top_builddir) && $(SHELL) ./config.status $@
2460 riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2461         cd $(top_builddir) && $(SHELL) ./config.status $@
2462 rl78/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rl78/Makefile.in
2463         cd $(top_builddir) && $(SHELL) ./config.status $@
2464 rl78/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2465         cd $(top_builddir) && $(SHELL) ./config.status $@
2466 rx/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rx/Makefile.in
2467         cd $(top_builddir) && $(SHELL) ./config.status $@
2468 rx/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2469         cd $(top_builddir) && $(SHELL) ./config.status $@
2470 sh/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/sh/Makefile.in
2471         cd $(top_builddir) && $(SHELL) ./config.status $@
2472 sh/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2473         cd $(top_builddir) && $(SHELL) ./config.status $@
2474 erc32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/erc32/Makefile.in
2475         cd $(top_builddir) && $(SHELL) ./config.status $@
2476 erc32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2477         cd $(top_builddir) && $(SHELL) ./config.status $@
2478 v850/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/v850/Makefile.in
2479         cd $(top_builddir) && $(SHELL) ./config.status $@
2480 v850/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2481         cd $(top_builddir) && $(SHELL) ./config.status $@
2482 example-synacor/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/example-synacor/Makefile.in
2483         cd $(top_builddir) && $(SHELL) ./config.status $@
2484 example-synacor/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2485         cd $(top_builddir) && $(SHELL) ./config.status $@
2486 arch-subdir.mk: $(top_builddir)/config.status $(srcdir)/arch-subdir.mk.in
2487         cd $(top_builddir) && $(SHELL) ./config.status $@
2488 .gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in
2489         cd $(top_builddir) && $(SHELL) ./config.status $@
2490
2491 clean-noinstLIBRARIES:
2492         -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
2493 aarch64/$(am__dirstamp):
2494         @$(MKDIR_P) aarch64
2495         @: > aarch64/$(am__dirstamp)
2496
2497 aarch64/libsim.a: $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_DEPENDENCIES) $(EXTRA_aarch64_libsim_a_DEPENDENCIES) aarch64/$(am__dirstamp)
2498         $(AM_V_at)-rm -f aarch64/libsim.a
2499         $(AM_V_AR)$(aarch64_libsim_a_AR) aarch64/libsim.a $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD)
2500         $(AM_V_at)$(RANLIB) aarch64/libsim.a
2501 arm/$(am__dirstamp):
2502         @$(MKDIR_P) arm
2503         @: > arm/$(am__dirstamp)
2504
2505 arm/libsim.a: $(arm_libsim_a_OBJECTS) $(arm_libsim_a_DEPENDENCIES) $(EXTRA_arm_libsim_a_DEPENDENCIES) arm/$(am__dirstamp)
2506         $(AM_V_at)-rm -f arm/libsim.a
2507         $(AM_V_AR)$(arm_libsim_a_AR) arm/libsim.a $(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD)
2508         $(AM_V_at)$(RANLIB) arm/libsim.a
2509 avr/$(am__dirstamp):
2510         @$(MKDIR_P) avr
2511         @: > avr/$(am__dirstamp)
2512
2513 avr/libsim.a: $(avr_libsim_a_OBJECTS) $(avr_libsim_a_DEPENDENCIES) $(EXTRA_avr_libsim_a_DEPENDENCIES) avr/$(am__dirstamp)
2514         $(AM_V_at)-rm -f avr/libsim.a
2515         $(AM_V_AR)$(avr_libsim_a_AR) avr/libsim.a $(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD)
2516         $(AM_V_at)$(RANLIB) avr/libsim.a
2517 bfin/$(am__dirstamp):
2518         @$(MKDIR_P) bfin
2519         @: > bfin/$(am__dirstamp)
2520
2521 bfin/libsim.a: $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_DEPENDENCIES) $(EXTRA_bfin_libsim_a_DEPENDENCIES) bfin/$(am__dirstamp)
2522         $(AM_V_at)-rm -f bfin/libsim.a
2523         $(AM_V_AR)$(bfin_libsim_a_AR) bfin/libsim.a $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD)
2524         $(AM_V_at)$(RANLIB) bfin/libsim.a
2525 bpf/$(am__dirstamp):
2526         @$(MKDIR_P) bpf
2527         @: > bpf/$(am__dirstamp)
2528
2529 bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_DEPENDENCIES) $(EXTRA_bpf_libsim_a_DEPENDENCIES) bpf/$(am__dirstamp)
2530         $(AM_V_at)-rm -f bpf/libsim.a
2531         $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD)
2532         $(AM_V_at)$(RANLIB) bpf/libsim.a
2533 common/$(am__dirstamp):
2534         @$(MKDIR_P) common
2535         @: > common/$(am__dirstamp)
2536 common/$(DEPDIR)/$(am__dirstamp):
2537         @$(MKDIR_P) common/$(DEPDIR)
2538         @: > common/$(DEPDIR)/$(am__dirstamp)
2539 common/callback.$(OBJEXT): common/$(am__dirstamp) \
2540         common/$(DEPDIR)/$(am__dirstamp)
2541 common/portability.$(OBJEXT): common/$(am__dirstamp) \
2542         common/$(DEPDIR)/$(am__dirstamp)
2543 common/sim-load.$(OBJEXT): common/$(am__dirstamp) \
2544         common/$(DEPDIR)/$(am__dirstamp)
2545 common/syscall.$(OBJEXT): common/$(am__dirstamp) \
2546         common/$(DEPDIR)/$(am__dirstamp)
2547 common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \
2548         common/$(DEPDIR)/$(am__dirstamp)
2549 common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \
2550         common/$(DEPDIR)/$(am__dirstamp)
2551 common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \
2552         common/$(DEPDIR)/$(am__dirstamp)
2553 common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \
2554         common/$(DEPDIR)/$(am__dirstamp)
2555 common/version.$(OBJEXT): common/$(am__dirstamp) \
2556         common/$(DEPDIR)/$(am__dirstamp)
2557
2558 common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEPENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp)
2559         $(AM_V_at)-rm -f common/libcommon.a
2560         $(AM_V_AR)$(common_libcommon_a_AR) common/libcommon.a $(common_libcommon_a_OBJECTS) $(common_libcommon_a_LIBADD)
2561         $(AM_V_at)$(RANLIB) common/libcommon.a
2562 cr16/$(am__dirstamp):
2563         @$(MKDIR_P) cr16
2564         @: > cr16/$(am__dirstamp)
2565
2566 cr16/libsim.a: $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_DEPENDENCIES) $(EXTRA_cr16_libsim_a_DEPENDENCIES) cr16/$(am__dirstamp)
2567         $(AM_V_at)-rm -f cr16/libsim.a
2568         $(AM_V_AR)$(cr16_libsim_a_AR) cr16/libsim.a $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD)
2569         $(AM_V_at)$(RANLIB) cr16/libsim.a
2570 cris/$(am__dirstamp):
2571         @$(MKDIR_P) cris
2572         @: > cris/$(am__dirstamp)
2573
2574 cris/libsim.a: $(cris_libsim_a_OBJECTS) $(cris_libsim_a_DEPENDENCIES) $(EXTRA_cris_libsim_a_DEPENDENCIES) cris/$(am__dirstamp)
2575         $(AM_V_at)-rm -f cris/libsim.a
2576         $(AM_V_AR)$(cris_libsim_a_AR) cris/libsim.a $(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD)
2577         $(AM_V_at)$(RANLIB) cris/libsim.a
2578 d10v/$(am__dirstamp):
2579         @$(MKDIR_P) d10v
2580         @: > d10v/$(am__dirstamp)
2581
2582 d10v/libsim.a: $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_DEPENDENCIES) $(EXTRA_d10v_libsim_a_DEPENDENCIES) d10v/$(am__dirstamp)
2583         $(AM_V_at)-rm -f d10v/libsim.a
2584         $(AM_V_AR)$(d10v_libsim_a_AR) d10v/libsim.a $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD)
2585         $(AM_V_at)$(RANLIB) d10v/libsim.a
2586 erc32/$(am__dirstamp):
2587         @$(MKDIR_P) erc32
2588         @: > erc32/$(am__dirstamp)
2589
2590 erc32/libsim.a: $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_DEPENDENCIES) $(EXTRA_erc32_libsim_a_DEPENDENCIES) erc32/$(am__dirstamp)
2591         $(AM_V_at)-rm -f erc32/libsim.a
2592         $(AM_V_AR)$(erc32_libsim_a_AR) erc32/libsim.a $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD)
2593         $(AM_V_at)$(RANLIB) erc32/libsim.a
2594 example-synacor/$(am__dirstamp):
2595         @$(MKDIR_P) example-synacor
2596         @: > example-synacor/$(am__dirstamp)
2597
2598 example-synacor/libsim.a: $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_DEPENDENCIES) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES) example-synacor/$(am__dirstamp)
2599         $(AM_V_at)-rm -f example-synacor/libsim.a
2600         $(AM_V_AR)$(example_synacor_libsim_a_AR) example-synacor/libsim.a $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD)
2601         $(AM_V_at)$(RANLIB) example-synacor/libsim.a
2602 frv/$(am__dirstamp):
2603         @$(MKDIR_P) frv
2604         @: > frv/$(am__dirstamp)
2605
2606 frv/libsim.a: $(frv_libsim_a_OBJECTS) $(frv_libsim_a_DEPENDENCIES) $(EXTRA_frv_libsim_a_DEPENDENCIES) frv/$(am__dirstamp)
2607         $(AM_V_at)-rm -f frv/libsim.a
2608         $(AM_V_AR)$(frv_libsim_a_AR) frv/libsim.a $(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD)
2609         $(AM_V_at)$(RANLIB) frv/libsim.a
2610 ft32/$(am__dirstamp):
2611         @$(MKDIR_P) ft32
2612         @: > ft32/$(am__dirstamp)
2613
2614 ft32/libsim.a: $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_DEPENDENCIES) $(EXTRA_ft32_libsim_a_DEPENDENCIES) ft32/$(am__dirstamp)
2615         $(AM_V_at)-rm -f ft32/libsim.a
2616         $(AM_V_AR)$(ft32_libsim_a_AR) ft32/libsim.a $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD)
2617         $(AM_V_at)$(RANLIB) ft32/libsim.a
2618 h8300/$(am__dirstamp):
2619         @$(MKDIR_P) h8300
2620         @: > h8300/$(am__dirstamp)
2621
2622 h8300/libsim.a: $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_DEPENDENCIES) $(EXTRA_h8300_libsim_a_DEPENDENCIES) h8300/$(am__dirstamp)
2623         $(AM_V_at)-rm -f h8300/libsim.a
2624         $(AM_V_AR)$(h8300_libsim_a_AR) h8300/libsim.a $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD)
2625         $(AM_V_at)$(RANLIB) h8300/libsim.a
2626 igen/$(am__dirstamp):
2627         @$(MKDIR_P) igen
2628         @: > igen/$(am__dirstamp)
2629 igen/$(DEPDIR)/$(am__dirstamp):
2630         @$(MKDIR_P) igen/$(DEPDIR)
2631         @: > igen/$(DEPDIR)/$(am__dirstamp)
2632 igen/table.$(OBJEXT): igen/$(am__dirstamp) \
2633         igen/$(DEPDIR)/$(am__dirstamp)
2634 igen/lf.$(OBJEXT): igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp)
2635 igen/misc.$(OBJEXT): igen/$(am__dirstamp) \
2636         igen/$(DEPDIR)/$(am__dirstamp)
2637 igen/filter_host.$(OBJEXT): igen/$(am__dirstamp) \
2638         igen/$(DEPDIR)/$(am__dirstamp)
2639 igen/ld-decode.$(OBJEXT): igen/$(am__dirstamp) \
2640         igen/$(DEPDIR)/$(am__dirstamp)
2641 igen/ld-cache.$(OBJEXT): igen/$(am__dirstamp) \
2642         igen/$(DEPDIR)/$(am__dirstamp)
2643 igen/filter.$(OBJEXT): igen/$(am__dirstamp) \
2644         igen/$(DEPDIR)/$(am__dirstamp)
2645 igen/ld-insn.$(OBJEXT): igen/$(am__dirstamp) \
2646         igen/$(DEPDIR)/$(am__dirstamp)
2647 igen/gen-model.$(OBJEXT): igen/$(am__dirstamp) \
2648         igen/$(DEPDIR)/$(am__dirstamp)
2649 igen/gen-itable.$(OBJEXT): igen/$(am__dirstamp) \
2650         igen/$(DEPDIR)/$(am__dirstamp)
2651 igen/gen-icache.$(OBJEXT): igen/$(am__dirstamp) \
2652         igen/$(DEPDIR)/$(am__dirstamp)
2653 igen/gen-semantics.$(OBJEXT): igen/$(am__dirstamp) \
2654         igen/$(DEPDIR)/$(am__dirstamp)
2655 igen/gen-idecode.$(OBJEXT): igen/$(am__dirstamp) \
2656         igen/$(DEPDIR)/$(am__dirstamp)
2657 igen/gen-support.$(OBJEXT): igen/$(am__dirstamp) \
2658         igen/$(DEPDIR)/$(am__dirstamp)
2659 igen/gen-engine.$(OBJEXT): igen/$(am__dirstamp) \
2660         igen/$(DEPDIR)/$(am__dirstamp)
2661 igen/gen.$(OBJEXT): igen/$(am__dirstamp) \
2662         igen/$(DEPDIR)/$(am__dirstamp)
2663
2664 @SIM_ENABLE_IGEN_FALSE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
2665 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)-rm -f igen/libigen.a
2666 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_AR)$(igen_libigen_a_AR) igen/libigen.a $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
2667 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)$(RANLIB) igen/libigen.a
2668
2669 clean-checkPROGRAMS:
2670         @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
2671         echo " rm -f" $$list; \
2672         rm -f $$list || exit $$?; \
2673         test -n "$(EXEEXT)" || exit 0; \
2674         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2675         echo " rm -f" $$list; \
2676         rm -f $$list
2677
2678 clean-noinstPROGRAMS:
2679         @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \
2680         echo " rm -f" $$list; \
2681         rm -f $$list || exit $$?; \
2682         test -n "$(EXEEXT)" || exit 0; \
2683         list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2684         echo " rm -f" $$list; \
2685         rm -f $$list
2686
2687 aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA_aarch64_run_DEPENDENCIES) aarch64/$(am__dirstamp)
2688         @rm -f aarch64/run$(EXEEXT)
2689         $(AM_V_CCLD)$(LINK) $(aarch64_run_OBJECTS) $(aarch64_run_LDADD) $(LIBS)
2690
2691 arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp)
2692         @rm -f arm/run$(EXEEXT)
2693         $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS)
2694
2695 avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp)
2696         @rm -f avr/run$(EXEEXT)
2697         $(AM_V_CCLD)$(LINK) $(avr_run_OBJECTS) $(avr_run_LDADD) $(LIBS)
2698
2699 bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp)
2700         @rm -f bfin/run$(EXEEXT)
2701         $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS)
2702
2703 bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp)
2704         @rm -f bpf/run$(EXEEXT)
2705         $(AM_V_CCLD)$(LINK) $(bpf_run_OBJECTS) $(bpf_run_LDADD) $(LIBS)
2706 cr16/$(DEPDIR)/$(am__dirstamp):
2707         @$(MKDIR_P) cr16/$(DEPDIR)
2708         @: > cr16/$(DEPDIR)/$(am__dirstamp)
2709 cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \
2710         cr16/$(DEPDIR)/$(am__dirstamp)
2711
2712 @SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
2713 @SIM_ENABLE_ARCH_cr16_FALSE@    @rm -f cr16/gencode$(EXEEXT)
2714 @SIM_ENABLE_ARCH_cr16_FALSE@    $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) $(LIBS)
2715
2716 cr16/run$(EXEEXT): $(cr16_run_OBJECTS) $(cr16_run_DEPENDENCIES) $(EXTRA_cr16_run_DEPENDENCIES) cr16/$(am__dirstamp)
2717         @rm -f cr16/run$(EXEEXT)
2718         $(AM_V_CCLD)$(LINK) $(cr16_run_OBJECTS) $(cr16_run_LDADD) $(LIBS)
2719
2720 cris/run$(EXEEXT): $(cris_run_OBJECTS) $(cris_run_DEPENDENCIES) $(EXTRA_cris_run_DEPENDENCIES) cris/$(am__dirstamp)
2721         @rm -f cris/run$(EXEEXT)
2722         $(AM_V_CCLD)$(LINK) $(cris_run_OBJECTS) $(cris_run_LDADD) $(LIBS)
2723 cris/$(DEPDIR)/$(am__dirstamp):
2724         @$(MKDIR_P) cris/$(DEPDIR)
2725         @: > cris/$(DEPDIR)/$(am__dirstamp)
2726 cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \
2727         cris/$(DEPDIR)/$(am__dirstamp)
2728
2729 cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp)
2730         @rm -f cris/rvdummy$(EXEEXT)
2731         $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS)
2732 d10v/$(DEPDIR)/$(am__dirstamp):
2733         @$(MKDIR_P) d10v/$(DEPDIR)
2734         @: > d10v/$(DEPDIR)/$(am__dirstamp)
2735 d10v/gencode.$(OBJEXT): d10v/$(am__dirstamp) \
2736         d10v/$(DEPDIR)/$(am__dirstamp)
2737
2738 @SIM_ENABLE_ARCH_d10v_FALSE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) $(EXTRA_d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
2739 @SIM_ENABLE_ARCH_d10v_FALSE@    @rm -f d10v/gencode$(EXEEXT)
2740 @SIM_ENABLE_ARCH_d10v_FALSE@    $(AM_V_CCLD)$(LINK) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) $(LIBS)
2741
2742 d10v/run$(EXEEXT): $(d10v_run_OBJECTS) $(d10v_run_DEPENDENCIES) $(EXTRA_d10v_run_DEPENDENCIES) d10v/$(am__dirstamp)
2743         @rm -f d10v/run$(EXEEXT)
2744         $(AM_V_CCLD)$(LINK) $(d10v_run_OBJECTS) $(d10v_run_LDADD) $(LIBS)
2745
2746 erc32/run$(EXEEXT): $(erc32_run_OBJECTS) $(erc32_run_DEPENDENCIES) $(EXTRA_erc32_run_DEPENDENCIES) erc32/$(am__dirstamp)
2747         @rm -f erc32/run$(EXEEXT)
2748         $(AM_V_CCLD)$(LINK) $(erc32_run_OBJECTS) $(erc32_run_LDADD) $(LIBS)
2749 erc32/$(DEPDIR)/$(am__dirstamp):
2750         @$(MKDIR_P) erc32/$(DEPDIR)
2751         @: > erc32/$(DEPDIR)/$(am__dirstamp)
2752 erc32/sis.$(OBJEXT): erc32/$(am__dirstamp) \
2753         erc32/$(DEPDIR)/$(am__dirstamp)
2754
2755 @SIM_ENABLE_ARCH_erc32_FALSE@erc32/sis$(EXEEXT): $(erc32_sis_OBJECTS) $(erc32_sis_DEPENDENCIES) $(EXTRA_erc32_sis_DEPENDENCIES) erc32/$(am__dirstamp)
2756 @SIM_ENABLE_ARCH_erc32_FALSE@   @rm -f erc32/sis$(EXEEXT)
2757 @SIM_ENABLE_ARCH_erc32_FALSE@   $(AM_V_CCLD)$(LINK) $(erc32_sis_OBJECTS) $(erc32_sis_LDADD) $(LIBS)
2758
2759 example-synacor/run$(EXEEXT): $(example_synacor_run_OBJECTS) $(example_synacor_run_DEPENDENCIES) $(EXTRA_example_synacor_run_DEPENDENCIES) example-synacor/$(am__dirstamp)
2760         @rm -f example-synacor/run$(EXEEXT)
2761         $(AM_V_CCLD)$(LINK) $(example_synacor_run_OBJECTS) $(example_synacor_run_LDADD) $(LIBS)
2762
2763 frv/run$(EXEEXT): $(frv_run_OBJECTS) $(frv_run_DEPENDENCIES) $(EXTRA_frv_run_DEPENDENCIES) frv/$(am__dirstamp)
2764         @rm -f frv/run$(EXEEXT)
2765         $(AM_V_CCLD)$(LINK) $(frv_run_OBJECTS) $(frv_run_LDADD) $(LIBS)
2766
2767 ft32/run$(EXEEXT): $(ft32_run_OBJECTS) $(ft32_run_DEPENDENCIES) $(EXTRA_ft32_run_DEPENDENCIES) ft32/$(am__dirstamp)
2768         @rm -f ft32/run$(EXEEXT)
2769         $(AM_V_CCLD)$(LINK) $(ft32_run_OBJECTS) $(ft32_run_LDADD) $(LIBS)
2770
2771 h8300/run$(EXEEXT): $(h8300_run_OBJECTS) $(h8300_run_DEPENDENCIES) $(EXTRA_h8300_run_DEPENDENCIES) h8300/$(am__dirstamp)
2772         @rm -f h8300/run$(EXEEXT)
2773         $(AM_V_CCLD)$(LINK) $(h8300_run_OBJECTS) $(h8300_run_LDADD) $(LIBS)
2774
2775 igen/filter$(EXEEXT): $(igen_filter_OBJECTS) $(igen_filter_DEPENDENCIES) $(EXTRA_igen_filter_DEPENDENCIES) igen/$(am__dirstamp)
2776         @rm -f igen/filter$(EXEEXT)
2777         $(AM_V_CCLD)$(LINK) $(igen_filter_OBJECTS) $(igen_filter_LDADD) $(LIBS)
2778
2779 igen/gen$(EXEEXT): $(igen_gen_OBJECTS) $(igen_gen_DEPENDENCIES) $(EXTRA_igen_gen_DEPENDENCIES) igen/$(am__dirstamp)
2780         @rm -f igen/gen$(EXEEXT)
2781         $(AM_V_CCLD)$(LINK) $(igen_gen_OBJECTS) $(igen_gen_LDADD) $(LIBS)
2782 igen/igen.$(OBJEXT): igen/$(am__dirstamp) \
2783         igen/$(DEPDIR)/$(am__dirstamp)
2784
2785 @SIM_ENABLE_IGEN_FALSE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) $(EXTRA_igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
2786 @SIM_ENABLE_IGEN_FALSE@ @rm -f igen/igen$(EXEEXT)
2787 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_CCLD)$(LINK) $(igen_igen_OBJECTS) $(igen_igen_LDADD) $(LIBS)
2788
2789 igen/ld-cache$(EXEEXT): $(igen_ld_cache_OBJECTS) $(igen_ld_cache_DEPENDENCIES) $(EXTRA_igen_ld_cache_DEPENDENCIES) igen/$(am__dirstamp)
2790         @rm -f igen/ld-cache$(EXEEXT)
2791         $(AM_V_CCLD)$(LINK) $(igen_ld_cache_OBJECTS) $(igen_ld_cache_LDADD) $(LIBS)
2792
2793 igen/ld-decode$(EXEEXT): $(igen_ld_decode_OBJECTS) $(igen_ld_decode_DEPENDENCIES) $(EXTRA_igen_ld_decode_DEPENDENCIES) igen/$(am__dirstamp)
2794         @rm -f igen/ld-decode$(EXEEXT)
2795         $(AM_V_CCLD)$(LINK) $(igen_ld_decode_OBJECTS) $(igen_ld_decode_LDADD) $(LIBS)
2796
2797 igen/ld-insn$(EXEEXT): $(igen_ld_insn_OBJECTS) $(igen_ld_insn_DEPENDENCIES) $(EXTRA_igen_ld_insn_DEPENDENCIES) igen/$(am__dirstamp)
2798         @rm -f igen/ld-insn$(EXEEXT)
2799         $(AM_V_CCLD)$(LINK) $(igen_ld_insn_OBJECTS) $(igen_ld_insn_LDADD) $(LIBS)
2800
2801 igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_igen_table_DEPENDENCIES) igen/$(am__dirstamp)
2802         @rm -f igen/table$(EXEEXT)
2803         $(AM_V_CCLD)$(LINK) $(igen_table_OBJECTS) $(igen_table_LDADD) $(LIBS)
2804 iq2000/$(am__dirstamp):
2805         @$(MKDIR_P) iq2000
2806         @: > iq2000/$(am__dirstamp)
2807
2808 iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp)
2809         @rm -f iq2000/run$(EXEEXT)
2810         $(AM_V_CCLD)$(LINK) $(iq2000_run_OBJECTS) $(iq2000_run_LDADD) $(LIBS)
2811 lm32/$(am__dirstamp):
2812         @$(MKDIR_P) lm32
2813         @: > lm32/$(am__dirstamp)
2814
2815 lm32/run$(EXEEXT): $(lm32_run_OBJECTS) $(lm32_run_DEPENDENCIES) $(EXTRA_lm32_run_DEPENDENCIES) lm32/$(am__dirstamp)
2816         @rm -f lm32/run$(EXEEXT)
2817         $(AM_V_CCLD)$(LINK) $(lm32_run_OBJECTS) $(lm32_run_LDADD) $(LIBS)
2818 m32c/$(am__dirstamp):
2819         @$(MKDIR_P) m32c
2820         @: > m32c/$(am__dirstamp)
2821 m32c/$(DEPDIR)/$(am__dirstamp):
2822         @$(MKDIR_P) m32c/$(DEPDIR)
2823         @: > m32c/$(DEPDIR)/$(am__dirstamp)
2824 m32c/opc2c.$(OBJEXT): m32c/$(am__dirstamp) \
2825         m32c/$(DEPDIR)/$(am__dirstamp)
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2827 @SIM_ENABLE_ARCH_m32c_FALSE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) $(EXTRA_m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
2828 @SIM_ENABLE_ARCH_m32c_FALSE@    @rm -f m32c/opc2c$(EXEEXT)
2829 @SIM_ENABLE_ARCH_m32c_FALSE@    $(AM_V_CCLD)$(LINK) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) $(LIBS)
2830
2831 m32c/run$(EXEEXT): $(m32c_run_OBJECTS) $(m32c_run_DEPENDENCIES) $(EXTRA_m32c_run_DEPENDENCIES) m32c/$(am__dirstamp)
2832         @rm -f m32c/run$(EXEEXT)
2833         $(AM_V_CCLD)$(LINK) $(m32c_run_OBJECTS) $(m32c_run_LDADD) $(LIBS)
2834 m32r/$(am__dirstamp):
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2836         @: > m32r/$(am__dirstamp)
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2838 m32r/run$(EXEEXT): $(m32r_run_OBJECTS) $(m32r_run_DEPENDENCIES) $(EXTRA_m32r_run_DEPENDENCIES) m32r/$(am__dirstamp)
2839         @rm -f m32r/run$(EXEEXT)
2840         $(AM_V_CCLD)$(LINK) $(m32r_run_OBJECTS) $(m32r_run_LDADD) $(LIBS)
2841 m68hc11/$(am__dirstamp):
2842         @$(MKDIR_P) m68hc11
2843         @: > m68hc11/$(am__dirstamp)
2844 m68hc11/$(DEPDIR)/$(am__dirstamp):
2845         @$(MKDIR_P) m68hc11/$(DEPDIR)
2846         @: > m68hc11/$(DEPDIR)/$(am__dirstamp)
2847 m68hc11/gencode.$(OBJEXT): m68hc11/$(am__dirstamp) \
2848         m68hc11/$(DEPDIR)/$(am__dirstamp)
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2850 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) $(EXTRA_m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
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2853
2854 m68hc11/run$(EXEEXT): $(m68hc11_run_OBJECTS) $(m68hc11_run_DEPENDENCIES) $(EXTRA_m68hc11_run_DEPENDENCIES) m68hc11/$(am__dirstamp)
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2856         $(AM_V_CCLD)$(LINK) $(m68hc11_run_OBJECTS) $(m68hc11_run_LDADD) $(LIBS)
2857 mcore/$(am__dirstamp):
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2861 mcore/run$(EXEEXT): $(mcore_run_OBJECTS) $(mcore_run_DEPENDENCIES) $(EXTRA_mcore_run_DEPENDENCIES) mcore/$(am__dirstamp)
2862         @rm -f mcore/run$(EXEEXT)
2863         $(AM_V_CCLD)$(LINK) $(mcore_run_OBJECTS) $(mcore_run_LDADD) $(LIBS)
2864 microblaze/$(am__dirstamp):
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2868 microblaze/run$(EXEEXT): $(microblaze_run_OBJECTS) $(microblaze_run_DEPENDENCIES) $(EXTRA_microblaze_run_DEPENDENCIES) microblaze/$(am__dirstamp)
2869         @rm -f microblaze/run$(EXEEXT)
2870         $(AM_V_CCLD)$(LINK) $(microblaze_run_OBJECTS) $(microblaze_run_LDADD) $(LIBS)
2871 mips/$(am__dirstamp):
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2875 mips/run$(EXEEXT): $(mips_run_OBJECTS) $(mips_run_DEPENDENCIES) $(EXTRA_mips_run_DEPENDENCIES) mips/$(am__dirstamp)
2876         @rm -f mips/run$(EXEEXT)
2877         $(AM_V_CCLD)$(LINK) $(mips_run_OBJECTS) $(mips_run_LDADD) $(LIBS)
2878 mn10300/$(am__dirstamp):
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2882 mn10300/run$(EXEEXT): $(mn10300_run_OBJECTS) $(mn10300_run_DEPENDENCIES) $(EXTRA_mn10300_run_DEPENDENCIES) mn10300/$(am__dirstamp)
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2885 moxie/$(am__dirstamp):
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2889 moxie/run$(EXEEXT): $(moxie_run_OBJECTS) $(moxie_run_DEPENDENCIES) $(EXTRA_moxie_run_DEPENDENCIES) moxie/$(am__dirstamp)
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2891         $(AM_V_CCLD)$(LINK) $(moxie_run_OBJECTS) $(moxie_run_LDADD) $(LIBS)
2892 msp430/$(am__dirstamp):
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2896 msp430/run$(EXEEXT): $(msp430_run_OBJECTS) $(msp430_run_DEPENDENCIES) $(EXTRA_msp430_run_DEPENDENCIES) msp430/$(am__dirstamp)
2897         @rm -f msp430/run$(EXEEXT)
2898         $(AM_V_CCLD)$(LINK) $(msp430_run_OBJECTS) $(msp430_run_LDADD) $(LIBS)
2899 or1k/$(am__dirstamp):
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2903 or1k/run$(EXEEXT): $(or1k_run_OBJECTS) $(or1k_run_DEPENDENCIES) $(EXTRA_or1k_run_DEPENDENCIES) or1k/$(am__dirstamp)
2904         @rm -f or1k/run$(EXEEXT)
2905         $(AM_V_CCLD)$(LINK) $(or1k_run_OBJECTS) $(or1k_run_LDADD) $(LIBS)
2906 ppc/$(am__dirstamp):
2907         @$(MKDIR_P) ppc
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2910         @$(MKDIR_P) ppc/$(DEPDIR)
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2914 @SIM_ENABLE_ARCH_ppc_FALSE@ppc/psim$(EXEEXT): $(ppc_psim_OBJECTS) $(ppc_psim_DEPENDENCIES) $(EXTRA_ppc_psim_DEPENDENCIES) ppc/$(am__dirstamp)
2915 @SIM_ENABLE_ARCH_ppc_FALSE@     @rm -f ppc/psim$(EXEEXT)
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2917
2918 ppc/run$(EXEEXT): $(ppc_run_OBJECTS) $(ppc_run_DEPENDENCIES) $(EXTRA_ppc_run_DEPENDENCIES) ppc/$(am__dirstamp)
2919         @rm -f ppc/run$(EXEEXT)
2920         $(AM_V_CCLD)$(LINK) $(ppc_run_OBJECTS) $(ppc_run_LDADD) $(LIBS)
2921 pru/$(am__dirstamp):
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2925 pru/run$(EXEEXT): $(pru_run_OBJECTS) $(pru_run_DEPENDENCIES) $(EXTRA_pru_run_DEPENDENCIES) pru/$(am__dirstamp)
2926         @rm -f pru/run$(EXEEXT)
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2932 riscv/run$(EXEEXT): $(riscv_run_OBJECTS) $(riscv_run_DEPENDENCIES) $(EXTRA_riscv_run_DEPENDENCIES) riscv/$(am__dirstamp)
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2935 rl78/$(am__dirstamp):
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2939 rl78/run$(EXEEXT): $(rl78_run_OBJECTS) $(rl78_run_DEPENDENCIES) $(EXTRA_rl78_run_DEPENDENCIES) rl78/$(am__dirstamp)
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2942 rx/$(am__dirstamp):
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2946 rx/run$(EXEEXT): $(rx_run_OBJECTS) $(rx_run_DEPENDENCIES) $(EXTRA_rx_run_DEPENDENCIES) rx/$(am__dirstamp)
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2949 sh/$(am__dirstamp):
2950         @$(MKDIR_P) sh
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2961 sh/run$(EXEEXT): $(sh_run_OBJECTS) $(sh_run_DEPENDENCIES) $(EXTRA_sh_run_DEPENDENCIES) sh/$(am__dirstamp)
2962         @rm -f sh/run$(EXEEXT)
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2964 testsuite/common/$(am__dirstamp):
2965         @$(MKDIR_P) testsuite/common
2966         @: > testsuite/common/$(am__dirstamp)
2967 testsuite/common/$(DEPDIR)/$(am__dirstamp):
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2990 v850/run$(EXEEXT): $(v850_run_OBJECTS) $(v850_run_DEPENDENCIES) $(EXTRA_v850_run_DEPENDENCIES) v850/$(am__dirstamp)
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3282 uninstall-pkgincludeHEADERS:
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3357 CTAGS: ctags
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3361           || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
3362              $$unique
3363
3364 GTAGS:
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3366           && $(am__cd) $(top_srcdir) \
3367           && gtags -i $(GTAGS_ARGS) "$$here"
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3370           || $(CSCOPE) -b -q $(AM_CSCOPEFLAGS) $(CSCOPEFLAGS) -i cscope.files $(CSCOPE_ARGS)
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3372         -rm -f cscope.files
3373 cscope.files: clean-cscope cscopelist
3374 cscopelist: cscopelist-recursive
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3376 cscopelist-am: $(am__tagged_files)
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3384             echo "$(subdir)/$$i"; \
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3386             echo "$$sdir/$$i"; \
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3389
3390 distclean-tags:
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3392         -rm -f cscope.out cscope.in.out cscope.po.out cscope.files
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3397         @echo '# edit the last section' >>site.tmp
3398         @echo 'set srcdir "$(srcdir)"' >>site.tmp
3399         @echo "set objdir `pwd`" >>site.tmp
3400         @echo 'set build_alias "$(build_alias)"' >>site.tmp
3401         @echo 'set build_triplet $(build_triplet)' >>site.tmp
3402         @echo 'set host_alias "$(host_alias)"' >>site.tmp
3403         @echo 'set host_triplet $(host_triplet)' >>site.tmp
3404         @echo 'set target_alias "$(target_alias)"' >>site.tmp
3405         @echo 'set target_triplet $(target_triplet)' >>site.tmp
3406         @list='$(EXTRA_DEJAGNU_SITE_CONFIG)'; for f in $$list; do \
3407           echo "## Begin content included from file $$f.  Do not modify. ##" \
3408            && cat `test -f "$$f" || echo '$(srcdir)/'`$$f \
3409            && echo "## End content included from file $$f. ##" \
3410            || exit 1; \
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3412         @echo "## End of auto-generated content; you can edit from here. ##" >> site.tmp
3413         @if test -f site.exp; then \
3414            sed -e '1,/^## End of auto-generated content.*##/d' site.exp >> site.tmp; \
3415          fi
3416         @-rm -f site.bak
3417         @test ! -f site.exp || mv site.exp site.bak
3418         @mv site.tmp site.exp
3419
3420 distclean-DEJAGNU:
3421         -rm -f site.exp site.bak
3422         -l='$(DEJATOOL)'; for tool in $$l; do \
3423           rm -f $$tool.sum $$tool.log; \
3424         done
3425
3426 # Recover from deleted '.trs' file; this should ensure that
3427 # "rm -f foo.log; make foo.trs" re-run 'foo.test', and re-create
3428 # both 'foo.log' and 'foo.trs'.  Break the recipe in two subshells
3429 # to avoid problems with "make -n".
3430 .log.trs:
3431         rm -f $< $@
3432         $(MAKE) $(AM_MAKEFLAGS) $<
3433
3434 # Leading 'am--fnord' is there to ensure the list of targets does not
3435 # expand to empty, as could happen e.g. with make check TESTS=''.
3436 am--fnord $(TEST_LOGS) $(TEST_LOGS:.log=.trs): $(am__force_recheck)
3437 am--force-recheck:
3438         @:
3439
3440 $(TEST_SUITE_LOG): $(TEST_LOGS)
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3447           redo_logs=`for i in $$redo_bases; do echo $$i.log; done`; \
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3450             rm -f $$redo_logs && rm -f $$redo_results || exit 1; \
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3453         if test -n "$$am__remaking_logs"; then \
3454           echo "fatal: making $(TEST_SUITE_LOG): possible infinite" \
3455                "recursion detected" >&2; \
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3457           am__remaking_logs=yes $(MAKE) $(AM_MAKEFLAGS) $$redo_logs; \
3458         fi; \
3459         if $(am__make_dryrun); then :; else \
3460           st=0;  \
3461           errmsg="fatal: making $(TEST_SUITE_LOG): failed to create"; \
3462           for i in $$redo_bases; do \
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3465             test -f $$i.log && test -r $$i.log \
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3473         test -n "$$results" || results=/dev/null; \
3474         all=`  grep "^$$ws*:test-result:"           $$results | wc -l`; \
3475         pass=` grep "^$$ws*:test-result:$$ws*PASS"  $$results | wc -l`; \
3476         fail=` grep "^$$ws*:test-result:$$ws*FAIL"  $$results | wc -l`; \
3477         skip=` grep "^$$ws*:test-result:$$ws*SKIP"  $$results | wc -l`; \
3478         xfail=`grep "^$$ws*:test-result:$$ws*XFAIL" $$results | wc -l`; \
3479         xpass=`grep "^$$ws*:test-result:$$ws*XPASS" $$results | wc -l`; \
3480         error=`grep "^$$ws*:test-result:$$ws*ERROR" $$results | wc -l`; \
3481         if test `expr $$fail + $$xpass + $$error` -eq 0; then \
3482           success=true; \
3483         else \
3484           success=false; \
3485         fi; \
3486         br='==================='; br=$$br$$br$$br$$br; \
3487         result_count () \
3488         { \
3489             if test x"$$1" = x"--maybe-color"; then \
3490               maybe_colorize=yes; \
3491             elif test x"$$1" = x"--no-color"; then \
3492               maybe_colorize=no; \
3493             else \
3494               echo "$@: invalid 'result_count' usage" >&2; exit 4; \
3495             fi; \
3496             shift; \
3497             desc=$$1 count=$$2; \
3498             if test $$maybe_colorize = yes && test $$count -gt 0; then \
3499               color_start=$$3 color_end=$$std; \
3500             else \
3501               color_start= color_end=; \
3502             fi; \
3503             echo "$${color_start}# $$desc $$count$${color_end}"; \
3504         }; \
3505         create_testsuite_report () \
3506         { \
3507           result_count $$1 "TOTAL:" $$all   "$$brg"; \
3508           result_count $$1 "PASS: " $$pass  "$$grn"; \
3509           result_count $$1 "SKIP: " $$skip  "$$blu"; \
3510           result_count $$1 "XFAIL:" $$xfail "$$lgn"; \
3511           result_count $$1 "FAIL: " $$fail  "$$red"; \
3512           result_count $$1 "XPASS:" $$xpass "$$red"; \
3513           result_count $$1 "ERROR:" $$error "$$mgn"; \
3514         }; \
3515         {                                                               \
3516           echo "$(PACKAGE_STRING): $(subdir)/$(TEST_SUITE_LOG)" |       \
3517             $(am__rst_title);                                           \
3518           create_testsuite_report --no-color;                           \
3519           echo;                                                         \
3520           echo ".. contents:: :depth: 2";                               \
3521           echo;                                                         \
3522           for b in $$bases; do echo $$b; done                           \
3523             | $(am__create_global_log);                                 \
3524         } >$(TEST_SUITE_LOG).tmp || exit 1;                             \
3525         mv $(TEST_SUITE_LOG).tmp $(TEST_SUITE_LOG);                     \
3526         if $$success; then                                              \
3527           col="$$grn";                                                  \
3528          else                                                           \
3529           col="$$red";                                                  \
3530           test x"$$VERBOSE" = x || cat $(TEST_SUITE_LOG);               \
3531         fi;                                                             \
3532         echo "$${col}$$br$${std}";                                      \
3533         echo "$${col}Testsuite summary for $(PACKAGE_STRING)$${std}";   \
3534         echo "$${col}$$br$${std}";                                      \
3535         create_testsuite_report --maybe-color;                          \
3536         echo "$$col$$br$$std";                                          \
3537         if $$success; then :; else                                      \
3538           echo "$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}";         \
3539           if test -n "$(PACKAGE_BUGREPORT)"; then                       \
3540             echo "$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \
3541           fi;                                                           \
3542           echo "$$col$$br$$std";                                        \
3543         fi;                                                             \
3544         $$success || exit 1
3545
3546 check-TESTS:
3547         @list='$(RECHECK_LOGS)';           test -z "$$list" || rm -f $$list
3548         @list='$(RECHECK_LOGS:.log=.trs)'; test -z "$$list" || rm -f $$list
3549         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
3550         @set +e; $(am__set_TESTS_bases); \
3551         log_list=`for i in $$bases; do echo $$i.log; done`; \
3552         trs_list=`for i in $$bases; do echo $$i.trs; done`; \
3553         log_list=`echo $$log_list`; trs_list=`echo $$trs_list`; \
3554         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) TEST_LOGS="$$log_list"; \
3555         exit $$?;
3556 recheck: all $(check_PROGRAMS)
3557         @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
3558         @set +e; $(am__set_TESTS_bases); \
3559         bases=`for i in $$bases; do echo $$i; done \
3560                  | $(am__list_recheck_tests)` || exit 1; \
3561         log_list=`for i in $$bases; do echo $$i.log; done`; \
3562         log_list=`echo $$log_list`; \
3563         $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) \
3564                 am__force_recheck=am--force-recheck \
3565                 TEST_LOGS="$$log_list"; \
3566         exit $$?
3567 testsuite/common/bits32m0.log: testsuite/common/bits32m0$(EXEEXT)
3568         @p='testsuite/common/bits32m0$(EXEEXT)'; \
3569         b='testsuite/common/bits32m0'; \
3570         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3571         --log-file $$b.log --trs-file $$b.trs \
3572         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3573         "$$tst" $(AM_TESTS_FD_REDIRECT)
3574 testsuite/common/bits32m31.log: testsuite/common/bits32m31$(EXEEXT)
3575         @p='testsuite/common/bits32m31$(EXEEXT)'; \
3576         b='testsuite/common/bits32m31'; \
3577         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3578         --log-file $$b.log --trs-file $$b.trs \
3579         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3580         "$$tst" $(AM_TESTS_FD_REDIRECT)
3581 testsuite/common/bits64m0.log: testsuite/common/bits64m0$(EXEEXT)
3582         @p='testsuite/common/bits64m0$(EXEEXT)'; \
3583         b='testsuite/common/bits64m0'; \
3584         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3585         --log-file $$b.log --trs-file $$b.trs \
3586         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3587         "$$tst" $(AM_TESTS_FD_REDIRECT)
3588 testsuite/common/bits64m63.log: testsuite/common/bits64m63$(EXEEXT)
3589         @p='testsuite/common/bits64m63$(EXEEXT)'; \
3590         b='testsuite/common/bits64m63'; \
3591         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3592         --log-file $$b.log --trs-file $$b.trs \
3593         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3594         "$$tst" $(AM_TESTS_FD_REDIRECT)
3595 testsuite/common/alu-tst.log: testsuite/common/alu-tst$(EXEEXT)
3596         @p='testsuite/common/alu-tst$(EXEEXT)'; \
3597         b='testsuite/common/alu-tst'; \
3598         $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3599         --log-file $$b.log --trs-file $$b.trs \
3600         $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3601         "$$tst" $(AM_TESTS_FD_REDIRECT)
3602 .test.log:
3603         @p='$<'; \
3604         $(am__set_b); \
3605         $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
3606         --log-file $$b.log --trs-file $$b.trs \
3607         $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
3608         "$$tst" $(AM_TESTS_FD_REDIRECT)
3609 @am__EXEEXT_TRUE@.test$(EXEEXT).log:
3610 @am__EXEEXT_TRUE@       @p='$<'; \
3611 @am__EXEEXT_TRUE@       $(am__set_b); \
3612 @am__EXEEXT_TRUE@       $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
3613 @am__EXEEXT_TRUE@       --log-file $$b.log --trs-file $$b.trs \
3614 @am__EXEEXT_TRUE@       $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
3615 @am__EXEEXT_TRUE@       "$$tst" $(AM_TESTS_FD_REDIRECT)
3616 check-am: all-am
3617         $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
3618         $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check-TESTS
3619 check: $(BUILT_SOURCES)
3620         $(MAKE) $(AM_MAKEFLAGS) check-recursive
3621 all-am: Makefile $(LIBRARIES) $(PROGRAMS) $(DATA) $(HEADERS) config.h
3622 installdirs: installdirs-recursive
3623 installdirs-am:
3624         for dir in "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \
3625           test -z "$$dir" || $(MKDIR_P) "$$dir"; \
3626         done
3627 install: $(BUILT_SOURCES)
3628         $(MAKE) $(AM_MAKEFLAGS) install-recursive
3629 install-exec: install-exec-recursive
3630 install-data: install-data-recursive
3631 uninstall: uninstall-recursive
3632
3633 install-am: all-am
3634         @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
3635
3636 installcheck: installcheck-recursive
3637 install-strip:
3638         if test -z '$(STRIP)'; then \
3639           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
3640             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
3641               install; \
3642         else \
3643           $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
3644             install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
3645             "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
3646         fi
3647 mostlyclean-generic:
3648         -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES)
3649         -test -z "$(TEST_LOGS)" || rm -f $(TEST_LOGS)
3650         -test -z "$(TEST_LOGS:.log=.trs)" || rm -f $(TEST_LOGS:.log=.trs)
3651         -test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
3652
3653 clean-generic:
3654         -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
3655
3656 distclean-generic:
3657         -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
3658         -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES)
3659         -rm -f aarch64/$(am__dirstamp)
3660         -rm -f arm/$(am__dirstamp)
3661         -rm -f avr/$(am__dirstamp)
3662         -rm -f bfin/$(am__dirstamp)
3663         -rm -f bpf/$(am__dirstamp)
3664         -rm -f common/$(DEPDIR)/$(am__dirstamp)
3665         -rm -f common/$(am__dirstamp)
3666         -rm -f cr16/$(DEPDIR)/$(am__dirstamp)
3667         -rm -f cr16/$(am__dirstamp)
3668         -rm -f cris/$(DEPDIR)/$(am__dirstamp)
3669         -rm -f cris/$(am__dirstamp)
3670         -rm -f d10v/$(DEPDIR)/$(am__dirstamp)
3671         -rm -f d10v/$(am__dirstamp)
3672         -rm -f erc32/$(DEPDIR)/$(am__dirstamp)
3673         -rm -f erc32/$(am__dirstamp)
3674         -rm -f example-synacor/$(am__dirstamp)
3675         -rm -f frv/$(am__dirstamp)
3676         -rm -f ft32/$(am__dirstamp)
3677         -rm -f h8300/$(am__dirstamp)
3678         -rm -f igen/$(DEPDIR)/$(am__dirstamp)
3679         -rm -f igen/$(am__dirstamp)
3680         -rm -f iq2000/$(am__dirstamp)
3681         -rm -f lm32/$(am__dirstamp)
3682         -rm -f m32c/$(DEPDIR)/$(am__dirstamp)
3683         -rm -f m32c/$(am__dirstamp)
3684         -rm -f m32r/$(am__dirstamp)
3685         -rm -f m68hc11/$(DEPDIR)/$(am__dirstamp)
3686         -rm -f m68hc11/$(am__dirstamp)
3687         -rm -f mcore/$(am__dirstamp)
3688         -rm -f microblaze/$(am__dirstamp)
3689         -rm -f mips/$(am__dirstamp)
3690         -rm -f mn10300/$(am__dirstamp)
3691         -rm -f moxie/$(am__dirstamp)
3692         -rm -f msp430/$(am__dirstamp)
3693         -rm -f or1k/$(am__dirstamp)
3694         -rm -f ppc/$(DEPDIR)/$(am__dirstamp)
3695         -rm -f ppc/$(am__dirstamp)
3696         -rm -f pru/$(am__dirstamp)
3697         -rm -f riscv/$(am__dirstamp)
3698         -rm -f rl78/$(am__dirstamp)
3699         -rm -f rx/$(am__dirstamp)
3700         -rm -f sh/$(DEPDIR)/$(am__dirstamp)
3701         -rm -f sh/$(am__dirstamp)
3702         -rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp)
3703         -rm -f testsuite/common/$(am__dirstamp)
3704         -rm -f v850/$(am__dirstamp)
3705         -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
3706
3707 maintainer-clean-generic:
3708         @echo "This command is intended for maintainers to use"
3709         @echo "it deletes files that may require special tools to rebuild."
3710         -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES)
3711 clean: clean-recursive
3712
3713 clean-am: clean-checkPROGRAMS clean-generic clean-libtool \
3714         clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
3715
3716 distclean: distclean-recursive
3717         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
3718         -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
3719         -rm -f Makefile
3720 distclean-am: clean-am distclean-DEJAGNU distclean-compile \
3721         distclean-generic distclean-hdr distclean-libtool \
3722         distclean-tags
3723
3724 dvi: dvi-recursive
3725
3726 dvi-am:
3727
3728 html: html-recursive
3729
3730 html-am:
3731
3732 info: info-recursive
3733
3734 info-am:
3735
3736 install-data-am: install-armdocDATA install-data-local install-dtbDATA \
3737         install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
3738         install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
3739
3740 install-dvi: install-dvi-recursive
3741
3742 install-dvi-am:
3743
3744 install-exec-am: install-exec-local
3745
3746 install-html: install-html-recursive
3747
3748 install-html-am:
3749
3750 install-info: install-info-recursive
3751
3752 install-info-am:
3753
3754 install-man:
3755
3756 install-pdf: install-pdf-recursive
3757
3758 install-pdf-am:
3759
3760 install-ps: install-ps-recursive
3761
3762 install-ps-am:
3763
3764 installcheck-am:
3765
3766 maintainer-clean: maintainer-clean-recursive
3767         -rm -f $(am__CONFIG_DISTCLEAN_FILES)
3768         -rm -rf $(top_srcdir)/autom4te.cache
3769         -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
3770         -rm -f Makefile
3771 maintainer-clean-am: distclean-am maintainer-clean-generic
3772
3773 mostlyclean: mostlyclean-recursive
3774
3775 mostlyclean-am: mostlyclean-compile mostlyclean-generic \
3776         mostlyclean-libtool
3777
3778 pdf: pdf-recursive
3779
3780 pdf-am:
3781
3782 ps: ps-recursive
3783
3784 ps-am:
3785
3786 uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \
3787         uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
3788         uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
3789         uninstall-ppcdocDATA uninstall-rxdocDATA
3790
3791 .MAKE: $(am__recursive_targets) all check check-am install install-am \
3792         install-strip
3793
3794 .PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
3795         am--refresh check check-DEJAGNU check-TESTS check-am clean \
3796         clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
3797         clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
3798         cscopelist-am ctags ctags-am distclean distclean-DEJAGNU \
3799         distclean-compile distclean-generic distclean-hdr \
3800         distclean-libtool distclean-tags dvi dvi-am html html-am info \
3801         info-am install install-am install-armdocDATA install-data \
3802         install-data-am install-data-local install-dtbDATA install-dvi \
3803         install-dvi-am install-erc32docDATA install-exec \
3804         install-exec-am install-exec-local install-frvdocDATA \
3805         install-html install-html-am install-info install-info-am \
3806         install-man install-or1kdocDATA install-pdf install-pdf-am \
3807         install-pkgincludeHEADERS install-ppcdocDATA install-ps \
3808         install-ps-am install-rxdocDATA install-strip installcheck \
3809         installcheck-am installdirs installdirs-am maintainer-clean \
3810         maintainer-clean-generic mostlyclean mostlyclean-compile \
3811         mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
3812         recheck tags tags-am uninstall uninstall-am \
3813         uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
3814         uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
3815         uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
3816         uninstall-rxdocDATA
3817
3818 .PRECIOUS: Makefile
3819
3820 @am__include@ @am__quote@$(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc@am__quote@
3821
3822 # Generate target constants for newlib/libgloss from its source tree.
3823 # This file is shipped with distributions so we build in the source dir.
3824 # Use `make nltvals' to rebuild.
3825 .PHONY: nltvals
3826 nltvals:
3827         $(srccom)/gennltvals.py --cpp "$(CPP)"
3828
3829 common/version.c: common/version.c-stamp ; @true
3830 common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
3831         $(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp
3832         $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=)
3833         $(AM_V_at)touch $@
3834
3835 # FIXME This is one very simple-minded way of generating the file hw-config.h.
3836 %/hw-config.h: %/stamp-hw ; @true
3837 %/stamp-hw: Makefile
3838         $(AM_V_GEN)set -e; \
3839         ( \
3840         sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
3841         echo "/* generated by Makefile */" ; \
3842         printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
3843         echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
3844         printf "  dv_%s_descriptor,\n" $$sim_hw ; \
3845         echo "  NULL," ; \
3846         echo "};" \
3847         ) > $@.tmp; \
3848         $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
3849         touch $@
3850 .PRECIOUS: %/stamp-hw
3851 %/modules.c:
3852         $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) GEN_MODULES_C_SRCS="$(GEN_MODULES_C_SRCS)" -C $(@D) $(@F)
3853
3854 # Alias for developers.
3855 @SIM_ENABLE_IGEN_TRUE@igen: $(IGEN)
3856
3857 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3858 @SIM_ENABLE_IGEN_TRUE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
3859 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_at)-rm -f $@
3860 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
3861 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_at)$(RANLIB_FOR_BUILD) $@
3862
3863 @SIM_ENABLE_IGEN_TRUE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
3864 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD)
3865
3866 # igen is a build-time only tool.  Override the default rules for it.
3867 @SIM_ENABLE_IGEN_TRUE@igen/%.o: igen/%.c
3868 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
3869
3870 # Build some of the files in standalone mode for developers of igen itself.
3871 @SIM_ENABLE_IGEN_TRUE@igen/%-main.o: igen/%.c
3872 @SIM_ENABLE_IGEN_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@
3873
3874 site-sim-config.exp: Makefile
3875         $(AM_V_GEN)( \
3876         echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
3877         echo "set builddir \"$(builddir)\""; \
3878         echo "set srcdir \"$(srcdir)/testsuite\""; \
3879         $(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \
3880         ) > $@
3881
3882 # Ignore dirs that only contain configuration settings.
3883 check/./config/%.exp: ; @true
3884 check/config/%.exp: ; @true
3885 check/./lib/%.exp: ; @true
3886 check/lib/%.exp: ; @true
3887
3888 check/%.exp:
3889         $(AM_V_at)mkdir -p testsuite/$*
3890         $(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp
3891
3892 check-DEJAGNU-parallel:
3893         $(AM_V_at)( \
3894         set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
3895         $(MAKE) -k `printf 'check/%s.exp ' $$@`; \
3896         ret=$$?; \
3897         set -- `printf 'testsuite/%s/ ' $$@`; \
3898         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh \
3899           `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \
3900         $(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \
3901           `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \
3902         echo; \
3903         $(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \
3904         exit $$ret)
3905
3906 check-DEJAGNU-single:
3907         $(AM_V_RUNTEST)$(DO_RUNTEST)
3908
3909 # If running a single job, invoking runtest once is faster & has nicer output.
3910 check-DEJAGNU: site.exp
3911         $(AM_V_at)(set -e; \
3912         EXPECT=${EXPECT} ; export EXPECT ; \
3913         runtest=$(RUNTEST); \
3914         if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
3915           case "$(MAKEFLAGS)" in \
3916           *-j*) $(MAKE) check-DEJAGNU-parallel;; \
3917           *)    $(MAKE) check-DEJAGNU-single;; \
3918           esac; \
3919         else \
3920           echo "WARNING: could not find \`runtest'" 1>&2; :;\
3921         fi)
3922
3923 # These tests are build-time only tools.  Override the default rules for them.
3924 testsuite/common/%.o: testsuite/common/%.c
3925         $(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@
3926
3927 testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3928         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD)
3929
3930 testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3931         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD)
3932
3933 testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3934         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD)
3935
3936 testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3937         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD)
3938
3939 testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
3940         $(AM_V_GEN)$< 32 0 big > $@.tmp
3941         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
3942         $(AM_V_at)mv $@.tmp $@
3943
3944 testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3945         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD)
3946
3947 testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
3948         $(AM_V_GEN)$< 32 31 little > $@.tmp
3949         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
3950         $(AM_V_at)mv $@.tmp $@
3951
3952 testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3953         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD)
3954
3955 testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
3956         $(AM_V_GEN)$< 64 0 big > $@.tmp
3957         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
3958         $(AM_V_at)mv $@.tmp $@
3959
3960 testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
3961         $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)
3962
3963 testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
3964         $(AM_V_GEN)$< 64 63 little > $@.tmp
3965         $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
3966         $(AM_V_at)mv $@.tmp $@
3967 @SIM_ENABLE_ARCH_aarch64_TRUE@$(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD): aarch64/hw-config.h
3968
3969 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: aarch64/%.c
3970 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
3971
3972 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: common/%.c
3973 @SIM_ENABLE_ARCH_aarch64_TRUE@  $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
3974 @SIM_ENABLE_ARCH_arm_TRUE@$(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD): arm/hw-config.h
3975
3976 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: arm/%.c
3977 @SIM_ENABLE_ARCH_arm_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
3978
3979 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c
3980 @SIM_ENABLE_ARCH_arm_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
3981 @SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h
3982
3983 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: avr/%.c
3984 @SIM_ENABLE_ARCH_avr_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
3985
3986 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c
3987 @SIM_ENABLE_ARCH_avr_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
3988 @SIM_ENABLE_ARCH_bfin_TRUE@$(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD): bfin/hw-config.h
3989
3990 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: bfin/%.c
3991 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
3992
3993 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: common/%.c
3994 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
3995
3996 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp)
3997 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o
3998 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)(\
3999 @SIM_ENABLE_ARCH_bfin_TRUE@             set -e; \
4000 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s.  */"; \
4001 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "static const unsigned char bfin_linux_fixed_code[] ="; \
4002 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "{"; \
4003 @SIM_ENABLE_ARCH_bfin_TRUE@             $(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \
4004 @SIM_ENABLE_ARCH_bfin_TRUE@             sed -n \
4005 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e 's:^[^       ]*      :0x:' \
4006 @SIM_ENABLE_ARCH_bfin_TRUE@                     -e '/^0x/{s:    .*::;s: *$$:,:;s: :, 0x:g;p;}' \
4007 @SIM_ENABLE_ARCH_bfin_TRUE@                     $@.dis; \
4008 @SIM_ENABLE_ARCH_bfin_TRUE@             rm -f $@.dis; \
4009 @SIM_ENABLE_ARCH_bfin_TRUE@             echo "};" \
4010 @SIM_ENABLE_ARCH_bfin_TRUE@     ) > $@.tmp
4011 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h
4012 @SIM_ENABLE_ARCH_bfin_TRUE@     $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h
4013 @SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h
4014
4015 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: bpf/%.c
4016 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4017
4018 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c
4019 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4020 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS)
4021
4022 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
4023 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
4024 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4025 @SIM_ENABLE_ARCH_bpf_TRUE@              -mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
4026 @SIM_ENABLE_ARCH_bpf_TRUE@              -infile $(srcdir)/bpf/mloop.in \
4027 @SIM_ENABLE_ARCH_bpf_TRUE@              -outfile-prefix bpf/ -outfile-suffix -le
4028 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
4029 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
4030 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)touch $@
4031
4032 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
4033 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
4034 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4035 @SIM_ENABLE_ARCH_bpf_TRUE@              -mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
4036 @SIM_ENABLE_ARCH_bpf_TRUE@              -infile $(srcdir)/bpf/mloop.in \
4037 @SIM_ENABLE_ARCH_bpf_TRUE@              -outfile-prefix bpf/ -outfile-suffix -be
4038 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
4039 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
4040 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)touch $@
4041
4042 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen: bpf/cgen-arch bpf/cgen-cpu bpf/cgen-defs-le bpf/cgen-defs-be bpf/cgen-decode-le bpf/cgen-decode-be
4043
4044 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-arch:
4045 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)mach=bpf cpu=bpfbf FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4046 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/arch.h bpf/arch.c bpf/cpuall.h: @CGEN_MAINT@ bpf/cgen-arch
4047
4048 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-cpu:
4049 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf FLAGS="with-multiple-isa with-scache"; $(CGEN_GEN_CPU)
4050 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_at)rm -f $(srcdir)/bpf/model.c
4051 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cpu.h bpf/cpu.c bpf/model.c: @CGEN_MAINT@ bpf/cgen-cpu
4052
4053 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-le:
4054 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le"; $(CGEN_GEN_DEFS)
4055 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-le.h: @CGEN_MAINT@ bpf/cgen-defs-le
4056
4057 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-be:
4058 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be"; $(CGEN_GEN_DEFS)
4059 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-be.h: @CGEN_MAINT@ bpf/cgen-defs-be
4060
4061 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-le:
4062 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4063 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-le.c bpf/decode-le.c bpf/decode-le.h: @CGEN_MAINT@ bpf/cgen-decode-vle
4064
4065 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-be:
4066 @SIM_ENABLE_ARCH_bpf_TRUE@      $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4067 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @CGEN_MAINT@ bpf/cgen-decode-be
4068 @SIM_ENABLE_ARCH_cr16_TRUE@$(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD): cr16/hw-config.h
4069
4070 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: cr16/%.c
4071 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4072
4073 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: common/%.c
4074 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4075 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS)
4076
4077 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4078 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
4079 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)
4080
4081 # gencode is a build-time only tool.  Override the default rules for it.
4082 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
4083 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4084 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
4085 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4086
4087 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
4088 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< -h >$@
4089
4090 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
4091 @SIM_ENABLE_ARCH_cr16_TRUE@     $(AM_V_GEN)$< >$@
4092 @SIM_ENABLE_ARCH_cris_TRUE@$(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD): cris/hw-config.h
4093
4094 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: cris/%.c
4095 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4096
4097 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c
4098 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4099 @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
4100
4101 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
4102 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
4103 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4104 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv10f-switch.c \
4105 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv10f \
4106 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
4107 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
4108 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
4109 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
4110
4111 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
4112 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
4113 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4114 @SIM_ENABLE_ARCH_cris_TRUE@             -mono -no-fast -pbb -switch semcrisv32f-switch.c \
4115 @SIM_ENABLE_ARCH_cris_TRUE@             -cpu crisv32f \
4116 @SIM_ENABLE_ARCH_cris_TRUE@             -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
4117 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
4118 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
4119 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)touch $@
4120
4121 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen: cris/cgen-arch cris/cgen-cpu-decode-v10f cris/cgen-cpu-decode-v32f
4122
4123 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-arch:
4124 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4125 @SIM_ENABLE_ARCH_cris_TRUE@cris/arch.h cris/arch.c cris/cpuall.h: @CGEN_MAINT@ cris/cgen-arch
4126
4127 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v10f:
4128 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4129 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv10-switch.c $(srcdir)/cris/semcrisv10f-switch.c
4130 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv10.h cris/cpuv10.c cris/semcrisv10f-switch.c cris/modelv10.c cris/decodev10.c cris/decodev10.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v10f
4131
4132 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v32f:
4133 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4134 @SIM_ENABLE_ARCH_cris_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c
4135 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-switch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f
4136 @SIM_ENABLE_ARCH_d10v_TRUE@$(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD): d10v/hw-config.h
4137
4138 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: d10v/%.c
4139 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4140
4141 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: common/%.c
4142 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4143 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS)
4144
4145 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4146 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
4147 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)
4148
4149 # gencode is a build-time only tool.  Override the default rules for it.
4150 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
4151 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4152 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
4153 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4154
4155 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
4156 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< -h >$@
4157
4158 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
4159 @SIM_ENABLE_ARCH_d10v_TRUE@     $(AM_V_GEN)$< >$@
4160 @SIM_ENABLE_ARCH_erc32_TRUE@$(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD): erc32/hw-config.h
4161
4162 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: erc32/%.c
4163 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4164
4165 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: common/%.c
4166 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4167
4168 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
4169 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
4170 @SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
4171 @SIM_ENABLE_ARCH_erc32_TRUE@    $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
4172 @SIM_ENABLE_ARCH_erc32_TRUE@    n=`echo sis | sed '$(program_transform_name)'`; \
4173 @SIM_ENABLE_ARCH_erc32_TRUE@    $(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
4174 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
4175 @SIM_ENABLE_ARCH_erc32_TRUE@    rm -f $(DESTDIR)$(bindir)/sis
4176 @SIM_ENABLE_ARCH_examples_TRUE@$(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD): example-synacor/hw-config.h
4177
4178 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: example-synacor/%.c
4179 @SIM_ENABLE_ARCH_examples_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4180
4181 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: common/%.c
4182 @SIM_ENABLE_ARCH_examples_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4183 @SIM_ENABLE_ARCH_frv_TRUE@$(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD): frv/hw-config.h
4184
4185 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: frv/%.c
4186 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4187
4188 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: common/%.c
4189 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4190 @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS)
4191
4192 @SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
4193 @SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
4194 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4195 @SIM_ENABLE_ARCH_frv_TRUE@              -mono -scache -parallel-generic-write -parallel-only \
4196 @SIM_ENABLE_ARCH_frv_TRUE@              -cpu frvbf \
4197 @SIM_ENABLE_ARCH_frv_TRUE@              -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
4198 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
4199 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
4200 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_at)touch $@
4201
4202 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen: frv/cgen-arch frv/cgen-cpu-decode
4203
4204 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-arch:
4205 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4206 @SIM_ENABLE_ARCH_frv_TRUE@frv/arch.h frv/arch.c frv/cpuall.h: @CGEN_MAINT@ frv/cgen-arch
4207
4208 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode:
4209 @SIM_ENABLE_ARCH_frv_TRUE@      $(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE)
4210 @SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode
4211 @SIM_ENABLE_ARCH_ft32_TRUE@$(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD): ft32/hw-config.h
4212
4213 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: ft32/%.c
4214 @SIM_ENABLE_ARCH_ft32_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4215
4216 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: common/%.c
4217 @SIM_ENABLE_ARCH_ft32_TRUE@     $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4218 @SIM_ENABLE_ARCH_h8300_TRUE@$(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD): h8300/hw-config.h
4219
4220 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: h8300/%.c
4221 @SIM_ENABLE_ARCH_h8300_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4222
4223 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: common/%.c
4224 @SIM_ENABLE_ARCH_h8300_TRUE@    $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4225 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS)
4226
4227 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
4228 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
4229 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4230 @SIM_ENABLE_ARCH_iq2000_TRUE@           -mono -fast -pbb -switch sem-switch.c \
4231 @SIM_ENABLE_ARCH_iq2000_TRUE@           -cpu iq2000bf \
4232 @SIM_ENABLE_ARCH_iq2000_TRUE@           -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
4233 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
4234 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
4235 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_at)touch $@
4236
4237 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode
4238
4239 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch:
4240 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4241 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/arch.h iq2000/arch.c iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch
4242
4243 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode:
4244 @SIM_ENABLE_ARCH_iq2000_TRUE@   $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4245 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode
4246 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS)
4247
4248 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
4249 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
4250 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4251 @SIM_ENABLE_ARCH_lm32_TRUE@             -mono -fast -pbb -switch sem-switch.c \
4252 @SIM_ENABLE_ARCH_lm32_TRUE@             -cpu lm32bf \
4253 @SIM_ENABLE_ARCH_lm32_TRUE@             -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
4254 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
4255 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
4256 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_at)touch $@
4257
4258 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode
4259
4260 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch:
4261 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4262 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/arch.h lm32/arch.c lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch
4263
4264 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode:
4265 @SIM_ENABLE_ARCH_lm32_TRUE@     $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4266 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode
4267
4268 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: m32c/%.c | m32c/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
4269 @SIM_ENABLE_ARCH_m32c_TRUE@     $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4270 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS)
4271
4272 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4273 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
4274 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)
4275
4276 # opc2c is a build-time only tool.  Override the default rules for it.
4277 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
4278 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4279
4280 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
4281 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
4282 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
4283
4284 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
4285 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
4286 @SIM_ENABLE_ARCH_m32c_TRUE@     $(AM_V_at)mv $@.tmp $@
4287 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS)
4288
4289 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
4290 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
4291 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4292 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -fast -pbb -switch sem-switch.c \
4293 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rbf \
4294 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
4295 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
4296 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
4297 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
4298
4299 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop ; @true
4300 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
4301 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4302 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
4303 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32rxf \
4304 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
4305 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
4306 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
4307 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
4308
4309 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop ; @true
4310 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
4311 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4312 @SIM_ENABLE_ARCH_m32r_TRUE@             -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
4313 @SIM_ENABLE_ARCH_m32r_TRUE@             -cpu m32r2f \
4314 @SIM_ENABLE_ARCH_m32r_TRUE@             -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
4315 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
4316 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
4317 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_at)touch $@
4318
4319 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2
4320
4321 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch:
4322 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4323 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/arch.h m32r/arch.c m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch
4324
4325 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode:
4326 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4327 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu.h m32r/sem.c m32r/sem-switch.c m32r/model.c m32r/decode.c m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode
4328
4329 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x:
4330 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4331 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpux.h m32r/semx-switch.c m32r/modelx.c m32r/decodex.c m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x
4332
4333 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2:
4334 @SIM_ENABLE_ARCH_m32r_TRUE@     $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4335 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2
4336 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
4337
4338 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4339 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
4340 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)
4341
4342 # gencode is a build-time only tool.  Override the default rules for it.
4343 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
4344 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4345
4346 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
4347 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6811 >$@
4348
4349 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
4350 @SIM_ENABLE_ARCH_m68hc11_TRUE@  $(AM_V_GEN)$< -m6812 >$@
4351 @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS)
4352
4353 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
4354 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single
4355 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16
4356 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32
4357 @SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run
4358
4359 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
4360 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
4361 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
4362 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
4363 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
4364 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
4365 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnowidth \
4366 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnounimplemented \
4367 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
4368 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
4369 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
4370 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
4371 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.h    -ht mips/itable.h \
4372 @SIM_ENABLE_ARCH_mips_TRUE@             -n itable.c    -t  mips/itable.c
4373 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
4374
4375 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
4376 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
4377 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
4378 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
4379 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
4380 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
4381 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
4382 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
4383 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
4384 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
4385 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
4386 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
4387 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
4388 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
4389 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.h    -hc mips/icache.h \
4390 @SIM_ENABLE_ARCH_mips_TRUE@             -n icache.c    -c  mips/icache.c \
4391 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.h -hs mips/semantics.h \
4392 @SIM_ENABLE_ARCH_mips_TRUE@             -n semantics.c -s  mips/semantics.c \
4393 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.h   -hd mips/idecode.h \
4394 @SIM_ENABLE_ARCH_mips_TRUE@             -n idecode.c   -d  mips/idecode.c \
4395 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.h     -hm mips/model.h \
4396 @SIM_ENABLE_ARCH_mips_TRUE@             -n model.c     -m  mips/model.c \
4397 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.h   -hf mips/support.h \
4398 @SIM_ENABLE_ARCH_mips_TRUE@             -n support.c   -f  mips/support.c \
4399 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.h    -he mips/engine.h \
4400 @SIM_ENABLE_ARCH_mips_TRUE@             -n engine.c    -e  mips/engine.c \
4401 @SIM_ENABLE_ARCH_mips_TRUE@             -n irun.c      -r  mips/irun.c
4402 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
4403
4404 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m16: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_M16_DC) $(IGEN)
4405 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
4406 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
4407 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
4408 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
4409 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
4410 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_M16_FLAGS) \
4411 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
4412 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
4413 @SIM_ENABLE_ARCH_mips_TRUE@             -B 16 \
4414 @SIM_ENABLE_ARCH_mips_TRUE@             -H 15 \
4415 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
4416 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_M16_DC) \
4417 @SIM_ENABLE_ARCH_mips_TRUE@             -P m16_ \
4418 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
4419 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.h    -hc mips/m16_icache.h \
4420 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_icache.c    -c  mips/m16_icache.c \
4421 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.h -hs mips/m16_semantics.h \
4422 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_semantics.c -s  mips/m16_semantics.c \
4423 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.h   -hd mips/m16_idecode.h \
4424 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_idecode.c   -d  mips/m16_idecode.c \
4425 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.h     -hm mips/m16_model.h \
4426 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_model.c     -m  mips/m16_model.c \
4427 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.h   -hf mips/m16_support.h \
4428 @SIM_ENABLE_ARCH_mips_TRUE@             -n m16_support.c   -f  mips/m16_support.c
4429 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
4430
4431 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m32: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
4432 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
4433 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
4434 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
4435 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
4436 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
4437 @SIM_ENABLE_ARCH_mips_TRUE@             $(SIM_MIPS_SINGLE_FLAGS) \
4438 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
4439 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
4440 @SIM_ENABLE_ARCH_mips_TRUE@             -B 32 \
4441 @SIM_ENABLE_ARCH_mips_TRUE@             -H 31 \
4442 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
4443 @SIM_ENABLE_ARCH_mips_TRUE@             -o $(mips_IGEN_DC) \
4444 @SIM_ENABLE_ARCH_mips_TRUE@             -P m32_ \
4445 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
4446 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.h    -hc mips/m32_icache.h \
4447 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_icache.c    -c  mips/m32_icache.c \
4448 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.h -hs mips/m32_semantics.h \
4449 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_semantics.c -s  mips/m32_semantics.c \
4450 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.h   -hd mips/m32_idecode.h \
4451 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_idecode.c   -d  mips/m32_idecode.c \
4452 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.h     -hm mips/m32_model.h \
4453 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_model.c     -m  mips/m32_model.c \
4454 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.h   -hf mips/m32_support.h \
4455 @SIM_ENABLE_ARCH_mips_TRUE@             -n m32_support.c   -f  mips/m32_support.c
4456 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
4457
4458 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN)
4459 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
4460 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
4461 @SIM_ENABLE_ARCH_mips_TRUE@       p=`echo $${t} | sed -e 's/:.*//'` ; \
4462 @SIM_ENABLE_ARCH_mips_TRUE@       m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
4463 @SIM_ENABLE_ARCH_mips_TRUE@       f=`echo $${t} | sed -e 's/.*://'` ; \
4464 @SIM_ENABLE_ARCH_mips_TRUE@       case $${p} in \
4465 @SIM_ENABLE_ARCH_mips_TRUE@         micromips16*) \
4466 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
4467 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32* | micromips64*) \
4468 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
4469 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m32*) \
4470 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
4471 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
4472 @SIM_ENABLE_ARCH_mips_TRUE@         micromips_m64*) \
4473 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
4474 @SIM_ENABLE_ARCH_mips_TRUE@           m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
4475 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
4476 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
4477 @SIM_ENABLE_ARCH_mips_TRUE@         *) \
4478 @SIM_ENABLE_ARCH_mips_TRUE@           e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
4479 @SIM_ENABLE_ARCH_mips_TRUE@       esac; \
4480 @SIM_ENABLE_ARCH_mips_TRUE@       $(IGEN_RUN) \
4481 @SIM_ENABLE_ARCH_mips_TRUE@             $(mips_IGEN_TRACE) \
4482 @SIM_ENABLE_ARCH_mips_TRUE@             $${e} \
4483 @SIM_ENABLE_ARCH_mips_TRUE@             -I $(srcdir)/mips \
4484 @SIM_ENABLE_ARCH_mips_TRUE@             -Werror \
4485 @SIM_ENABLE_ARCH_mips_TRUE@             -Wnodiscard \
4486 @SIM_ENABLE_ARCH_mips_TRUE@             -M $${m} \
4487 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-direct-access \
4488 @SIM_ENABLE_ARCH_mips_TRUE@             -G gen-zero-r0 \
4489 @SIM_ENABLE_ARCH_mips_TRUE@             -i $(mips_IGEN_INSN) \
4490 @SIM_ENABLE_ARCH_mips_TRUE@             -P $${p}_ \
4491 @SIM_ENABLE_ARCH_mips_TRUE@             -x \
4492 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.h    -hc mips/$${p}_icache.h \
4493 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_icache.c    -c  mips/$${p}_icache.c \
4494 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.h -hs mips/$${p}_semantics.h \
4495 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_semantics.c -s  mips/$${p}_semantics.c \
4496 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.h   -hd mips/$${p}_idecode.h \
4497 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_idecode.c   -d  mips/$${p}_idecode.c \
4498 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.h     -hm mips/$${p}_model.h \
4499 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_model.c     -m  mips/$${p}_model.c \
4500 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.h   -hf mips/$${p}_support.h \
4501 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_support.c   -f  mips/$${p}_support.c \
4502 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.h    -he mips/$${p}_engine.h \
4503 @SIM_ENABLE_ARCH_mips_TRUE@             -n $${p}_engine.c    -e  mips/$${p}_engine.c \
4504 @SIM_ENABLE_ARCH_mips_TRUE@         || exit; \
4505 @SIM_ENABLE_ARCH_mips_TRUE@     done
4506 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
4507
4508 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c
4509 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_GEN)\
4510 @SIM_ENABLE_ARCH_mips_TRUE@     for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
4511 @SIM_ENABLE_ARCH_mips_TRUE@       case $${t} in \
4512 @SIM_ENABLE_ARCH_mips_TRUE@         m16*) \
4513 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
4514 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/m16$${m}_run.c; \
4515 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/m16run.c > $$o.tmp \
4516 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/m16$${m}_/" \
4517 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/m16$${m}_engine/" \
4518 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m16_/m16$${m}_/" \
4519 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
4520 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
4521 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
4522 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
4523 @SIM_ENABLE_ARCH_mips_TRUE@         micromips32*) \
4524 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
4525 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
4526 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
4527 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips32$${m}_/" \
4528 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips32$${m}_engine/" \
4529 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
4530 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips32$${m}_/" \
4531 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m32$${m}_/" \
4532 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
4533 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
4534 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
4535 @SIM_ENABLE_ARCH_mips_TRUE@         micromips64*) \
4536 @SIM_ENABLE_ARCH_mips_TRUE@           m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
4537 @SIM_ENABLE_ARCH_mips_TRUE@           o=mips/micromips$${m}_run.c; \
4538 @SIM_ENABLE_ARCH_mips_TRUE@           sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
4539 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/^sim_/micromips64$${m}_/" \
4540 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "/include/s/sim-engine/micromips64$${m}_engine/" \
4541 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips16_/micromips16$${m}_/" \
4542 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/micromips32_/micromips64$${m}_/" \
4543 @SIM_ENABLE_ARCH_mips_TRUE@                 -e "s/m32_/m64$${m}_/" \
4544 @SIM_ENABLE_ARCH_mips_TRUE@                 || exit 1; \
4545 @SIM_ENABLE_ARCH_mips_TRUE@           $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
4546 @SIM_ENABLE_ARCH_mips_TRUE@           ;;\
4547 @SIM_ENABLE_ARCH_mips_TRUE@       esac \
4548 @SIM_ENABLE_ARCH_mips_TRUE@     done
4549 @SIM_ENABLE_ARCH_mips_TRUE@     $(AM_V_at)touch $@
4550 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS)
4551
4552 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
4553 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
4554 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_GEN)$(IGEN_RUN) \
4555 @SIM_ENABLE_ARCH_mn10300_TRUE@          $(mn10300_IGEN_TRACE) \
4556 @SIM_ENABLE_ARCH_mn10300_TRUE@          -G gen-direct-access \
4557 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M mn10300,am33 -G gen-multi-sim=am33 \
4558 @SIM_ENABLE_ARCH_mn10300_TRUE@          -M am33_2 \
4559 @SIM_ENABLE_ARCH_mn10300_TRUE@          -I $(srcdir)/mn10300 \
4560 @SIM_ENABLE_ARCH_mn10300_TRUE@          -i $(mn10300_IGEN_INSN) \
4561 @SIM_ENABLE_ARCH_mn10300_TRUE@          -o $(mn10300_IGEN_DC) \
4562 @SIM_ENABLE_ARCH_mn10300_TRUE@          -x \
4563 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.h    -hc mn10300/icache.h \
4564 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n icache.c    -c  mn10300/icache.c \
4565 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.h -hs mn10300/semantics.h \
4566 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n semantics.c -s  mn10300/semantics.c \
4567 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.h   -hd mn10300/idecode.h \
4568 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n idecode.c   -d  mn10300/idecode.c \
4569 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.h     -hm mn10300/model.h \
4570 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n model.c     -m  mn10300/model.c \
4571 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.h   -hf mn10300/support.h \
4572 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n support.c   -f  mn10300/support.c \
4573 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.h    -ht mn10300/itable.h \
4574 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n itable.c    -t  mn10300/itable.c \
4575 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.h    -he mn10300/engine.h \
4576 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n engine.c    -e  mn10300/engine.c \
4577 @SIM_ENABLE_ARCH_mn10300_TRUE@          -n irun.c      -r  mn10300/irun.c
4578 @SIM_ENABLE_ARCH_mn10300_TRUE@  $(AM_V_at)touch $@
4579
4580 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
4581 @SIM_ENABLE_ARCH_moxie_TRUE@    $(AM_V_GEN) \
4582 @SIM_ENABLE_ARCH_moxie_TRUE@    if test "x$(DTC)" != x; then \
4583 @SIM_ENABLE_ARCH_moxie_TRUE@      $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
4584 @SIM_ENABLE_ARCH_moxie_TRUE@      $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
4585 @SIM_ENABLE_ARCH_moxie_TRUE@      touch ${srcdir}/moxie/moxie-gdb.dtb; \
4586 @SIM_ENABLE_ARCH_moxie_TRUE@    else \
4587 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "Could not update the moxie-gdb.dtb file because the device "; \
4588 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "tree compiler tool (dtc) is missing.  Install the tool to "; \
4589 @SIM_ENABLE_ARCH_moxie_TRUE@      echo "update the device tree blob."; \
4590 @SIM_ENABLE_ARCH_moxie_TRUE@    fi
4591 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS)
4592
4593 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
4594 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
4595 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4596 @SIM_ENABLE_ARCH_or1k_TRUE@             -mono -fast -pbb -switch sem-switch.c \
4597 @SIM_ENABLE_ARCH_or1k_TRUE@             -cpu or1k32bf \
4598 @SIM_ENABLE_ARCH_or1k_TRUE@             -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
4599 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
4600 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
4601 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_at)touch $@
4602
4603 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode
4604
4605 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch:
4606 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4607 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/arch.h or1k/arch.c or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch
4608
4609 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode:
4610 @SIM_ENABLE_ARCH_or1k_TRUE@     $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4611 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cpu.h or1k/cpu.c or1k/model.c or1k/sem.c or1k/sem-switch.c or1k/decode.c or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode
4612
4613 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/psim$(EXEEXT): ppc/run$(EXEEXT)
4614 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
4615
4616 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
4617 @SIM_ENABLE_ARCH_ppc_TRUE@      $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4618
4619 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
4620 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp
4621 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
4622 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.c
4623
4624 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
4625 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp
4626 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
4627 @SIM_ENABLE_ARCH_ppc_TRUE@      $(AM_V_at)touch $(srcdir)/ppc/spreg.h
4628
4629 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: rl78/%.c | rl78/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
4630 @SIM_ENABLE_ARCH_rl78_TRUE@     $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4631
4632 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: rx/%.c | rx/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
4633 @SIM_ENABLE_ARCH_rx_TRUE@       $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4634 @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS)
4635
4636 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4637 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
4638 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)
4639
4640 # gencode is a build-time only tool.  Override the default rules for it.
4641 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
4642 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4643
4644 @SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
4645 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -x >$@
4646
4647 @SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
4648 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -p >$@
4649
4650 @SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
4651 @SIM_ENABLE_ARCH_sh_TRUE@       $(AM_V_GEN)$< -s >$@
4652 @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS)
4653
4654 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
4655 @SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
4656 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_GEN)$(IGEN_RUN) \
4657 @SIM_ENABLE_ARCH_v850_TRUE@             $(v850_IGEN_TRACE) \
4658 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-direct-access \
4659 @SIM_ENABLE_ARCH_v850_TRUE@             -G gen-zero-r0 \
4660 @SIM_ENABLE_ARCH_v850_TRUE@             -i $(v850_IGEN_INSN) \
4661 @SIM_ENABLE_ARCH_v850_TRUE@             -o $(v850_IGEN_DC) \
4662 @SIM_ENABLE_ARCH_v850_TRUE@             -x \
4663 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.h    -hc v850/icache.h \
4664 @SIM_ENABLE_ARCH_v850_TRUE@             -n icache.c    -c  v850/icache.c \
4665 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.h -hs v850/semantics.h \
4666 @SIM_ENABLE_ARCH_v850_TRUE@             -n semantics.c -s  v850/semantics.c \
4667 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.h   -hd v850/idecode.h \
4668 @SIM_ENABLE_ARCH_v850_TRUE@             -n idecode.c   -d  v850/idecode.c \
4669 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.h     -hm v850/model.h \
4670 @SIM_ENABLE_ARCH_v850_TRUE@             -n model.c     -m  v850/model.c \
4671 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.h   -hf v850/support.h \
4672 @SIM_ENABLE_ARCH_v850_TRUE@             -n support.c   -f  v850/support.c \
4673 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.h    -ht v850/itable.h \
4674 @SIM_ENABLE_ARCH_v850_TRUE@             -n itable.c    -t  v850/itable.c \
4675 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.h    -he v850/engine.h \
4676 @SIM_ENABLE_ARCH_v850_TRUE@             -n engine.c    -e  v850/engine.c \
4677 @SIM_ENABLE_ARCH_v850_TRUE@             -n irun.c      -r  v850/irun.c
4678 @SIM_ENABLE_ARCH_v850_TRUE@     $(AM_V_at)touch $@
4679
4680 %/libsim.a: | $(SIM_ALL_RECURSIVE_DEPS)
4681         $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4682
4683 %/nrun.o: common/nrun.c | %/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
4684         $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4685
4686 all-recursive: $(SIM_ALL_RECURSIVE_DEPS)
4687
4688 install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
4689         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
4690         lib=`echo sim | sed '$(program_transform_name)'`; \
4691         for d in $(SIM_ENABLED_ARCHES); do \
4692                 n="$$lib"; \
4693                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
4694                 n="lib$$n.a"; \
4695                 $(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
4696         done
4697
4698 install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
4699         $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
4700         run=`echo run | sed '$(program_transform_name)'`; \
4701         for d in $(SIM_ENABLED_ARCHES); do \
4702                 n="$$run"; \
4703                 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
4704                 $(LIBTOOL) --mode=install \
4705                         $(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
4706         done
4707
4708 uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
4709         rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
4710         for d in $(SIM_ENABLED_ARCHES); do \
4711                 rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
4712         done
4713
4714 # Tell versions [3.59,3.63) of GNU make to not export all variables.
4715 # Otherwise a system limit (for SysV at least) may be exceeded.
4716 .NOEXPORT: