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337 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_9
= cris
/rvdummy
$(EXEEXT
)
338 @SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_10
= aarch64
/run
$(EXEEXT
)
339 @SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_11
= arm
/run
$(EXEEXT
)
340 @SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_12
= avr
/run
$(EXEEXT
)
341 @SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_13
= bfin
/run
$(EXEEXT
)
342 @SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_14
= bpf
/run
$(EXEEXT
)
343 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_15
= cr16
/run
$(EXEEXT
)
344 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_16
= cris
/run
$(EXEEXT
)
345 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_17
= d10v
/run
$(EXEEXT
)
346 @SIM_ENABLE_ARCH_erc32_TRUE@am__EXEEXT_18
= erc32
/run
$(EXEEXT
) \
347 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/sis
$(EXEEXT
)
348 @SIM_ENABLE_ARCH_examples_TRUE@am__EXEEXT_19
= \
349 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/run
$(EXEEXT
)
350 @SIM_ENABLE_ARCH_frv_TRUE@am__EXEEXT_20
= frv
/run
$(EXEEXT
)
351 @SIM_ENABLE_ARCH_ft32_TRUE@am__EXEEXT_21
= ft32
/run
$(EXEEXT
)
352 @SIM_ENABLE_ARCH_h8300_TRUE@am__EXEEXT_22
= h8300
/run
$(EXEEXT
)
353 @SIM_ENABLE_ARCH_iq2000_TRUE@am__EXEEXT_23
= iq2000
/run
$(EXEEXT
)
354 @SIM_ENABLE_ARCH_lm32_TRUE@am__EXEEXT_24
= lm32
/run
$(EXEEXT
)
355 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_25
= m32c
/run
$(EXEEXT
)
356 @SIM_ENABLE_ARCH_m32r_TRUE@am__EXEEXT_26
= m32r
/run
$(EXEEXT
)
357 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_27
= m68hc11
/run
$(EXEEXT
)
358 @SIM_ENABLE_ARCH_mcore_TRUE@am__EXEEXT_28
= mcore
/run
$(EXEEXT
)
359 @SIM_ENABLE_ARCH_microblaze_TRUE@am__EXEEXT_29
= \
360 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/run
$(EXEEXT
)
361 @SIM_ENABLE_ARCH_mips_TRUE@am__EXEEXT_30
= mips
/run
$(EXEEXT
)
362 @SIM_ENABLE_ARCH_mn10300_TRUE@am__EXEEXT_31
= mn10300
/run
$(EXEEXT
)
363 @SIM_ENABLE_ARCH_moxie_TRUE@am__EXEEXT_32
= moxie
/run
$(EXEEXT
)
364 @SIM_ENABLE_ARCH_msp430_TRUE@am__EXEEXT_33
= msp430
/run
$(EXEEXT
)
365 @SIM_ENABLE_ARCH_or1k_TRUE@am__EXEEXT_34
= or1k
/run
$(EXEEXT
)
366 @SIM_ENABLE_ARCH_ppc_TRUE@am__EXEEXT_35
= ppc
/run
$(EXEEXT
) \
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/psim
$(EXEEXT
)
368 @SIM_ENABLE_ARCH_pru_TRUE@am__EXEEXT_36
= pru
/run
$(EXEEXT
)
369 @SIM_ENABLE_ARCH_riscv_TRUE@am__EXEEXT_37
= riscv
/run
$(EXEEXT
)
370 @SIM_ENABLE_ARCH_rl78_TRUE@am__EXEEXT_38
= rl78
/run
$(EXEEXT
)
371 @SIM_ENABLE_ARCH_rx_TRUE@am__EXEEXT_39
= rx
/run
$(EXEEXT
)
372 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_40
= sh
/run
$(EXEEXT
)
373 @SIM_ENABLE_ARCH_v850_TRUE@am__EXEEXT_41
= v850
/run
$(EXEEXT
)
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= $(noinst_PROGRAMS
)
375 am_aarch64_run_OBJECTS
=
376 aarch64_run_OBJECTS
= $(am_aarch64_run_OBJECTS
)
377 am__DEPENDENCIES_1
= $(SIM_COMMON_LIB
) $(BFD_LIB
) $(OPCODES_LIB
) \
379 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_DEPENDENCIES
= \
380 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/nrun.o aarch64
/libsim.a \
381 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(am__DEPENDENCIES_1
)
382 AM_V_lt
= $(am__v_lt_@AM_V@
)
383 am__v_lt_
= $(am__v_lt_@AM_DEFAULT_V@
)
384 am__v_lt_0
= --silent
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= $(am_arm_run_OBJECTS
)
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= arm
/nrun.o \
389 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/libsim.a
$(am__DEPENDENCIES_1
)
391 avr_run_OBJECTS
= $(am_avr_run_OBJECTS
)
392 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_DEPENDENCIES
= avr
/nrun.o \
393 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/libsim.a
$(am__DEPENDENCIES_1
)
394 am_bfin_run_OBJECTS
=
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= $(am_bfin_run_OBJECTS
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396 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_DEPENDENCIES
= bfin
/nrun.o \
397 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/libsim.a
$(am__DEPENDENCIES_1
)
399 bpf_run_OBJECTS
= $(am_bpf_run_OBJECTS
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400 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_DEPENDENCIES
= bpf
/nrun.o \
401 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/libsim.a
$(am__DEPENDENCIES_1
)
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= \
403 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/gencode.
$(OBJEXT
)
404 cr16_gencode_OBJECTS
= $(am_cr16_gencode_OBJECTS
)
405 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_DEPENDENCIES
= \
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/cr16-opc.o
407 am_cr16_run_OBJECTS
=
408 cr16_run_OBJECTS
= $(am_cr16_run_OBJECTS
)
409 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_DEPENDENCIES
= cr16
/nrun.o \
410 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/libsim.a
$(am__DEPENDENCIES_1
)
411 am_cris_run_OBJECTS
=
412 cris_run_OBJECTS
= $(am_cris_run_OBJECTS
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413 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_DEPENDENCIES
= cris
/nrun.o \
414 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/libsim.a
$(am__DEPENDENCIES_1
)
415 @SIM_ENABLE_ARCH_cris_TRUE@am_cris_rvdummy_OBJECTS
= \
416 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/rvdummy.
$(OBJEXT
)
417 cris_rvdummy_OBJECTS
= $(am_cris_rvdummy_OBJECTS
)
418 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_DEPENDENCIES
= \
419 @SIM_ENABLE_ARCH_cris_TRUE@
$(LIBIBERTY_LIB
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420 @SIM_ENABLE_ARCH_d10v_TRUE@am_d10v_gencode_OBJECTS
= \
421 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/gencode.
$(OBJEXT
)
422 d10v_gencode_OBJECTS
= $(am_d10v_gencode_OBJECTS
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423 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_DEPENDENCIES
= \
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/d10v-opc.o
425 am_d10v_run_OBJECTS
=
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= $(am_d10v_run_OBJECTS
)
427 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_DEPENDENCIES
= d10v
/nrun.o \
428 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/libsim.a
$(am__DEPENDENCIES_1
)
429 am_erc32_run_OBJECTS
=
430 erc32_run_OBJECTS
= $(am_erc32_run_OBJECTS
)
432 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_DEPENDENCIES
= erc32
/sis.o \
433 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/libsim.a \
434 @SIM_ENABLE_ARCH_erc32_TRUE@
$(am__DEPENDENCIES_1
) \
435 @SIM_ENABLE_ARCH_erc32_TRUE@
$(am__DEPENDENCIES_2
) \
436 @SIM_ENABLE_ARCH_erc32_TRUE@
$(am__DEPENDENCIES_2
)
437 erc32_sis_SOURCES
= erc32
/sis.c
438 erc32_sis_OBJECTS
= erc32
/sis.
$(OBJEXT
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439 erc32_sis_LDADD
= $(LDADD
)
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=
441 example_synacor_run_OBJECTS
= $(am_example_synacor_run_OBJECTS
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442 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_DEPENDENCIES
= \
443 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/nrun.o \
444 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/libsim.a \
445 @SIM_ENABLE_ARCH_examples_TRUE@
$(am__DEPENDENCIES_1
)
447 frv_run_OBJECTS
= $(am_frv_run_OBJECTS
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448 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_DEPENDENCIES
= frv
/nrun.o \
449 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/libsim.a
$(am__DEPENDENCIES_1
)
450 am_ft32_run_OBJECTS
=
451 ft32_run_OBJECTS
= $(am_ft32_run_OBJECTS
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452 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_DEPENDENCIES
= ft32
/nrun.o \
453 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/libsim.a
$(am__DEPENDENCIES_1
)
454 am_h8300_run_OBJECTS
=
455 h8300_run_OBJECTS
= $(am_h8300_run_OBJECTS
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456 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_DEPENDENCIES
= h8300
/nrun.o \
457 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/libsim.a \
458 @SIM_ENABLE_ARCH_h8300_TRUE@
$(am__DEPENDENCIES_1
)
459 am_igen_filter_OBJECTS
=
460 igen_filter_OBJECTS
= $(am_igen_filter_OBJECTS
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461 @SIM_ENABLE_IGEN_TRUE@igen_filter_DEPENDENCIES
= igen
/filter-main.o \
462 @SIM_ENABLE_IGEN_TRUE@ igen
/libigen.a
463 am_igen_gen_OBJECTS
=
464 igen_gen_OBJECTS
= $(am_igen_gen_OBJECTS
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465 @SIM_ENABLE_IGEN_TRUE@igen_gen_DEPENDENCIES
= igen
/gen-main.o \
466 @SIM_ENABLE_IGEN_TRUE@ igen
/libigen.a
467 @SIM_ENABLE_IGEN_TRUE@am_igen_igen_OBJECTS
= igen
/igen.
$(OBJEXT
)
468 igen_igen_OBJECTS
= $(am_igen_igen_OBJECTS
)
469 @SIM_ENABLE_IGEN_TRUE@igen_igen_DEPENDENCIES
= igen
/libigen.a
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=
471 igen_ld_cache_OBJECTS
= $(am_igen_ld_cache_OBJECTS
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472 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_DEPENDENCIES
= \
473 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache-main.o igen
/libigen.a
474 am_igen_ld_decode_OBJECTS
=
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= $(am_igen_ld_decode_OBJECTS
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476 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_DEPENDENCIES
= \
477 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode-main.o igen
/libigen.a
478 am_igen_ld_insn_OBJECTS
=
479 igen_ld_insn_OBJECTS
= $(am_igen_ld_insn_OBJECTS
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480 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_DEPENDENCIES
= igen
/ld-insn-main.o \
481 @SIM_ENABLE_IGEN_TRUE@ igen
/libigen.a
482 am_igen_table_OBJECTS
=
483 igen_table_OBJECTS
= $(am_igen_table_OBJECTS
)
484 @SIM_ENABLE_IGEN_TRUE@igen_table_DEPENDENCIES
= igen
/table-main.o \
485 @SIM_ENABLE_IGEN_TRUE@ igen
/libigen.a
486 am_iq2000_run_OBJECTS
=
487 iq2000_run_OBJECTS
= $(am_iq2000_run_OBJECTS
)
488 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_DEPENDENCIES
= iq2000
/nrun.o \
489 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/libsim.a \
490 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(am__DEPENDENCIES_1
)
491 am_lm32_run_OBJECTS
=
492 lm32_run_OBJECTS
= $(am_lm32_run_OBJECTS
)
493 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_DEPENDENCIES
= lm32
/nrun.o \
494 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/libsim.a
$(am__DEPENDENCIES_1
)
495 @SIM_ENABLE_ARCH_m32c_TRUE@am_m32c_opc2c_OBJECTS
= \
496 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/opc2c.
$(OBJEXT
)
497 m32c_opc2c_OBJECTS
= $(am_m32c_opc2c_OBJECTS
)
498 m32c_opc2c_LDADD
= $(LDADD
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499 am_m32c_run_OBJECTS
=
500 m32c_run_OBJECTS
= $(am_m32c_run_OBJECTS
)
501 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_DEPENDENCIES
= m32c
/main.o \
502 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/libsim.a
$(am__DEPENDENCIES_1
)
503 am_m32r_run_OBJECTS
=
504 m32r_run_OBJECTS
= $(am_m32r_run_OBJECTS
)
505 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_DEPENDENCIES
= m32r
/nrun.o \
506 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/libsim.a
$(am__DEPENDENCIES_1
)
507 @SIM_ENABLE_ARCH_m68hc11_TRUE@am_m68hc11_gencode_OBJECTS
= \
508 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/gencode.
$(OBJEXT
)
509 m68hc11_gencode_OBJECTS
= $(am_m68hc11_gencode_OBJECTS
)
510 m68hc11_gencode_LDADD
= $(LDADD
)
511 am_m68hc11_run_OBJECTS
=
512 m68hc11_run_OBJECTS
= $(am_m68hc11_run_OBJECTS
)
513 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_DEPENDENCIES
= \
514 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/nrun.o m68hc11
/libsim.a \
515 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(am__DEPENDENCIES_1
)
516 am_mcore_run_OBJECTS
=
517 mcore_run_OBJECTS
= $(am_mcore_run_OBJECTS
)
518 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_DEPENDENCIES
= mcore
/nrun.o \
519 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/libsim.a \
520 @SIM_ENABLE_ARCH_mcore_TRUE@
$(am__DEPENDENCIES_1
)
521 am_microblaze_run_OBJECTS
=
522 microblaze_run_OBJECTS
= $(am_microblaze_run_OBJECTS
)
523 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_DEPENDENCIES
= \
524 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/nrun.o \
525 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/libsim.a \
526 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(am__DEPENDENCIES_1
)
527 am_mips_run_OBJECTS
=
528 mips_run_OBJECTS
= $(am_mips_run_OBJECTS
)
529 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_DEPENDENCIES
= mips
/nrun.o \
530 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/libsim.a
$(am__DEPENDENCIES_1
)
531 am_mn10300_run_OBJECTS
=
532 mn10300_run_OBJECTS
= $(am_mn10300_run_OBJECTS
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533 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_DEPENDENCIES
= \
534 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/nrun.o mn10300
/libsim.a \
535 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(am__DEPENDENCIES_1
)
536 am_moxie_run_OBJECTS
=
537 moxie_run_OBJECTS
= $(am_moxie_run_OBJECTS
)
538 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_DEPENDENCIES
= moxie
/nrun.o \
539 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/libsim.a \
540 @SIM_ENABLE_ARCH_moxie_TRUE@
$(am__DEPENDENCIES_1
)
541 am_msp430_run_OBJECTS
=
542 msp430_run_OBJECTS
= $(am_msp430_run_OBJECTS
)
543 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_DEPENDENCIES
= msp430
/nrun.o \
544 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/libsim.a \
545 @SIM_ENABLE_ARCH_msp430_TRUE@
$(am__DEPENDENCIES_1
)
546 am_or1k_run_OBJECTS
=
547 or1k_run_OBJECTS
= $(am_or1k_run_OBJECTS
)
548 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_DEPENDENCIES
= or1k
/nrun.o \
549 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/libsim.a
$(am__DEPENDENCIES_1
)
550 ppc_psim_SOURCES
= ppc
/psim.c
551 ppc_psim_OBJECTS
= ppc
/psim.
$(OBJEXT
)
552 ppc_psim_LDADD
= $(LDADD
)
554 ppc_run_OBJECTS
= $(am_ppc_run_OBJECTS
)
555 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_DEPENDENCIES
= ppc
/main.o \
556 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/libsim.a
$(am__DEPENDENCIES_1
)
558 pru_run_OBJECTS
= $(am_pru_run_OBJECTS
)
559 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_DEPENDENCIES
= pru
/nrun.o \
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/libsim.a
$(am__DEPENDENCIES_1
)
561 am_riscv_run_OBJECTS
=
562 riscv_run_OBJECTS
= $(am_riscv_run_OBJECTS
)
563 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_DEPENDENCIES
= riscv
/nrun.o \
564 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/libsim.a \
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$(am__DEPENDENCIES_1
)
566 am_rl78_run_OBJECTS
=
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= $(am_rl78_run_OBJECTS
)
568 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_DEPENDENCIES
= rl78
/main.o \
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/libsim.a
$(am__DEPENDENCIES_1
)
571 rx_run_OBJECTS
= $(am_rx_run_OBJECTS
)
572 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_DEPENDENCIES
= rx
/main.o rx
/libsim.a \
573 @SIM_ENABLE_ARCH_rx_TRUE@
$(am__DEPENDENCIES_1
)
574 @SIM_ENABLE_ARCH_sh_TRUE@am_sh_gencode_OBJECTS
= sh
/gencode.
$(OBJEXT
)
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= $(am_sh_gencode_OBJECTS
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576 sh_gencode_LDADD
= $(LDADD
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578 sh_run_OBJECTS
= $(am_sh_run_OBJECTS
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579 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_DEPENDENCIES
= sh
/nrun.o sh
/libsim.a \
580 @SIM_ENABLE_ARCH_sh_TRUE@
$(am__DEPENDENCIES_1
)
581 testsuite_common_alu_tst_SOURCES
= testsuite
/common
/alu-tst.c
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= testsuite
/common
/alu-tst.
$(OBJEXT
)
583 testsuite_common_alu_tst_LDADD
= $(LDADD
)
584 testsuite_common_bits_gen_SOURCES
= testsuite
/common
/bits-gen.c
585 testsuite_common_bits_gen_OBJECTS
= \
586 testsuite
/common
/bits-gen.
$(OBJEXT
)
587 testsuite_common_bits_gen_LDADD
= $(LDADD
)
588 testsuite_common_bits32m0_SOURCES
= testsuite
/common
/bits32m0.c
589 testsuite_common_bits32m0_OBJECTS
= \
590 testsuite
/common
/bits32m0.
$(OBJEXT
)
591 testsuite_common_bits32m0_LDADD
= $(LDADD
)
592 testsuite_common_bits32m31_SOURCES
= testsuite
/common
/bits32m31.c
593 testsuite_common_bits32m31_OBJECTS
= \
594 testsuite
/common
/bits32m31.
$(OBJEXT
)
595 testsuite_common_bits32m31_LDADD
= $(LDADD
)
596 testsuite_common_bits64m0_SOURCES
= testsuite
/common
/bits64m0.c
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= \
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/common
/bits64m0.
$(OBJEXT
)
599 testsuite_common_bits64m0_LDADD
= $(LDADD
)
600 testsuite_common_bits64m63_SOURCES
= testsuite
/common
/bits64m63.c
601 testsuite_common_bits64m63_OBJECTS
= \
602 testsuite
/common
/bits64m63.
$(OBJEXT
)
603 testsuite_common_bits64m63_LDADD
= $(LDADD
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604 testsuite_common_fpu_tst_SOURCES
= testsuite
/common
/fpu-tst.c
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= testsuite
/common
/fpu-tst.
$(OBJEXT
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606 testsuite_common_fpu_tst_LDADD
= $(LDADD
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607 am_v850_run_OBJECTS
=
608 v850_run_OBJECTS
= $(am_v850_run_OBJECTS
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609 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_DEPENDENCIES
= v850
/nrun.o \
610 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/libsim.a
$(am__DEPENDENCIES_1
)
611 AM_V_P
= $(am__v_P_@AM_V@
)
612 am__v_P_
= $(am__v_P_@AM_DEFAULT_V@
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615 AM_V_GEN
= $(am__v_GEN_@AM_V@
)
616 am__v_GEN_
= $(am__v_GEN_@AM_DEFAULT_V@
)
617 am__v_GEN_0
= @echo
" GEN " $@
;
619 AM_V_at
= $(am__v_at_@AM_V@
)
620 am__v_at_
= $(am__v_at_@AM_DEFAULT_V@
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623 DEFAULT_INCLUDES
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989 CC_FOR_TARGET_LM32
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990 CC_FOR_TARGET_M32C
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991 CC_FOR_TARGET_M32R
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995 CC_FOR_TARGET_MIPS
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1000 CC_FOR_TARGET_PPC
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1001 CC_FOR_TARGET_PRU
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1002 CC_FOR_TARGET_RISCV
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1003 CC_FOR_TARGET_RL78
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1004 CC_FOR_TARGET_RX
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1005 CC_FOR_TARGET_SH
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1006 CC_FOR_TARGET_V850
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1008 CFLAGS_FOR_BUILD
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1009 CGEN_MAINT
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1030 INSTALL_PROGRAM
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1031 INSTALL_SCRIPT
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1032 INSTALL_STRIP_PROGRAM
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1035 LDFLAGS_FOR_BUILD
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1036 LD_FOR_TARGET
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1037 LD_FOR_TARGET_AARCH64
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1038 LD_FOR_TARGET_ARM
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1039 LD_FOR_TARGET_AVR
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1040 LD_FOR_TARGET_BFIN
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1041 LD_FOR_TARGET_BPF
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1042 LD_FOR_TARGET_CR16
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1043 LD_FOR_TARGET_CRIS
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1044 LD_FOR_TARGET_D10V
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1045 LD_FOR_TARGET_ERC32
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1046 LD_FOR_TARGET_EXAMPLE_SYNACOR
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1047 LD_FOR_TARGET_FRV
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1048 LD_FOR_TARGET_FT32
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1049 LD_FOR_TARGET_H8300
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1050 LD_FOR_TARGET_IQ2000
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1051 LD_FOR_TARGET_LM32
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1052 LD_FOR_TARGET_M32C
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1053 LD_FOR_TARGET_M32R
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1054 LD_FOR_TARGET_M68HC11
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1055 LD_FOR_TARGET_MCORE
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1056 LD_FOR_TARGET_MICROBLAZE
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1057 LD_FOR_TARGET_MIPS
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1058 LD_FOR_TARGET_MN10300
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1059 LD_FOR_TARGET_MOXIE
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1060 LD_FOR_TARGET_MSP430
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1061 LD_FOR_TARGET_OR1K
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1062 LD_FOR_TARGET_PPC
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1063 LD_FOR_TARGET_PRU
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1064 LD_FOR_TARGET_RISCV
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1065 LD_FOR_TARGET_RL78
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1066 LD_FOR_TARGET_RX
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1067 LD_FOR_TARGET_SH
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1068 LD_FOR_TARGET_V850
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1074 LTLIBOBJS
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1076 MAKEINFO
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1085 PACKAGE_BUGREPORT
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1086 PACKAGE_NAME
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1087 PACKAGE_STRING
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1088 PACKAGE_TARNAME
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1089 PACKAGE_URL
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1090 PACKAGE_VERSION
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1091 PATH_SEPARATOR
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1092 PKGVERSION
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1093 PKG_CONFIG
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1094 PKG_CONFIG_LIBDIR
= @PKG_CONFIG_LIBDIR@
1095 PKG_CONFIG_PATH
= @PKG_CONFIG_PATH@
1097 RANLIB_FOR_BUILD
= @RANLIB_FOR_BUILD@
1098 READLINE_CFLAGS
= @READLINE_CFLAGS@
1099 READLINE_LIB
= @READLINE_LIB@
1100 REPORT_BUGS_TEXI
= @REPORT_BUGS_TEXI@
1101 REPORT_BUGS_TO
= @REPORT_BUGS_TO@
1102 SDL_CFLAGS
= @SDL_CFLAGS@
1103 SDL_LIBS
= @SDL_LIBS@
1105 SET_MAKE
= @SET_MAKE@
1107 SIM_COMMON_BUILD_FALSE
= @SIM_COMMON_BUILD_FALSE@
1108 SIM_COMMON_BUILD_TRUE
= @SIM_COMMON_BUILD_TRUE@
1109 SIM_ENABLED_ARCHES
= @SIM_ENABLED_ARCHES@
1110 SIM_FRV_TRAPDUMP_FLAGS
= @SIM_FRV_TRAPDUMP_FLAGS@
1111 SIM_HW_CFLAGS
= @SIM_HW_CFLAGS@
1112 SIM_HW_SOCKSER
= @SIM_HW_SOCKSER@
1113 SIM_INLINE
= @SIM_INLINE@
1114 SIM_MIPS_BITSIZE
= @SIM_MIPS_BITSIZE@
1115 SIM_MIPS_FPU_BITSIZE
= @SIM_MIPS_FPU_BITSIZE@
1116 SIM_MIPS_GEN
= @SIM_MIPS_GEN@
1117 SIM_MIPS_IGEN_ITABLE_FLAGS
= @SIM_MIPS_IGEN_ITABLE_FLAGS@
1118 SIM_MIPS_M16_FLAGS
= @SIM_MIPS_M16_FLAGS@
1119 SIM_MIPS_MULTI_IGEN_CONFIGS
= @SIM_MIPS_MULTI_IGEN_CONFIGS@
1120 SIM_MIPS_MULTI_OBJ
= @SIM_MIPS_MULTI_OBJ@
1121 SIM_MIPS_MULTI_SRC
= @SIM_MIPS_MULTI_SRC@
1122 SIM_MIPS_SINGLE_FLAGS
= @SIM_MIPS_SINGLE_FLAGS@
1123 SIM_MIPS_SUBTARGET
= @SIM_MIPS_SUBTARGET@
1124 SIM_PRIMARY_TARGET
= @SIM_PRIMARY_TARGET@
1125 SIM_RISCV_BITSIZE
= @SIM_RISCV_BITSIZE@
1126 SIM_RX_CYCLE_ACCURATE_FLAGS
= @SIM_RX_CYCLE_ACCURATE_FLAGS@
1127 SIM_SUBDIRS
= @SIM_SUBDIRS@
1128 SIM_TOOLCHAIN_VARS
= @SIM_TOOLCHAIN_VARS@
1130 TERMCAP_LIB
= @TERMCAP_LIB@
1132 WARN_CFLAGS
= @WARN_CFLAGS@
1133 WERROR_CFLAGS
= @WERROR_CFLAGS@
1134 abs_builddir
= @abs_builddir@
1135 abs_srcdir
= @abs_srcdir@
1136 abs_top_builddir
= @abs_top_builddir@
1137 abs_top_srcdir
= @abs_top_srcdir@
1138 ac_ct_CC
= @ac_ct_CC@
1139 ac_ct_DUMPBIN
= @ac_ct_DUMPBIN@
1140 am__include
= @am__include@
1141 am__leading_dot
= @am__leading_dot@
1142 am__quote
= @am__quote@
1144 am__untar
= @am__untar@
1147 build_alias
= @build_alias@
1148 build_cpu
= @build_cpu@
1149 build_os
= @build_os@
1150 build_vendor
= @build_vendor@
1151 builddir
= @builddir@
1155 datarootdir
= @datarootdir@
1158 exec_prefix = @
exec_prefix@
1160 host_alias
= @host_alias@
1161 host_cpu
= @host_cpu@
1163 host_vendor
= @host_vendor@
1165 include_makefile
= @include_makefile@
1166 includedir = @
includedir@
1168 install_sh
= @install_sh@
1170 libexecdir
= @libexecdir@
1171 localedir
= @localedir@
1172 localstatedir
= @localstatedir@
1175 oldincludedir = @
oldincludedir@
1178 program_transform_name
= @program_transform_name@
1181 sharedstatedir
= @sharedstatedir@
1182 sim_bitsize
= @sim_bitsize@
1183 sim_float
= @sim_float@
1186 sysconfdir
= @sysconfdir@
1188 target_alias
= @target_alias@
1189 target_cpu
= @target_cpu@
1190 target_os
= @target_os@
1191 target_vendor
= @target_vendor@
1192 top_build_prefix
= @top_build_prefix@
1193 top_builddir
= @top_builddir@
1194 top_srcdir
= @top_srcdir@
1195 AUTOMAKE_OPTIONS
= dejagnu foreign no-dist subdir-objects
1196 ACLOCAL_AMFLAGS
= -Im4
-I..
-I..
/config
1197 GNULIB_PARENT_DIR
= ..
1198 srccom
= $(srcdir)/common
1199 srcroot
= $(srcdir)/..
1200 SUBDIRS
= @subdirs@
$(SIM_SUBDIRS
)
1201 AM_MAKEFLAGS
= SIM_NEW_COMMON_OBJS_
="$(SIM_NEW_COMMON_OBJS)" \
1202 $(am__append_3
) $(am__append_12
) $(am__append_21
) \
1203 $(am__append_42
) $(am__append_50
) $(am__append_54
) \
1204 $(am__append_61
) $(am__append_66
)
1205 pkginclude_HEADERS
= $(am__append_1
)
1206 noinst_LIBRARIES
= $(SIM_COMMON_LIB
) $(am__append_5
)
1207 CLEANFILES
= common
/version.c common
/version.c-stamp \
1208 testsuite
/common
/bits-gen testsuite
/common
/bits32m0.c \
1209 testsuite
/common
/bits32m31.c testsuite
/common
/bits64m0.c \
1210 testsuite
/common
/bits64m63.c
1211 DISTCLEANFILES
= $(am__append_64
)
1212 MOSTLYCLEANFILES
= core
$(common_HW_CONFIG_H_TARGETS
) $(patsubst \
1213 %,%/stamp-hw
,$(SIM_ENABLED_ARCHES
)) $(am__append_7
) \
1214 site-sim-config.exp testrun.log testrun.sum
$(am__append_15
) \
1215 $(am__append_19
) $(am__append_24
) $(am__append_28
) \
1216 $(am__append_35
) $(am__append_40
) $(am__append_44
) \
1217 $(am__append_48
) $(am__append_52
) $(am__append_57
) \
1218 $(am__append_63
) $(am__append_68
) $(am__append_73
) \
1219 $(am__append_82
) $(am__append_85
)
1220 AM_CFLAGS
= $(WERROR_CFLAGS
) $(WARN_CFLAGS
)
1221 AM_CPPFLAGS
= $(INCGNU
) -I
$(srcroot
)/include -I..
/bfd
-I.. \
1222 $(SIM_HW_CFLAGS
) $(SIM_INLINE
) -I
$(srcdir)/common \
1224 AM_CPPFLAGS_FOR_BUILD
= -I
$(srcroot
)/include $(SIM_HW_CFLAGS
) \
1225 $(SIM_INLINE
) -I
$(srcdir)/common
1226 COMPILE_FOR_BUILD
= $(CC_FOR_BUILD
) $(AM_CPPFLAGS_FOR_BUILD
) $(CPPFLAGS_FOR_BUILD
) $(CFLAGS_FOR_BUILD
)
1227 LINK_FOR_BUILD
= $(CC_FOR_BUILD
) $(CFLAGS_FOR_BUILD
) $(LDFLAGS_FOR_BUILD
) -o
$@
1228 SIM_ALL_RECURSIVE_DEPS
= common
/libcommon.a \
1229 $(common_HW_CONFIG_H_TARGETS
) $(am__append_4
) $(am__append_14
) \
1230 $(am__append_17
) $(am__append_23
) $(am__append_26
) \
1231 $(am__append_34
) $(am__append_39
) $(am__append_43
) \
1232 $(am__append_46
) $(am__append_51
) $(am__append_55
) \
1233 $(am__append_62
) $(am__append_67
) $(am__append_72
) \
1234 $(am__append_80
) $(am__append_84
)
1235 SIM_INSTALL_DATA_LOCAL_DEPS
=
1236 SIM_INSTALL_EXEC_LOCAL_DEPS
= $(am__append_30
)
1237 SIM_UNINSTALL_LOCAL_DEPS
= $(am__append_31
)
1238 SIM_COMMON_LIB
= common
/libcommon.a
1239 common_libcommon_a_SOURCES
= \
1241 common
/portability.c \
1244 common
/target-newlib-errno.c \
1245 common
/target-newlib-open.c \
1246 common
/target-newlib-signal.c \
1247 common
/target-newlib-syscall.c \
1250 SIM_COMMON_HW_OBJS
= \
1262 SIM_NEW_COMMON_OBJS
= sim-arange.o sim-bits.o sim-close.o \
1263 sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1264 sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1265 sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1266 sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1267 sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1268 sim-watch.o
$(am__append_2
)
1269 SIM_HW_DEVICES
= cfi core pal glue
1270 common_HW_CONFIG_H_TARGETS
= $(patsubst %,%/hw-config.h
,$(SIM_ENABLED_ARCHES
))
1271 LIBIBERTY_LIB
= ..
/libiberty
/libiberty.a
1272 BFD_LIB
= ..
/bfd
/libbfd.la
1273 OPCODES_LIB
= ..
/opcodes
/libopcodes.la
1280 $(LIBGNU_EXTRA_LIBS
)
1283 # igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1284 # leak detection while running it.
1285 @SIM_ENABLE_IGEN_TRUE@IGEN
= igen
/igen
$(EXEEXT
)
1286 @SIM_ENABLE_IGEN_TRUE@IGEN_RUN
= ASAN_OPTIONS
=detect_leaks
=0 $(IGEN
) $(IGEN_FLAGS_SMP
)
1287 @SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES
= \
1288 @SIM_ENABLE_IGEN_TRUE@ igen
/table.c \
1289 @SIM_ENABLE_IGEN_TRUE@ igen
/lf.c \
1290 @SIM_ENABLE_IGEN_TRUE@ igen
/misc.c \
1291 @SIM_ENABLE_IGEN_TRUE@ igen
/filter_host.c \
1292 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode.c \
1293 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache.c \
1294 @SIM_ENABLE_IGEN_TRUE@ igen
/filter.c \
1295 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn.c \
1296 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-model.c \
1297 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-itable.c \
1298 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-icache.c \
1299 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-semantics.c \
1300 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-idecode.c \
1301 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-support.c \
1302 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-engine.c \
1303 @SIM_ENABLE_IGEN_TRUE@ igen
/gen.c
1305 @SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES
= igen
/igen.c
1306 @SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD
= igen
/libigen.a
1307 @SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES
=
1308 @SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD
= igen
/filter-main.o igen
/libigen.a
1309 @SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES
=
1310 @SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD
= igen
/gen-main.o igen
/libigen.a
1311 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES
=
1312 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD
= igen
/ld-cache-main.o igen
/libigen.a
1313 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES
=
1314 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD
= igen
/ld-decode-main.o igen
/libigen.a
1315 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES
=
1316 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD
= igen
/ld-insn-main.o igen
/libigen.a
1317 @SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES
=
1318 @SIM_ENABLE_IGEN_TRUE@igen_table_LDADD
= igen
/table-main.o igen
/libigen.a
1319 @SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS
= \
1320 @SIM_ENABLE_IGEN_TRUE@
$(IGEN
) \
1321 @SIM_ENABLE_IGEN_TRUE@ igen
/filter \
1322 @SIM_ENABLE_IGEN_TRUE@ igen
/gen \
1323 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache \
1324 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode \
1325 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn \
1326 @SIM_ENABLE_IGEN_TRUE@ igen
/table
1328 EXTRA_DEJAGNU_SITE_CONFIG
= site-sim-config.exp
1330 # Custom verbose test variables that automake doesn't provide (yet?).
1331 AM_V_RUNTEST
= $(AM_V_RUNTEST_@AM_V@
)
1332 AM_V_RUNTEST_
= $(AM_V_RUNTEST_@AM_DEFAULT_V@
)
1333 AM_V_RUNTEST_0
= @echo
" RUNTEST $(RUNTESTFLAGS) $*";
1336 LC_ALL
=C
; export LC_ALL
; \
1337 EXPECT
=${EXPECT} ; export EXPECT
; \
1338 runtest
=$(RUNTEST
); \
1339 $$runtest $(RUNTESTFLAGS
)
1341 testsuite_common_CPPFLAGS
= \
1342 -I
$(srcdir)/common \
1343 -I
$(srcroot
)/include \
1346 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES
=
1347 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD
= \
1348 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/nrun.o \
1349 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/libsim.a \
1350 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(SIM_COMMON_LIBS
)
1352 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES
=
1353 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD
= \
1354 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/nrun.o \
1355 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/libsim.a \
1356 @SIM_ENABLE_ARCH_arm_TRUE@
$(SIM_COMMON_LIBS
)
1358 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir
= $(docdir
)/arm
1359 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA
= arm
/README
1360 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES
=
1361 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD
= \
1362 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/nrun.o \
1363 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/libsim.a \
1364 @SIM_ENABLE_ARCH_avr_TRUE@
$(SIM_COMMON_LIBS
)
1366 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES
=
1367 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD
= \
1368 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/nrun.o \
1369 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/libsim.a \
1370 @SIM_ENABLE_ARCH_bfin_TRUE@
$(SIM_COMMON_LIBS
)
1372 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES
= \
1373 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_cec \
1374 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ctimer \
1375 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dma \
1376 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dmac \
1377 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_amc \
1378 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_ddrc \
1379 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_sdc \
1380 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_emac \
1381 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_eppi \
1382 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_evt \
1383 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio \
1384 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio2 \
1385 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gptimer \
1386 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_jtag \
1387 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_mmu \
1388 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_nfc \
1389 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_otp \
1390 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pfmon \
1391 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pint \
1392 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pll \
1393 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ppi \
1394 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_rtc \
1395 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_sic \
1396 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_spi \
1397 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_trace \
1398 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_twi \
1399 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart \
1400 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart2 \
1401 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wdog \
1402 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \
1403 @SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy
1405 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES
=
1406 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD
= \
1407 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/nrun.o \
1408 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/libsim.a \
1409 @SIM_ENABLE_ARCH_bpf_TRUE@
$(SIM_COMMON_LIBS
)
1411 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS
= \
1412 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/eng-le.h \
1413 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-le.c \
1414 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/stamp-mloop-le \
1415 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/eng-be.h \
1416 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-be.c \
1417 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/stamp-mloop-be
1419 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES
=
1420 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD
= \
1421 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/nrun.o \
1422 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/libsim.a \
1423 @SIM_ENABLE_ARCH_cr16_TRUE@
$(SIM_COMMON_LIBS
)
1425 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS
= \
1426 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/gencode
$(EXEEXT
) \
1427 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/simops.h \
1428 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/table.c
1430 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES
= cr16
/gencode.c
1431 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD
= cr16
/cr16-opc.o
1432 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES
=
1433 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD
= \
1434 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/nrun.o \
1435 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/libsim.a \
1436 @SIM_ENABLE_ARCH_cris_TRUE@
$(SIM_COMMON_LIBS
)
1438 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES
= rv cris cris_900000xx
1439 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES
= cris
/rvdummy.c
1440 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD
= $(LIBIBERTY_LIB
)
1441 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS
= \
1442 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/engv10.h \
1443 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv10f.c \
1444 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v10f \
1445 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/engv32.h \
1446 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv32f.c \
1447 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v32f
1449 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES
=
1450 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD
= \
1451 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/nrun.o \
1452 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/libsim.a \
1453 @SIM_ENABLE_ARCH_d10v_TRUE@
$(SIM_COMMON_LIBS
)
1455 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS
= \
1456 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/gencode
$(EXEEXT
) \
1457 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/simops.h \
1458 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/table.c
1460 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES
= d10v
/gencode.c
1461 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD
= d10v
/d10v-opc.o
1462 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES
=
1463 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD
= \
1464 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/sis.o \
1465 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/libsim.a \
1466 @SIM_ENABLE_ARCH_erc32_TRUE@
$(SIM_COMMON_LIBS
) $(READLINE_LIB
) $(TERMCAP_LIB
)
1468 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir
= $(docdir
)/erc32
1469 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA
= erc32
/README.erc32 erc32
/README.gdb erc32
/README.sis
1470 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES
=
1471 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD
= \
1472 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/nrun.o \
1473 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/libsim.a \
1474 @SIM_ENABLE_ARCH_examples_TRUE@
$(SIM_COMMON_LIBS
)
1476 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES
=
1477 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD
= \
1478 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/nrun.o \
1479 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/libsim.a \
1480 @SIM_ENABLE_ARCH_frv_TRUE@
$(SIM_COMMON_LIBS
)
1482 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir
= $(docdir
)/frv
1483 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA
= frv
/README
1484 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS
= \
1485 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/eng.h \
1486 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/mloop.c \
1487 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/stamp-mloop
1489 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES
=
1490 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD
= \
1491 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/nrun.o \
1492 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/libsim.a \
1493 @SIM_ENABLE_ARCH_ft32_TRUE@
$(SIM_COMMON_LIBS
)
1495 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES
=
1496 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD
= \
1497 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/nrun.o \
1498 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/libsim.a \
1499 @SIM_ENABLE_ARCH_h8300_TRUE@
$(SIM_COMMON_LIBS
)
1501 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES
=
1502 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD
= \
1503 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/nrun.o \
1504 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/libsim.a \
1505 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(SIM_COMMON_LIBS
)
1507 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS
= \
1508 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/eng.h \
1509 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/mloop.c \
1510 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/stamp-mloop
1512 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES
=
1513 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD
= \
1514 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/nrun.o \
1515 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/libsim.a \
1516 @SIM_ENABLE_ARCH_lm32_TRUE@
$(SIM_COMMON_LIBS
)
1518 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES
= lm32cpu lm32timer lm32uart
1519 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS
= \
1520 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/eng.h \
1521 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/mloop.c \
1522 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/stamp-mloop
1524 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES
=
1525 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD
= \
1526 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/main.o \
1527 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/libsim.a \
1528 @SIM_ENABLE_ARCH_m32c_TRUE@
$(SIM_COMMON_LIBS
)
1530 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS
= \
1531 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/opc2c
$(EXEEXT
) \
1532 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/m32c.c \
1533 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/r8c.c
1535 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES
= m32c
/opc2c.c
1537 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1538 # leak detection while running it.
1539 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN
= ASAN_OPTIONS
=detect_leaks
=0 m32c
/opc2c
$(EXEEXT
)
1540 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES
=
1541 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD
= \
1542 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/nrun.o \
1543 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/libsim.a \
1544 @SIM_ENABLE_ARCH_m32r_TRUE@
$(SIM_COMMON_LIBS
)
1546 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES
= m32r_cache m32r_uart
1547 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS
= \
1548 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/eng.h \
1549 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop.c \
1550 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop \
1551 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/engx.h \
1552 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloopx.c \
1553 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-x \
1554 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/eng2.h \
1555 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop2.c \
1556 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-2
1558 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES
=
1559 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD
= \
1560 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/nrun.o \
1561 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/libsim.a \
1562 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(SIM_COMMON_LIBS
)
1564 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES
= m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
1565 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS
= \
1566 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/gencode
$(EXEEXT
) \
1567 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11int.c \
1568 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc12int.c
1570 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES
= m68hc11
/gencode.c
1571 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES
=
1572 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD
= \
1573 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/nrun.o \
1574 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/libsim.a \
1575 @SIM_ENABLE_ARCH_mcore_TRUE@
$(SIM_COMMON_LIBS
)
1577 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES
=
1578 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD
= \
1579 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/nrun.o \
1580 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/libsim.a \
1581 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(SIM_COMMON_LIBS
)
1583 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES
=
1584 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD
= \
1585 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/nrun.o \
1586 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/libsim.a \
1587 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_COMMON_LIBS
)
1589 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES
= tx3904cpu tx3904irc tx3904tmr tx3904sio
1590 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE
= \
1591 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/itable.h \
1592 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/itable.c
1594 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS
= \
1595 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_IGEN_ITABLE
) \
1596 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/stamp-igen-itable
1598 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
1599 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN
= $(srcdir)/mips
/mips.igen
1600 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC
= \
1601 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/dsp.igen \
1602 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/dsp2.igen \
1603 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16.igen \
1604 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16e.igen \
1605 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mdmx.igen \
1606 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/micromipsdsp.igen \
1607 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/micromips.igen \
1608 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3264r2.igen \
1609 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3264r6.igen \
1610 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3d.igen \
1611 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/sb1.igen \
1612 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/tx.igen \
1613 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/vr.igen
1615 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES
=
1616 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD
= \
1617 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/nrun.o \
1618 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/libsim.a \
1619 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(SIM_COMMON_LIBS
)
1621 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES
= mn103cpu mn103int mn103tim mn103ser mn103iop
1622 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN
= \
1623 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.h \
1624 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.c \
1625 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.h \
1626 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.c \
1627 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.h \
1628 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.c \
1629 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.h \
1630 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.c \
1631 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.h \
1632 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.c \
1633 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.h \
1634 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.c \
1635 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.h \
1636 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.c \
1637 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/irun.c
1639 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS
= \
1640 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_BUILT_SRC_FROM_IGEN
) \
1641 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/stamp-igen
1643 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
1644 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN
= $(srcdir)/mn10300
/mn10300.igen
1645 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC
= mn10300
/am33.igen mn10300
/am33-2.igen
1646 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC
= $(srcdir)/mn10300
/mn10300.dc
1647 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES
=
1648 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD
= \
1649 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/nrun.o \
1650 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/libsim.a \
1651 @SIM_ENABLE_ARCH_moxie_TRUE@
$(SIM_COMMON_LIBS
)
1653 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir
= $(datadir)/gdb
/dtb
1654 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA
= moxie
/moxie-gdb.dtb
1655 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES
=
1656 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD
= \
1657 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/nrun.o \
1658 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/libsim.a \
1659 @SIM_ENABLE_ARCH_msp430_TRUE@
$(SIM_COMMON_LIBS
)
1661 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES
=
1662 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD
= \
1663 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/nrun.o \
1664 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/libsim.a \
1665 @SIM_ENABLE_ARCH_or1k_TRUE@
$(SIM_COMMON_LIBS
)
1667 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir
= $(docdir
)/or1k
1668 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA
= or1k
/README
1669 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS
= \
1670 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/eng.h \
1671 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/mloop.c \
1672 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/stamp-mloop
1674 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES
=
1675 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD
= \
1676 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/main.o \
1677 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/libsim.a \
1678 @SIM_ENABLE_ARCH_ppc_TRUE@
$(SIM_COMMON_LIBS
)
1680 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir
= $(docdir
)/ppc
1681 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA
= ppc
/BUGS ppc
/INSTALL ppc
/README ppc
/RUN
1682 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES
=
1683 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD
= \
1684 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/nrun.o \
1685 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/libsim.a \
1686 @SIM_ENABLE_ARCH_pru_TRUE@
$(SIM_COMMON_LIBS
)
1688 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES
=
1689 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD
= \
1690 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/nrun.o \
1691 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/libsim.a \
1692 @SIM_ENABLE_ARCH_riscv_TRUE@
$(SIM_COMMON_LIBS
)
1694 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES
=
1695 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD
= \
1696 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/main.o \
1697 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/libsim.a \
1698 @SIM_ENABLE_ARCH_rl78_TRUE@
$(SIM_COMMON_LIBS
)
1700 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES
=
1701 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD
= \
1702 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/main.o \
1703 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/libsim.a \
1704 @SIM_ENABLE_ARCH_rx_TRUE@
$(SIM_COMMON_LIBS
)
1706 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir
= $(docdir
)/rx
1707 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA
= rx
/README.txt
1708 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES
=
1709 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD
= \
1710 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/nrun.o \
1711 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/libsim.a \
1712 @SIM_ENABLE_ARCH_sh_TRUE@
$(SIM_COMMON_LIBS
)
1714 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS
= \
1715 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/gencode
$(EXEEXT
) \
1716 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/code.c \
1717 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/ppi.c \
1718 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/table.c
1720 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES
= sh
/gencode.c
1721 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES
=
1722 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD
= \
1723 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/nrun.o \
1724 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/libsim.a \
1725 @SIM_ENABLE_ARCH_v850_TRUE@
$(SIM_COMMON_LIBS
)
1727 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN
= \
1728 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.h \
1729 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.c \
1730 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.h \
1731 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.c \
1732 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/semantics.h \
1733 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/semantics.c \
1734 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/model.h \
1735 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/model.c \
1736 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.h \
1737 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.c \
1738 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/itable.h \
1739 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/itable.c \
1740 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.h \
1741 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.c \
1742 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/irun.c
1744 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS
= \
1745 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_BUILT_SRC_FROM_IGEN
) \
1746 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/stamp-igen
1748 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
1749 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN
= $(srcdir)/v850
/v850.igen
1750 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC
= $(srcdir)/v850
/v850.dc
1752 $(MAKE
) $(AM_MAKEFLAGS
) all-recursive
1755 .SUFFIXES
: .c .lo .log .o .obj .
test .
test$(EXEEXT
) .trs
1756 am--refresh
: Makefile
1758 $(srcdir)/Makefile.in
: @MAINTAINER_MODE_TRUE@
$(srcdir)/Makefile.am
$(srcdir)/common
/local.mk
$(srcdir)/igen
/local.mk
$(srcdir)/testsuite
/local.mk
$(srcdir)/testsuite
/common
/local.mk
$(srcdir)/aarch64
/local.mk
$(srcdir)/arm
/local.mk
$(srcdir)/avr
/local.mk
$(srcdir)/bfin
/local.mk
$(srcdir)/bpf
/local.mk
$(srcdir)/cr16
/local.mk
$(srcdir)/cris
/local.mk
$(srcdir)/d10v
/local.mk
$(srcdir)/erc32
/local.mk
$(srcdir)/example-synacor
/local.mk
$(srcdir)/frv
/local.mk
$(srcdir)/ft32
/local.mk
$(srcdir)/h8300
/local.mk
$(srcdir)/iq2000
/local.mk
$(srcdir)/lm32
/local.mk
$(srcdir)/m32c
/local.mk
$(srcdir)/m32r
/local.mk
$(srcdir)/m68hc11
/local.mk
$(srcdir)/mcore
/local.mk
$(srcdir)/microblaze
/local.mk
$(srcdir)/mips
/local.mk
$(srcdir)/mn10300
/local.mk
$(srcdir)/moxie
/local.mk
$(srcdir)/msp430
/local.mk
$(srcdir)/or1k
/local.mk
$(srcdir)/ppc
/local.mk
$(srcdir)/pru
/local.mk
$(srcdir)/riscv
/local.mk
$(srcdir)/rl78
/local.mk
$(srcdir)/rx
/local.mk
$(srcdir)/sh
/local.mk
$(srcdir)/v850
/local.mk
$(am__configure_deps
)
1759 @for dep in
$?
; do \
1760 case
'$(am__configure_deps)' in \
1762 echo
' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
1763 $(am__cd
) $(srcdir) && $(AUTOMAKE
) --foreign \
1768 echo
' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
1769 $(am__cd
) $(top_srcdir
) && \
1770 $(AUTOMAKE
) --foreign Makefile
1771 Makefile
: $(srcdir)/Makefile.in
$(top_builddir
)/config.status
1774 echo
' $(SHELL) ./config.status'; \
1775 $(SHELL
) .
/config.status
;; \
1777 echo
' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
1778 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
$(am__depfiles_maybe
);; \
1780 $(srcdir)/common
/local.mk
$(srcdir)/igen
/local.mk
$(srcdir)/testsuite
/local.mk
$(srcdir)/testsuite
/common
/local.mk
$(srcdir)/aarch64
/local.mk
$(srcdir)/arm
/local.mk
$(srcdir)/avr
/local.mk
$(srcdir)/bfin
/local.mk
$(srcdir)/bpf
/local.mk
$(srcdir)/cr16
/local.mk
$(srcdir)/cris
/local.mk
$(srcdir)/d10v
/local.mk
$(srcdir)/erc32
/local.mk
$(srcdir)/example-synacor
/local.mk
$(srcdir)/frv
/local.mk
$(srcdir)/ft32
/local.mk
$(srcdir)/h8300
/local.mk
$(srcdir)/iq2000
/local.mk
$(srcdir)/lm32
/local.mk
$(srcdir)/m32c
/local.mk
$(srcdir)/m32r
/local.mk
$(srcdir)/m68hc11
/local.mk
$(srcdir)/mcore
/local.mk
$(srcdir)/microblaze
/local.mk
$(srcdir)/mips
/local.mk
$(srcdir)/mn10300
/local.mk
$(srcdir)/moxie
/local.mk
$(srcdir)/msp430
/local.mk
$(srcdir)/or1k
/local.mk
$(srcdir)/ppc
/local.mk
$(srcdir)/pru
/local.mk
$(srcdir)/riscv
/local.mk
$(srcdir)/rl78
/local.mk
$(srcdir)/rx
/local.mk
$(srcdir)/sh
/local.mk
$(srcdir)/v850
/local.mk
$(am__empty
):
1782 $(top_builddir
)/config.status
: $(top_srcdir
)/configure
$(CONFIG_STATUS_DEPENDENCIES
)
1783 $(SHELL
) .
/config.status
--recheck
1785 $(top_srcdir
)/configure
: @MAINTAINER_MODE_TRUE@
$(am__configure_deps
)
1786 $(am__cd
) $(srcdir) && $(AUTOCONF
)
1787 $(ACLOCAL_M4
): @MAINTAINER_MODE_TRUE@
$(am__aclocal_m4_deps
)
1788 $(am__cd
) $(srcdir) && $(ACLOCAL
) $(ACLOCAL_AMFLAGS
)
1789 $(am__aclocal_m4_deps
):
1792 @
test -f
$@ ||
rm -f stamp-h1
1793 @
test -f
$@ ||
$(MAKE
) $(AM_MAKEFLAGS
) stamp-h1
1795 stamp-h1
: $(srcdir)/config.h.in
$(top_builddir
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1797 cd
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) && $(SHELL
) .
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1798 $(srcdir)/config.h.in
: @MAINTAINER_MODE_TRUE@
$(am__configure_deps
)
1799 ($(am__cd
) $(top_srcdir
) && $(AUTOHEADER
))
1804 -rm -f config.h stamp-h1
1805 Make-common.sim
: $(top_builddir
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)/common
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1806 cd
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) && $(SHELL
) .
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$@
1807 aarch64
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: $(top_builddir
)/config.status
$(top_srcdir
)/aarch64
/Makefile.in
1808 cd
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) && $(SHELL
) .
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$@
1809 aarch64
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: $(top_builddir
)/config.status
$(top_srcdir
)/common
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1810 cd
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) && $(SHELL
) .
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$@
1811 arm
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: $(top_builddir
)/config.status
$(top_srcdir
)/arm
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1812 cd
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) && $(SHELL
) .
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$@
1813 arm
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: $(top_builddir
)/config.status
$(top_srcdir
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1814 cd
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) && $(SHELL
) .
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$@
1815 avr
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: $(top_builddir
)/config.status
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)/avr
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1816 cd
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) && $(SHELL
) .
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$@
1817 avr
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$(top_srcdir
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1818 cd
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) && $(SHELL
) .
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$@
1819 bfin
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1820 cd
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) && $(SHELL
) .
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$@
1821 bfin
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1822 cd
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) && $(SHELL
) .
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$@
1823 bpf
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: $(top_builddir
)/config.status
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1824 cd
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) && $(SHELL
) .
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$@
1825 bpf
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)/config.status
$(top_srcdir
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1826 cd
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) && $(SHELL
) .
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$@
1827 cr16
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: $(top_builddir
)/config.status
$(top_srcdir
)/cr16
/Makefile.in
1828 cd
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) && $(SHELL
) .
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$@
1829 cr16
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: $(top_builddir
)/config.status
$(top_srcdir
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1830 cd
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) && $(SHELL
) .
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$@
1831 cris
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: $(top_builddir
)/config.status
$(top_srcdir
)/cris
/Makefile.in
1832 cd
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) && $(SHELL
) .
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$@
1833 cris
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: $(top_builddir
)/config.status
$(top_srcdir
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1834 cd
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) && $(SHELL
) .
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$@
1835 d10v
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/d10v
/Makefile.in
1836 cd
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) && $(SHELL
) .
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$@
1837 d10v
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)/config.status
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1838 cd
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) && $(SHELL
) .
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$@
1839 frv
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/frv
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1840 cd
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) && $(SHELL
) .
/config.status
$@
1841 frv
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: $(top_builddir
)/config.status
$(top_srcdir
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1842 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1843 ft32
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/ft32
/Makefile.in
1844 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1845 ft32
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: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1846 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1847 h8300
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/h8300
/Makefile.in
1848 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1849 h8300
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1850 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1851 iq2000
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/iq2000
/Makefile.in
1852 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1853 iq2000
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1854 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1855 lm32
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/lm32
/Makefile.in
1856 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1857 lm32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1858 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1859 m32c
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/m32c
/Makefile.in
1860 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1861 m32c
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1862 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1863 m32r
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/m32r
/Makefile.in
1864 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1865 m32r
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1866 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1867 m68hc11
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/m68hc11
/Makefile.in
1868 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1869 m68hc11
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1870 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1871 mcore
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/mcore
/Makefile.in
1872 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1873 mcore
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1874 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1875 microblaze
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/microblaze
/Makefile.in
1876 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1877 microblaze
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1878 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1879 mips
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/mips
/Makefile.in
1880 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1881 mips
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1882 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1883 mn10300
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/mn10300
/Makefile.in
1884 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1885 mn10300
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1886 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1887 moxie
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/moxie
/Makefile.in
1888 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1889 moxie
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1890 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1891 msp430
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/msp430
/Makefile.in
1892 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1893 msp430
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1894 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1895 or1k
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/or1k
/Makefile.in
1896 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1897 or1k
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1898 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1899 ppc
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1900 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1901 pru
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/pru
/Makefile.in
1902 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1903 pru
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1904 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1905 riscv
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/riscv
/Makefile.in
1906 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1907 riscv
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1908 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1909 rl78
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/rl78
/Makefile.in
1910 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1911 rl78
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1912 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1913 rx
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/rx
/Makefile.in
1914 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1915 rx
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1916 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1917 sh
/Makefile.sim
: $(top_builddir
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$(top_srcdir
)/sh
/Makefile.in
1918 cd
$(top_builddir
) && $(SHELL
) .
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$@
1919 sh
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
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1920 cd
$(top_builddir
) && $(SHELL
) .
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$@
1921 erc32
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/erc32
/Makefile.in
1922 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1923 erc32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1924 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1925 v850
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/v850
/Makefile.in
1926 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1927 v850
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1928 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1929 example-synacor
/Makefile.sim
: $(top_builddir
)/config.status
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)/example-synacor
/Makefile.in
1930 cd
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) && $(SHELL
) .
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$@
1931 example-synacor
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: $(top_builddir
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1932 cd
$(top_builddir
) && $(SHELL
) .
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$@
1933 arch-subdir.mk
: $(top_builddir
)/config.status
$(srcdir)/arch-subdir.mk.in
1934 cd
$(top_builddir
) && $(SHELL
) .
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$@
1935 .gdbinit
: $(top_builddir
)/config.status
$(srcdir)/gdbinit.in
1936 cd
$(top_builddir
) && $(SHELL
) .
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$@
1938 clean-noinstLIBRARIES
:
1939 -test -z
"$(noinst_LIBRARIES)" ||
rm -f
$(noinst_LIBRARIES
)
1940 common
/$(am__dirstamp
):
1942 @
: > common
/$(am__dirstamp
)
1943 common
/$(DEPDIR
)/$(am__dirstamp
):
1944 @
$(MKDIR_P
) common
/$(DEPDIR
)
1945 @
: > common
/$(DEPDIR
)/$(am__dirstamp
)
1946 common
/callback.
$(OBJEXT
): common
/$(am__dirstamp
) \
1947 common
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)
1948 common
/portability.
$(OBJEXT
): common
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) \
1949 common
/$(DEPDIR
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)
1950 common
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$(OBJEXT
): common
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) \
1951 common
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)
1952 common
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$(OBJEXT
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1953 common
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1954 common
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$(OBJEXT
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1955 common
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1956 common
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$(OBJEXT
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) \
1957 common
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)
1958 common
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$(OBJEXT
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1959 common
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1960 common
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$(OBJEXT
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1961 common
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)
1962 common
/version.
$(OBJEXT
): common
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) \
1963 common
/$(DEPDIR
)/$(am__dirstamp
)
1965 common
/libcommon.a
: $(common_libcommon_a_OBJECTS
) $(common_libcommon_a_DEPENDENCIES
) $(EXTRA_common_libcommon_a_DEPENDENCIES
) common
/$(am__dirstamp
)
1966 $(AM_V_at
)-rm -f common
/libcommon.a
1967 $(AM_V_AR
)$(common_libcommon_a_AR
) common
/libcommon.a
$(common_libcommon_a_OBJECTS
) $(common_libcommon_a_LIBADD
)
1968 $(AM_V_at
)$(RANLIB
) common
/libcommon.a
1969 igen
/$(am__dirstamp
):
1971 @
: > igen
/$(am__dirstamp
)
1972 igen
/$(DEPDIR
)/$(am__dirstamp
):
1973 @
$(MKDIR_P
) igen
/$(DEPDIR
)
1974 @
: > igen
/$(DEPDIR
)/$(am__dirstamp
)
1975 igen
/table.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1976 igen
/$(DEPDIR
)/$(am__dirstamp
)
1977 igen
/lf.
$(OBJEXT
): igen
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) igen
/$(DEPDIR
)/$(am__dirstamp
)
1978 igen
/misc.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1979 igen
/$(DEPDIR
)/$(am__dirstamp
)
1980 igen
/filter_host.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1981 igen
/$(DEPDIR
)/$(am__dirstamp
)
1982 igen
/ld-decode.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1983 igen
/$(DEPDIR
)/$(am__dirstamp
)
1984 igen
/ld-cache.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1985 igen
/$(DEPDIR
)/$(am__dirstamp
)
1986 igen
/filter.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1987 igen
/$(DEPDIR
)/$(am__dirstamp
)
1988 igen
/ld-insn.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1989 igen
/$(DEPDIR
)/$(am__dirstamp
)
1990 igen
/gen-model.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1991 igen
/$(DEPDIR
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)
1992 igen
/gen-itable.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1993 igen
/$(DEPDIR
)/$(am__dirstamp
)
1994 igen
/gen-icache.
$(OBJEXT
): igen
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) \
1995 igen
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)
1996 igen
/gen-semantics.
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) \
1997 igen
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)
1998 igen
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): igen
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) \
1999 igen
/$(DEPDIR
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)
2000 igen
/gen-support.
$(OBJEXT
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/$(am__dirstamp
) \
2001 igen
/$(DEPDIR
)/$(am__dirstamp
)
2002 igen
/gen-engine.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2003 igen
/$(DEPDIR
)/$(am__dirstamp
)
2004 igen
/gen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2005 igen
/$(DEPDIR
)/$(am__dirstamp
)
2007 @SIM_ENABLE_IGEN_FALSE@igen
/libigen.a
: $(igen_libigen_a_OBJECTS
) $(igen_libigen_a_DEPENDENCIES
) $(EXTRA_igen_libigen_a_DEPENDENCIES
) igen
/$(am__dirstamp
)
2008 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_at
)-rm -f igen
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2009 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_AR
)$(igen_libigen_a_AR
) igen
/libigen.a
$(igen_libigen_a_OBJECTS
) $(igen_libigen_a_LIBADD
)
2010 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_at
)$(RANLIB
) igen
/libigen.a
2012 clean-checkPROGRAMS
:
2013 @list
='$(check_PROGRAMS)'; test -n
"$$list" || exit
0; \
2014 echo
" rm -f" $$list; \
2015 rm -f
$$list || exit
$$?
; \
2016 test -n
"$(EXEEXT)" || exit
0; \
2017 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2018 echo
" rm -f" $$list; \
2021 clean-noinstPROGRAMS
:
2022 @list
='$(noinst_PROGRAMS)'; test -n
"$$list" || exit
0; \
2023 echo
" rm -f" $$list; \
2024 rm -f
$$list || exit
$$?
; \
2025 test -n
"$(EXEEXT)" || exit
0; \
2026 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2027 echo
" rm -f" $$list; \
2029 aarch64
/$(am__dirstamp
):
2031 @
: > aarch64
/$(am__dirstamp
)
2033 aarch64
/run
$(EXEEXT
): $(aarch64_run_OBJECTS
) $(aarch64_run_DEPENDENCIES
) $(EXTRA_aarch64_run_DEPENDENCIES
) aarch64
/$(am__dirstamp
)
2034 @
rm -f aarch64
/run
$(EXEEXT
)
2035 $(AM_V_CCLD
)$(LINK
) $(aarch64_run_OBJECTS
) $(aarch64_run_LDADD
) $(LIBS
)
2036 arm
/$(am__dirstamp
):
2038 @
: > arm
/$(am__dirstamp
)
2040 arm
/run
$(EXEEXT
): $(arm_run_OBJECTS
) $(arm_run_DEPENDENCIES
) $(EXTRA_arm_run_DEPENDENCIES
) arm
/$(am__dirstamp
)
2041 @
rm -f arm
/run
$(EXEEXT
)
2042 $(AM_V_CCLD
)$(LINK
) $(arm_run_OBJECTS
) $(arm_run_LDADD
) $(LIBS
)
2043 avr
/$(am__dirstamp
):
2045 @
: > avr
/$(am__dirstamp
)
2047 avr
/run
$(EXEEXT
): $(avr_run_OBJECTS
) $(avr_run_DEPENDENCIES
) $(EXTRA_avr_run_DEPENDENCIES
) avr
/$(am__dirstamp
)
2048 @
rm -f avr
/run
$(EXEEXT
)
2049 $(AM_V_CCLD
)$(LINK
) $(avr_run_OBJECTS
) $(avr_run_LDADD
) $(LIBS
)
2050 bfin
/$(am__dirstamp
):
2052 @
: > bfin
/$(am__dirstamp
)
2054 bfin
/run
$(EXEEXT
): $(bfin_run_OBJECTS
) $(bfin_run_DEPENDENCIES
) $(EXTRA_bfin_run_DEPENDENCIES
) bfin
/$(am__dirstamp
)
2055 @
rm -f bfin
/run
$(EXEEXT
)
2056 $(AM_V_CCLD
)$(LINK
) $(bfin_run_OBJECTS
) $(bfin_run_LDADD
) $(LIBS
)
2057 bpf
/$(am__dirstamp
):
2059 @
: > bpf
/$(am__dirstamp
)
2061 bpf
/run
$(EXEEXT
): $(bpf_run_OBJECTS
) $(bpf_run_DEPENDENCIES
) $(EXTRA_bpf_run_DEPENDENCIES
) bpf
/$(am__dirstamp
)
2062 @
rm -f bpf
/run
$(EXEEXT
)
2063 $(AM_V_CCLD
)$(LINK
) $(bpf_run_OBJECTS
) $(bpf_run_LDADD
) $(LIBS
)
2064 cr16
/$(am__dirstamp
):
2066 @
: > cr16
/$(am__dirstamp
)
2067 cr16
/$(DEPDIR
)/$(am__dirstamp
):
2068 @
$(MKDIR_P
) cr16
/$(DEPDIR
)
2069 @
: > cr16
/$(DEPDIR
)/$(am__dirstamp
)
2070 cr16
/gencode.
$(OBJEXT
): cr16
/$(am__dirstamp
) \
2071 cr16
/$(DEPDIR
)/$(am__dirstamp
)
2073 @SIM_ENABLE_ARCH_cr16_FALSE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) $(EXTRA_cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
2074 @SIM_ENABLE_ARCH_cr16_FALSE@ @
rm -f cr16
/gencode
$(EXEEXT
)
2075 @SIM_ENABLE_ARCH_cr16_FALSE@
$(AM_V_CCLD
)$(LINK
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
) $(LIBS
)
2077 cr16
/run
$(EXEEXT
): $(cr16_run_OBJECTS
) $(cr16_run_DEPENDENCIES
) $(EXTRA_cr16_run_DEPENDENCIES
) cr16
/$(am__dirstamp
)
2078 @
rm -f cr16
/run
$(EXEEXT
)
2079 $(AM_V_CCLD
)$(LINK
) $(cr16_run_OBJECTS
) $(cr16_run_LDADD
) $(LIBS
)
2080 cris
/$(am__dirstamp
):
2082 @
: > cris
/$(am__dirstamp
)
2084 cris
/run
$(EXEEXT
): $(cris_run_OBJECTS
) $(cris_run_DEPENDENCIES
) $(EXTRA_cris_run_DEPENDENCIES
) cris
/$(am__dirstamp
)
2085 @
rm -f cris
/run
$(EXEEXT
)
2086 $(AM_V_CCLD
)$(LINK
) $(cris_run_OBJECTS
) $(cris_run_LDADD
) $(LIBS
)
2087 cris
/$(DEPDIR
)/$(am__dirstamp
):
2088 @
$(MKDIR_P
) cris
/$(DEPDIR
)
2089 @
: > cris
/$(DEPDIR
)/$(am__dirstamp
)
2090 cris
/rvdummy.
$(OBJEXT
): cris
/$(am__dirstamp
) \
2091 cris
/$(DEPDIR
)/$(am__dirstamp
)
2093 cris
/rvdummy
$(EXEEXT
): $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_DEPENDENCIES
) $(EXTRA_cris_rvdummy_DEPENDENCIES
) cris
/$(am__dirstamp
)
2094 @
rm -f cris
/rvdummy
$(EXEEXT
)
2095 $(AM_V_CCLD
)$(LINK
) $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_LDADD
) $(LIBS
)
2096 d10v
/$(am__dirstamp
):
2098 @
: > d10v
/$(am__dirstamp
)
2099 d10v
/$(DEPDIR
)/$(am__dirstamp
):
2100 @
$(MKDIR_P
) d10v
/$(DEPDIR
)
2101 @
: > d10v
/$(DEPDIR
)/$(am__dirstamp
)
2102 d10v
/gencode.
$(OBJEXT
): d10v
/$(am__dirstamp
) \
2103 d10v
/$(DEPDIR
)/$(am__dirstamp
)
2105 @SIM_ENABLE_ARCH_d10v_FALSE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) $(EXTRA_d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
2106 @SIM_ENABLE_ARCH_d10v_FALSE@ @
rm -f d10v
/gencode
$(EXEEXT
)
2107 @SIM_ENABLE_ARCH_d10v_FALSE@
$(AM_V_CCLD
)$(LINK
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
) $(LIBS
)
2109 d10v
/run
$(EXEEXT
): $(d10v_run_OBJECTS
) $(d10v_run_DEPENDENCIES
) $(EXTRA_d10v_run_DEPENDENCIES
) d10v
/$(am__dirstamp
)
2110 @
rm -f d10v
/run
$(EXEEXT
)
2111 $(AM_V_CCLD
)$(LINK
) $(d10v_run_OBJECTS
) $(d10v_run_LDADD
) $(LIBS
)
2112 erc32
/$(am__dirstamp
):
2114 @
: > erc32
/$(am__dirstamp
)
2116 erc32
/run
$(EXEEXT
): $(erc32_run_OBJECTS
) $(erc32_run_DEPENDENCIES
) $(EXTRA_erc32_run_DEPENDENCIES
) erc32
/$(am__dirstamp
)
2117 @
rm -f erc32
/run
$(EXEEXT
)
2118 $(AM_V_CCLD
)$(LINK
) $(erc32_run_OBJECTS
) $(erc32_run_LDADD
) $(LIBS
)
2119 erc32
/$(DEPDIR
)/$(am__dirstamp
):
2120 @
$(MKDIR_P
) erc32
/$(DEPDIR
)
2121 @
: > erc32
/$(DEPDIR
)/$(am__dirstamp
)
2122 erc32
/sis.
$(OBJEXT
): erc32
/$(am__dirstamp
) \
2123 erc32
/$(DEPDIR
)/$(am__dirstamp
)
2125 @SIM_ENABLE_ARCH_erc32_FALSE@erc32
/sis
$(EXEEXT
): $(erc32_sis_OBJECTS
) $(erc32_sis_DEPENDENCIES
) $(EXTRA_erc32_sis_DEPENDENCIES
) erc32
/$(am__dirstamp
)
2126 @SIM_ENABLE_ARCH_erc32_FALSE@ @
rm -f erc32
/sis
$(EXEEXT
)
2127 @SIM_ENABLE_ARCH_erc32_FALSE@
$(AM_V_CCLD
)$(LINK
) $(erc32_sis_OBJECTS
) $(erc32_sis_LDADD
) $(LIBS
)
2128 example-synacor
/$(am__dirstamp
):
2129 @
$(MKDIR_P
) example-synacor
2130 @
: > example-synacor
/$(am__dirstamp
)
2132 example-synacor
/run
$(EXEEXT
): $(example_synacor_run_OBJECTS
) $(example_synacor_run_DEPENDENCIES
) $(EXTRA_example_synacor_run_DEPENDENCIES
) example-synacor
/$(am__dirstamp
)
2133 @
rm -f example-synacor
/run
$(EXEEXT
)
2134 $(AM_V_CCLD
)$(LINK
) $(example_synacor_run_OBJECTS
) $(example_synacor_run_LDADD
) $(LIBS
)
2135 frv
/$(am__dirstamp
):
2137 @
: > frv
/$(am__dirstamp
)
2139 frv
/run
$(EXEEXT
): $(frv_run_OBJECTS
) $(frv_run_DEPENDENCIES
) $(EXTRA_frv_run_DEPENDENCIES
) frv
/$(am__dirstamp
)
2140 @
rm -f frv
/run
$(EXEEXT
)
2141 $(AM_V_CCLD
)$(LINK
) $(frv_run_OBJECTS
) $(frv_run_LDADD
) $(LIBS
)
2142 ft32
/$(am__dirstamp
):
2144 @
: > ft32
/$(am__dirstamp
)
2146 ft32
/run
$(EXEEXT
): $(ft32_run_OBJECTS
) $(ft32_run_DEPENDENCIES
) $(EXTRA_ft32_run_DEPENDENCIES
) ft32
/$(am__dirstamp
)
2147 @
rm -f ft32
/run
$(EXEEXT
)
2148 $(AM_V_CCLD
)$(LINK
) $(ft32_run_OBJECTS
) $(ft32_run_LDADD
) $(LIBS
)
2149 h8300
/$(am__dirstamp
):
2151 @
: > h8300
/$(am__dirstamp
)
2153 h8300
/run
$(EXEEXT
): $(h8300_run_OBJECTS
) $(h8300_run_DEPENDENCIES
) $(EXTRA_h8300_run_DEPENDENCIES
) h8300
/$(am__dirstamp
)
2154 @
rm -f h8300
/run
$(EXEEXT
)
2155 $(AM_V_CCLD
)$(LINK
) $(h8300_run_OBJECTS
) $(h8300_run_LDADD
) $(LIBS
)
2157 igen
/filter$(EXEEXT
): $(igen_filter_OBJECTS
) $(igen_filter_DEPENDENCIES
) $(EXTRA_igen_filter_DEPENDENCIES
) igen
/$(am__dirstamp
)
2158 @
rm -f igen
/filter$(EXEEXT
)
2159 $(AM_V_CCLD
)$(LINK
) $(igen_filter_OBJECTS
) $(igen_filter_LDADD
) $(LIBS
)
2161 igen
/gen
$(EXEEXT
): $(igen_gen_OBJECTS
) $(igen_gen_DEPENDENCIES
) $(EXTRA_igen_gen_DEPENDENCIES
) igen
/$(am__dirstamp
)
2162 @
rm -f igen
/gen
$(EXEEXT
)
2163 $(AM_V_CCLD
)$(LINK
) $(igen_gen_OBJECTS
) $(igen_gen_LDADD
) $(LIBS
)
2164 igen
/igen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2165 igen
/$(DEPDIR
)/$(am__dirstamp
)
2167 @SIM_ENABLE_IGEN_FALSE@igen
/igen
$(EXEEXT
): $(igen_igen_OBJECTS
) $(igen_igen_DEPENDENCIES
) $(EXTRA_igen_igen_DEPENDENCIES
) igen
/$(am__dirstamp
)
2168 @SIM_ENABLE_IGEN_FALSE@ @
rm -f igen
/igen
$(EXEEXT
)
2169 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_CCLD
)$(LINK
) $(igen_igen_OBJECTS
) $(igen_igen_LDADD
) $(LIBS
)
2171 igen
/ld-cache
$(EXEEXT
): $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_DEPENDENCIES
) $(EXTRA_igen_ld_cache_DEPENDENCIES
) igen
/$(am__dirstamp
)
2172 @
rm -f igen
/ld-cache
$(EXEEXT
)
2173 $(AM_V_CCLD
)$(LINK
) $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_LDADD
) $(LIBS
)
2175 igen
/ld-decode
$(EXEEXT
): $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_DEPENDENCIES
) $(EXTRA_igen_ld_decode_DEPENDENCIES
) igen
/$(am__dirstamp
)
2176 @
rm -f igen
/ld-decode
$(EXEEXT
)
2177 $(AM_V_CCLD
)$(LINK
) $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_LDADD
) $(LIBS
)
2179 igen
/ld-insn
$(EXEEXT
): $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_DEPENDENCIES
) $(EXTRA_igen_ld_insn_DEPENDENCIES
) igen
/$(am__dirstamp
)
2180 @
rm -f igen
/ld-insn
$(EXEEXT
)
2181 $(AM_V_CCLD
)$(LINK
) $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_LDADD
) $(LIBS
)
2183 igen
/table
$(EXEEXT
): $(igen_table_OBJECTS
) $(igen_table_DEPENDENCIES
) $(EXTRA_igen_table_DEPENDENCIES
) igen
/$(am__dirstamp
)
2184 @
rm -f igen
/table
$(EXEEXT
)
2185 $(AM_V_CCLD
)$(LINK
) $(igen_table_OBJECTS
) $(igen_table_LDADD
) $(LIBS
)
2186 iq2000
/$(am__dirstamp
):
2188 @
: > iq2000
/$(am__dirstamp
)
2190 iq2000
/run
$(EXEEXT
): $(iq2000_run_OBJECTS
) $(iq2000_run_DEPENDENCIES
) $(EXTRA_iq2000_run_DEPENDENCIES
) iq2000
/$(am__dirstamp
)
2191 @
rm -f iq2000
/run
$(EXEEXT
)
2192 $(AM_V_CCLD
)$(LINK
) $(iq2000_run_OBJECTS
) $(iq2000_run_LDADD
) $(LIBS
)
2193 lm32
/$(am__dirstamp
):
2195 @
: > lm32
/$(am__dirstamp
)
2197 lm32
/run
$(EXEEXT
): $(lm32_run_OBJECTS
) $(lm32_run_DEPENDENCIES
) $(EXTRA_lm32_run_DEPENDENCIES
) lm32
/$(am__dirstamp
)
2198 @
rm -f lm32
/run
$(EXEEXT
)
2199 $(AM_V_CCLD
)$(LINK
) $(lm32_run_OBJECTS
) $(lm32_run_LDADD
) $(LIBS
)
2200 m32c
/$(am__dirstamp
):
2202 @
: > m32c
/$(am__dirstamp
)
2203 m32c
/$(DEPDIR
)/$(am__dirstamp
):
2204 @
$(MKDIR_P
) m32c
/$(DEPDIR
)
2205 @
: > m32c
/$(DEPDIR
)/$(am__dirstamp
)
2206 m32c
/opc2c.
$(OBJEXT
): m32c
/$(am__dirstamp
) \
2207 m32c
/$(DEPDIR
)/$(am__dirstamp
)
2209 @SIM_ENABLE_ARCH_m32c_FALSE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) $(EXTRA_m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
2210 @SIM_ENABLE_ARCH_m32c_FALSE@ @
rm -f m32c
/opc2c
$(EXEEXT
)
2211 @SIM_ENABLE_ARCH_m32c_FALSE@
$(AM_V_CCLD
)$(LINK
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
) $(LIBS
)
2213 m32c
/run
$(EXEEXT
): $(m32c_run_OBJECTS
) $(m32c_run_DEPENDENCIES
) $(EXTRA_m32c_run_DEPENDENCIES
) m32c
/$(am__dirstamp
)
2214 @
rm -f m32c
/run
$(EXEEXT
)
2215 $(AM_V_CCLD
)$(LINK
) $(m32c_run_OBJECTS
) $(m32c_run_LDADD
) $(LIBS
)
2216 m32r
/$(am__dirstamp
):
2218 @
: > m32r
/$(am__dirstamp
)
2220 m32r
/run
$(EXEEXT
): $(m32r_run_OBJECTS
) $(m32r_run_DEPENDENCIES
) $(EXTRA_m32r_run_DEPENDENCIES
) m32r
/$(am__dirstamp
)
2221 @
rm -f m32r
/run
$(EXEEXT
)
2222 $(AM_V_CCLD
)$(LINK
) $(m32r_run_OBJECTS
) $(m32r_run_LDADD
) $(LIBS
)
2223 m68hc11
/$(am__dirstamp
):
2225 @
: > m68hc11
/$(am__dirstamp
)
2226 m68hc11
/$(DEPDIR
)/$(am__dirstamp
):
2227 @
$(MKDIR_P
) m68hc11
/$(DEPDIR
)
2228 @
: > m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
2229 m68hc11
/gencode.
$(OBJEXT
): m68hc11
/$(am__dirstamp
) \
2230 m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
2232 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11
/gencode
$(EXEEXT
): $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_DEPENDENCIES
) $(EXTRA_m68hc11_gencode_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
2233 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @
rm -f m68hc11
/gencode
$(EXEEXT
)
2234 @SIM_ENABLE_ARCH_m68hc11_FALSE@
$(AM_V_CCLD
)$(LINK
) $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_LDADD
) $(LIBS
)
2236 m68hc11
/run
$(EXEEXT
): $(m68hc11_run_OBJECTS
) $(m68hc11_run_DEPENDENCIES
) $(EXTRA_m68hc11_run_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
2237 @
rm -f m68hc11
/run
$(EXEEXT
)
2238 $(AM_V_CCLD
)$(LINK
) $(m68hc11_run_OBJECTS
) $(m68hc11_run_LDADD
) $(LIBS
)
2239 mcore
/$(am__dirstamp
):
2241 @
: > mcore
/$(am__dirstamp
)
2243 mcore
/run
$(EXEEXT
): $(mcore_run_OBJECTS
) $(mcore_run_DEPENDENCIES
) $(EXTRA_mcore_run_DEPENDENCIES
) mcore
/$(am__dirstamp
)
2244 @
rm -f mcore
/run
$(EXEEXT
)
2245 $(AM_V_CCLD
)$(LINK
) $(mcore_run_OBJECTS
) $(mcore_run_LDADD
) $(LIBS
)
2246 microblaze
/$(am__dirstamp
):
2247 @
$(MKDIR_P
) microblaze
2248 @
: > microblaze
/$(am__dirstamp
)
2250 microblaze
/run
$(EXEEXT
): $(microblaze_run_OBJECTS
) $(microblaze_run_DEPENDENCIES
) $(EXTRA_microblaze_run_DEPENDENCIES
) microblaze
/$(am__dirstamp
)
2251 @
rm -f microblaze
/run
$(EXEEXT
)
2252 $(AM_V_CCLD
)$(LINK
) $(microblaze_run_OBJECTS
) $(microblaze_run_LDADD
) $(LIBS
)
2253 mips
/$(am__dirstamp
):
2255 @
: > mips
/$(am__dirstamp
)
2257 mips
/run
$(EXEEXT
): $(mips_run_OBJECTS
) $(mips_run_DEPENDENCIES
) $(EXTRA_mips_run_DEPENDENCIES
) mips
/$(am__dirstamp
)
2258 @
rm -f mips
/run
$(EXEEXT
)
2259 $(AM_V_CCLD
)$(LINK
) $(mips_run_OBJECTS
) $(mips_run_LDADD
) $(LIBS
)
2260 mn10300
/$(am__dirstamp
):
2262 @
: > mn10300
/$(am__dirstamp
)
2264 mn10300
/run
$(EXEEXT
): $(mn10300_run_OBJECTS
) $(mn10300_run_DEPENDENCIES
) $(EXTRA_mn10300_run_DEPENDENCIES
) mn10300
/$(am__dirstamp
)
2265 @
rm -f mn10300
/run
$(EXEEXT
)
2266 $(AM_V_CCLD
)$(LINK
) $(mn10300_run_OBJECTS
) $(mn10300_run_LDADD
) $(LIBS
)
2267 moxie
/$(am__dirstamp
):
2269 @
: > moxie
/$(am__dirstamp
)
2271 moxie
/run
$(EXEEXT
): $(moxie_run_OBJECTS
) $(moxie_run_DEPENDENCIES
) $(EXTRA_moxie_run_DEPENDENCIES
) moxie
/$(am__dirstamp
)
2272 @
rm -f moxie
/run
$(EXEEXT
)
2273 $(AM_V_CCLD
)$(LINK
) $(moxie_run_OBJECTS
) $(moxie_run_LDADD
) $(LIBS
)
2274 msp430
/$(am__dirstamp
):
2276 @
: > msp430
/$(am__dirstamp
)
2278 msp430
/run
$(EXEEXT
): $(msp430_run_OBJECTS
) $(msp430_run_DEPENDENCIES
) $(EXTRA_msp430_run_DEPENDENCIES
) msp430
/$(am__dirstamp
)
2279 @
rm -f msp430
/run
$(EXEEXT
)
2280 $(AM_V_CCLD
)$(LINK
) $(msp430_run_OBJECTS
) $(msp430_run_LDADD
) $(LIBS
)
2281 or1k
/$(am__dirstamp
):
2283 @
: > or1k
/$(am__dirstamp
)
2285 or1k
/run
$(EXEEXT
): $(or1k_run_OBJECTS
) $(or1k_run_DEPENDENCIES
) $(EXTRA_or1k_run_DEPENDENCIES
) or1k
/$(am__dirstamp
)
2286 @
rm -f or1k
/run
$(EXEEXT
)
2287 $(AM_V_CCLD
)$(LINK
) $(or1k_run_OBJECTS
) $(or1k_run_LDADD
) $(LIBS
)
2288 ppc
/$(am__dirstamp
):
2290 @
: > ppc
/$(am__dirstamp
)
2291 ppc
/$(DEPDIR
)/$(am__dirstamp
):
2292 @
$(MKDIR_P
) ppc
/$(DEPDIR
)
2293 @
: > ppc
/$(DEPDIR
)/$(am__dirstamp
)
2294 ppc
/psim.
$(OBJEXT
): ppc
/$(am__dirstamp
) ppc
/$(DEPDIR
)/$(am__dirstamp
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)
3045 -rm -f common
/$(am__dirstamp
)
3046 -rm -f cr16
/$(DEPDIR
)/$(am__dirstamp
)
3047 -rm -f cr16
/$(am__dirstamp
)
3048 -rm -f cris
/$(DEPDIR
)/$(am__dirstamp
)
3049 -rm -f cris
/$(am__dirstamp
)
3050 -rm -f d10v
/$(DEPDIR
)/$(am__dirstamp
)
3051 -rm -f d10v
/$(am__dirstamp
)
3052 -rm -f erc32
/$(DEPDIR
)/$(am__dirstamp
)
3053 -rm -f erc32
/$(am__dirstamp
)
3054 -rm -f example-synacor
/$(am__dirstamp
)
3055 -rm -f frv
/$(am__dirstamp
)
3056 -rm -f ft32
/$(am__dirstamp
)
3057 -rm -f h8300
/$(am__dirstamp
)
3058 -rm -f igen
/$(DEPDIR
)/$(am__dirstamp
)
3059 -rm -f igen
/$(am__dirstamp
)
3060 -rm -f iq2000
/$(am__dirstamp
)
3061 -rm -f lm32
/$(am__dirstamp
)
3062 -rm -f m32c
/$(DEPDIR
)/$(am__dirstamp
)
3063 -rm -f m32c
/$(am__dirstamp
)
3064 -rm -f m32r
/$(am__dirstamp
)
3065 -rm -f m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
3066 -rm -f m68hc11
/$(am__dirstamp
)
3067 -rm -f mcore
/$(am__dirstamp
)
3068 -rm -f microblaze
/$(am__dirstamp
)
3069 -rm -f mips
/$(am__dirstamp
)
3070 -rm -f mn10300
/$(am__dirstamp
)
3071 -rm -f moxie
/$(am__dirstamp
)
3072 -rm -f msp430
/$(am__dirstamp
)
3073 -rm -f or1k
/$(am__dirstamp
)
3074 -rm -f ppc
/$(DEPDIR
)/$(am__dirstamp
)
3075 -rm -f ppc
/$(am__dirstamp
)
3076 -rm -f pru
/$(am__dirstamp
)
3077 -rm -f riscv
/$(am__dirstamp
)
3078 -rm -f rl78
/$(am__dirstamp
)
3079 -rm -f rx
/$(am__dirstamp
)
3080 -rm -f sh
/$(DEPDIR
)/$(am__dirstamp
)
3081 -rm -f sh
/$(am__dirstamp
)
3082 -rm -f testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
3083 -rm -f testsuite
/common
/$(am__dirstamp
)
3084 -rm -f v850
/$(am__dirstamp
)
3085 -test -z
"$(DISTCLEANFILES)" ||
rm -f
$(DISTCLEANFILES
)
3087 maintainer-clean-generic
:
3088 @echo
"This command is intended for maintainers to use"
3089 @echo
"it deletes files that may require special tools to rebuild."
3090 clean: clean-recursive
3092 clean-am
: clean-checkPROGRAMS clean-generic clean-libtool \
3093 clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
3095 distclean: distclean-recursive
3096 -rm -f
$(am__CONFIG_DISTCLEAN_FILES
)
3097 -rm -rf common
/$(DEPDIR
) cr16
/$(DEPDIR
) cris
/$(DEPDIR
) d10v
/$(DEPDIR
) erc32
/$(DEPDIR
) igen
/$(DEPDIR
) m32c
/$(DEPDIR
) m68hc11
/$(DEPDIR
) ppc
/$(DEPDIR
) sh
/$(DEPDIR
) testsuite
/common
/$(DEPDIR
)
3099 distclean-am
: clean-am distclean-DEJAGNU distclean-compile \
3100 distclean-generic distclean-hdr distclean-libtool \
3107 html
: html-recursive
3111 info: info-recursive
3115 install-data-am
: install-armdocDATA install-data-local install-dtbDATA \
3116 install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
3117 install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
3119 install-dvi
: install-dvi-recursive
3123 install-exec-am
: install-exec-local
3125 install-html
: install-html-recursive
3129 install-info
: install-info-recursive
3135 install-pdf
: install-pdf-recursive
3139 install-ps
: install-ps-recursive
3145 maintainer-clean
: maintainer-clean-recursive
3146 -rm -f
$(am__CONFIG_DISTCLEAN_FILES
)
3147 -rm -rf
$(top_srcdir
)/autom4te.cache
3148 -rm -rf common
/$(DEPDIR
) cr16
/$(DEPDIR
) cris
/$(DEPDIR
) d10v
/$(DEPDIR
) erc32
/$(DEPDIR
) igen
/$(DEPDIR
) m32c
/$(DEPDIR
) m68hc11
/$(DEPDIR
) ppc
/$(DEPDIR
) sh
/$(DEPDIR
) testsuite
/common
/$(DEPDIR
)
3150 maintainer-clean-am
: distclean-am maintainer-clean-generic
3152 mostlyclean: mostlyclean-recursive
3154 mostlyclean-am
: mostlyclean-compile mostlyclean-generic \
3165 uninstall-am
: uninstall-armdocDATA uninstall-dtbDATA \
3166 uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
3167 uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
3168 uninstall-ppcdocDATA uninstall-rxdocDATA
3170 .MAKE
: $(am__recursive_targets
) all check-am install-am install-strip
3172 .PHONY
: $(am__recursive_targets
) CTAGS GTAGS TAGS
all all-am \
3173 am--refresh
check check-DEJAGNU check-TESTS check-am
clean \
3174 clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
3175 clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
3176 cscopelist-am ctags ctags-am
distclean distclean-DEJAGNU \
3177 distclean-compile distclean-generic distclean-hdr \
3178 distclean-libtool distclean-tags
dvi dvi-am html html-am
info \
3179 info-am
install install-am install-armdocDATA install-data \
3180 install-data-am install-data-local install-dtbDATA install-dvi \
3181 install-dvi-am install-erc32docDATA install-exec \
3182 install-exec-am install-exec-local install-frvdocDATA \
3183 install-html install-html-am install-info install-info-am \
3184 install-man install-or1kdocDATA install-pdf install-pdf-am \
3185 install-pkgincludeHEADERS install-ppcdocDATA install-ps \
3186 install-ps-am install-rxdocDATA install-strip
installcheck \
3187 installcheck-am
installdirs installdirs-am maintainer-clean \
3188 maintainer-clean-generic
mostlyclean mostlyclean-compile \
3189 mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
3190 recheck
tags tags-am
uninstall uninstall-am \
3191 uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
3192 uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
3193 uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
3198 @include_makefile@
$(GNULIB_PARENT_DIR
)/gnulib
/Makefile.gnulib.inc
3200 # Generate target constants for newlib/libgloss from its source tree.
3201 # This file is shipped with distributions so we build in the source dir.
3202 # Use `make nltvals' to rebuild.
3205 $(srccom
)/gennltvals.py
--cpp "$(CPP)"
3207 common
/version.c
: common
/version.c-stamp
; @true
3208 common
/version.c-stamp
: $(srcroot
)/gdb
/version.in
$(srcroot
)/bfd
/version.h
$(srcdir)/common
/create-version.sh
3209 $(AM_V_GEN
)$(SHELL
) $(srcdir)/common
/create-version.sh
$(srcroot
)/gdb
$@.tmp
3210 $(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@
:-stamp
=)
3213 # FIXME This is one very simple-minded way of generating the file hw-config.h.
3214 %/hw-config.h
: %/stamp-hw
; @true
3215 %/stamp-hw
: Makefile
3216 $(AM_V_GEN
)set
-e
; \
3218 sim_hw
="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
3219 echo
"/* generated by Makefile */" ; \
3220 printf
"extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
3221 echo
"const struct hw_descriptor * const hw_descriptors[] = {" ; \
3222 printf
" dv_%s_descriptor,\n" $$sim_hw ; \
3226 $(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@D
)/hw-config.h
; \
3228 .PRECIOUS
: %/stamp-hw
3230 # Alias for developers.
3231 @SIM_ENABLE_IGEN_TRUE@igen
: $(IGEN
)
3233 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3234 @SIM_ENABLE_IGEN_TRUE@igen
/libigen.a
: $(igen_libigen_a_OBJECTS
) $(igen_libigen_a_DEPENDENCIES
) $(EXTRA_igen_libigen_a_DEPENDENCIES
) igen
/$(am__dirstamp
)
3235 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_at
)-rm -f
$@
3236 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_AR
)$(AR_FOR_BUILD
) $(ARFLAGS
) $@
$(igen_libigen_a_OBJECTS
) $(igen_libigen_a_LIBADD
)
3237 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_at
)$(RANLIB_FOR_BUILD
) $@
3239 @SIM_ENABLE_IGEN_TRUE@igen
/igen
$(EXEEXT
): $(igen_igen_OBJECTS
) $(igen_igen_DEPENDENCIES
) igen
/$(am__dirstamp
)
3240 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(igen_igen_OBJECTS
) $(igen_igen_LDADD
)
3242 # igen is a build-time only tool. Override the default rules for it.
3243 @SIM_ENABLE_IGEN_TRUE@igen
/%.o
: igen
/%.c
3244 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3246 # Build some of the files in standalone mode for developers of igen itself.
3247 @SIM_ENABLE_IGEN_TRUE@igen
/%-main.o
: igen
/%.c
3248 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -DMAIN
-c
$< -o
$@
3250 site-sim-config.exp
: Makefile
3252 echo
"set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
3253 echo
"set builddir \"$(builddir)\""; \
3254 echo
"set srcdir \"$(srcdir)/testsuite\""; \
3255 $(foreach V
,$(SIM_TOOLCHAIN_VARS
),echo
"set $(V) \"$($(V))\"";) \
3258 # Ignore dirs that only contain configuration settings.
3259 check/.
/config
/%.exp
: ; @true
3260 check/config
/%.exp
: ; @true
3261 check/.
/lib
/%.exp
: ; @true
3262 check/lib
/%.exp
: ; @true
3265 $(AM_V_at
)mkdir
-p testsuite
/$*
3266 $(AM_V_RUNTEST
)$(DO_RUNTEST
) --objdir testsuite
/$* --outdir testsuite
/$* $*.exp
3268 check-DEJAGNU-parallel
:
3270 set
-- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
3271 $(MAKE
) -k
`printf 'check/%s.exp ' $$@`; \
3273 set
-- `printf 'testsuite/%s/ ' $$@`; \
3274 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh \
3275 `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum
; \
3276 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh
-L \
3277 `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log
; \
3279 $(SED
) -n
'/^.*===.*Summary.*===/,$$p' testrun.sum
; \
3282 check-DEJAGNU-single
:
3283 $(AM_V_RUNTEST
)$(DO_RUNTEST
)
3285 # If running a single job, invoking runtest once is faster & has nicer output.
3286 check-DEJAGNU
: site.exp
3287 $(AM_V_at
)(set
-e
; \
3288 EXPECT
=${EXPECT} ; export EXPECT
; \
3289 runtest
=$(RUNTEST
); \
3290 if
$(SHELL
) -c
"$$runtest --version" > /dev
/null
2>&1; then \
3291 case
"$(MAKEFLAGS)" in \
3292 *-j
*) $(MAKE
) check-DEJAGNU-parallel
;; \
3293 *) $(MAKE
) check-DEJAGNU-single
;; \
3296 echo
"WARNING: could not find \`runtest'" 1>&2; :;\
3299 # These tests are build-time only tools. Override the default rules for them.
3300 testsuite
/common
/%.o
: testsuite
/common
/%.c
3301 $(AM_V_CC
)$(COMPILE_FOR_BUILD
) $(testsuite_common_CPPFLAGS
) -c
$< -o
$@
3303 testsuite
/common
/alu-tst
$(EXEEXT
): $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3304 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_LDADD
)
3306 testsuite
/common
/fpu-tst
$(EXEEXT
): $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3307 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_LDADD
)
3309 testsuite
/common
/bits-gen
$(EXEEXT
): $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3310 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_LDADD
)
3312 testsuite
/common
/bits32m0
$(EXEEXT
): $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3313 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_LDADD
)
3315 testsuite
/common
/bits32m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3316 $(AM_V_GEN
)$< 32 0 big
> $@.tmp
3317 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3318 $(AM_V_at
)mv
$@.tmp
$@
3320 testsuite
/common
/bits32m31
$(EXEEXT
): $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3321 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_LDADD
)
3323 testsuite
/common
/bits32m31.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3324 $(AM_V_GEN
)$< 32 31 little
> $@.tmp
3325 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3326 $(AM_V_at
)mv
$@.tmp
$@
3328 testsuite
/common
/bits64m0
$(EXEEXT
): $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3329 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_LDADD
)
3331 testsuite
/common
/bits64m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3332 $(AM_V_GEN
)$< 64 0 big
> $@.tmp
3333 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3334 $(AM_V_at
)mv
$@.tmp
$@
3336 testsuite
/common
/bits64m63
$(EXEEXT
): $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3337 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_LDADD
)
3339 testsuite
/common
/bits64m63.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3340 $(AM_V_GEN
)$< 64 63 little
> $@.tmp
3341 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3342 $(AM_V_at
)mv
$@.tmp
$@
3344 @SIM_ENABLE_ARCH_bfin_TRUE@bfin
/linux-fixed-code.h
: @MAINT@
$(srcdir)/bfin
/linux-fixed-code.s bfin
/local.mk bfin
/$(am__dirstamp
)
3345 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_GEN
)$(AS_FOR_TARGET_BFIN
) $(srcdir)/bfin
/linux-fixed-code.s
-o bfin
/linux-fixed-code.o
3346 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)(\
3347 @SIM_ENABLE_ARCH_bfin_TRUE@ set
-e
; \
3348 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \
3349 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"static const unsigned char bfin_linux_fixed_code[] ="; \
3350 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"{"; \
3351 @SIM_ENABLE_ARCH_bfin_TRUE@
$(OBJDUMP_FOR_TARGET_BFIN
) -d
-z bfin
/linux-fixed-code.o
> $@.dis
; \
3352 @SIM_ENABLE_ARCH_bfin_TRUE@ sed
-n \
3353 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
's:^[^ ]* :0x:' \
3354 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
'/^0x/{s: .*::;s: *$$:,:;s: :, 0x:g;p;}' \
3355 @SIM_ENABLE_ARCH_bfin_TRUE@
$@.dis
; \
3356 @SIM_ENABLE_ARCH_bfin_TRUE@
rm -f
$@.dis
; \
3357 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"};" \
3358 @SIM_ENABLE_ARCH_bfin_TRUE@
) > $@.tmp
3359 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/bfin
/linux-fixed-code.h
3360 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)touch
$(srcdir)/bfin
/linux-fixed-code.h
3362 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/mloop-le.c bpf
/eng-le.h
: bpf
/stamp-mloop-le
; @true
3363 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/stamp-mloop-le
: $(srccom
)/genmloop.sh bpf
/mloop.in
3364 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3365 @SIM_ENABLE_ARCH_bpf_TRUE@
-mono
-scache
-prefix bpfbf_ebpfle
-cpu bpfbf \
3366 @SIM_ENABLE_ARCH_bpf_TRUE@
-infile
$(srcdir)/bpf
/mloop.in \
3367 @SIM_ENABLE_ARCH_bpf_TRUE@
-outfile-prefix bpf
/ -outfile-suffix
-le
3368 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/eng-le.hin bpf
/eng-le.h
3369 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/mloop-le.cin bpf
/mloop-le.c
3370 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)touch
$@
3372 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/mloop-be.c bpf
/eng-be.h
: bpf
/stamp-mloop-be
; @true
3373 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/stamp-mloop-be
: $(srccom
)/genmloop.sh bpf
/mloop.in
3374 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3375 @SIM_ENABLE_ARCH_bpf_TRUE@
-mono
-scache
-prefix bpfbf_ebpfbe
-cpu bpfbf \
3376 @SIM_ENABLE_ARCH_bpf_TRUE@
-infile
$(srcdir)/bpf
/mloop.in \
3377 @SIM_ENABLE_ARCH_bpf_TRUE@
-outfile-prefix bpf
/ -outfile-suffix
-be
3378 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/eng-be.hin bpf
/eng-be.h
3379 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/mloop-be.cin bpf
/mloop-be.c
3380 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)touch
$@
3382 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3383 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
3384 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
)
3386 # gencode is a build-time only tool. Override the default rules for it.
3387 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode.o
: cr16
/gencode.c
3388 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3389 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/cr16-opc.o
: ..
/opcodes
/cr16-opc.c
3390 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3392 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/simops.h
: cr16
/gencode
$(EXEEXT
)
3393 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< -h
>$@
3395 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/table.c
: cr16
/gencode
$(EXEEXT
)
3396 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< >$@
3398 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv10f.c cris
/engv10.h
: cris
/stamp-mloop-v10f
; @true
3399 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v10f
: $(srccom
)/genmloop.sh cris
/mloop.in
3400 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3401 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv10f-switch.c \
3402 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv10f \
3403 @SIM_ENABLE_ARCH_cris_TRUE@
-infile
$(srcdir)/cris
/mloop.in
-outfile-prefix cris
/ -outfile-suffix
-v10f
3404 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v10f.hin cris
/engv10.h
3405 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v10f.cin cris
/mloopv10f.c
3406 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
3408 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv32f.c cris
/engv32.h
: cris
/stamp-mloop-v32f
; @true
3409 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v32f
: $(srccom
)/genmloop.sh cris
/mloop.in
3410 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3411 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv32f-switch.c \
3412 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv32f \
3413 @SIM_ENABLE_ARCH_cris_TRUE@
-infile
$(srcdir)/cris
/mloop.in
-outfile-prefix cris
/ -outfile-suffix
-v32f
3414 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v32f.hin cris
/engv32.h
3415 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v32f.cin cris
/mloopv32f.c
3416 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
3418 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3419 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
3420 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
)
3422 # gencode is a build-time only tool. Override the default rules for it.
3423 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode.o
: d10v
/gencode.c
3424 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3425 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/d10v-opc.o
: ..
/opcodes
/d10v-opc.c
3426 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3428 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/simops.h
: d10v
/gencode
$(EXEEXT
)
3429 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< -h
>$@
3431 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/table.c
: d10v
/gencode
$(EXEEXT
)
3432 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< >$@
3434 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/sis
$(EXEEXT
): erc32
/run
$(EXEEXT
)
3435 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_GEN
)ln
$< $@
2>/dev
/null ||
$(LN_S
) $< $@
2>/dev
/null || cp
-p
$< $@
3437 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/%.o
: erc32
/%.c | erc32
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3438 @SIM_ENABLE_ARCH_erc32_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3439 @SIM_ENABLE_ARCH_erc32_TRUE@sim-
%D-install-exec-local
: installdirs
3440 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
3441 @SIM_ENABLE_ARCH_erc32_TRUE@ n
=`echo sis | sed '$(program_transform_name)'`; \
3442 @SIM_ENABLE_ARCH_erc32_TRUE@
$(LIBTOOL
) --mode
=install $(INSTALL_PROGRAM
) erc32
/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
)
3443 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local
:
3444 @SIM_ENABLE_ARCH_erc32_TRUE@
rm -f
$(DESTDIR
)$(bindir)/sis
3446 @SIM_ENABLE_ARCH_frv_TRUE@frv
/mloop.c frv
/eng.h
: frv
/stamp-mloop
; @true
3447 @SIM_ENABLE_ARCH_frv_TRUE@frv
/stamp-mloop
: $(srccom
)/genmloop.sh frv
/mloop.in
3448 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3449 @SIM_ENABLE_ARCH_frv_TRUE@
-mono
-scache
-parallel-generic-write
-parallel-only \
3450 @SIM_ENABLE_ARCH_frv_TRUE@
-cpu frvbf \
3451 @SIM_ENABLE_ARCH_frv_TRUE@
-infile
$(srcdir)/frv
/mloop.in
-outfile-prefix frv
/
3452 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/eng.hin frv
/eng.h
3453 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/mloop.cin frv
/mloop.c
3454 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)touch
$@
3456 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/mloop.c iq2000
/eng.h
: iq2000
/stamp-mloop
; @true
3457 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/stamp-mloop
: $(srccom
)/genmloop.sh iq2000
/mloop.in
3458 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3459 @SIM_ENABLE_ARCH_iq2000_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
3460 @SIM_ENABLE_ARCH_iq2000_TRUE@
-cpu iq2000bf \
3461 @SIM_ENABLE_ARCH_iq2000_TRUE@
-infile
$(srcdir)/iq2000
/mloop.in
-outfile-prefix iq2000
/
3462 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/eng.hin iq2000
/eng.h
3463 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/mloop.cin iq2000
/mloop.c
3464 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)touch
$@
3466 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/mloop.c lm32
/eng.h
: lm32
/stamp-mloop
; @true
3467 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/stamp-mloop
: $(srccom
)/genmloop.sh lm32
/mloop.in
3468 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3469 @SIM_ENABLE_ARCH_lm32_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
3470 @SIM_ENABLE_ARCH_lm32_TRUE@
-cpu lm32bf \
3471 @SIM_ENABLE_ARCH_lm32_TRUE@
-infile
$(srcdir)/lm32
/mloop.in
-outfile-prefix lm32
/
3472 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/eng.hin lm32
/eng.h
3473 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/mloop.cin lm32
/mloop.c
3474 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)touch
$@
3476 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/%.o
: m32c
/%.c | m32c
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3477 @SIM_ENABLE_ARCH_m32c_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3479 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3480 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
3481 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
)
3483 # opc2c is a build-time only tool. Override the default rules for it.
3484 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c.o
: m32c
/opc2c.c
3485 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3487 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/m32c.c
: m32c
/m32c.opc m32c
/opc2c
$(EXEEXT
)
3488 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
3489 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
3491 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/r8c.c
: m32c
/r8c.opc m32c
/opc2c
$(EXEEXT
)
3492 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
3493 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
3495 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop.c m32r
/eng.h
: m32r
/stamp-mloop
; @true
3496 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop
: $(srccom
)/genmloop.sh m32r
/mloop.in
3497 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3498 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
3499 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rbf \
3500 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloop.in
-outfile-prefix m32r
/
3501 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng.hin m32r
/eng.h
3502 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop.cin m32r
/mloop.c
3503 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
3505 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloopx.c m32r
/engx.h
: m32r
/stamp-mloop
; @true
3506 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-x
: $(srccom
)/genmloop.sh m32r
/mloop.in
3507 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3508 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch semx-switch.c \
3509 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rxf \
3510 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloopx.in
-outfile-prefix m32r
/ -outfile-suffix x
3511 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/engx.hin m32r
/engx.h
3512 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloopx.cin m32r
/mloopx.c
3513 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
3515 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop2.c m32r
/eng2.h
: m32r
/stamp-mloop
; @true
3516 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-2
: $(srccom
)/genmloop.sh m32r
/mloop.in
3517 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3518 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch sem2-switch.c \
3519 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32r2f \
3520 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloop2.in
-outfile-prefix m32r
/ -outfile-suffix
2
3521 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng2.hin m32r
/eng2.h
3522 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop2.cin m32r
/mloop2.c
3523 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
3525 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3526 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode
$(EXEEXT
): $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
3527 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_LDADD
)
3529 # gencode is a build-time only tool. Override the default rules for it.
3530 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode.o
: m68hc11
/gencode.c
3531 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3533 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc11int.c
: m68hc11
/gencode
$(EXEEXT
)
3534 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6811
>$@
3536 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc12int.c
: m68hc11
/gencode
$(EXEEXT
)
3537 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6812
>$@
3539 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_IGEN_ITABLE
): mips
/stamp-igen-itable
3541 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-igen-itable
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(IGEN
)
3542 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
3543 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
3544 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
3545 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
3546 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
3547 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnowidth \
3548 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnounimplemented \
3549 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_IGEN_ITABLE_FLAGS
) \
3550 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
3551 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
3552 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
3553 @SIM_ENABLE_ARCH_mips_TRUE@
-n itable.h
-ht mips
/itable.h \
3554 @SIM_ENABLE_ARCH_mips_TRUE@
-n itable.c
-t mips
/itable.c
3555 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
3557 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_BUILT_SRC_FROM_IGEN
): mn10300
/stamp-igen
3558 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/stamp-igen
: $(mn10300_IGEN_INSN
) $(mn10300_IGEN_INSN_INC
) $(mn10300_IGEN_DC
) $(IGEN
)
3559 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
3560 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_IGEN_TRACE
) \
3561 @SIM_ENABLE_ARCH_mn10300_TRUE@
-G gen-direct-access \
3562 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M mn10300
,am33
-G gen-multi-sim
=am33 \
3563 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M am33_2 \
3564 @SIM_ENABLE_ARCH_mn10300_TRUE@
-I
$(srcdir)/mn10300 \
3565 @SIM_ENABLE_ARCH_mn10300_TRUE@
-i
$(mn10300_IGEN_INSN
) \
3566 @SIM_ENABLE_ARCH_mn10300_TRUE@
-o
$(mn10300_IGEN_DC
) \
3567 @SIM_ENABLE_ARCH_mn10300_TRUE@
-x \
3568 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.h
-hc mn10300
/icache.h \
3569 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.c
-c mn10300
/icache.c \
3570 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.h
-hs mn10300
/semantics.h \
3571 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.c
-s mn10300
/semantics.c \
3572 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.h
-hd mn10300
/idecode.h \
3573 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.c
-d mn10300
/idecode.c \
3574 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.h
-hm mn10300
/model.h \
3575 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.c
-m mn10300
/model.c \
3576 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.h
-hf mn10300
/support.h \
3577 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.c
-f mn10300
/support.c \
3578 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.h
-ht mn10300
/itable.h \
3579 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.c
-t mn10300
/itable.c \
3580 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.h
-he mn10300
/engine.h \
3581 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.c
-e mn10300
/engine.c \
3582 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n irun.c
-r mn10300
/irun.c
3583 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)touch
$@
3585 @SIM_ENABLE_ARCH_moxie_TRUE@moxie
/moxie-gdb.dtb
: @MAINT@ moxie
/moxie-gdb.dts moxie
/$(am__dirstamp
)
3586 @SIM_ENABLE_ARCH_moxie_TRUE@
$(AM_V_GEN
) \
3587 @SIM_ENABLE_ARCH_moxie_TRUE@ if
test "x$(DTC)" != x
; then \
3588 @SIM_ENABLE_ARCH_moxie_TRUE@
$(DTC
) -O dtb
-o
$@.tmp
${srcdir}/moxie
/moxie-gdb.dts || exit
1; \
3589 @SIM_ENABLE_ARCH_moxie_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
${srcdir}/moxie
/moxie-gdb.dtb || exit
1; \
3590 @SIM_ENABLE_ARCH_moxie_TRUE@ touch
${srcdir}/moxie
/moxie-gdb.dtb
; \
3591 @SIM_ENABLE_ARCH_moxie_TRUE@
else \
3592 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"Could not update the moxie-gdb.dtb file because the device "; \
3593 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"tree compiler tool (dtc) is missing. Install the tool to "; \
3594 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"update the device tree blob."; \
3595 @SIM_ENABLE_ARCH_moxie_TRUE@ fi
3597 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/mloop.c or1k
/eng.h
: or1k
/stamp-mloop
; @true
3598 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/stamp-mloop
: $(srccom
)/genmloop.sh or1k
/mloop.in
3599 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3600 @SIM_ENABLE_ARCH_or1k_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
3601 @SIM_ENABLE_ARCH_or1k_TRUE@
-cpu or1k32bf \
3602 @SIM_ENABLE_ARCH_or1k_TRUE@
-infile
$(srcdir)/or1k
/mloop.in
-outfile-prefix or1k
/
3603 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/eng.hin or1k
/eng.h
3604 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/mloop.cin or1k
/mloop.c
3605 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)touch
$@
3607 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/psim
$(EXEEXT
): ppc
/run
$(EXEEXT
)
3608 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)ln
$< $@
2>/dev
/null ||
$(LN_S
) $< $@
2>/dev
/null || cp
-p
$< $@
3610 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/%.o
: ppc
/%.c | ppc
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3611 @SIM_ENABLE_ARCH_ppc_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3613 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.c
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
3614 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--source
$@.tmp
3615 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.c
3616 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.c
3618 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.h
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
3619 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--header
$@.tmp
3620 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.h
3621 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.h
3623 @SIM_ENABLE_ARCH_rl78_TRUE@rl78
/%.o
: rl78
/%.c | rl78
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3624 @SIM_ENABLE_ARCH_rl78_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3626 @SIM_ENABLE_ARCH_rx_TRUE@rx
/%.o
: rx
/%.c | rx
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3627 @SIM_ENABLE_ARCH_rx_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3629 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3630 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode
$(EXEEXT
): $(sh_gencode_OBJECTS
) $(sh_gencode_DEPENDENCIES
) sh
/$(am__dirstamp
)
3631 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(sh_gencode_OBJECTS
) $(sh_gencode_LDADD
)
3633 # gencode is a build-time only tool. Override the default rules for it.
3634 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode.o
: sh
/gencode.c
3635 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3637 @SIM_ENABLE_ARCH_sh_TRUE@sh
/code.c
: sh
/gencode
$(EXEEXT
)
3638 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -x
>$@
3640 @SIM_ENABLE_ARCH_sh_TRUE@sh
/ppi.c
: sh
/gencode
$(EXEEXT
)
3641 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -p
>$@
3643 @SIM_ENABLE_ARCH_sh_TRUE@sh
/table.c
: sh
/gencode
$(EXEEXT
)
3644 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -s
>$@
3646 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_BUILT_SRC_FROM_IGEN
): v850
/stamp-igen
3647 @SIM_ENABLE_ARCH_v850_TRUE@v850
/stamp-igen
: $(v850_IGEN_INSN
) $(v850_IGEN_DC
) $(IGEN
)
3648 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
3649 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_IGEN_TRACE
) \
3650 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-direct-access \
3651 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-zero-r0 \
3652 @SIM_ENABLE_ARCH_v850_TRUE@
-i
$(v850_IGEN_INSN
) \
3653 @SIM_ENABLE_ARCH_v850_TRUE@
-o
$(v850_IGEN_DC
) \
3654 @SIM_ENABLE_ARCH_v850_TRUE@
-x \
3655 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.h
-hc v850
/icache.h \
3656 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.c
-c v850
/icache.c \
3657 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.h
-hs v850
/semantics.h \
3658 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.c
-s v850
/semantics.c \
3659 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.h
-hd v850
/idecode.h \
3660 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.c
-d v850
/idecode.c \
3661 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.h
-hm v850
/model.h \
3662 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.c
-m v850
/model.c \
3663 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.h
-hf v850
/support.h \
3664 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.c
-f v850
/support.c \
3665 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.h
-ht v850
/itable.h \
3666 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.c
-t v850
/itable.c \
3667 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.h
-he v850
/engine.h \
3668 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.c
-e v850
/engine.c \
3669 @SIM_ENABLE_ARCH_v850_TRUE@
-n irun.c
-r v850
/irun.c
3670 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)touch
$@
3672 %/libsim.a
: |
$(SIM_ALL_RECURSIVE_DEPS
)
3673 $(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3675 %/nrun.o
: common
/nrun.c |
%/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3676 $(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3678 all-recursive
: $(SIM_ALL_RECURSIVE_DEPS
)
3680 install-data-local
: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS
)
3681 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(libdir)
3682 lib
=`echo sim | sed '$(program_transform_name)'`; \
3683 for d in
$(SIM_ENABLED_ARCHES
); do \
3685 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
3687 $(INSTALL_DATA
) $$d/libsim.a
$(DESTDIR
)$(libdir)/$$n || exit
1; \
3690 install-exec-local
: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS
)
3691 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
3692 run
=`echo run | sed '$(program_transform_name)'`; \
3693 for d in
$(SIM_ENABLED_ARCHES
); do \
3695 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
3696 $(LIBTOOL
) --mode
=install \
3697 $(INSTALL_PROGRAM
) $$d/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
) || exit
1; \
3700 uninstall-local
: $(SIM_UNINSTALL_LOCAL_DEPS
)
3701 rm -f
$(DESTDIR
)$(bindir)/run
$(DESTDIR
)$(libdir)/libsim.a
3702 for d in
$(SIM_ENABLED_ARCHES
); do \
3703 rm -f
$(DESTDIR
)$(bindir)/run-
$$d $(DESTDIR
)$(libdir)/libsim-
$$d.a
; \
3706 # Tell versions [3.59,3.63) of GNU make to not export all variables.
3707 # Otherwise a system limit (for SysV at least) may be exceeded.