1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
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12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
17 # Copyright (C) 1993-2023 Free Software Foundation, Inc.
19 # This program is free software; you can redistribute it and/or modify
20 # it under the terms of the GNU General Public License as published by
21 # the Free Software Foundation; either version 3 of the License, or
22 # (at your option) any later version.
24 # This program is distributed in the hope that it will be useful,
25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 # GNU General Public License for more details.
29 # You should have received a copy of the GNU General Public License
30 # along with this program. If not, see <http://www.gnu.org/licenses/>.
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161 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_22
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163 @SIM_ENABLE_ARCH_cris_TRUE@am__append_24
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171 @SIM_ENABLE_ARCH_cris_TRUE@am__append_29
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177 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_35
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180 @SIM_ENABLE_ARCH_examples_TRUE@am__append_38
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181 @SIM_ENABLE_ARCH_frv_TRUE@am__append_39
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184 @SIM_ENABLE_ARCH_frv_TRUE@am__append_42
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195 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_53
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198 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_56
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208 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
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209 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
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212 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_62
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213 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_63
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="$(m68hc11_SIM_EXTRA_HW_DEVICES)"
215 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_65
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216 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_66
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218 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_68
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219 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_69
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$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32
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231 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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232 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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234 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_75
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240 @SIM_ENABLE_ARCH_mips_TRUE@am__append_77
= $(mips_BUILD_OUTPUTS
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241 @SIM_ENABLE_ARCH_mips_TRUE@am__append_78
= mips
/multi-include.h mips
/multi-run.c
242 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_79
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/run
243 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_80
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244 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_81
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245 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.h \
246 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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247 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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248 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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249 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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250 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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251 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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255 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_84
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343 arch-subdir.mk .gdbinit
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1043 AS_FOR_TARGET_MIPS
= @AS_FOR_TARGET_MIPS@
1044 AS_FOR_TARGET_MN10300
= @AS_FOR_TARGET_MN10300@
1045 AS_FOR_TARGET_MOXIE
= @AS_FOR_TARGET_MOXIE@
1046 AS_FOR_TARGET_MSP430
= @AS_FOR_TARGET_MSP430@
1047 AS_FOR_TARGET_OR1K
= @AS_FOR_TARGET_OR1K@
1048 AS_FOR_TARGET_PPC
= @AS_FOR_TARGET_PPC@
1049 AS_FOR_TARGET_PRU
= @AS_FOR_TARGET_PRU@
1050 AS_FOR_TARGET_RISCV
= @AS_FOR_TARGET_RISCV@
1051 AS_FOR_TARGET_RL78
= @AS_FOR_TARGET_RL78@
1052 AS_FOR_TARGET_RX
= @AS_FOR_TARGET_RX@
1053 AS_FOR_TARGET_SH
= @AS_FOR_TARGET_SH@
1054 AS_FOR_TARGET_V850
= @AS_FOR_TARGET_V850@
1055 AUTOCONF
= @AUTOCONF@
1056 AUTOHEADER
= @AUTOHEADER@
1057 AUTOMAKE
= @AUTOMAKE@
1060 CCDEPMODE
= @CCDEPMODE@
1061 CC_FOR_BUILD
= @CC_FOR_BUILD@
1062 CC_FOR_TARGET
= @CC_FOR_TARGET@
1063 CC_FOR_TARGET_AARCH64
= @CC_FOR_TARGET_AARCH64@
1064 CC_FOR_TARGET_ARM
= @CC_FOR_TARGET_ARM@
1065 CC_FOR_TARGET_AVR
= @CC_FOR_TARGET_AVR@
1066 CC_FOR_TARGET_BFIN
= @CC_FOR_TARGET_BFIN@
1067 CC_FOR_TARGET_BPF
= @CC_FOR_TARGET_BPF@
1068 CC_FOR_TARGET_CR16
= @CC_FOR_TARGET_CR16@
1069 CC_FOR_TARGET_CRIS
= @CC_FOR_TARGET_CRIS@
1070 CC_FOR_TARGET_D10V
= @CC_FOR_TARGET_D10V@
1071 CC_FOR_TARGET_ERC32
= @CC_FOR_TARGET_ERC32@
1072 CC_FOR_TARGET_EXAMPLE_SYNACOR
= @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1073 CC_FOR_TARGET_FRV
= @CC_FOR_TARGET_FRV@
1074 CC_FOR_TARGET_FT32
= @CC_FOR_TARGET_FT32@
1075 CC_FOR_TARGET_H8300
= @CC_FOR_TARGET_H8300@
1076 CC_FOR_TARGET_IQ2000
= @CC_FOR_TARGET_IQ2000@
1077 CC_FOR_TARGET_LM32
= @CC_FOR_TARGET_LM32@
1078 CC_FOR_TARGET_M32C
= @CC_FOR_TARGET_M32C@
1079 CC_FOR_TARGET_M32R
= @CC_FOR_TARGET_M32R@
1080 CC_FOR_TARGET_M68HC11
= @CC_FOR_TARGET_M68HC11@
1081 CC_FOR_TARGET_MCORE
= @CC_FOR_TARGET_MCORE@
1082 CC_FOR_TARGET_MICROBLAZE
= @CC_FOR_TARGET_MICROBLAZE@
1083 CC_FOR_TARGET_MIPS
= @CC_FOR_TARGET_MIPS@
1084 CC_FOR_TARGET_MN10300
= @CC_FOR_TARGET_MN10300@
1085 CC_FOR_TARGET_MOXIE
= @CC_FOR_TARGET_MOXIE@
1086 CC_FOR_TARGET_MSP430
= @CC_FOR_TARGET_MSP430@
1087 CC_FOR_TARGET_OR1K
= @CC_FOR_TARGET_OR1K@
1088 CC_FOR_TARGET_PPC
= @CC_FOR_TARGET_PPC@
1089 CC_FOR_TARGET_PRU
= @CC_FOR_TARGET_PRU@
1090 CC_FOR_TARGET_RISCV
= @CC_FOR_TARGET_RISCV@
1091 CC_FOR_TARGET_RL78
= @CC_FOR_TARGET_RL78@
1092 CC_FOR_TARGET_RX
= @CC_FOR_TARGET_RX@
1093 CC_FOR_TARGET_SH
= @CC_FOR_TARGET_SH@
1094 CC_FOR_TARGET_V850
= @CC_FOR_TARGET_V850@
1096 CFLAGS_FOR_BUILD
= @CFLAGS_FOR_BUILD@
1097 CGEN_MAINT
= @CGEN_MAINT@
1099 CPPFLAGS
= @CPPFLAGS@
1100 CPPFLAGS_FOR_BUILD
= @CPPFLAGS_FOR_BUILD@
1101 CYGPATH_W
= @CYGPATH_W@
1102 C_DIALECT
= @C_DIALECT@
1105 DSYMUTIL
= @DSYMUTIL@
1115 IGEN_FLAGS_SMP
= @IGEN_FLAGS_SMP@
1117 INSTALL_DATA
= @INSTALL_DATA@
1118 INSTALL_PROGRAM
= @INSTALL_PROGRAM@
1119 INSTALL_SCRIPT
= @INSTALL_SCRIPT@
1120 INSTALL_STRIP_PROGRAM
= @INSTALL_STRIP_PROGRAM@
1123 LDFLAGS_FOR_BUILD
= @LDFLAGS_FOR_BUILD@
1124 LD_FOR_TARGET
= @LD_FOR_TARGET@
1125 LD_FOR_TARGET_AARCH64
= @LD_FOR_TARGET_AARCH64@
1126 LD_FOR_TARGET_ARM
= @LD_FOR_TARGET_ARM@
1127 LD_FOR_TARGET_AVR
= @LD_FOR_TARGET_AVR@
1128 LD_FOR_TARGET_BFIN
= @LD_FOR_TARGET_BFIN@
1129 LD_FOR_TARGET_BPF
= @LD_FOR_TARGET_BPF@
1130 LD_FOR_TARGET_CR16
= @LD_FOR_TARGET_CR16@
1131 LD_FOR_TARGET_CRIS
= @LD_FOR_TARGET_CRIS@
1132 LD_FOR_TARGET_D10V
= @LD_FOR_TARGET_D10V@
1133 LD_FOR_TARGET_ERC32
= @LD_FOR_TARGET_ERC32@
1134 LD_FOR_TARGET_EXAMPLE_SYNACOR
= @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1135 LD_FOR_TARGET_FRV
= @LD_FOR_TARGET_FRV@
1136 LD_FOR_TARGET_FT32
= @LD_FOR_TARGET_FT32@
1137 LD_FOR_TARGET_H8300
= @LD_FOR_TARGET_H8300@
1138 LD_FOR_TARGET_IQ2000
= @LD_FOR_TARGET_IQ2000@
1139 LD_FOR_TARGET_LM32
= @LD_FOR_TARGET_LM32@
1140 LD_FOR_TARGET_M32C
= @LD_FOR_TARGET_M32C@
1141 LD_FOR_TARGET_M32R
= @LD_FOR_TARGET_M32R@
1142 LD_FOR_TARGET_M68HC11
= @LD_FOR_TARGET_M68HC11@
1143 LD_FOR_TARGET_MCORE
= @LD_FOR_TARGET_MCORE@
1144 LD_FOR_TARGET_MICROBLAZE
= @LD_FOR_TARGET_MICROBLAZE@
1145 LD_FOR_TARGET_MIPS
= @LD_FOR_TARGET_MIPS@
1146 LD_FOR_TARGET_MN10300
= @LD_FOR_TARGET_MN10300@
1147 LD_FOR_TARGET_MOXIE
= @LD_FOR_TARGET_MOXIE@
1148 LD_FOR_TARGET_MSP430
= @LD_FOR_TARGET_MSP430@
1149 LD_FOR_TARGET_OR1K
= @LD_FOR_TARGET_OR1K@
1150 LD_FOR_TARGET_PPC
= @LD_FOR_TARGET_PPC@
1151 LD_FOR_TARGET_PRU
= @LD_FOR_TARGET_PRU@
1152 LD_FOR_TARGET_RISCV
= @LD_FOR_TARGET_RISCV@
1153 LD_FOR_TARGET_RL78
= @LD_FOR_TARGET_RL78@
1154 LD_FOR_TARGET_RX
= @LD_FOR_TARGET_RX@
1155 LD_FOR_TARGET_SH
= @LD_FOR_TARGET_SH@
1156 LD_FOR_TARGET_V850
= @LD_FOR_TARGET_V850@
1162 LTLIBOBJS
= @LTLIBOBJS@
1164 MAKEINFO
= @MAKEINFO@
1173 PACKAGE_BUGREPORT
= @PACKAGE_BUGREPORT@
1174 PACKAGE_NAME
= @PACKAGE_NAME@
1175 PACKAGE_STRING
= @PACKAGE_STRING@
1176 PACKAGE_TARNAME
= @PACKAGE_TARNAME@
1177 PACKAGE_URL
= @PACKAGE_URL@
1178 PACKAGE_VERSION
= @PACKAGE_VERSION@
1179 PATH_SEPARATOR
= @PATH_SEPARATOR@
1180 PKGVERSION
= @PKGVERSION@
1181 PKG_CONFIG
= @PKG_CONFIG@
1182 PKG_CONFIG_LIBDIR
= @PKG_CONFIG_LIBDIR@
1183 PKG_CONFIG_PATH
= @PKG_CONFIG_PATH@
1185 RANLIB_FOR_BUILD
= @RANLIB_FOR_BUILD@
1186 READLINE_CFLAGS
= @READLINE_CFLAGS@
1187 READLINE_LIB
= @READLINE_LIB@
1188 REPORT_BUGS_TEXI
= @REPORT_BUGS_TEXI@
1189 REPORT_BUGS_TO
= @REPORT_BUGS_TO@
1190 SDL_CFLAGS
= @SDL_CFLAGS@
1191 SDL_LIBS
= @SDL_LIBS@
1193 SET_MAKE
= @SET_MAKE@
1195 SIM_COMMON_BUILD_FALSE
= @SIM_COMMON_BUILD_FALSE@
1196 SIM_COMMON_BUILD_TRUE
= @SIM_COMMON_BUILD_TRUE@
1197 SIM_ENABLED_ARCHES
= @SIM_ENABLED_ARCHES@
1198 SIM_FRV_TRAPDUMP_FLAGS
= @SIM_FRV_TRAPDUMP_FLAGS@
1199 SIM_HW_CFLAGS
= @SIM_HW_CFLAGS@
1200 SIM_HW_SOCKSER
= @SIM_HW_SOCKSER@
1201 SIM_INLINE
= @SIM_INLINE@
1202 SIM_MIPS_BITSIZE
= @SIM_MIPS_BITSIZE@
1203 SIM_MIPS_FPU_BITSIZE
= @SIM_MIPS_FPU_BITSIZE@
1204 SIM_MIPS_GEN
= @SIM_MIPS_GEN@
1205 SIM_MIPS_IGEN_ITABLE_FLAGS
= @SIM_MIPS_IGEN_ITABLE_FLAGS@
1206 SIM_MIPS_M16_FLAGS
= @SIM_MIPS_M16_FLAGS@
1207 SIM_MIPS_MULTI_IGEN_CONFIGS
= @SIM_MIPS_MULTI_IGEN_CONFIGS@
1208 SIM_MIPS_MULTI_OBJ
= @SIM_MIPS_MULTI_OBJ@
1209 SIM_MIPS_MULTI_SRC
= @SIM_MIPS_MULTI_SRC@
1210 SIM_MIPS_SINGLE_FLAGS
= @SIM_MIPS_SINGLE_FLAGS@
1211 SIM_MIPS_SUBTARGET
= @SIM_MIPS_SUBTARGET@
1212 SIM_PRIMARY_TARGET
= @SIM_PRIMARY_TARGET@
1213 SIM_RISCV_BITSIZE
= @SIM_RISCV_BITSIZE@
1214 SIM_RX_CYCLE_ACCURATE_FLAGS
= @SIM_RX_CYCLE_ACCURATE_FLAGS@
1215 SIM_SUBDIRS
= @SIM_SUBDIRS@
1216 SIM_TOOLCHAIN_VARS
= @SIM_TOOLCHAIN_VARS@
1218 TERMCAP_LIB
= @TERMCAP_LIB@
1220 WARN_CFLAGS
= @WARN_CFLAGS@
1221 WERROR_CFLAGS
= @WERROR_CFLAGS@
1222 abs_builddir
= @abs_builddir@
1223 abs_srcdir
= @abs_srcdir@
1224 abs_top_builddir
= @abs_top_builddir@
1225 abs_top_srcdir
= @abs_top_srcdir@
1226 ac_ct_CC
= @ac_ct_CC@
1227 ac_ct_DUMPBIN
= @ac_ct_DUMPBIN@
1228 am__include
= @am__include@
1229 am__leading_dot
= @am__leading_dot@
1230 am__quote
= @am__quote@
1232 am__untar
= @am__untar@
1235 build_alias
= @build_alias@
1236 build_cpu
= @build_cpu@
1237 build_os
= @build_os@
1238 build_vendor
= @build_vendor@
1239 builddir
= @builddir@
1243 datarootdir
= @datarootdir@
1246 exec_prefix = @
exec_prefix@
1248 host_alias
= @host_alias@
1249 host_cpu
= @host_cpu@
1251 host_vendor
= @host_vendor@
1253 includedir = @
includedir@
1255 install_sh
= @install_sh@
1257 libexecdir
= @libexecdir@
1258 localedir
= @localedir@
1259 localstatedir
= @localstatedir@
1262 oldincludedir = @
oldincludedir@
1265 program_transform_name
= @program_transform_name@
1268 sharedstatedir
= @sharedstatedir@
1269 sim_bitsize
= @sim_bitsize@
1270 sim_float
= @sim_float@
1273 sysconfdir
= @sysconfdir@
1275 target_alias
= @target_alias@
1276 target_cpu
= @target_cpu@
1277 target_os
= @target_os@
1278 target_vendor
= @target_vendor@
1279 top_build_prefix
= @top_build_prefix@
1280 top_builddir
= @top_builddir@
1281 top_srcdir
= @top_srcdir@
1282 AUTOMAKE_OPTIONS
= dejagnu foreign no-dist subdir-objects
1283 ACLOCAL_AMFLAGS
= -Im4
-I..
-I..
/config
1284 GNULIB_PARENT_DIR
= ..
1285 srccom
= $(srcdir)/common
1286 srcroot
= $(srcdir)/..
1287 SUBDIRS
= @subdirs@
$(SIM_SUBDIRS
)
1288 AM_MAKEFLAGS
= SIM_NEW_COMMON_OBJS_
="$(SIM_NEW_COMMON_OBJS)" \
1289 $(am__append_3
) $(am__append_14
) $(am__append_25
) \
1290 $(am__append_50
) $(am__append_59
) $(am__append_64
) \
1291 $(am__append_71
) $(am__append_80
)
1292 pkginclude_HEADERS
= $(am__append_1
)
1293 noinst_LIBRARIES
= common
/libcommon.a
$(am__append_5
) $(am__append_8
) \
1295 BUILT_SOURCES
= $(am__append_16
) $(am__append_20
) $(am__append_27
) \
1296 $(am__append_31
) $(am__append_40
) $(am__append_46
) \
1297 $(am__append_51
) $(am__append_60
) $(am__append_72
) \
1298 $(am__append_81
) $(am__append_87
) $(am__append_96
) \
1300 CLEANFILES
= common
/version.c common
/version.c-stamp \
1301 testsuite
/common
/bits-gen testsuite
/common
/bits32m0.c \
1302 testsuite
/common
/bits32m31.c testsuite
/common
/bits64m0.c \
1303 testsuite
/common
/bits64m63.c
1304 DISTCLEANFILES
= $(am__append_78
)
1305 MOSTLYCLEANFILES
= core
$(common_HW_CONFIG_H_TARGETS
) $(patsubst \
1306 %,%/stamp-hw
,$(SIM_ENABLED_ARCHES
)) \
1307 $(common_GEN_MODULES_C_TARGETS
) $(patsubst \
1308 %,%/stamp-modules
,$(SIM_ENABLED_ARCHES
)) $(am__append_7
) \
1309 site-sim-config.exp testrun.log testrun.sum
$(am__append_18
) \
1310 $(am__append_23
) $(am__append_29
) $(am__append_34
) \
1311 $(am__append_42
) $(am__append_48
) $(am__append_53
) \
1312 $(am__append_57
) $(am__append_62
) $(am__append_67
) \
1313 $(am__append_77
) $(am__append_83
) $(am__append_89
) \
1314 $(am__append_99
) $(am__append_103
)
1315 AM_CFLAGS
= $(WERROR_CFLAGS
) $(WARN_CFLAGS
)
1316 AM_CPPFLAGS
= $(INCGNU
) -I
$(srcroot
)/include -I..
/bfd
-I.. \
1317 $(SIM_HW_CFLAGS
) $(SIM_INLINE
) -I
$(srcdir)/common \
1319 AM_CPPFLAGS_FOR_BUILD
= -I
$(srcroot
)/include $(SIM_HW_CFLAGS
) \
1320 $(SIM_INLINE
) -I
$(srcdir)/common
1321 COMPILE_FOR_BUILD
= $(CC_FOR_BUILD
) $(AM_CPPFLAGS_FOR_BUILD
) $(CPPFLAGS_FOR_BUILD
) $(CFLAGS_FOR_BUILD
)
1322 LINK_FOR_BUILD
= $(CC_FOR_BUILD
) $(CFLAGS_FOR_BUILD
) $(LDFLAGS_FOR_BUILD
) -o
$@
1323 SIM_ALL_RECURSIVE_DEPS
= common
/libcommon.a \
1324 $(common_HW_CONFIG_H_TARGETS
) $(common_GEN_MODULES_C_TARGETS
) \
1325 $(am__append_4
) $(am__append_17
) $(am__append_21
) \
1326 $(am__append_28
) $(am__append_32
) $(am__append_41
) \
1327 $(am__append_47
) $(am__append_52
) $(am__append_55
) \
1328 $(am__append_61
) $(am__append_65
) $(am__append_76
) \
1329 $(am__append_82
) $(am__append_88
) $(am__append_97
) \
1331 SIM_INSTALL_DATA_LOCAL_DEPS
=
1332 SIM_INSTALL_EXEC_LOCAL_DEPS
= $(am__append_36
)
1333 SIM_UNINSTALL_LOCAL_DEPS
= $(am__append_37
)
1334 common_libcommon_a_SOURCES
= \
1336 common
/portability.c \
1339 common
/target-newlib-errno.c \
1340 common
/target-newlib-open.c \
1341 common
/target-newlib-signal.c \
1342 common
/target-newlib-syscall.c \
1345 SIM_COMMON_HW_OBJS
= \
1357 SIM_NEW_COMMON_OBJS
= sim-arange.o sim-bits.o sim-close.o \
1358 sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1359 sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1360 sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1361 sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1362 sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1363 sim-watch.o
$(am__append_2
)
1364 SIM_HW_DEVICES
= cfi core pal glue
1365 common_HW_CONFIG_H_TARGETS
= $(patsubst %,%/hw-config.h
,$(SIM_ENABLED_ARCHES
))
1366 am_arch_d
= $(subst -,_
,$(@D
))
1367 GEN_MODULES_C_SRCS
= \
1369 $(patsubst %.o
,$(abs_srcdir
)/%.c
,$($(am_arch_d
)_libsim_a_OBJECTS
) $($(am_arch_d
)_libsim_a_LIBADD
)) \
1370 $(filter-out %.o
,$(patsubst $(@D
)/%.o
,$(abs_srcdir
)/common
/%.c
,$($(am_arch_d
)_libsim_a_LIBADD
))))
1372 common_GEN_MODULES_C_TARGETS
= $(patsubst %,%/modules.c
,$(filter-out ppc
,$(SIM_ENABLED_ARCHES
)))
1373 LIBIBERTY_LIB
= ..
/libiberty
/libiberty.a
1374 BFD_LIB
= ..
/bfd
/libbfd.la
1375 OPCODES_LIB
= ..
/opcodes
/libopcodes.la
1381 $(LIBGNU_EXTRA_LIBS
)
1383 GUILE
= $(or
$(wildcard ..
/guile
/libguile
/guile
),guile
)
1384 CGEN
= "$(GUILE) -l $(cgendir)/guile.scm -s"
1386 CGEN_CPU_DIR
= $(cgendir
)/cpu
1387 CPU_DIR
= $(srcroot
)/cpu
1388 CGEN_ARCHFILE
= $(CPU_DIR
)/$(@D
).cpu
1389 CGEN_READ_SCM
= $(cgendir
)/sim.scm
1390 CGEN_ARCH_SCM
= $(cgendir
)/sim-arch.scm
1391 CGEN_CPU_SCM
= $(cgendir
)/sim-cpu.scm
$(cgendir
)/sim-model.scm
1392 CGEN_DECODE_SCM
= $(cgendir
)/sim-decode.scm
1393 CGEN_DESC_SCM
= $(cgendir
)/desc.scm
$(cgendir
)/desc-cpu.scm
1394 CGEN_CPU_EXTR
= /extr
/
1395 CGEN_CPU_READ
= /read
/
1396 CGEN_CPU_WRITE
= /write
/
1397 CGEN_CPU_SEM
= /sem
/
1398 CGEN_CPU_SEMSW
= /semsw
/
1399 CGEN_WRAPPER
= $(srccom
)/cgen.sh
1401 $(SHELL
) $(CGEN_WRAPPER
) arch
$(srcdir)/$(@D
) \
1402 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1403 $(@D
) "$$FLAGS" ignored
"$$isa" $$mach ignored \
1404 $(CGEN_ARCHFILE
) ignored
1407 $(SHELL
) $(CGEN_WRAPPER
) cpu
$(srcdir)/$(@D
) \
1408 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1409 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1410 $(CGEN_ARCHFILE
) "$$EXTRAFILES"
1413 $(SHELL
) $(CGEN_WRAPPER
) defs
$(srcdir)/$(@D
) \
1414 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1415 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1416 $(CGEN_ARCHFILE
) ignored
1419 $(SHELL
) $(CGEN_WRAPPER
) decode
$(srcdir)/$(@D
) \
1420 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1421 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1422 $(CGEN_ARCHFILE
) "$$EXTRAFILES"
1424 CGEN_GEN_CPU_DECODE
= \
1425 $(SHELL
) $(CGEN_WRAPPER
) cpu-decode
$(srcdir)/$(@D
) \
1426 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1427 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1428 $(CGEN_ARCHFILE
) "$$EXTRAFILES"
1430 CGEN_GEN_CPU_DESC
= \
1431 $(SHELL
) $(CGEN_WRAPPER
) desc
$(srcdir)/$(@D
) \
1432 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1433 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1434 $(CGEN_ARCHFILE
) ignored
$$opcfile
1437 # igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1438 # leak detection while running it.
1439 @SIM_ENABLE_IGEN_TRUE@IGEN
= igen
/igen
$(EXEEXT
)
1440 @SIM_ENABLE_IGEN_TRUE@IGEN_RUN
= ASAN_OPTIONS
=detect_leaks
=0 $(IGEN
) $(IGEN_FLAGS_SMP
)
1441 @SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES
= \
1442 @SIM_ENABLE_IGEN_TRUE@ igen
/table.c \
1443 @SIM_ENABLE_IGEN_TRUE@ igen
/lf.c \
1444 @SIM_ENABLE_IGEN_TRUE@ igen
/misc.c \
1445 @SIM_ENABLE_IGEN_TRUE@ igen
/filter_host.c \
1446 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode.c \
1447 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache.c \
1448 @SIM_ENABLE_IGEN_TRUE@ igen
/filter.c \
1449 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn.c \
1450 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-model.c \
1451 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-itable.c \
1452 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-icache.c \
1453 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-semantics.c \
1454 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-idecode.c \
1455 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-support.c \
1456 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-engine.c \
1457 @SIM_ENABLE_IGEN_TRUE@ igen
/gen.c
1459 @SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES
= igen
/igen.c
1460 @SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD
= igen
/libigen.a
1461 @SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES
=
1462 @SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD
= igen
/filter-main.o igen
/libigen.a
1463 @SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES
=
1464 @SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD
= igen
/gen-main.o igen
/libigen.a
1465 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES
=
1466 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD
= igen
/ld-cache-main.o igen
/libigen.a
1467 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES
=
1468 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD
= igen
/ld-decode-main.o igen
/libigen.a
1469 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES
=
1470 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD
= igen
/ld-insn-main.o igen
/libigen.a
1471 @SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES
=
1472 @SIM_ENABLE_IGEN_TRUE@igen_table_LDADD
= igen
/table-main.o igen
/libigen.a
1473 @SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS
= \
1474 @SIM_ENABLE_IGEN_TRUE@
$(IGEN
) \
1475 @SIM_ENABLE_IGEN_TRUE@ igen
/filter \
1476 @SIM_ENABLE_IGEN_TRUE@ igen
/gen \
1477 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache \
1478 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode \
1479 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn \
1480 @SIM_ENABLE_IGEN_TRUE@ igen
/table
1482 EXTRA_DEJAGNU_SITE_CONFIG
= site-sim-config.exp
1484 # Custom verbose test variables that automake doesn't provide (yet?).
1485 AM_V_RUNTEST
= $(AM_V_RUNTEST_@AM_V@
)
1486 AM_V_RUNTEST_
= $(AM_V_RUNTEST_@AM_DEFAULT_V@
)
1487 AM_V_RUNTEST_0
= @echo
" RUNTEST $(RUNTESTFLAGS) $*";
1490 LC_ALL
=C
; export LC_ALL
; \
1491 EXPECT
=${EXPECT} ; export EXPECT
; \
1492 runtest
=$(RUNTEST
); \
1493 $$runtest $(RUNTESTFLAGS
)
1495 testsuite_common_CPPFLAGS
= \
1496 -I
$(srcdir)/common \
1497 -I
$(srcroot
)/include \
1500 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES
=
1501 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD
= \
1502 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(common_libcommon_a_OBJECTS
) \
1503 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(patsubst %,aarch64
/%,$(SIM_NEW_COMMON_OBJS
)) \
1504 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(patsubst %,aarch64
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
1505 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/cpustate.o \
1506 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/interp.o \
1507 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/memory.o \
1508 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/modules.o \
1509 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/sim-resume.o \
1510 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/simulator.o
1512 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES
=
1513 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD
= \
1514 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/nrun.o \
1515 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/libsim.a \
1516 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(SIM_COMMON_LIBS
)
1518 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES
=
1519 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD
= \
1520 @SIM_ENABLE_ARCH_arm_TRUE@
$(common_libcommon_a_OBJECTS
) \
1521 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/wrapper.o \
1522 @SIM_ENABLE_ARCH_arm_TRUE@
$(patsubst %,arm
/%,$(SIM_NEW_COMMON_OBJS
)) \
1523 @SIM_ENABLE_ARCH_arm_TRUE@
$(patsubst %,arm
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
1524 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armemu.o \
1525 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armemu32.o arm
/arminit.o arm
/armos.o arm
/armsupp.o \
1526 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armvirt.o arm
/thumbemu.o \
1527 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armcopro.o arm
/maverick.o arm
/iwmmxt.o \
1528 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/modules.o
1530 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES
=
1531 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD
= \
1532 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/nrun.o \
1533 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/libsim.a \
1534 @SIM_ENABLE_ARCH_arm_TRUE@
$(SIM_COMMON_LIBS
)
1536 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir
= $(docdir
)/arm
1537 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA
= arm
/README
1538 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES
=
1539 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD
= \
1540 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/nrun.o \
1541 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/libsim.a \
1542 @SIM_ENABLE_ARCH_avr_TRUE@
$(SIM_COMMON_LIBS
)
1544 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES
=
1545 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD
= \
1546 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/nrun.o \
1547 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/libsim.a \
1548 @SIM_ENABLE_ARCH_bfin_TRUE@
$(SIM_COMMON_LIBS
)
1550 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES
= \
1551 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_cec \
1552 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ctimer \
1553 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dma \
1554 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dmac \
1555 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_amc \
1556 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_ddrc \
1557 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_sdc \
1558 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_emac \
1559 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_eppi \
1560 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_evt \
1561 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio \
1562 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio2 \
1563 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gptimer \
1564 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_jtag \
1565 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_mmu \
1566 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_nfc \
1567 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_otp \
1568 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pfmon \
1569 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pint \
1570 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pll \
1571 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ppi \
1572 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_rtc \
1573 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_sic \
1574 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_spi \
1575 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_trace \
1576 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_twi \
1577 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart \
1578 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart2 \
1579 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wdog \
1580 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \
1581 @SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy
1583 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES
=
1584 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD
= \
1585 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/nrun.o \
1586 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/libsim.a \
1587 @SIM_ENABLE_ARCH_bpf_TRUE@
$(SIM_COMMON_LIBS
)
1589 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS
= \
1590 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-le.c \
1591 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/stamp-mloop-le \
1592 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-be.c \
1593 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/stamp-mloop-be
1595 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES
=
1596 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD
= \
1597 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/nrun.o \
1598 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/libsim.a \
1599 @SIM_ENABLE_ARCH_cr16_TRUE@
$(SIM_COMMON_LIBS
)
1601 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS
= \
1602 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/gencode
$(EXEEXT
) \
1603 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/table.c
1605 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES
= cr16
/gencode.c
1606 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD
= cr16
/cr16-opc.o
1607 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES
=
1608 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD
= \
1609 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/nrun.o \
1610 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/libsim.a \
1611 @SIM_ENABLE_ARCH_cris_TRUE@
$(SIM_COMMON_LIBS
)
1613 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES
= rv cris cris_900000xx
1614 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES
= cris
/rvdummy.c
1615 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD
= $(LIBIBERTY_LIB
)
1616 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS
= \
1617 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv10f.c \
1618 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v10f \
1619 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv32f.c \
1620 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v32f
1622 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES
=
1623 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD
= \
1624 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/nrun.o \
1625 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/libsim.a \
1626 @SIM_ENABLE_ARCH_d10v_TRUE@
$(SIM_COMMON_LIBS
)
1628 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS
= \
1629 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/gencode
$(EXEEXT
) \
1630 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/table.c
1632 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES
= d10v
/gencode.c
1633 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD
= d10v
/d10v-opc.o
1634 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES
=
1635 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD
= \
1636 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/sis.o \
1637 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/libsim.a \
1638 @SIM_ENABLE_ARCH_erc32_TRUE@
$(SIM_COMMON_LIBS
) $(READLINE_LIB
) $(TERMCAP_LIB
)
1640 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir
= $(docdir
)/erc32
1641 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA
= erc32
/README.erc32 erc32
/README.gdb erc32
/README.sis
1642 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES
=
1643 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD
= \
1644 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/nrun.o \
1645 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/libsim.a \
1646 @SIM_ENABLE_ARCH_examples_TRUE@
$(SIM_COMMON_LIBS
)
1648 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES
=
1649 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD
= \
1650 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/nrun.o \
1651 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/libsim.a \
1652 @SIM_ENABLE_ARCH_frv_TRUE@
$(SIM_COMMON_LIBS
)
1654 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir
= $(docdir
)/frv
1655 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA
= frv
/README
1656 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS
= \
1657 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/mloop.c \
1658 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/stamp-mloop
1660 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES
=
1661 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD
= \
1662 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/nrun.o \
1663 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/libsim.a \
1664 @SIM_ENABLE_ARCH_ft32_TRUE@
$(SIM_COMMON_LIBS
)
1666 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES
=
1667 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD
= \
1668 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/nrun.o \
1669 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/libsim.a \
1670 @SIM_ENABLE_ARCH_h8300_TRUE@
$(SIM_COMMON_LIBS
)
1672 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES
=
1673 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD
= \
1674 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/nrun.o \
1675 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/libsim.a \
1676 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(SIM_COMMON_LIBS
)
1678 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS
= \
1679 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/mloop.c \
1680 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/stamp-mloop
1682 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES
=
1683 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD
= \
1684 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/nrun.o \
1685 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/libsim.a \
1686 @SIM_ENABLE_ARCH_lm32_TRUE@
$(SIM_COMMON_LIBS
)
1688 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES
= lm32cpu lm32timer lm32uart
1689 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS
= \
1690 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/mloop.c \
1691 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/stamp-mloop
1693 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES
=
1694 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD
= \
1695 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/main.o \
1696 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/libsim.a \
1697 @SIM_ENABLE_ARCH_m32c_TRUE@
$(SIM_COMMON_LIBS
)
1699 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS
= \
1700 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/opc2c
$(EXEEXT
) \
1701 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/m32c.c \
1702 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/r8c.c
1704 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES
= m32c
/opc2c.c
1706 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1707 # leak detection while running it.
1708 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN
= ASAN_OPTIONS
=detect_leaks
=0 m32c
/opc2c
$(EXEEXT
)
1709 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES
=
1710 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD
= \
1711 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/nrun.o \
1712 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/libsim.a \
1713 @SIM_ENABLE_ARCH_m32r_TRUE@
$(SIM_COMMON_LIBS
)
1715 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES
= m32r_cache m32r_uart
1716 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS
= \
1717 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop.c \
1718 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop \
1719 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloopx.c \
1720 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-x \
1721 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop2.c \
1722 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-2
1724 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES
=
1725 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD
= \
1726 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/nrun.o \
1727 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/libsim.a \
1728 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(SIM_COMMON_LIBS
)
1730 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES
= m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
1731 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS
= \
1732 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/gencode
$(EXEEXT
) \
1733 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11int.c \
1734 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc12int.c
1736 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES
= m68hc11
/gencode.c
1737 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES
=
1738 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD
= \
1739 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/nrun.o \
1740 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/libsim.a \
1741 @SIM_ENABLE_ARCH_mcore_TRUE@
$(SIM_COMMON_LIBS
)
1743 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES
=
1744 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD
= \
1745 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/nrun.o \
1746 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/libsim.a \
1747 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(SIM_COMMON_LIBS
)
1749 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES
=
1750 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD
= \
1751 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/nrun.o \
1752 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/libsim.a \
1753 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_COMMON_LIBS
)
1755 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES
= tx3904cpu tx3904irc tx3904tmr tx3904sio
1756 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE
= \
1757 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/itable.h \
1758 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/itable.c
1760 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE
= \
1761 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/icache.h \
1762 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/icache.c \
1763 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/idecode.h \
1764 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/idecode.c \
1765 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/semantics.h \
1766 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/semantics.c \
1767 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/model.h \
1768 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/model.c \
1769 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/support.h \
1770 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/support.c \
1771 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/engine.h \
1772 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/engine.c \
1773 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/irun.c
1775 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16
= \
1776 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_icache.h \
1777 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_icache.c \
1778 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_idecode.h \
1779 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_idecode.c \
1780 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_semantics.h \
1781 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_semantics.c \
1782 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_model.h \
1783 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_model.c \
1784 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_support.h \
1785 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_support.c \
1786 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32
= \
1787 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_icache.h \
1788 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_icache.c \
1789 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_idecode.h \
1790 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_idecode.c \
1791 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_semantics.h \
1792 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_semantics.c \
1793 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_model.h \
1794 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_model.c \
1795 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_support.h \
1796 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_support.c
1798 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS
= \
1799 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_IGEN_ITABLE
) \
1800 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/stamp-igen-itable \
1801 @SIM_ENABLE_ARCH_mips_TRUE@
$(am__append_73
) $(am__append_74
) \
1802 @SIM_ENABLE_ARCH_mips_TRUE@
$(am__append_75
)
1803 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
1804 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN
= $(srcdir)/mips
/mips.igen
1805 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC
= \
1806 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/dsp.igen \
1807 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/dsp2.igen \
1808 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16.igen \
1809 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16e.igen \
1810 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mdmx.igen \
1811 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/micromipsdsp.igen \
1812 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/micromips.igen \
1813 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3264r2.igen \
1814 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3264r6.igen \
1815 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3d.igen \
1816 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/sb1.igen \
1817 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/tx.igen \
1818 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/vr.igen
1820 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC
= $(srcdir)/mips
/mips.dc
1821 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC
= $(srcdir)/mips
/m16.dc
1822 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC
= $(srcdir)/mips
/micromips.dc
1823 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC
= $(srcdir)/mips
/micromips16.dc
1824 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES
=
1825 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD
= \
1826 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/nrun.o \
1827 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/libsim.a \
1828 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(SIM_COMMON_LIBS
)
1830 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES
= mn103cpu mn103int mn103tim mn103ser mn103iop
1831 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN
= \
1832 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.h \
1833 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.c \
1834 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.h \
1835 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.c \
1836 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.h \
1837 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.c \
1838 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.h \
1839 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.c \
1840 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.h \
1841 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.c \
1842 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.h \
1843 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.c \
1844 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.h \
1845 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.c \
1846 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/irun.c
1848 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS
= \
1849 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_BUILT_SRC_FROM_IGEN
) \
1850 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/stamp-igen
1852 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
1853 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN
= $(srcdir)/mn10300
/mn10300.igen
1854 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC
= mn10300
/am33.igen mn10300
/am33-2.igen
1855 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC
= $(srcdir)/mn10300
/mn10300.dc
1856 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES
=
1857 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD
= \
1858 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/nrun.o \
1859 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/libsim.a \
1860 @SIM_ENABLE_ARCH_moxie_TRUE@
$(SIM_COMMON_LIBS
)
1862 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir
= $(datadir)/gdb
/dtb
1863 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA
= moxie
/moxie-gdb.dtb
1864 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES
=
1865 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD
= \
1866 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/nrun.o \
1867 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/libsim.a \
1868 @SIM_ENABLE_ARCH_msp430_TRUE@
$(SIM_COMMON_LIBS
)
1870 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES
=
1871 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD
= \
1872 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/nrun.o \
1873 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/libsim.a \
1874 @SIM_ENABLE_ARCH_or1k_TRUE@
$(SIM_COMMON_LIBS
)
1876 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir
= $(docdir
)/or1k
1877 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA
= or1k
/README
1878 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS
= \
1879 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/mloop.c \
1880 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/stamp-mloop
1882 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES
=
1883 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD
= \
1884 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/main.o \
1885 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/libsim.a \
1886 @SIM_ENABLE_ARCH_ppc_TRUE@
$(SIM_COMMON_LIBS
)
1888 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir
= $(docdir
)/ppc
1889 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA
= ppc
/BUGS ppc
/INSTALL ppc
/README ppc
/RUN
1890 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES
=
1891 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD
= \
1892 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/nrun.o \
1893 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/libsim.a \
1894 @SIM_ENABLE_ARCH_pru_TRUE@
$(SIM_COMMON_LIBS
)
1896 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES
=
1897 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD
= \
1898 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/nrun.o \
1899 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/libsim.a \
1900 @SIM_ENABLE_ARCH_riscv_TRUE@
$(SIM_COMMON_LIBS
)
1902 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES
=
1903 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD
= \
1904 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/main.o \
1905 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/libsim.a \
1906 @SIM_ENABLE_ARCH_rl78_TRUE@
$(SIM_COMMON_LIBS
)
1908 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES
=
1909 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD
= \
1910 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/main.o \
1911 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/libsim.a \
1912 @SIM_ENABLE_ARCH_rx_TRUE@
$(SIM_COMMON_LIBS
)
1914 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir
= $(docdir
)/rx
1915 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA
= rx
/README.txt
1916 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES
=
1917 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD
= \
1918 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/nrun.o \
1919 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/libsim.a \
1920 @SIM_ENABLE_ARCH_sh_TRUE@
$(SIM_COMMON_LIBS
)
1922 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS
= \
1923 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/gencode
$(EXEEXT
) \
1924 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/table.c
1926 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES
= sh
/gencode.c
1927 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES
=
1928 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD
= \
1929 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/nrun.o \
1930 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/libsim.a \
1931 @SIM_ENABLE_ARCH_v850_TRUE@
$(SIM_COMMON_LIBS
)
1933 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN
= \
1934 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.h \
1935 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.c \
1936 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.h \
1937 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.c \
1938 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/semantics.h \
1939 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/semantics.c \
1940 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/model.h \
1941 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/model.c \
1942 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.h \
1943 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.c \
1944 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/itable.h \
1945 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/itable.c \
1946 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.h \
1947 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.c \
1948 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/irun.c
1950 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS
= \
1951 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_BUILT_SRC_FROM_IGEN
) \
1952 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/stamp-igen
1954 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
1955 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN
= $(srcdir)/v850
/v850.igen
1956 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC
= $(srcdir)/v850
/v850.dc
1957 all: $(BUILT_SOURCES
) config.h
1958 $(MAKE
) $(AM_MAKEFLAGS
) all-recursive
1961 .SUFFIXES
: .c .lo .log .o .obj .
test .
test$(EXEEXT
) .trs
1962 am--refresh
: Makefile
1964 $(srcdir)/Makefile.in
: @MAINTAINER_MODE_TRUE@
$(srcdir)/Makefile.am
$(srcdir)/common
/local.mk
$(srcdir)/igen
/local.mk
$(srcdir)/testsuite
/local.mk
$(srcdir)/testsuite
/common
/local.mk
$(srcdir)/aarch64
/local.mk
$(srcdir)/arm
/local.mk
$(srcdir)/avr
/local.mk
$(srcdir)/bfin
/local.mk
$(srcdir)/bpf
/local.mk
$(srcdir)/cr16
/local.mk
$(srcdir)/cris
/local.mk
$(srcdir)/d10v
/local.mk
$(srcdir)/erc32
/local.mk
$(srcdir)/example-synacor
/local.mk
$(srcdir)/frv
/local.mk
$(srcdir)/ft32
/local.mk
$(srcdir)/h8300
/local.mk
$(srcdir)/iq2000
/local.mk
$(srcdir)/lm32
/local.mk
$(srcdir)/m32c
/local.mk
$(srcdir)/m32r
/local.mk
$(srcdir)/m68hc11
/local.mk
$(srcdir)/mcore
/local.mk
$(srcdir)/microblaze
/local.mk
$(srcdir)/mips
/local.mk
$(srcdir)/mn10300
/local.mk
$(srcdir)/moxie
/local.mk
$(srcdir)/msp430
/local.mk
$(srcdir)/or1k
/local.mk
$(srcdir)/ppc
/local.mk
$(srcdir)/pru
/local.mk
$(srcdir)/riscv
/local.mk
$(srcdir)/rl78
/local.mk
$(srcdir)/rx
/local.mk
$(srcdir)/sh
/local.mk
$(srcdir)/v850
/local.mk
$(am__configure_deps
)
1965 @for dep in
$?
; do \
1966 case
'$(am__configure_deps)' in \
1968 echo
' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
1969 $(am__cd
) $(srcdir) && $(AUTOMAKE
) --foreign \
1974 echo
' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
1975 $(am__cd
) $(top_srcdir
) && \
1976 $(AUTOMAKE
) --foreign Makefile
1977 Makefile
: $(srcdir)/Makefile.in
$(top_builddir
)/config.status
1980 echo
' $(SHELL) ./config.status'; \
1981 $(SHELL
) .
/config.status
;; \
1983 echo
' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
1984 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
$(am__depfiles_maybe
);; \
1986 $(srcdir)/common
/local.mk
$(srcdir)/igen
/local.mk
$(srcdir)/testsuite
/local.mk
$(srcdir)/testsuite
/common
/local.mk
$(srcdir)/aarch64
/local.mk
$(srcdir)/arm
/local.mk
$(srcdir)/avr
/local.mk
$(srcdir)/bfin
/local.mk
$(srcdir)/bpf
/local.mk
$(srcdir)/cr16
/local.mk
$(srcdir)/cris
/local.mk
$(srcdir)/d10v
/local.mk
$(srcdir)/erc32
/local.mk
$(srcdir)/example-synacor
/local.mk
$(srcdir)/frv
/local.mk
$(srcdir)/ft32
/local.mk
$(srcdir)/h8300
/local.mk
$(srcdir)/iq2000
/local.mk
$(srcdir)/lm32
/local.mk
$(srcdir)/m32c
/local.mk
$(srcdir)/m32r
/local.mk
$(srcdir)/m68hc11
/local.mk
$(srcdir)/mcore
/local.mk
$(srcdir)/microblaze
/local.mk
$(srcdir)/mips
/local.mk
$(srcdir)/mn10300
/local.mk
$(srcdir)/moxie
/local.mk
$(srcdir)/msp430
/local.mk
$(srcdir)/or1k
/local.mk
$(srcdir)/ppc
/local.mk
$(srcdir)/pru
/local.mk
$(srcdir)/riscv
/local.mk
$(srcdir)/rl78
/local.mk
$(srcdir)/rx
/local.mk
$(srcdir)/sh
/local.mk
$(srcdir)/v850
/local.mk
$(am__empty
):
1988 $(top_builddir
)/config.status
: $(top_srcdir
)/configure
$(CONFIG_STATUS_DEPENDENCIES
)
1989 $(SHELL
) .
/config.status
--recheck
1991 $(top_srcdir
)/configure
: @MAINTAINER_MODE_TRUE@
$(am__configure_deps
)
1992 $(am__cd
) $(srcdir) && $(AUTOCONF
)
1993 $(ACLOCAL_M4
): @MAINTAINER_MODE_TRUE@
$(am__aclocal_m4_deps
)
1994 $(am__cd
) $(srcdir) && $(ACLOCAL
) $(ACLOCAL_AMFLAGS
)
1995 $(am__aclocal_m4_deps
):
1998 @
test -f
$@ ||
rm -f stamp-h1
1999 @
test -f
$@ ||
$(MAKE
) $(AM_MAKEFLAGS
) stamp-h1
2001 stamp-h1
: $(srcdir)/config.h.in
$(top_builddir
)/config.status
2003 cd
$(top_builddir
) && $(SHELL
) .
/config.status config.h
2004 $(srcdir)/config.h.in
: @MAINTAINER_MODE_TRUE@
$(am__configure_deps
)
2005 ($(am__cd
) $(top_srcdir
) && $(AUTOHEADER
))
2010 -rm -f config.h stamp-h1
2011 Make-common.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/Make-common.in
2012 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2013 aarch64
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/aarch64
/Makefile.in
2014 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2015 aarch64
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2016 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2017 arm
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/arm
/Makefile.in
2018 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2019 arm
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2020 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2021 avr
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/avr
/Makefile.in
2022 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2023 avr
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2024 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2025 bfin
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/bfin
/Makefile.in
2026 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2027 bfin
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2028 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2029 bpf
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/bpf
/Makefile.in
2030 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2031 bpf
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2032 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2033 cr16
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/cr16
/Makefile.in
2034 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2035 cr16
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2036 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2037 cris
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/cris
/Makefile.in
2038 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2039 cris
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2040 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2041 d10v
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/d10v
/Makefile.in
2042 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2043 d10v
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2044 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2045 frv
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/frv
/Makefile.in
2046 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2047 frv
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2048 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2049 ft32
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/ft32
/Makefile.in
2050 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2051 ft32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2052 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2053 h8300
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/h8300
/Makefile.in
2054 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2055 h8300
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2056 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2057 iq2000
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/iq2000
/Makefile.in
2058 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2059 iq2000
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2060 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2061 lm32
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/lm32
/Makefile.in
2062 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2063 lm32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2064 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2065 m32c
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/m32c
/Makefile.in
2066 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2067 m32c
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2068 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2069 m32r
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/m32r
/Makefile.in
2070 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2071 m32r
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2072 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2073 m68hc11
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/m68hc11
/Makefile.in
2074 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2075 m68hc11
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2076 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2077 mcore
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/mcore
/Makefile.in
2078 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2079 mcore
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2080 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2081 microblaze
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/microblaze
/Makefile.in
2082 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2083 microblaze
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2084 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2085 mips
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/mips
/Makefile.in
2086 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2087 mips
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2088 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2089 mn10300
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/mn10300
/Makefile.in
2090 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2091 mn10300
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2092 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2093 moxie
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/moxie
/Makefile.in
2094 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2095 moxie
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2096 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2097 msp430
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/msp430
/Makefile.in
2098 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2099 msp430
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2100 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2101 or1k
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/or1k
/Makefile.in
2102 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2103 or1k
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2104 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2105 ppc
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2106 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2107 pru
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/pru
/Makefile.in
2108 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2109 pru
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2110 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2111 riscv
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/riscv
/Makefile.in
2112 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2113 riscv
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2114 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2115 rl78
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/rl78
/Makefile.in
2116 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2117 rl78
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2118 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2119 rx
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/rx
/Makefile.in
2120 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2121 rx
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2122 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2123 sh
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/sh
/Makefile.in
2124 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2125 sh
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2126 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2127 erc32
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/erc32
/Makefile.in
2128 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2129 erc32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2130 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2131 v850
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/v850
/Makefile.in
2132 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2133 v850
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2134 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2135 example-synacor
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/example-synacor
/Makefile.in
2136 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2137 example-synacor
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2138 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2139 arch-subdir.mk
: $(top_builddir
)/config.status
$(srcdir)/arch-subdir.mk.in
2140 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2141 .gdbinit
: $(top_builddir
)/config.status
$(srcdir)/gdbinit.in
2142 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2144 clean-noinstLIBRARIES
:
2145 -test -z
"$(noinst_LIBRARIES)" ||
rm -f
$(noinst_LIBRARIES
)
2146 aarch64
/$(am__dirstamp
):
2148 @
: > aarch64
/$(am__dirstamp
)
2150 aarch64
/libsim.a
: $(aarch64_libsim_a_OBJECTS
) $(aarch64_libsim_a_DEPENDENCIES
) $(EXTRA_aarch64_libsim_a_DEPENDENCIES
) aarch64
/$(am__dirstamp
)
2151 $(AM_V_at
)-rm -f aarch64
/libsim.a
2152 $(AM_V_AR
)$(aarch64_libsim_a_AR
) aarch64
/libsim.a
$(aarch64_libsim_a_OBJECTS
) $(aarch64_libsim_a_LIBADD
)
2153 $(AM_V_at
)$(RANLIB
) aarch64
/libsim.a
2154 arm
/$(am__dirstamp
):
2156 @
: > arm
/$(am__dirstamp
)
2158 arm
/libsim.a
: $(arm_libsim_a_OBJECTS
) $(arm_libsim_a_DEPENDENCIES
) $(EXTRA_arm_libsim_a_DEPENDENCIES
) arm
/$(am__dirstamp
)
2159 $(AM_V_at
)-rm -f arm
/libsim.a
2160 $(AM_V_AR
)$(arm_libsim_a_AR
) arm
/libsim.a
$(arm_libsim_a_OBJECTS
) $(arm_libsim_a_LIBADD
)
2161 $(AM_V_at
)$(RANLIB
) arm
/libsim.a
2162 common
/$(am__dirstamp
):
2164 @
: > common
/$(am__dirstamp
)
2165 common
/$(DEPDIR
)/$(am__dirstamp
):
2166 @
$(MKDIR_P
) common
/$(DEPDIR
)
2167 @
: > common
/$(DEPDIR
)/$(am__dirstamp
)
2168 common
/callback.
$(OBJEXT
): common
/$(am__dirstamp
) \
2169 common
/$(DEPDIR
)/$(am__dirstamp
)
2170 common
/portability.
$(OBJEXT
): common
/$(am__dirstamp
) \
2171 common
/$(DEPDIR
)/$(am__dirstamp
)
2172 common
/sim-load.
$(OBJEXT
): common
/$(am__dirstamp
) \
2173 common
/$(DEPDIR
)/$(am__dirstamp
)
2174 common
/syscall.
$(OBJEXT
): common
/$(am__dirstamp
) \
2175 common
/$(DEPDIR
)/$(am__dirstamp
)
2176 common
/target-newlib-errno.
$(OBJEXT
): common
/$(am__dirstamp
) \
2177 common
/$(DEPDIR
)/$(am__dirstamp
)
2178 common
/target-newlib-open.
$(OBJEXT
): common
/$(am__dirstamp
) \
2179 common
/$(DEPDIR
)/$(am__dirstamp
)
2180 common
/target-newlib-signal.
$(OBJEXT
): common
/$(am__dirstamp
) \
2181 common
/$(DEPDIR
)/$(am__dirstamp
)
2182 common
/target-newlib-syscall.
$(OBJEXT
): common
/$(am__dirstamp
) \
2183 common
/$(DEPDIR
)/$(am__dirstamp
)
2184 common
/version.
$(OBJEXT
): common
/$(am__dirstamp
) \
2185 common
/$(DEPDIR
)/$(am__dirstamp
)
2187 common
/libcommon.a
: $(common_libcommon_a_OBJECTS
) $(common_libcommon_a_DEPENDENCIES
) $(EXTRA_common_libcommon_a_DEPENDENCIES
) common
/$(am__dirstamp
)
2188 $(AM_V_at
)-rm -f common
/libcommon.a
2189 $(AM_V_AR
)$(common_libcommon_a_AR
) common
/libcommon.a
$(common_libcommon_a_OBJECTS
) $(common_libcommon_a_LIBADD
)
2190 $(AM_V_at
)$(RANLIB
) common
/libcommon.a
2191 igen
/$(am__dirstamp
):
2193 @
: > igen
/$(am__dirstamp
)
2194 igen
/$(DEPDIR
)/$(am__dirstamp
):
2195 @
$(MKDIR_P
) igen
/$(DEPDIR
)
2196 @
: > igen
/$(DEPDIR
)/$(am__dirstamp
)
2197 igen
/table.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2198 igen
/$(DEPDIR
)/$(am__dirstamp
)
2199 igen
/lf.
$(OBJEXT
): igen
/$(am__dirstamp
) igen
/$(DEPDIR
)/$(am__dirstamp
)
2200 igen
/misc.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2201 igen
/$(DEPDIR
)/$(am__dirstamp
)
2202 igen
/filter_host.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2203 igen
/$(DEPDIR
)/$(am__dirstamp
)
2204 igen
/ld-decode.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2205 igen
/$(DEPDIR
)/$(am__dirstamp
)
2206 igen
/ld-cache.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2207 igen
/$(DEPDIR
)/$(am__dirstamp
)
2208 igen
/filter.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2209 igen
/$(DEPDIR
)/$(am__dirstamp
)
2210 igen
/ld-insn.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2211 igen
/$(DEPDIR
)/$(am__dirstamp
)
2212 igen
/gen-model.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2213 igen
/$(DEPDIR
)/$(am__dirstamp
)
2214 igen
/gen-itable.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2215 igen
/$(DEPDIR
)/$(am__dirstamp
)
2216 igen
/gen-icache.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2217 igen
/$(DEPDIR
)/$(am__dirstamp
)
2218 igen
/gen-semantics.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2219 igen
/$(DEPDIR
)/$(am__dirstamp
)
2220 igen
/gen-idecode.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2221 igen
/$(DEPDIR
)/$(am__dirstamp
)
2222 igen
/gen-support.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2223 igen
/$(DEPDIR
)/$(am__dirstamp
)
2224 igen
/gen-engine.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2225 igen
/$(DEPDIR
)/$(am__dirstamp
)
2226 igen
/gen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2227 igen
/$(DEPDIR
)/$(am__dirstamp
)
2229 @SIM_ENABLE_IGEN_FALSE@igen
/libigen.a
: $(igen_libigen_a_OBJECTS
) $(igen_libigen_a_DEPENDENCIES
) $(EXTRA_igen_libigen_a_DEPENDENCIES
) igen
/$(am__dirstamp
)
2230 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_at
)-rm -f igen
/libigen.a
2231 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_AR
)$(igen_libigen_a_AR
) igen
/libigen.a
$(igen_libigen_a_OBJECTS
) $(igen_libigen_a_LIBADD
)
2232 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_at
)$(RANLIB
) igen
/libigen.a
2234 clean-checkPROGRAMS
:
2235 @list
='$(check_PROGRAMS)'; test -n
"$$list" || exit
0; \
2236 echo
" rm -f" $$list; \
2237 rm -f
$$list || exit
$$?
; \
2238 test -n
"$(EXEEXT)" || exit
0; \
2239 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2240 echo
" rm -f" $$list; \
2243 clean-noinstPROGRAMS
:
2244 @list
='$(noinst_PROGRAMS)'; test -n
"$$list" || exit
0; \
2245 echo
" rm -f" $$list; \
2246 rm -f
$$list || exit
$$?
; \
2247 test -n
"$(EXEEXT)" || exit
0; \
2248 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2249 echo
" rm -f" $$list; \
2252 aarch64
/run
$(EXEEXT
): $(aarch64_run_OBJECTS
) $(aarch64_run_DEPENDENCIES
) $(EXTRA_aarch64_run_DEPENDENCIES
) aarch64
/$(am__dirstamp
)
2253 @
rm -f aarch64
/run
$(EXEEXT
)
2254 $(AM_V_CCLD
)$(LINK
) $(aarch64_run_OBJECTS
) $(aarch64_run_LDADD
) $(LIBS
)
2256 arm
/run
$(EXEEXT
): $(arm_run_OBJECTS
) $(arm_run_DEPENDENCIES
) $(EXTRA_arm_run_DEPENDENCIES
) arm
/$(am__dirstamp
)
2257 @
rm -f arm
/run
$(EXEEXT
)
2258 $(AM_V_CCLD
)$(LINK
) $(arm_run_OBJECTS
) $(arm_run_LDADD
) $(LIBS
)
2259 avr
/$(am__dirstamp
):
2261 @
: > avr
/$(am__dirstamp
)
2263 avr
/run
$(EXEEXT
): $(avr_run_OBJECTS
) $(avr_run_DEPENDENCIES
) $(EXTRA_avr_run_DEPENDENCIES
) avr
/$(am__dirstamp
)
2264 @
rm -f avr
/run
$(EXEEXT
)
2265 $(AM_V_CCLD
)$(LINK
) $(avr_run_OBJECTS
) $(avr_run_LDADD
) $(LIBS
)
2266 bfin
/$(am__dirstamp
):
2268 @
: > bfin
/$(am__dirstamp
)
2270 bfin
/run
$(EXEEXT
): $(bfin_run_OBJECTS
) $(bfin_run_DEPENDENCIES
) $(EXTRA_bfin_run_DEPENDENCIES
) bfin
/$(am__dirstamp
)
2271 @
rm -f bfin
/run
$(EXEEXT
)
2272 $(AM_V_CCLD
)$(LINK
) $(bfin_run_OBJECTS
) $(bfin_run_LDADD
) $(LIBS
)
2273 bpf
/$(am__dirstamp
):
2275 @
: > bpf
/$(am__dirstamp
)
2277 bpf
/run
$(EXEEXT
): $(bpf_run_OBJECTS
) $(bpf_run_DEPENDENCIES
) $(EXTRA_bpf_run_DEPENDENCIES
) bpf
/$(am__dirstamp
)
2278 @
rm -f bpf
/run
$(EXEEXT
)
2279 $(AM_V_CCLD
)$(LINK
) $(bpf_run_OBJECTS
) $(bpf_run_LDADD
) $(LIBS
)
2280 cr16
/$(am__dirstamp
):
2282 @
: > cr16
/$(am__dirstamp
)
2283 cr16
/$(DEPDIR
)/$(am__dirstamp
):
2284 @
$(MKDIR_P
) cr16
/$(DEPDIR
)
2285 @
: > cr16
/$(DEPDIR
)/$(am__dirstamp
)
2286 cr16
/gencode.
$(OBJEXT
): cr16
/$(am__dirstamp
) \
2287 cr16
/$(DEPDIR
)/$(am__dirstamp
)
2289 @SIM_ENABLE_ARCH_cr16_FALSE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) $(EXTRA_cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
2290 @SIM_ENABLE_ARCH_cr16_FALSE@ @
rm -f cr16
/gencode
$(EXEEXT
)
2291 @SIM_ENABLE_ARCH_cr16_FALSE@
$(AM_V_CCLD
)$(LINK
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
) $(LIBS
)
2293 cr16
/run
$(EXEEXT
): $(cr16_run_OBJECTS
) $(cr16_run_DEPENDENCIES
) $(EXTRA_cr16_run_DEPENDENCIES
) cr16
/$(am__dirstamp
)
2294 @
rm -f cr16
/run
$(EXEEXT
)
2295 $(AM_V_CCLD
)$(LINK
) $(cr16_run_OBJECTS
) $(cr16_run_LDADD
) $(LIBS
)
2296 cris
/$(am__dirstamp
):
2298 @
: > cris
/$(am__dirstamp
)
2300 cris
/run
$(EXEEXT
): $(cris_run_OBJECTS
) $(cris_run_DEPENDENCIES
) $(EXTRA_cris_run_DEPENDENCIES
) cris
/$(am__dirstamp
)
2301 @
rm -f cris
/run
$(EXEEXT
)
2302 $(AM_V_CCLD
)$(LINK
) $(cris_run_OBJECTS
) $(cris_run_LDADD
) $(LIBS
)
2303 cris
/$(DEPDIR
)/$(am__dirstamp
):
2304 @
$(MKDIR_P
) cris
/$(DEPDIR
)
2305 @
: > cris
/$(DEPDIR
)/$(am__dirstamp
)
2306 cris
/rvdummy.
$(OBJEXT
): cris
/$(am__dirstamp
) \
2307 cris
/$(DEPDIR
)/$(am__dirstamp
)
2309 cris
/rvdummy
$(EXEEXT
): $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_DEPENDENCIES
) $(EXTRA_cris_rvdummy_DEPENDENCIES
) cris
/$(am__dirstamp
)
2310 @
rm -f cris
/rvdummy
$(EXEEXT
)
2311 $(AM_V_CCLD
)$(LINK
) $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_LDADD
) $(LIBS
)
2312 d10v
/$(am__dirstamp
):
2314 @
: > d10v
/$(am__dirstamp
)
2315 d10v
/$(DEPDIR
)/$(am__dirstamp
):
2316 @
$(MKDIR_P
) d10v
/$(DEPDIR
)
2317 @
: > d10v
/$(DEPDIR
)/$(am__dirstamp
)
2318 d10v
/gencode.
$(OBJEXT
): d10v
/$(am__dirstamp
) \
2319 d10v
/$(DEPDIR
)/$(am__dirstamp
)
2321 @SIM_ENABLE_ARCH_d10v_FALSE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) $(EXTRA_d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
2322 @SIM_ENABLE_ARCH_d10v_FALSE@ @
rm -f d10v
/gencode
$(EXEEXT
)
2323 @SIM_ENABLE_ARCH_d10v_FALSE@
$(AM_V_CCLD
)$(LINK
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
) $(LIBS
)
2325 d10v
/run
$(EXEEXT
): $(d10v_run_OBJECTS
) $(d10v_run_DEPENDENCIES
) $(EXTRA_d10v_run_DEPENDENCIES
) d10v
/$(am__dirstamp
)
2326 @
rm -f d10v
/run
$(EXEEXT
)
2327 $(AM_V_CCLD
)$(LINK
) $(d10v_run_OBJECTS
) $(d10v_run_LDADD
) $(LIBS
)
2328 erc32
/$(am__dirstamp
):
2330 @
: > erc32
/$(am__dirstamp
)
2332 erc32
/run
$(EXEEXT
): $(erc32_run_OBJECTS
) $(erc32_run_DEPENDENCIES
) $(EXTRA_erc32_run_DEPENDENCIES
) erc32
/$(am__dirstamp
)
2333 @
rm -f erc32
/run
$(EXEEXT
)
2334 $(AM_V_CCLD
)$(LINK
) $(erc32_run_OBJECTS
) $(erc32_run_LDADD
) $(LIBS
)
2335 erc32
/$(DEPDIR
)/$(am__dirstamp
):
2336 @
$(MKDIR_P
) erc32
/$(DEPDIR
)
2337 @
: > erc32
/$(DEPDIR
)/$(am__dirstamp
)
2338 erc32
/sis.
$(OBJEXT
): erc32
/$(am__dirstamp
) \
2339 erc32
/$(DEPDIR
)/$(am__dirstamp
)
2341 @SIM_ENABLE_ARCH_erc32_FALSE@erc32
/sis
$(EXEEXT
): $(erc32_sis_OBJECTS
) $(erc32_sis_DEPENDENCIES
) $(EXTRA_erc32_sis_DEPENDENCIES
) erc32
/$(am__dirstamp
)
2342 @SIM_ENABLE_ARCH_erc32_FALSE@ @
rm -f erc32
/sis
$(EXEEXT
)
2343 @SIM_ENABLE_ARCH_erc32_FALSE@
$(AM_V_CCLD
)$(LINK
) $(erc32_sis_OBJECTS
) $(erc32_sis_LDADD
) $(LIBS
)
2344 example-synacor
/$(am__dirstamp
):
2345 @
$(MKDIR_P
) example-synacor
2346 @
: > example-synacor
/$(am__dirstamp
)
2348 example-synacor
/run
$(EXEEXT
): $(example_synacor_run_OBJECTS
) $(example_synacor_run_DEPENDENCIES
) $(EXTRA_example_synacor_run_DEPENDENCIES
) example-synacor
/$(am__dirstamp
)
2349 @
rm -f example-synacor
/run
$(EXEEXT
)
2350 $(AM_V_CCLD
)$(LINK
) $(example_synacor_run_OBJECTS
) $(example_synacor_run_LDADD
) $(LIBS
)
2351 frv
/$(am__dirstamp
):
2353 @
: > frv
/$(am__dirstamp
)
2355 frv
/run
$(EXEEXT
): $(frv_run_OBJECTS
) $(frv_run_DEPENDENCIES
) $(EXTRA_frv_run_DEPENDENCIES
) frv
/$(am__dirstamp
)
2356 @
rm -f frv
/run
$(EXEEXT
)
2357 $(AM_V_CCLD
)$(LINK
) $(frv_run_OBJECTS
) $(frv_run_LDADD
) $(LIBS
)
2358 ft32
/$(am__dirstamp
):
2360 @
: > ft32
/$(am__dirstamp
)
2362 ft32
/run
$(EXEEXT
): $(ft32_run_OBJECTS
) $(ft32_run_DEPENDENCIES
) $(EXTRA_ft32_run_DEPENDENCIES
) ft32
/$(am__dirstamp
)
2363 @
rm -f ft32
/run
$(EXEEXT
)
2364 $(AM_V_CCLD
)$(LINK
) $(ft32_run_OBJECTS
) $(ft32_run_LDADD
) $(LIBS
)
2365 h8300
/$(am__dirstamp
):
2367 @
: > h8300
/$(am__dirstamp
)
2369 h8300
/run
$(EXEEXT
): $(h8300_run_OBJECTS
) $(h8300_run_DEPENDENCIES
) $(EXTRA_h8300_run_DEPENDENCIES
) h8300
/$(am__dirstamp
)
2370 @
rm -f h8300
/run
$(EXEEXT
)
2371 $(AM_V_CCLD
)$(LINK
) $(h8300_run_OBJECTS
) $(h8300_run_LDADD
) $(LIBS
)
2373 igen
/filter$(EXEEXT
): $(igen_filter_OBJECTS
) $(igen_filter_DEPENDENCIES
) $(EXTRA_igen_filter_DEPENDENCIES
) igen
/$(am__dirstamp
)
2374 @
rm -f igen
/filter$(EXEEXT
)
2375 $(AM_V_CCLD
)$(LINK
) $(igen_filter_OBJECTS
) $(igen_filter_LDADD
) $(LIBS
)
2377 igen
/gen
$(EXEEXT
): $(igen_gen_OBJECTS
) $(igen_gen_DEPENDENCIES
) $(EXTRA_igen_gen_DEPENDENCIES
) igen
/$(am__dirstamp
)
2378 @
rm -f igen
/gen
$(EXEEXT
)
2379 $(AM_V_CCLD
)$(LINK
) $(igen_gen_OBJECTS
) $(igen_gen_LDADD
) $(LIBS
)
2380 igen
/igen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2381 igen
/$(DEPDIR
)/$(am__dirstamp
)
2383 @SIM_ENABLE_IGEN_FALSE@igen
/igen
$(EXEEXT
): $(igen_igen_OBJECTS
) $(igen_igen_DEPENDENCIES
) $(EXTRA_igen_igen_DEPENDENCIES
) igen
/$(am__dirstamp
)
2384 @SIM_ENABLE_IGEN_FALSE@ @
rm -f igen
/igen
$(EXEEXT
)
2385 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_CCLD
)$(LINK
) $(igen_igen_OBJECTS
) $(igen_igen_LDADD
) $(LIBS
)
2387 igen
/ld-cache
$(EXEEXT
): $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_DEPENDENCIES
) $(EXTRA_igen_ld_cache_DEPENDENCIES
) igen
/$(am__dirstamp
)
2388 @
rm -f igen
/ld-cache
$(EXEEXT
)
2389 $(AM_V_CCLD
)$(LINK
) $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_LDADD
) $(LIBS
)
2391 igen
/ld-decode
$(EXEEXT
): $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_DEPENDENCIES
) $(EXTRA_igen_ld_decode_DEPENDENCIES
) igen
/$(am__dirstamp
)
2392 @
rm -f igen
/ld-decode
$(EXEEXT
)
2393 $(AM_V_CCLD
)$(LINK
) $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_LDADD
) $(LIBS
)
2395 igen
/ld-insn
$(EXEEXT
): $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_DEPENDENCIES
) $(EXTRA_igen_ld_insn_DEPENDENCIES
) igen
/$(am__dirstamp
)
2396 @
rm -f igen
/ld-insn
$(EXEEXT
)
2397 $(AM_V_CCLD
)$(LINK
) $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_LDADD
) $(LIBS
)
2399 igen
/table
$(EXEEXT
): $(igen_table_OBJECTS
) $(igen_table_DEPENDENCIES
) $(EXTRA_igen_table_DEPENDENCIES
) igen
/$(am__dirstamp
)
2400 @
rm -f igen
/table
$(EXEEXT
)
2401 $(AM_V_CCLD
)$(LINK
) $(igen_table_OBJECTS
) $(igen_table_LDADD
) $(LIBS
)
2402 iq2000
/$(am__dirstamp
):
2404 @
: > iq2000
/$(am__dirstamp
)
2406 iq2000
/run
$(EXEEXT
): $(iq2000_run_OBJECTS
) $(iq2000_run_DEPENDENCIES
) $(EXTRA_iq2000_run_DEPENDENCIES
) iq2000
/$(am__dirstamp
)
2407 @
rm -f iq2000
/run
$(EXEEXT
)
2408 $(AM_V_CCLD
)$(LINK
) $(iq2000_run_OBJECTS
) $(iq2000_run_LDADD
) $(LIBS
)
2409 lm32
/$(am__dirstamp
):
2411 @
: > lm32
/$(am__dirstamp
)
2413 lm32
/run
$(EXEEXT
): $(lm32_run_OBJECTS
) $(lm32_run_DEPENDENCIES
) $(EXTRA_lm32_run_DEPENDENCIES
) lm32
/$(am__dirstamp
)
2414 @
rm -f lm32
/run
$(EXEEXT
)
2415 $(AM_V_CCLD
)$(LINK
) $(lm32_run_OBJECTS
) $(lm32_run_LDADD
) $(LIBS
)
2416 m32c
/$(am__dirstamp
):
2418 @
: > m32c
/$(am__dirstamp
)
2419 m32c
/$(DEPDIR
)/$(am__dirstamp
):
2420 @
$(MKDIR_P
) m32c
/$(DEPDIR
)
2421 @
: > m32c
/$(DEPDIR
)/$(am__dirstamp
)
2422 m32c
/opc2c.
$(OBJEXT
): m32c
/$(am__dirstamp
) \
2423 m32c
/$(DEPDIR
)/$(am__dirstamp
)
2425 @SIM_ENABLE_ARCH_m32c_FALSE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) $(EXTRA_m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
2426 @SIM_ENABLE_ARCH_m32c_FALSE@ @
rm -f m32c
/opc2c
$(EXEEXT
)
2427 @SIM_ENABLE_ARCH_m32c_FALSE@
$(AM_V_CCLD
)$(LINK
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
) $(LIBS
)
2429 m32c
/run
$(EXEEXT
): $(m32c_run_OBJECTS
) $(m32c_run_DEPENDENCIES
) $(EXTRA_m32c_run_DEPENDENCIES
) m32c
/$(am__dirstamp
)
2430 @
rm -f m32c
/run
$(EXEEXT
)
2431 $(AM_V_CCLD
)$(LINK
) $(m32c_run_OBJECTS
) $(m32c_run_LDADD
) $(LIBS
)
2432 m32r
/$(am__dirstamp
):
2434 @
: > m32r
/$(am__dirstamp
)
2436 m32r
/run
$(EXEEXT
): $(m32r_run_OBJECTS
) $(m32r_run_DEPENDENCIES
) $(EXTRA_m32r_run_DEPENDENCIES
) m32r
/$(am__dirstamp
)
2437 @
rm -f m32r
/run
$(EXEEXT
)
2438 $(AM_V_CCLD
)$(LINK
) $(m32r_run_OBJECTS
) $(m32r_run_LDADD
) $(LIBS
)
2439 m68hc11
/$(am__dirstamp
):
2441 @
: > m68hc11
/$(am__dirstamp
)
2442 m68hc11
/$(DEPDIR
)/$(am__dirstamp
):
2443 @
$(MKDIR_P
) m68hc11
/$(DEPDIR
)
2444 @
: > m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
2445 m68hc11
/gencode.
$(OBJEXT
): m68hc11
/$(am__dirstamp
) \
2446 m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
2448 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11
/gencode
$(EXEEXT
): $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_DEPENDENCIES
) $(EXTRA_m68hc11_gencode_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
2449 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @
rm -f m68hc11
/gencode
$(EXEEXT
)
2450 @SIM_ENABLE_ARCH_m68hc11_FALSE@
$(AM_V_CCLD
)$(LINK
) $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_LDADD
) $(LIBS
)
2452 m68hc11
/run
$(EXEEXT
): $(m68hc11_run_OBJECTS
) $(m68hc11_run_DEPENDENCIES
) $(EXTRA_m68hc11_run_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
2453 @
rm -f m68hc11
/run
$(EXEEXT
)
2454 $(AM_V_CCLD
)$(LINK
) $(m68hc11_run_OBJECTS
) $(m68hc11_run_LDADD
) $(LIBS
)
2455 mcore
/$(am__dirstamp
):
2457 @
: > mcore
/$(am__dirstamp
)
2459 mcore
/run
$(EXEEXT
): $(mcore_run_OBJECTS
) $(mcore_run_DEPENDENCIES
) $(EXTRA_mcore_run_DEPENDENCIES
) mcore
/$(am__dirstamp
)
2460 @
rm -f mcore
/run
$(EXEEXT
)
2461 $(AM_V_CCLD
)$(LINK
) $(mcore_run_OBJECTS
) $(mcore_run_LDADD
) $(LIBS
)
2462 microblaze
/$(am__dirstamp
):
2463 @
$(MKDIR_P
) microblaze
2464 @
: > microblaze
/$(am__dirstamp
)
2466 microblaze
/run
$(EXEEXT
): $(microblaze_run_OBJECTS
) $(microblaze_run_DEPENDENCIES
) $(EXTRA_microblaze_run_DEPENDENCIES
) microblaze
/$(am__dirstamp
)
2467 @
rm -f microblaze
/run
$(EXEEXT
)
2468 $(AM_V_CCLD
)$(LINK
) $(microblaze_run_OBJECTS
) $(microblaze_run_LDADD
) $(LIBS
)
2469 mips
/$(am__dirstamp
):
2471 @
: > mips
/$(am__dirstamp
)
2473 mips
/run
$(EXEEXT
): $(mips_run_OBJECTS
) $(mips_run_DEPENDENCIES
) $(EXTRA_mips_run_DEPENDENCIES
) mips
/$(am__dirstamp
)
2474 @
rm -f mips
/run
$(EXEEXT
)
2475 $(AM_V_CCLD
)$(LINK
) $(mips_run_OBJECTS
) $(mips_run_LDADD
) $(LIBS
)
2476 mn10300
/$(am__dirstamp
):
2478 @
: > mn10300
/$(am__dirstamp
)
2480 mn10300
/run
$(EXEEXT
): $(mn10300_run_OBJECTS
) $(mn10300_run_DEPENDENCIES
) $(EXTRA_mn10300_run_DEPENDENCIES
) mn10300
/$(am__dirstamp
)
2481 @
rm -f mn10300
/run
$(EXEEXT
)
2482 $(AM_V_CCLD
)$(LINK
) $(mn10300_run_OBJECTS
) $(mn10300_run_LDADD
) $(LIBS
)
2483 moxie
/$(am__dirstamp
):
2485 @
: > moxie
/$(am__dirstamp
)
2487 moxie
/run
$(EXEEXT
): $(moxie_run_OBJECTS
) $(moxie_run_DEPENDENCIES
) $(EXTRA_moxie_run_DEPENDENCIES
) moxie
/$(am__dirstamp
)
2488 @
rm -f moxie
/run
$(EXEEXT
)
2489 $(AM_V_CCLD
)$(LINK
) $(moxie_run_OBJECTS
) $(moxie_run_LDADD
) $(LIBS
)
2490 msp430
/$(am__dirstamp
):
2492 @
: > msp430
/$(am__dirstamp
)
2494 msp430
/run
$(EXEEXT
): $(msp430_run_OBJECTS
) $(msp430_run_DEPENDENCIES
) $(EXTRA_msp430_run_DEPENDENCIES
) msp430
/$(am__dirstamp
)
2495 @
rm -f msp430
/run
$(EXEEXT
)
2496 $(AM_V_CCLD
)$(LINK
) $(msp430_run_OBJECTS
) $(msp430_run_LDADD
) $(LIBS
)
2497 or1k
/$(am__dirstamp
):
2499 @
: > or1k
/$(am__dirstamp
)
2501 or1k
/run
$(EXEEXT
): $(or1k_run_OBJECTS
) $(or1k_run_DEPENDENCIES
) $(EXTRA_or1k_run_DEPENDENCIES
) or1k
/$(am__dirstamp
)
2502 @
rm -f or1k
/run
$(EXEEXT
)
2503 $(AM_V_CCLD
)$(LINK
) $(or1k_run_OBJECTS
) $(or1k_run_LDADD
) $(LIBS
)
2504 ppc
/$(am__dirstamp
):
2506 @
: > ppc
/$(am__dirstamp
)
2507 ppc
/$(DEPDIR
)/$(am__dirstamp
):
2508 @
$(MKDIR_P
) ppc
/$(DEPDIR
)
2509 @
: > ppc
/$(DEPDIR
)/$(am__dirstamp
)
2510 ppc
/psim.
$(OBJEXT
): ppc
/$(am__dirstamp
) ppc
/$(DEPDIR
)/$(am__dirstamp
)
2512 @SIM_ENABLE_ARCH_ppc_FALSE@ppc
/psim
$(EXEEXT
): $(ppc_psim_OBJECTS
) $(ppc_psim_DEPENDENCIES
) $(EXTRA_ppc_psim_DEPENDENCIES
) ppc
/$(am__dirstamp
)
2513 @SIM_ENABLE_ARCH_ppc_FALSE@ @
rm -f ppc
/psim
$(EXEEXT
)
2514 @SIM_ENABLE_ARCH_ppc_FALSE@
$(AM_V_CCLD
)$(LINK
) $(ppc_psim_OBJECTS
) $(ppc_psim_LDADD
) $(LIBS
)
2516 ppc
/run
$(EXEEXT
): $(ppc_run_OBJECTS
) $(ppc_run_DEPENDENCIES
) $(EXTRA_ppc_run_DEPENDENCIES
) ppc
/$(am__dirstamp
)
2517 @
rm -f ppc
/run
$(EXEEXT
)
2518 $(AM_V_CCLD
)$(LINK
) $(ppc_run_OBJECTS
) $(ppc_run_LDADD
) $(LIBS
)
2519 pru
/$(am__dirstamp
):
2521 @
: > pru
/$(am__dirstamp
)
2523 pru
/run
$(EXEEXT
): $(pru_run_OBJECTS
) $(pru_run_DEPENDENCIES
) $(EXTRA_pru_run_DEPENDENCIES
) pru
/$(am__dirstamp
)
2524 @
rm -f pru
/run
$(EXEEXT
)
2525 $(AM_V_CCLD
)$(LINK
) $(pru_run_OBJECTS
) $(pru_run_LDADD
) $(LIBS
)
2526 riscv
/$(am__dirstamp
):
2528 @
: > riscv
/$(am__dirstamp
)
2530 riscv
/run
$(EXEEXT
): $(riscv_run_OBJECTS
) $(riscv_run_DEPENDENCIES
) $(EXTRA_riscv_run_DEPENDENCIES
) riscv
/$(am__dirstamp
)
2531 @
rm -f riscv
/run
$(EXEEXT
)
2532 $(AM_V_CCLD
)$(LINK
) $(riscv_run_OBJECTS
) $(riscv_run_LDADD
) $(LIBS
)
2533 rl78
/$(am__dirstamp
):
2535 @
: > rl78
/$(am__dirstamp
)
2537 rl78
/run
$(EXEEXT
): $(rl78_run_OBJECTS
) $(rl78_run_DEPENDENCIES
) $(EXTRA_rl78_run_DEPENDENCIES
) rl78
/$(am__dirstamp
)
2538 @
rm -f rl78
/run
$(EXEEXT
)
2539 $(AM_V_CCLD
)$(LINK
) $(rl78_run_OBJECTS
) $(rl78_run_LDADD
) $(LIBS
)
2542 @
: > rx
/$(am__dirstamp
)
2544 rx
/run
$(EXEEXT
): $(rx_run_OBJECTS
) $(rx_run_DEPENDENCIES
) $(EXTRA_rx_run_DEPENDENCIES
) rx
/$(am__dirstamp
)
2545 @
rm -f rx
/run
$(EXEEXT
)
2546 $(AM_V_CCLD
)$(LINK
) $(rx_run_OBJECTS
) $(rx_run_LDADD
) $(LIBS
)
2549 @
: > sh
/$(am__dirstamp
)
2550 sh
/$(DEPDIR
)/$(am__dirstamp
):
2551 @
$(MKDIR_P
) sh
/$(DEPDIR
)
2552 @
: > sh
/$(DEPDIR
)/$(am__dirstamp
)
2553 sh
/gencode.
$(OBJEXT
): sh
/$(am__dirstamp
) sh
/$(DEPDIR
)/$(am__dirstamp
)
2555 @SIM_ENABLE_ARCH_sh_FALSE@sh
/gencode
$(EXEEXT
): $(sh_gencode_OBJECTS
) $(sh_gencode_DEPENDENCIES
) $(EXTRA_sh_gencode_DEPENDENCIES
) sh
/$(am__dirstamp
)
2556 @SIM_ENABLE_ARCH_sh_FALSE@ @
rm -f sh
/gencode
$(EXEEXT
)
2557 @SIM_ENABLE_ARCH_sh_FALSE@
$(AM_V_CCLD
)$(LINK
) $(sh_gencode_OBJECTS
) $(sh_gencode_LDADD
) $(LIBS
)
2559 sh
/run
$(EXEEXT
): $(sh_run_OBJECTS
) $(sh_run_DEPENDENCIES
) $(EXTRA_sh_run_DEPENDENCIES
) sh
/$(am__dirstamp
)
2560 @
rm -f sh
/run
$(EXEEXT
)
2561 $(AM_V_CCLD
)$(LINK
) $(sh_run_OBJECTS
) $(sh_run_LDADD
) $(LIBS
)
2562 testsuite
/common
/$(am__dirstamp
):
2563 @
$(MKDIR_P
) testsuite
/common
2564 @
: > testsuite
/common
/$(am__dirstamp
)
2565 testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
):
2566 @
$(MKDIR_P
) testsuite
/common
/$(DEPDIR
)
2567 @
: > testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
2568 testsuite
/common
/alu-tst.
$(OBJEXT
): testsuite
/common
/$(am__dirstamp
) \
2569 testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
2570 testsuite
/common
/bits-gen.
$(OBJEXT
): testsuite
/common
/$(am__dirstamp
) \
2571 testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
2572 testsuite
/common
/bits32m0.
$(OBJEXT
): testsuite
/common
/$(am__dirstamp
) \
2573 testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
2574 testsuite
/common
/bits32m31.
$(OBJEXT
): \
2575 testsuite
/common
/$(am__dirstamp
) \
2576 testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
2577 testsuite
/common
/bits64m0.
$(OBJEXT
): testsuite
/common
/$(am__dirstamp
) \
2578 testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
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"$(CTAGS_ARGS)$$unique" \
2959 ||
$(CTAGS
) $(CTAGSFLAGS
) $(AM_CTAGSFLAGS
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2963 here
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2965 && gtags
-i
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2966 cscope
: cscope.files
2967 test ! -s cscope.files \
2968 ||
$(CSCOPE
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-q
$(AM_CSCOPEFLAGS
) $(CSCOPEFLAGS
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$(CSCOPE_ARGS
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2971 cscope.files
: clean-cscope cscopelist
2972 cscopelist
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2974 cscopelist-am
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2975 list
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2981 if
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2982 echo
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2984 echo
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>> $(top_builddir
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tags
2990 -rm -f cscope.out cscope.in.out cscope.po.out cscope.files
2991 site.exp
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2993 @echo
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2997 @echo
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3002 @echo
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3003 @echo
'set target_triplet $(target_triplet)' >>site.tmp
3004 @list
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`test -f "$$f" || echo '$(srcdir)/'`$$f \
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-e
'1,/^## End of auto-generated content.*##/d' site.exp
>> site.tmp
; \
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3020 -l
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$$tool.sum
$$tool.log
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$(TEST_LOGS
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3038 $(TEST_SUITE_LOG
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3039 @
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3090 maybe_colorize
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3095 desc
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test $$maybe_colorize = yes
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3097 color_start
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3109 result_count
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3110 result_count
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3111 result_count
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$$success; then \
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$(TEST_SUITE_LOG
); \
3130 echo
"$${col}$$br$${std}"; \
3131 echo
"$${col}Testsuite summary for $(PACKAGE_STRING)$${std}"; \
3132 echo
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3133 create_testsuite_report
--maybe-color
; \
3134 echo
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3135 if
$$success; then
:; else \
3136 echo
"$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}"; \
3137 if
test -n
"$(PACKAGE_BUGREPORT)"; then \
3138 echo
"$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \
3140 echo
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rm -f
$$list
3146 @list
='$(RECHECK_LOGS:.log=.trs)'; test -z
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rm -f
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3147 @
test -z
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rm -f
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test -z
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rm -f
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3162 am__force_recheck
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$(EXEEXT
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3179 testsuite
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3185 "$$tst" $(AM_TESTS_FD_REDIRECT
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3186 testsuite
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3191 $(am__common_driver_flags
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3192 "$$tst" $(AM_TESTS_FD_REDIRECT
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3193 testsuite
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3194 @p
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3196 $(am__check_pre
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3197 --log-file
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3198 $(am__common_driver_flags
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3199 "$$tst" $(AM_TESTS_FD_REDIRECT
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3203 $(am__check_pre
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3204 --log-file
$$b.log
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3205 $(am__common_driver_flags
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3206 "$$tst" $(AM_TESTS_FD_REDIRECT
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3207 @am__EXEEXT_TRUE@.
test$(EXEEXT
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3208 @am__EXEEXT_TRUE@ @p
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3209 @am__EXEEXT_TRUE@
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3210 @am__EXEEXT_TRUE@
$(am__check_pre
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3211 @am__EXEEXT_TRUE@
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3212 @am__EXEEXT_TRUE@
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3215 $(MAKE
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3216 $(MAKE
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3217 check: $(BUILT_SOURCES
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3218 $(MAKE
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3219 all-am
: Makefile
$(LIBRARIES
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3220 installdirs: installdirs-recursive
3222 for
dir in
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$(MKDIR_P
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3225 install: $(BUILT_SOURCES
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3226 $(MAKE
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3227 install-exec
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3228 install-data
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3229 uninstall: uninstall-recursive
3232 @
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3234 installcheck: installcheck-recursive
3236 if
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3237 $(MAKE
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rm -f
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3247 -test -z
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rm -f
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rm -f
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rm -f
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3301 -rm -f testsuite
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rm -f
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rm -f
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3335 install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
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3342 install-exec-am
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install install-am \
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3394 clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
3395 clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
3396 cscopelist-am ctags ctags-am
distclean distclean-DEJAGNU \
3397 distclean-compile distclean-generic distclean-hdr \
3398 distclean-libtool distclean-tags
dvi dvi-am html html-am
info \
3399 info-am
install install-am install-armdocDATA install-data \
3400 install-data-am install-data-local install-dtbDATA install-dvi \
3401 install-dvi-am install-erc32docDATA install-exec \
3402 install-exec-am install-exec-local install-frvdocDATA \
3403 install-html install-html-am install-info install-info-am \
3404 install-man install-or1kdocDATA install-pdf install-pdf-am \
3405 install-pkgincludeHEADERS install-ppcdocDATA install-ps \
3406 install-ps-am install-rxdocDATA install-strip
installcheck \
3407 installcheck-am
installdirs installdirs-am maintainer-clean \
3408 maintainer-clean-generic
mostlyclean mostlyclean-compile \
3409 mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
3410 recheck
tags tags-am
uninstall uninstall-am \
3411 uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
3412 uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
3413 uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
3418 @am__include@ @am__quote@
$(GNULIB_PARENT_DIR
)/gnulib
/Makefile.gnulib.inc@am__quote@
3420 # Generate target constants for newlib/libgloss from its source tree.
3421 # This file is shipped with distributions so we build in the source dir.
3422 # Use `make nltvals' to rebuild.
3425 $(srccom
)/gennltvals.py
--cpp "$(CPP)"
3427 common
/version.c
: common
/version.c-stamp
; @true
3428 common
/version.c-stamp
: $(srcroot
)/gdb
/version.in
$(srcroot
)/bfd
/version.h
$(srcdir)/common
/create-version.sh
3429 $(AM_V_GEN
)$(SHELL
) $(srcdir)/common
/create-version.sh
$(srcroot
)/gdb
$@.tmp
3430 $(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@
:-stamp
=)
3433 # FIXME This is one very simple-minded way of generating the file hw-config.h.
3434 %/hw-config.h
: %/stamp-hw
; @true
3435 %/stamp-hw
: Makefile
3436 $(AM_V_GEN
)set
-e
; \
3438 sim_hw
="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
3439 echo
"/* generated by Makefile */" ; \
3440 printf
"extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
3441 echo
"const struct hw_descriptor * const hw_descriptors[] = {" ; \
3442 printf
" dv_%s_descriptor,\n" $$sim_hw ; \
3446 $(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@D
)/hw-config.h
; \
3448 .PRECIOUS
: %/stamp-hw
3450 $(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) GEN_MODULES_C_SRCS
="$(GEN_MODULES_C_SRCS)" -C
$(@D
) $(@F
)
3452 # Alias for developers.
3453 @SIM_ENABLE_IGEN_TRUE@igen
: $(IGEN
)
3455 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3456 @SIM_ENABLE_IGEN_TRUE@igen
/libigen.a
: $(igen_libigen_a_OBJECTS
) $(igen_libigen_a_DEPENDENCIES
) $(EXTRA_igen_libigen_a_DEPENDENCIES
) igen
/$(am__dirstamp
)
3457 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_at
)-rm -f
$@
3458 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_AR
)$(AR_FOR_BUILD
) $(ARFLAGS
) $@
$(igen_libigen_a_OBJECTS
) $(igen_libigen_a_LIBADD
)
3459 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_at
)$(RANLIB_FOR_BUILD
) $@
3461 @SIM_ENABLE_IGEN_TRUE@igen
/igen
$(EXEEXT
): $(igen_igen_OBJECTS
) $(igen_igen_DEPENDENCIES
) igen
/$(am__dirstamp
)
3462 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(igen_igen_OBJECTS
) $(igen_igen_LDADD
)
3464 # igen is a build-time only tool. Override the default rules for it.
3465 @SIM_ENABLE_IGEN_TRUE@igen
/%.o
: igen
/%.c
3466 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3468 # Build some of the files in standalone mode for developers of igen itself.
3469 @SIM_ENABLE_IGEN_TRUE@igen
/%-main.o
: igen
/%.c
3470 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -DMAIN
-c
$< -o
$@
3472 site-sim-config.exp
: Makefile
3474 echo
"set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
3475 echo
"set builddir \"$(builddir)\""; \
3476 echo
"set srcdir \"$(srcdir)/testsuite\""; \
3477 $(foreach V
,$(SIM_TOOLCHAIN_VARS
),echo
"set $(V) \"$($(V))\"";) \
3480 # Ignore dirs that only contain configuration settings.
3481 check/.
/config
/%.exp
: ; @true
3482 check/config
/%.exp
: ; @true
3483 check/.
/lib
/%.exp
: ; @true
3484 check/lib
/%.exp
: ; @true
3487 $(AM_V_at
)mkdir
-p testsuite
/$*
3488 $(AM_V_RUNTEST
)$(DO_RUNTEST
) --objdir testsuite
/$* --outdir testsuite
/$* $*.exp
3490 check-DEJAGNU-parallel
:
3492 set
-- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
3493 $(MAKE
) -k
`printf 'check/%s.exp ' $$@`; \
3495 set
-- `printf 'testsuite/%s/ ' $$@`; \
3496 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh \
3497 `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum
; \
3498 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh
-L \
3499 `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log
; \
3501 $(SED
) -n
'/^.*===.*Summary.*===/,$$p' testrun.sum
; \
3504 check-DEJAGNU-single
:
3505 $(AM_V_RUNTEST
)$(DO_RUNTEST
)
3507 # If running a single job, invoking runtest once is faster & has nicer output.
3508 check-DEJAGNU
: site.exp
3509 $(AM_V_at
)(set
-e
; \
3510 EXPECT
=${EXPECT} ; export EXPECT
; \
3511 runtest
=$(RUNTEST
); \
3512 if
$(SHELL
) -c
"$$runtest --version" > /dev
/null
2>&1; then \
3513 case
"$(MAKEFLAGS)" in \
3514 *-j
*) $(MAKE
) check-DEJAGNU-parallel
;; \
3515 *) $(MAKE
) check-DEJAGNU-single
;; \
3518 echo
"WARNING: could not find \`runtest'" 1>&2; :;\
3521 # These tests are build-time only tools. Override the default rules for them.
3522 testsuite
/common
/%.o
: testsuite
/common
/%.c
3523 $(AM_V_CC
)$(COMPILE_FOR_BUILD
) $(testsuite_common_CPPFLAGS
) -c
$< -o
$@
3525 testsuite
/common
/alu-tst
$(EXEEXT
): $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3526 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_LDADD
)
3528 testsuite
/common
/fpu-tst
$(EXEEXT
): $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3529 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_LDADD
)
3531 testsuite
/common
/bits-gen
$(EXEEXT
): $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3532 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_LDADD
)
3534 testsuite
/common
/bits32m0
$(EXEEXT
): $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3535 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_LDADD
)
3537 testsuite
/common
/bits32m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3538 $(AM_V_GEN
)$< 32 0 big
> $@.tmp
3539 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3540 $(AM_V_at
)mv
$@.tmp
$@
3542 testsuite
/common
/bits32m31
$(EXEEXT
): $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3543 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_LDADD
)
3545 testsuite
/common
/bits32m31.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3546 $(AM_V_GEN
)$< 32 31 little
> $@.tmp
3547 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3548 $(AM_V_at
)mv
$@.tmp
$@
3550 testsuite
/common
/bits64m0
$(EXEEXT
): $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3551 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_LDADD
)
3553 testsuite
/common
/bits64m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3554 $(AM_V_GEN
)$< 64 0 big
> $@.tmp
3555 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3556 $(AM_V_at
)mv
$@.tmp
$@
3558 testsuite
/common
/bits64m63
$(EXEEXT
): $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3559 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_LDADD
)
3561 testsuite
/common
/bits64m63.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3562 $(AM_V_GEN
)$< 64 63 little
> $@.tmp
3563 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3564 $(AM_V_at
)mv
$@.tmp
$@
3565 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(aarch64_libsim_a_OBJECTS
) $(aarch64_libsim_a_LIBADD
): aarch64
/hw-config.h
3567 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64
/%.o
: aarch64
/%.c
3568 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3570 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64
/%.o
: common
/%.c
3571 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3572 @SIM_ENABLE_ARCH_arm_TRUE@
$(arm_libsim_a_OBJECTS
) $(arm_libsim_a_LIBADD
): arm
/hw-config.h
3574 @SIM_ENABLE_ARCH_arm_TRUE@arm
/%.o
: arm
/%.c
3575 @SIM_ENABLE_ARCH_arm_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3577 @SIM_ENABLE_ARCH_arm_TRUE@arm
/%.o
: common
/%.c
3578 @SIM_ENABLE_ARCH_arm_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3580 @SIM_ENABLE_ARCH_bfin_TRUE@bfin
/linux-fixed-code.h
: @MAINT@
$(srcdir)/bfin
/linux-fixed-code.s bfin
/local.mk bfin
/$(am__dirstamp
)
3581 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_GEN
)$(AS_FOR_TARGET_BFIN
) $(srcdir)/bfin
/linux-fixed-code.s
-o bfin
/linux-fixed-code.o
3582 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)(\
3583 @SIM_ENABLE_ARCH_bfin_TRUE@ set
-e
; \
3584 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \
3585 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"static const unsigned char bfin_linux_fixed_code[] ="; \
3586 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"{"; \
3587 @SIM_ENABLE_ARCH_bfin_TRUE@
$(OBJDUMP_FOR_TARGET_BFIN
) -d
-z bfin
/linux-fixed-code.o
> $@.dis
; \
3588 @SIM_ENABLE_ARCH_bfin_TRUE@ sed
-n \
3589 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
's:^[^ ]* :0x:' \
3590 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
'/^0x/{s: .*::;s: *$$:,:;s: :, 0x:g;p;}' \
3591 @SIM_ENABLE_ARCH_bfin_TRUE@
$@.dis
; \
3592 @SIM_ENABLE_ARCH_bfin_TRUE@
rm -f
$@.dis
; \
3593 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"};" \
3594 @SIM_ENABLE_ARCH_bfin_TRUE@
) > $@.tmp
3595 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/bfin
/linux-fixed-code.h
3596 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)touch
$(srcdir)/bfin
/linux-fixed-code.h
3597 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/modules.c
: |
$(bpf_BUILD_OUTPUTS
)
3599 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/mloop-le.c bpf
/eng-le.h
: bpf
/stamp-mloop-le
; @true
3600 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/stamp-mloop-le
: $(srccom
)/genmloop.sh bpf
/mloop.in
3601 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3602 @SIM_ENABLE_ARCH_bpf_TRUE@
-mono
-scache
-prefix bpfbf_ebpfle
-cpu bpfbf \
3603 @SIM_ENABLE_ARCH_bpf_TRUE@
-infile
$(srcdir)/bpf
/mloop.in \
3604 @SIM_ENABLE_ARCH_bpf_TRUE@
-outfile-prefix bpf
/ -outfile-suffix
-le
3605 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/eng-le.hin bpf
/eng-le.h
3606 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/mloop-le.cin bpf
/mloop-le.c
3607 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)touch
$@
3609 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/mloop-be.c bpf
/eng-be.h
: bpf
/stamp-mloop-be
; @true
3610 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/stamp-mloop-be
: $(srccom
)/genmloop.sh bpf
/mloop.in
3611 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3612 @SIM_ENABLE_ARCH_bpf_TRUE@
-mono
-scache
-prefix bpfbf_ebpfbe
-cpu bpfbf \
3613 @SIM_ENABLE_ARCH_bpf_TRUE@
-infile
$(srcdir)/bpf
/mloop.in \
3614 @SIM_ENABLE_ARCH_bpf_TRUE@
-outfile-prefix bpf
/ -outfile-suffix
-be
3615 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/eng-be.hin bpf
/eng-be.h
3616 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/mloop-be.cin bpf
/mloop-be.c
3617 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)touch
$@
3619 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen
: bpf
/cgen-arch bpf
/cgen-cpu bpf
/cgen-defs-le bpf
/cgen-defs-be bpf
/cgen-decode-le bpf
/cgen-decode-be
3621 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-arch
:
3622 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)mach
=bpf cpu
=bpfbf FLAGS
="with-scache"; $(CGEN_GEN_ARCH
)
3623 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/arch.h bpf
/arch.c bpf
/cpuall.h
: @CGEN_MAINT@ bpf
/cgen-arch
3625 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-cpu
:
3626 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfle
,ebpfbe cpu
=bpfbf mach
=bpf FLAGS
="with-multiple-isa with-scache"; $(CGEN_GEN_CPU
)
3627 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)rm -f
$(srcdir)/bpf
/model.c
3628 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cpu.h bpf
/cpu.c bpf
/model.c
: @CGEN_MAINT@ bpf
/cgen-cpu
3630 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-defs-le
:
3631 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfle cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-le"; $(CGEN_GEN_DEFS
)
3632 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/defs-le.h
: @CGEN_MAINT@ bpf
/cgen-defs-le
3634 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-defs-be
:
3635 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfbe cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-be"; $(CGEN_GEN_DEFS
)
3636 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/defs-be.h
: @CGEN_MAINT@ bpf
/cgen-defs-be
3638 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-decode-le
:
3639 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfle cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-le" EXTRAFILES
="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE
)
3640 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/sem-le.c bpf
/decode-le.c bpf
/decode-le.h
: @CGEN_MAINT@ bpf
/cgen-decode-vle
3642 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-decode-be
:
3643 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfbe cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-be" EXTRAFILES
="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE
)
3644 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/sem-be.c bpf
/decode-be.c bpf
/decode-be.h
: @CGEN_MAINT@ bpf
/cgen-decode-be
3645 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/modules.c
: |
$(cr16_BUILD_OUTPUTS
)
3647 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3648 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
3649 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
)
3651 # gencode is a build-time only tool. Override the default rules for it.
3652 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode.o
: cr16
/gencode.c
3653 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3654 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/cr16-opc.o
: ..
/opcodes
/cr16-opc.c
3655 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3657 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/simops.h
: cr16
/gencode
$(EXEEXT
)
3658 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< -h
>$@
3660 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/table.c
: cr16
/gencode
$(EXEEXT
)
3661 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< >$@
3662 @SIM_ENABLE_ARCH_cris_TRUE@cris
/modules.c
: |
$(cris_BUILD_OUTPUTS
)
3664 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv10f.c cris
/engv10.h
: cris
/stamp-mloop-v10f
; @true
3665 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v10f
: $(srccom
)/genmloop.sh cris
/mloop.in
3666 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3667 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv10f-switch.c \
3668 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv10f \
3669 @SIM_ENABLE_ARCH_cris_TRUE@
-infile
$(srcdir)/cris
/mloop.in
-outfile-prefix cris
/ -outfile-suffix
-v10f
3670 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v10f.hin cris
/engv10.h
3671 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v10f.cin cris
/mloopv10f.c
3672 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
3674 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv32f.c cris
/engv32.h
: cris
/stamp-mloop-v32f
; @true
3675 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v32f
: $(srccom
)/genmloop.sh cris
/mloop.in
3676 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3677 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv32f-switch.c \
3678 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv32f \
3679 @SIM_ENABLE_ARCH_cris_TRUE@
-infile
$(srcdir)/cris
/mloop.in
-outfile-prefix cris
/ -outfile-suffix
-v32f
3680 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v32f.hin cris
/engv32.h
3681 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v32f.cin cris
/mloopv32f.c
3682 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
3684 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen
: cris
/cgen-arch cris
/cgen-cpu-decode-v10f cris
/cgen-cpu-decode-v32f
3686 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen-arch
:
3687 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)mach
=crisv10
,crisv32 FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
3688 @SIM_ENABLE_ARCH_cris_TRUE@cris
/arch.h cris
/arch.c cris
/cpuall.h
: @CGEN_MAINT@ cris
/cgen-arch
3690 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen-cpu-decode-v10f
:
3691 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)cpu
=crisv10f mach
=crisv10 SUFFIX
=v10 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
3692 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$(srcdir)/cris
/semv10-switch.c
$(srcdir)/cris
/semcrisv10f-switch.c
3693 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cpuv10.h cris
/cpuv10.c cris
/semcrisv10f-switch.c cris
/modelv10.c cris
/decodev10.c cris
/decodev10.h
: @CGEN_MAINT@ cris
/cgen-cpu-decode-v10f
3695 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen-cpu-decode-v32f
:
3696 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)cpu
=crisv32f mach
=crisv32 SUFFIX
=v32 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
3697 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$(srcdir)/cris
/semv32-switch.c
$(srcdir)/cris
/semcrisv32f-switch.c
3698 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cpuv32.h cris
/cpuv32.c cris
/semcrisv32f-switch.c cris
/modelv32.c cris
/decodev32.c cris
/decodev32.h
: @CGEN_MAINT@ cris
/cgen-cpu-decode-v32f
3699 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/modules.c
: |
$(d10v_BUILD_OUTPUTS
)
3701 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3702 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
3703 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
)
3705 # gencode is a build-time only tool. Override the default rules for it.
3706 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode.o
: d10v
/gencode.c
3707 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3708 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/d10v-opc.o
: ..
/opcodes
/d10v-opc.c
3709 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3711 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/simops.h
: d10v
/gencode
$(EXEEXT
)
3712 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< -h
>$@
3714 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/table.c
: d10v
/gencode
$(EXEEXT
)
3715 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< >$@
3717 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/sis
$(EXEEXT
): erc32
/run
$(EXEEXT
)
3718 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_GEN
)ln
$< $@
2>/dev
/null ||
$(LN_S
) $< $@
2>/dev
/null || cp
-p
$< $@
3720 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/%.o
: erc32
/%.c | erc32
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3721 @SIM_ENABLE_ARCH_erc32_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3722 @SIM_ENABLE_ARCH_erc32_TRUE@sim-
%D-install-exec-local
: installdirs
3723 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
3724 @SIM_ENABLE_ARCH_erc32_TRUE@ n
=`echo sis | sed '$(program_transform_name)'`; \
3725 @SIM_ENABLE_ARCH_erc32_TRUE@
$(LIBTOOL
) --mode
=install $(INSTALL_PROGRAM
) erc32
/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
)
3726 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local
:
3727 @SIM_ENABLE_ARCH_erc32_TRUE@
rm -f
$(DESTDIR
)$(bindir)/sis
3728 @SIM_ENABLE_ARCH_frv_TRUE@frv
/modules.c
: |
$(frv_BUILD_OUTPUTS
)
3730 @SIM_ENABLE_ARCH_frv_TRUE@frv
/mloop.c frv
/eng.h
: frv
/stamp-mloop
; @true
3731 @SIM_ENABLE_ARCH_frv_TRUE@frv
/stamp-mloop
: $(srccom
)/genmloop.sh frv
/mloop.in
3732 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3733 @SIM_ENABLE_ARCH_frv_TRUE@
-mono
-scache
-parallel-generic-write
-parallel-only \
3734 @SIM_ENABLE_ARCH_frv_TRUE@
-cpu frvbf \
3735 @SIM_ENABLE_ARCH_frv_TRUE@
-infile
$(srcdir)/frv
/mloop.in
-outfile-prefix frv
/
3736 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/eng.hin frv
/eng.h
3737 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/mloop.cin frv
/mloop.c
3738 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)touch
$@
3740 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cgen
: frv
/cgen-arch frv
/cgen-cpu-decode
3742 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cgen-arch
:
3743 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)mach
=all FLAGS
="with-scache"; $(CGEN_GEN_ARCH
)
3744 @SIM_ENABLE_ARCH_frv_TRUE@frv
/arch.h frv
/arch.c frv
/cpuall.h
: @CGEN_MAINT@ frv
/cgen-arch
3746 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cgen-cpu-decode
:
3747 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)cpu
=frvbf mach
=frv
,fr550
,fr500
,fr450
,fr400
,tomcat
,simple FLAGS
="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES
="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE
)
3748 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cpu.h frv
/sem.c frv
/model.c frv
/decode.c frv
/decode.h
: @CGEN_MAINT@ frv
/cgen-cpu-decode
3749 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/modules.c
: |
$(iq2000_BUILD_OUTPUTS
)
3751 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/mloop.c iq2000
/eng.h
: iq2000
/stamp-mloop
; @true
3752 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/stamp-mloop
: $(srccom
)/genmloop.sh iq2000
/mloop.in
3753 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3754 @SIM_ENABLE_ARCH_iq2000_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
3755 @SIM_ENABLE_ARCH_iq2000_TRUE@
-cpu iq2000bf \
3756 @SIM_ENABLE_ARCH_iq2000_TRUE@
-infile
$(srcdir)/iq2000
/mloop.in
-outfile-prefix iq2000
/
3757 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/eng.hin iq2000
/eng.h
3758 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/mloop.cin iq2000
/mloop.c
3759 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)touch
$@
3761 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cgen
: iq2000
/cgen-arch iq2000
/cgen-cpu-decode
3763 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cgen-arch
:
3764 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)mach
=iq2000 FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
3765 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/arch.h iq2000
/arch.c iq2000
/cpuall.h
: @CGEN_MAINT@ iq2000
/cgen-arch
3767 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cgen-cpu-decode
:
3768 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)cpu
=iq2000bf mach
=iq2000 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
3769 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cpu.h iq2000
/sem.c iq2000
/sem-switch.c iq2000
/model.c iq2000
/decode.c iq2000
/decode.h
: @CGEN_MAINT@ iq2000
/cgen-cpu-decode
3770 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/modules.c
: |
$(lm32_BUILD_OUTPUTS
)
3772 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/mloop.c lm32
/eng.h
: lm32
/stamp-mloop
; @true
3773 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/stamp-mloop
: $(srccom
)/genmloop.sh lm32
/mloop.in
3774 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3775 @SIM_ENABLE_ARCH_lm32_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
3776 @SIM_ENABLE_ARCH_lm32_TRUE@
-cpu lm32bf \
3777 @SIM_ENABLE_ARCH_lm32_TRUE@
-infile
$(srcdir)/lm32
/mloop.in
-outfile-prefix lm32
/
3778 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/eng.hin lm32
/eng.h
3779 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/mloop.cin lm32
/mloop.c
3780 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)touch
$@
3782 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cgen
: lm32
/cgen-arch lm32
/cgen-cpu-decode
3784 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cgen-arch
:
3785 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)mach
=all FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
3786 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/arch.h lm32
/arch.c lm32
/cpuall.h
: @CGEN_MAINT@ lm32
/cgen-arch
3788 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cgen-cpu-decode
:
3789 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)cpu
=lm32bf mach
=lm32 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
3790 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cpu.h lm32
/sem.c lm32
/sem-switch.c lm32
/model.c lm32
/decode.c lm32
/decode.h
: @CGEN_MAINT@ lm32
/cgen-cpu-decode
3792 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/%.o
: m32c
/%.c | m32c
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3793 @SIM_ENABLE_ARCH_m32c_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3794 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/modules.c
: |
$(m32c_BUILD_OUTPUTS
)
3796 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3797 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
3798 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
)
3800 # opc2c is a build-time only tool. Override the default rules for it.
3801 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c.o
: m32c
/opc2c.c
3802 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3804 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/m32c.c
: m32c
/m32c.opc m32c
/opc2c
$(EXEEXT
)
3805 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
3806 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
3808 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/r8c.c
: m32c
/r8c.opc m32c
/opc2c
$(EXEEXT
)
3809 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
3810 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
3811 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/modules.c
: |
$(m32r_BUILD_OUTPUTS
)
3813 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop.c m32r
/eng.h
: m32r
/stamp-mloop
; @true
3814 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop
: $(srccom
)/genmloop.sh m32r
/mloop.in
3815 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3816 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
3817 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rbf \
3818 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloop.in
-outfile-prefix m32r
/
3819 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng.hin m32r
/eng.h
3820 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop.cin m32r
/mloop.c
3821 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
3823 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloopx.c m32r
/engx.h
: m32r
/stamp-mloop
; @true
3824 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-x
: $(srccom
)/genmloop.sh m32r
/mloop.in
3825 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3826 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch semx-switch.c \
3827 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rxf \
3828 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloopx.in
-outfile-prefix m32r
/ -outfile-suffix x
3829 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/engx.hin m32r
/engx.h
3830 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloopx.cin m32r
/mloopx.c
3831 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
3833 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop2.c m32r
/eng2.h
: m32r
/stamp-mloop
; @true
3834 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-2
: $(srccom
)/genmloop.sh m32r
/mloop.in
3835 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3836 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch sem2-switch.c \
3837 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32r2f \
3838 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloop2.in
-outfile-prefix m32r
/ -outfile-suffix
2
3839 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng2.hin m32r
/eng2.h
3840 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop2.cin m32r
/mloop2.c
3841 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
3843 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen
: m32r
/cgen-arch m32r
/cgen-cpu-decode m32r
/cgen-cpu-decode-x m32r
/cgen-cpu-decode-2
3845 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-arch
:
3846 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)mach
=all FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
3847 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/arch.h m32r
/arch.c m32r
/cpuall.h
: @CGEN_MAINT@ m32r
/cgen-arch
3849 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-cpu-decode
:
3850 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)cpu
=m32rbf mach
=m32r FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
3851 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cpu.h m32r
/sem.c m32r
/sem-switch.c m32r
/model.c m32r
/decode.c m32r
/decode.h
: @CGEN_MAINT@ m32r
/cgen-cpu-decode
3853 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-cpu-decode-x
:
3854 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)cpu
=m32rxf mach
=m32rx SUFFIX
=x FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
3855 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cpux.h m32r
/semx-switch.c m32r
/modelx.c m32r
/decodex.c m32r
/decodex.h
: @CGEN_MAINT@ m32r
/cgen-cpu-decode-x
3857 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-cpu-decode-2
:
3858 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)cpu
=m32r2f mach
=m32r2 SUFFIX
=2 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
3859 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cpu2.h m32r
/sem2-switch.c m32r
/model2.c m32r
/decode2.c m32r
/decode2.h
: @CGEN_MAINT@ m32r
/cgen-cpu-decode-2
3860 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/modules.c
: |
$(m68hc11_BUILD_OUTPUTS
)
3862 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3863 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode
$(EXEEXT
): $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
3864 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_LDADD
)
3866 # gencode is a build-time only tool. Override the default rules for it.
3867 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode.o
: m68hc11
/gencode.c
3868 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3870 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc11int.c
: m68hc11
/gencode
$(EXEEXT
)
3871 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6811
>$@
3873 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc12int.c
: m68hc11
/gencode
$(EXEEXT
)
3874 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6812
>$@
3875 @SIM_ENABLE_ARCH_mips_TRUE@mips
/modules.c
: |
$(mips_BUILD_OUTPUTS
)
3877 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_IGEN_ITABLE
): mips
/stamp-igen-itable
3878 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE
): mips
/stamp-gen-mode-single
3879 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16
): mips
/stamp-gen-mode-m16-m16
3880 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32
): mips
/stamp-gen-mode-m16-m32
3881 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_MULTI_SRC
): mips
/stamp-gen-mode-multi-igen mips
/stamp-gen-mode-multi-run
3883 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-igen-itable
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(IGEN
)
3884 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
3885 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
3886 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
3887 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
3888 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
3889 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnowidth \
3890 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnounimplemented \
3891 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_IGEN_ITABLE_FLAGS
) \
3892 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
3893 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
3894 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
3895 @SIM_ENABLE_ARCH_mips_TRUE@
-n itable.h
-ht mips
/itable.h \
3896 @SIM_ENABLE_ARCH_mips_TRUE@
-n itable.c
-t mips
/itable.c
3897 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
3899 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-single
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_IGEN_DC
) $(IGEN
)
3900 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
3901 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
3902 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
3903 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
3904 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
3905 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_SINGLE_FLAGS
) \
3906 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
3907 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
3908 @SIM_ENABLE_ARCH_mips_TRUE@
-B
32 \
3909 @SIM_ENABLE_ARCH_mips_TRUE@
-H
31 \
3910 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
3911 @SIM_ENABLE_ARCH_mips_TRUE@
-o
$(mips_IGEN_DC
) \
3912 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
3913 @SIM_ENABLE_ARCH_mips_TRUE@
-n icache.h
-hc mips
/icache.h \
3914 @SIM_ENABLE_ARCH_mips_TRUE@
-n icache.c
-c mips
/icache.c \
3915 @SIM_ENABLE_ARCH_mips_TRUE@
-n semantics.h
-hs mips
/semantics.h \
3916 @SIM_ENABLE_ARCH_mips_TRUE@
-n semantics.c
-s mips
/semantics.c \
3917 @SIM_ENABLE_ARCH_mips_TRUE@
-n idecode.h
-hd mips
/idecode.h \
3918 @SIM_ENABLE_ARCH_mips_TRUE@
-n idecode.c
-d mips
/idecode.c \
3919 @SIM_ENABLE_ARCH_mips_TRUE@
-n model.h
-hm mips
/model.h \
3920 @SIM_ENABLE_ARCH_mips_TRUE@
-n model.c
-m mips
/model.c \
3921 @SIM_ENABLE_ARCH_mips_TRUE@
-n support.h
-hf mips
/support.h \
3922 @SIM_ENABLE_ARCH_mips_TRUE@
-n support.c
-f mips
/support.c \
3923 @SIM_ENABLE_ARCH_mips_TRUE@
-n engine.h
-he mips
/engine.h \
3924 @SIM_ENABLE_ARCH_mips_TRUE@
-n engine.c
-e mips
/engine.c \
3925 @SIM_ENABLE_ARCH_mips_TRUE@
-n irun.c
-r mips
/irun.c
3926 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
3928 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-m16-m16
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_M16_DC
) $(IGEN
)
3929 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
3930 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
3931 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
3932 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
3933 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
3934 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_M16_FLAGS
) \
3935 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
3936 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
3937 @SIM_ENABLE_ARCH_mips_TRUE@
-B
16 \
3938 @SIM_ENABLE_ARCH_mips_TRUE@
-H
15 \
3939 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
3940 @SIM_ENABLE_ARCH_mips_TRUE@
-o
$(mips_M16_DC
) \
3941 @SIM_ENABLE_ARCH_mips_TRUE@
-P m16_ \
3942 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
3943 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_icache.h
-hc mips
/m16_icache.h \
3944 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_icache.c
-c mips
/m16_icache.c \
3945 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_semantics.h
-hs mips
/m16_semantics.h \
3946 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_semantics.c
-s mips
/m16_semantics.c \
3947 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_idecode.h
-hd mips
/m16_idecode.h \
3948 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_idecode.c
-d mips
/m16_idecode.c \
3949 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_model.h
-hm mips
/m16_model.h \
3950 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_model.c
-m mips
/m16_model.c \
3951 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_support.h
-hf mips
/m16_support.h \
3952 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_support.c
-f mips
/m16_support.c
3953 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
3955 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-m16-m32
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_IGEN_DC
) $(IGEN
)
3956 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
3957 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
3958 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
3959 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
3960 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
3961 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_SINGLE_FLAGS
) \
3962 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
3963 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
3964 @SIM_ENABLE_ARCH_mips_TRUE@
-B
32 \
3965 @SIM_ENABLE_ARCH_mips_TRUE@
-H
31 \
3966 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
3967 @SIM_ENABLE_ARCH_mips_TRUE@
-o
$(mips_IGEN_DC
) \
3968 @SIM_ENABLE_ARCH_mips_TRUE@
-P m32_ \
3969 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
3970 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_icache.h
-hc mips
/m32_icache.h \
3971 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_icache.c
-c mips
/m32_icache.c \
3972 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_semantics.h
-hs mips
/m32_semantics.h \
3973 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_semantics.c
-s mips
/m32_semantics.c \
3974 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_idecode.h
-hd mips
/m32_idecode.h \
3975 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_idecode.c
-d mips
/m32_idecode.c \
3976 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_model.h
-hm mips
/m32_model.h \
3977 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_model.c
-m mips
/m32_model.c \
3978 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_support.h
-hf mips
/m32_support.h \
3979 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_support.c
-f mips
/m32_support.c
3980 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
3982 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-multi-igen
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_IGEN_DC
) $(mips_M16_DC
) $(mips_MICROMIPS32_DC
) $(mips_MICROMIPS16_DC
) $(IGEN
)
3983 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)\
3984 @SIM_ENABLE_ARCH_mips_TRUE@ for t in
$(SIM_MIPS_MULTI_IGEN_CONFIGS
); do \
3985 @SIM_ENABLE_ARCH_mips_TRUE@ p
=`echo $${t} | sed -e 's/:.*//'` ; \
3986 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
3987 @SIM_ENABLE_ARCH_mips_TRUE@ f
=`echo $${t} | sed -e 's/.*://'` ; \
3988 @SIM_ENABLE_ARCH_mips_TRUE@ case
$${p} in \
3989 @SIM_ENABLE_ARCH_mips_TRUE@ micromips16
*) \
3990 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
3991 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32
* | micromips64
*) \
3992 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
3993 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m32
*) \
3994 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
3995 @SIM_ENABLE_ARCH_mips_TRUE@ m
="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
3996 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m64
*) \
3997 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
3998 @SIM_ENABLE_ARCH_mips_TRUE@ m
="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
3999 @SIM_ENABLE_ARCH_mips_TRUE@ m16
*) \
4000 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
4001 @SIM_ENABLE_ARCH_mips_TRUE@
*) \
4002 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
4003 @SIM_ENABLE_ARCH_mips_TRUE@ esac
; \
4004 @SIM_ENABLE_ARCH_mips_TRUE@
$(IGEN_RUN
) \
4005 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
4006 @SIM_ENABLE_ARCH_mips_TRUE@
$${e} \
4007 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
4008 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
4009 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
4010 @SIM_ENABLE_ARCH_mips_TRUE@
-M
$${m} \
4011 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
4012 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
4013 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
4014 @SIM_ENABLE_ARCH_mips_TRUE@
-P
$${p}_ \
4015 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
4016 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_icache.h
-hc mips
/$${p}_icache.h \
4017 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_icache.c
-c mips
/$${p}_icache.c \
4018 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_semantics.h
-hs mips
/$${p}_semantics.h \
4019 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_semantics.c
-s mips
/$${p}_semantics.c \
4020 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_idecode.h
-hd mips
/$${p}_idecode.h \
4021 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_idecode.c
-d mips
/$${p}_idecode.c \
4022 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_model.h
-hm mips
/$${p}_model.h \
4023 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_model.c
-m mips
/$${p}_model.c \
4024 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_support.h
-hf mips
/$${p}_support.h \
4025 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_support.c
-f mips
/$${p}_support.c \
4026 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_engine.h
-he mips
/$${p}_engine.h \
4027 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_engine.c
-e mips
/$${p}_engine.c \
4028 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
; \
4029 @SIM_ENABLE_ARCH_mips_TRUE@ done
4030 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
4032 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-multi-run
: mips
/m16run.c mips
/micromipsrun.c
4033 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)\
4034 @SIM_ENABLE_ARCH_mips_TRUE@ for t in
$(SIM_MIPS_MULTI_IGEN_CONFIGS
); do \
4035 @SIM_ENABLE_ARCH_mips_TRUE@ case
$${t} in \
4036 @SIM_ENABLE_ARCH_mips_TRUE@ m16
*) \
4037 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
4038 @SIM_ENABLE_ARCH_mips_TRUE@ o
=mips
/m16
$${m}_run.c
; \
4039 @SIM_ENABLE_ARCH_mips_TRUE@ sed
< $(srcdir)/mips
/m16run.c
> $$o.tmp \
4040 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/^sim_/m16$${m}_/" \
4041 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"/include/s/sim-engine/m16$${m}_engine/" \
4042 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m16_/m16$${m}_/" \
4043 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m32_/m32$${m}_/" \
4044 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
1; \
4045 @SIM_ENABLE_ARCH_mips_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
4046 @SIM_ENABLE_ARCH_mips_TRUE@
;;\
4047 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32
*) \
4048 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
4049 @SIM_ENABLE_ARCH_mips_TRUE@ o
=mips
/micromips
$${m}_run.c
; \
4050 @SIM_ENABLE_ARCH_mips_TRUE@ sed
< $(srcdir)/mips
/micromipsrun.c
> $$o.tmp \
4051 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/^sim_/micromips32$${m}_/" \
4052 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"/include/s/sim-engine/micromips32$${m}_engine/" \
4053 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips16_/micromips16$${m}_/" \
4054 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips32_/micromips32$${m}_/" \
4055 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m32_/m32$${m}_/" \
4056 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
1; \
4057 @SIM_ENABLE_ARCH_mips_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
4058 @SIM_ENABLE_ARCH_mips_TRUE@
;;\
4059 @SIM_ENABLE_ARCH_mips_TRUE@ micromips64
*) \
4060 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
4061 @SIM_ENABLE_ARCH_mips_TRUE@ o
=mips
/micromips
$${m}_run.c
; \
4062 @SIM_ENABLE_ARCH_mips_TRUE@ sed
< $(srcdir)/mips
/micromipsrun.c
> $$o.tmp \
4063 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/^sim_/micromips64$${m}_/" \
4064 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"/include/s/sim-engine/micromips64$${m}_engine/" \
4065 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips16_/micromips16$${m}_/" \
4066 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips32_/micromips64$${m}_/" \
4067 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m32_/m64$${m}_/" \
4068 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
1; \
4069 @SIM_ENABLE_ARCH_mips_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
4070 @SIM_ENABLE_ARCH_mips_TRUE@
;;\
4071 @SIM_ENABLE_ARCH_mips_TRUE@ esac \
4072 @SIM_ENABLE_ARCH_mips_TRUE@ done
4073 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
4074 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/modules.c
: |
$(mn10300_BUILD_OUTPUTS
)
4076 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_BUILT_SRC_FROM_IGEN
): mn10300
/stamp-igen
4077 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/stamp-igen
: $(mn10300_IGEN_INSN
) $(mn10300_IGEN_INSN_INC
) $(mn10300_IGEN_DC
) $(IGEN
)
4078 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
4079 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_IGEN_TRACE
) \
4080 @SIM_ENABLE_ARCH_mn10300_TRUE@
-G gen-direct-access \
4081 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M mn10300
,am33
-G gen-multi-sim
=am33 \
4082 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M am33_2 \
4083 @SIM_ENABLE_ARCH_mn10300_TRUE@
-I
$(srcdir)/mn10300 \
4084 @SIM_ENABLE_ARCH_mn10300_TRUE@
-i
$(mn10300_IGEN_INSN
) \
4085 @SIM_ENABLE_ARCH_mn10300_TRUE@
-o
$(mn10300_IGEN_DC
) \
4086 @SIM_ENABLE_ARCH_mn10300_TRUE@
-x \
4087 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.h
-hc mn10300
/icache.h \
4088 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.c
-c mn10300
/icache.c \
4089 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.h
-hs mn10300
/semantics.h \
4090 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.c
-s mn10300
/semantics.c \
4091 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.h
-hd mn10300
/idecode.h \
4092 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.c
-d mn10300
/idecode.c \
4093 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.h
-hm mn10300
/model.h \
4094 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.c
-m mn10300
/model.c \
4095 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.h
-hf mn10300
/support.h \
4096 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.c
-f mn10300
/support.c \
4097 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.h
-ht mn10300
/itable.h \
4098 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.c
-t mn10300
/itable.c \
4099 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.h
-he mn10300
/engine.h \
4100 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.c
-e mn10300
/engine.c \
4101 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n irun.c
-r mn10300
/irun.c
4102 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)touch
$@
4104 @SIM_ENABLE_ARCH_moxie_TRUE@moxie
/moxie-gdb.dtb
: @MAINT@ moxie
/moxie-gdb.dts moxie
/$(am__dirstamp
)
4105 @SIM_ENABLE_ARCH_moxie_TRUE@
$(AM_V_GEN
) \
4106 @SIM_ENABLE_ARCH_moxie_TRUE@ if
test "x$(DTC)" != x
; then \
4107 @SIM_ENABLE_ARCH_moxie_TRUE@
$(DTC
) -O dtb
-o
$@.tmp
${srcdir}/moxie
/moxie-gdb.dts || exit
1; \
4108 @SIM_ENABLE_ARCH_moxie_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
${srcdir}/moxie
/moxie-gdb.dtb || exit
1; \
4109 @SIM_ENABLE_ARCH_moxie_TRUE@ touch
${srcdir}/moxie
/moxie-gdb.dtb
; \
4110 @SIM_ENABLE_ARCH_moxie_TRUE@
else \
4111 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"Could not update the moxie-gdb.dtb file because the device "; \
4112 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"tree compiler tool (dtc) is missing. Install the tool to "; \
4113 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"update the device tree blob."; \
4114 @SIM_ENABLE_ARCH_moxie_TRUE@ fi
4115 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/modules.c
: |
$(or1k_BUILD_OUTPUTS
)
4117 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/mloop.c or1k
/eng.h
: or1k
/stamp-mloop
; @true
4118 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/stamp-mloop
: $(srccom
)/genmloop.sh or1k
/mloop.in
4119 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4120 @SIM_ENABLE_ARCH_or1k_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
4121 @SIM_ENABLE_ARCH_or1k_TRUE@
-cpu or1k32bf \
4122 @SIM_ENABLE_ARCH_or1k_TRUE@
-infile
$(srcdir)/or1k
/mloop.in
-outfile-prefix or1k
/
4123 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/eng.hin or1k
/eng.h
4124 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/mloop.cin or1k
/mloop.c
4125 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)touch
$@
4127 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cgen
: or1k
/cgen-arch or1k
/cgen-cpu-decode
4129 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cgen-arch
:
4130 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)mach
=or32
,or32nd FLAGS
="with-scache"; $(CGEN_GEN_ARCH
)
4131 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/arch.h or1k
/arch.c or1k
/cpuall.h
: @CGEN_MAINT@ or1k
/cgen-arch
4133 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cgen-cpu-decode
:
4134 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)cpu
=or1k32bf mach
=or32
,or32nd FLAGS
="with-scache" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4135 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cpu.h or1k
/cpu.c or1k
/model.c or1k
/sem.c or1k
/sem-switch.c or1k
/decode.c or1k
/decode.h
: @CGEN_MAINT@ or1k
/cgen-cpu-decode
4137 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/psim
$(EXEEXT
): ppc
/run
$(EXEEXT
)
4138 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)ln
$< $@
2>/dev
/null ||
$(LN_S
) $< $@
2>/dev
/null || cp
-p
$< $@
4140 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/%.o
: ppc
/%.c | ppc
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
4141 @SIM_ENABLE_ARCH_ppc_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4143 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.c
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
4144 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--source
$@.tmp
4145 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.c
4146 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.c
4148 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.h
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
4149 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--header
$@.tmp
4150 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.h
4151 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.h
4153 @SIM_ENABLE_ARCH_rl78_TRUE@rl78
/%.o
: rl78
/%.c | rl78
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
4154 @SIM_ENABLE_ARCH_rl78_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4156 @SIM_ENABLE_ARCH_rx_TRUE@rx
/%.o
: rx
/%.c | rx
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
4157 @SIM_ENABLE_ARCH_rx_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4158 @SIM_ENABLE_ARCH_sh_TRUE@sh
/modules.c
: |
$(sh_BUILD_OUTPUTS
)
4160 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4161 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode
$(EXEEXT
): $(sh_gencode_OBJECTS
) $(sh_gencode_DEPENDENCIES
) sh
/$(am__dirstamp
)
4162 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(sh_gencode_OBJECTS
) $(sh_gencode_LDADD
)
4164 # gencode is a build-time only tool. Override the default rules for it.
4165 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode.o
: sh
/gencode.c
4166 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4168 @SIM_ENABLE_ARCH_sh_TRUE@sh
/code.c
: sh
/gencode
$(EXEEXT
)
4169 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -x
>$@
4171 @SIM_ENABLE_ARCH_sh_TRUE@sh
/ppi.c
: sh
/gencode
$(EXEEXT
)
4172 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -p
>$@
4174 @SIM_ENABLE_ARCH_sh_TRUE@sh
/table.c
: sh
/gencode
$(EXEEXT
)
4175 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -s
>$@
4176 @SIM_ENABLE_ARCH_v850_TRUE@v850
/modules.c
: |
$(v850_BUILD_OUTPUTS
)
4178 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_BUILT_SRC_FROM_IGEN
): v850
/stamp-igen
4179 @SIM_ENABLE_ARCH_v850_TRUE@v850
/stamp-igen
: $(v850_IGEN_INSN
) $(v850_IGEN_DC
) $(IGEN
)
4180 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
4181 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_IGEN_TRACE
) \
4182 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-direct-access \
4183 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-zero-r0 \
4184 @SIM_ENABLE_ARCH_v850_TRUE@
-i
$(v850_IGEN_INSN
) \
4185 @SIM_ENABLE_ARCH_v850_TRUE@
-o
$(v850_IGEN_DC
) \
4186 @SIM_ENABLE_ARCH_v850_TRUE@
-x \
4187 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.h
-hc v850
/icache.h \
4188 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.c
-c v850
/icache.c \
4189 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.h
-hs v850
/semantics.h \
4190 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.c
-s v850
/semantics.c \
4191 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.h
-hd v850
/idecode.h \
4192 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.c
-d v850
/idecode.c \
4193 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.h
-hm v850
/model.h \
4194 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.c
-m v850
/model.c \
4195 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.h
-hf v850
/support.h \
4196 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.c
-f v850
/support.c \
4197 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.h
-ht v850
/itable.h \
4198 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.c
-t v850
/itable.c \
4199 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.h
-he v850
/engine.h \
4200 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.c
-e v850
/engine.c \
4201 @SIM_ENABLE_ARCH_v850_TRUE@
-n irun.c
-r v850
/irun.c
4202 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)touch
$@
4204 %/libsim.a
: |
$(SIM_ALL_RECURSIVE_DEPS
)
4205 $(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4207 %/nrun.o
: common
/nrun.c |
%/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
4208 $(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4210 all-recursive
: $(SIM_ALL_RECURSIVE_DEPS
)
4212 install-data-local
: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS
)
4213 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(libdir)
4214 lib
=`echo sim | sed '$(program_transform_name)'`; \
4215 for d in
$(SIM_ENABLED_ARCHES
); do \
4217 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
4219 $(INSTALL_DATA
) $$d/libsim.a
$(DESTDIR
)$(libdir)/$$n || exit
1; \
4222 install-exec-local
: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS
)
4223 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
4224 run
=`echo run | sed '$(program_transform_name)'`; \
4225 for d in
$(SIM_ENABLED_ARCHES
); do \
4227 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
4228 $(LIBTOOL
) --mode
=install \
4229 $(INSTALL_PROGRAM
) $$d/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
) || exit
1; \
4232 uninstall-local
: $(SIM_UNINSTALL_LOCAL_DEPS
)
4233 rm -f
$(DESTDIR
)$(bindir)/run
$(DESTDIR
)$(libdir)/libsim.a
4234 for d in
$(SIM_ENABLED_ARCHES
); do \
4235 rm -f
$(DESTDIR
)$(bindir)/run-
$$d $(DESTDIR
)$(libdir)/libsim-
$$d.a
; \
4238 # Tell versions [3.59,3.63) of GNU make to not export all variables.
4239 # Otherwise a system limit (for SysV at least) may be exceeded.