sim: m68hc11: move libsim.a creation to top-level
[binutils-gdb.git] / sim / Makefile.in
1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
2 # @configure_input@
3
4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
5
6 # This Makefile.in is free software; the Free Software Foundation
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8 # with or without modifications, as long as this notice is preserved.
9
10 # This program is distributed in the hope that it will be useful,
11 # but WITHOUT ANY WARRANTY, to the extent permitted by law; without
12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
13 # PARTICULAR PURPOSE.
14
15 @SET_MAKE@
16
17 # Copyright (C) 1993-2023 Free Software Foundation, Inc.
18 #
19 # This program is free software; you can redistribute it and/or modify
20 # it under the terms of the GNU General Public License as published by
21 # the Free Software Foundation; either version 3 of the License, or
22 # (at your option) any later version.
23 #
24 # This program is distributed in the hope that it will be useful,
25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 # GNU General Public License for more details.
28 #
29 # You should have received a copy of the GNU General Public License
30 # along with this program. If not, see <http://www.gnu.org/licenses/>.
31
32
33
34
35 VPATH = @srcdir@
36 am__is_gnu_make = { \
37 if test -z '$(MAKELEVEL)'; then \
38 false; \
39 elif test -n '$(MAKE_HOST)'; then \
40 true; \
41 elif test -n '$(MAKE_VERSION)' && test -n '$(CURDIR)'; then \
42 true; \
43 else \
44 false; \
45 fi; \
46 }
47 am__make_running_with_option = \
48 case $${target_option-} in \
49 ?) ;; \
50 *) echo "am__make_running_with_option: internal error: invalid" \
51 "target option '$${target_option-}' specified" >&2; \
52 exit 1;; \
53 esac; \
54 has_opt=no; \
55 sane_makeflags=$$MAKEFLAGS; \
56 if $(am__is_gnu_make); then \
57 sane_makeflags=$$MFLAGS; \
58 else \
59 case $$MAKEFLAGS in \
60 *\\[\ \ ]*) \
61 bs=\\; \
62 sane_makeflags=`printf '%s\n' "$$MAKEFLAGS" \
63 | sed "s/$$bs$$bs[$$bs $$bs ]*//g"`;; \
64 esac; \
65 fi; \
66 skip_next=no; \
67 strip_trailopt () \
68 { \
69 flg=`printf '%s\n' "$$flg" | sed "s/$$1.*$$//"`; \
70 }; \
71 for flg in $$sane_makeflags; do \
72 test $$skip_next = yes && { skip_next=no; continue; }; \
73 case $$flg in \
74 *=*|--*) continue;; \
75 -*I) strip_trailopt 'I'; skip_next=yes;; \
76 -*I?*) strip_trailopt 'I';; \
77 -*O) strip_trailopt 'O'; skip_next=yes;; \
78 -*O?*) strip_trailopt 'O';; \
79 -*l) strip_trailopt 'l'; skip_next=yes;; \
80 -*l?*) strip_trailopt 'l';; \
81 -[dEDm]) skip_next=yes;; \
82 -[JT]) skip_next=yes;; \
83 esac; \
84 case $$flg in \
85 *$$target_option*) has_opt=yes; break;; \
86 esac; \
87 done; \
88 test $$has_opt = yes
89 am__make_dryrun = (target_option=n; $(am__make_running_with_option))
90 am__make_keepgoing = (target_option=k; $(am__make_running_with_option))
91 pkgdatadir = $(datadir)/@PACKAGE@
92 pkgincludedir = $(includedir)/@PACKAGE@
93 pkglibdir = $(libdir)/@PACKAGE@
94 pkglibexecdir = $(libexecdir)/@PACKAGE@
95 am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
96 install_sh_DATA = $(install_sh) -c -m 644
97 install_sh_PROGRAM = $(install_sh) -c
98 install_sh_SCRIPT = $(install_sh) -c
99 INSTALL_HEADER = $(INSTALL_DATA)
100 transform = $(program_transform_name)
101 NORMAL_INSTALL = :
102 PRE_INSTALL = :
103 POST_INSTALL = :
104 NORMAL_UNINSTALL = :
105 PRE_UNINSTALL = :
106 POST_UNINSTALL = :
107 build_triplet = @build@
108 host_triplet = @host@
109 target_triplet = @target@
110 check_PROGRAMS = $(am__EXEEXT_8) $(am__EXEEXT_9)
111 noinst_PROGRAMS = $(am__EXEEXT_10) $(am__EXEEXT_11) $(am__EXEEXT_12) \
112 $(am__EXEEXT_13) $(am__EXEEXT_14) $(am__EXEEXT_15) \
113 $(am__EXEEXT_16) $(am__EXEEXT_17) $(am__EXEEXT_18) \
114 $(am__EXEEXT_19) $(am__EXEEXT_20) $(am__EXEEXT_21) \
115 $(am__EXEEXT_22) $(am__EXEEXT_23) $(am__EXEEXT_24) \
116 $(am__EXEEXT_25) $(am__EXEEXT_26) $(am__EXEEXT_27) \
117 $(am__EXEEXT_28) $(am__EXEEXT_29) $(am__EXEEXT_30) \
118 $(am__EXEEXT_31) $(am__EXEEXT_32) $(am__EXEEXT_33) \
119 $(am__EXEEXT_34) $(am__EXEEXT_35) $(am__EXEEXT_36) \
120 $(am__EXEEXT_37) $(am__EXEEXT_38) $(am__EXEEXT_39) \
121 $(am__EXEEXT_40) $(am__EXEEXT_41)
122 EXTRA_PROGRAMS = $(am__EXEEXT_2) testsuite/common/bits-gen$(EXEEXT) \
123 testsuite/common/fpu-tst$(EXEEXT) $(am__EXEEXT_3) \
124 $(am__EXEEXT_4) $(am__EXEEXT_5) $(am__EXEEXT_6) \
125 $(am__EXEEXT_7)
126 @ENABLE_SIM_TRUE@am__append_1 = \
127 @ENABLE_SIM_TRUE@ $(srcroot)/include/sim/callback.h \
128 @ENABLE_SIM_TRUE@ $(srcroot)/include/sim/sim.h
129
130 @SIM_ENABLE_HW_TRUE@am__append_2 = \
131 @SIM_ENABLE_HW_TRUE@ $(SIM_COMMON_HW_OBJS) \
132 @SIM_ENABLE_HW_TRUE@ $(SIM_HW_SOCKSER)
133
134 @SIM_ENABLE_HW_TRUE@am__append_3 = SIM_HW_DEVICES_="$(SIM_HW_DEVICES)"
135 @SIM_ENABLE_IGEN_TRUE@am__append_4 = $(IGEN)
136 @SIM_ENABLE_IGEN_TRUE@am__append_5 = igen/libigen.a
137 @SIM_ENABLE_IGEN_TRUE@am__append_6 = $(igen_IGEN_TOOLS)
138 @SIM_ENABLE_IGEN_TRUE@am__append_7 = $(igen_IGEN_TOOLS)
139 TESTS = testsuite/common/bits32m0$(EXEEXT) \
140 testsuite/common/bits32m31$(EXEEXT) \
141 testsuite/common/bits64m0$(EXEEXT) \
142 testsuite/common/bits64m63$(EXEEXT) \
143 testsuite/common/alu-tst$(EXEEXT)
144 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_8 = aarch64/libsim.a
145 @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_9 = aarch64/run
146 @SIM_ENABLE_ARCH_arm_TRUE@am__append_10 = arm/libsim.a
147 @SIM_ENABLE_ARCH_arm_TRUE@am__append_11 = arm/run
148 @SIM_ENABLE_ARCH_avr_TRUE@am__append_12 = avr/libsim.a
149 @SIM_ENABLE_ARCH_avr_TRUE@am__append_13 = avr/run
150 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_14 = bfin/libsim.a
151 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_15 = bfin/run
152 @SIM_ENABLE_ARCH_bfin_TRUE@am__append_16 = bfin_SIM_EXTRA_HW_DEVICES="$(bfin_SIM_EXTRA_HW_DEVICES)"
153 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = bpf/libsim.a
154 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_18 = bpf/run
155 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_19 = \
156 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-le.h \
157 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-be.h
158
159 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_20 = $(bpf_BUILD_OUTPUTS)
160 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_21 = $(bpf_BUILD_OUTPUTS)
161 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = cr16/libsim.a
162 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_23 = cr16/run
163 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_24 = cr16/simops.h
164 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_25 = $(cr16_BUILD_OUTPUTS)
165 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_26 = cr16/gencode
166 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_27 = $(cr16_BUILD_OUTPUTS)
167 @SIM_ENABLE_ARCH_cris_TRUE@am__append_28 = cris/libsim.a
168 @SIM_ENABLE_ARCH_cris_TRUE@am__append_29 = cris/run
169 @SIM_ENABLE_ARCH_cris_TRUE@am__append_30 = cris_SIM_EXTRA_HW_DEVICES="$(cris_SIM_EXTRA_HW_DEVICES)"
170 @SIM_ENABLE_ARCH_cris_TRUE@am__append_31 = cris/rvdummy
171 @SIM_ENABLE_ARCH_cris_TRUE@am__append_32 = \
172 @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv10.h \
173 @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv32.h
174
175 @SIM_ENABLE_ARCH_cris_TRUE@am__append_33 = $(cris_BUILD_OUTPUTS)
176 @SIM_ENABLE_ARCH_cris_TRUE@am__append_34 = $(cris_BUILD_OUTPUTS)
177 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_35 = d10v/libsim.a
178 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_36 = d10v/run
179 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_37 = d10v/simops.h
180 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_38 = $(d10v_BUILD_OUTPUTS)
181 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_39 = d10v/gencode
182 @SIM_ENABLE_ARCH_d10v_TRUE@am__append_40 = $(d10v_BUILD_OUTPUTS)
183 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_41 = erc32/libsim.a
184 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_42 = erc32/run erc32/sis
185 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_43 = sim-%D-install-exec-local
186 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_44 = sim-erc32-uninstall-local
187 @SIM_ENABLE_ARCH_examples_TRUE@am__append_45 = example-synacor/libsim.a
188 @SIM_ENABLE_ARCH_examples_TRUE@am__append_46 = example-synacor/run
189 @SIM_ENABLE_ARCH_frv_TRUE@am__append_47 = frv/libsim.a
190 @SIM_ENABLE_ARCH_frv_TRUE@am__append_48 = frv/run
191 @SIM_ENABLE_ARCH_frv_TRUE@am__append_49 = frv/eng.h
192 @SIM_ENABLE_ARCH_frv_TRUE@am__append_50 = $(frv_BUILD_OUTPUTS)
193 @SIM_ENABLE_ARCH_frv_TRUE@am__append_51 = $(frv_BUILD_OUTPUTS)
194 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_52 = ft32/libsim.a
195 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_53 = ft32/run
196 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_54 = h8300/libsim.a
197 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_55 = h8300/run
198 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_56 = iq2000/libsim.a
199 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_57 = iq2000/run
200 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_58 = iq2000/eng.h
201 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_59 = $(iq2000_BUILD_OUTPUTS)
202 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_60 = $(iq2000_BUILD_OUTPUTS)
203 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_61 = lm32/libsim.a
204 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_62 = lm32/run
205 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_63 = lm32_SIM_EXTRA_HW_DEVICES="$(lm32_SIM_EXTRA_HW_DEVICES)"
206 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_64 = lm32/eng.h
207 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_65 = $(lm32_BUILD_OUTPUTS)
208 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_66 = $(lm32_BUILD_OUTPUTS)
209 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_67 = m32c/libsim.a
210 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_68 = m32c/run
211 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_69 = $(m32c_BUILD_OUTPUTS)
212 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_70 = m32c/opc2c
213 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_71 = \
214 @SIM_ENABLE_ARCH_m32c_TRUE@ $(m32c_BUILD_OUTPUTS) \
215 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c.log \
216 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c.log
217
218 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_72 = m32r/libsim.a
219 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_73 = m32r/run
220 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_74 = m32r_SIM_EXTRA_HW_DEVICES="$(m32r_SIM_EXTRA_HW_DEVICES)"
221 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_75 = \
222 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng.h \
223 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/engx.h \
224 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng2.h
225
226 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_76 = $(m32r_BUILD_OUTPUTS)
227 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_77 = $(m32r_BUILD_OUTPUTS)
228 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_78 = m68hc11/libsim.a
229 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_79 = m68hc11/run
230 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_80 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)"
231 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_81 = $(m68hc11_BUILD_OUTPUTS)
232 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_82 = m68hc11/gencode
233 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_83 = $(m68hc11_BUILD_OUTPUTS)
234 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_84 = mcore/run
235 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_85 = microblaze/run
236 @SIM_ENABLE_ARCH_mips_TRUE@am__append_86 = mips/run
237 @SIM_ENABLE_ARCH_mips_TRUE@am__append_87 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)"
238 @SIM_ENABLE_ARCH_mips_TRUE@am__append_88 = mips/itable.h \
239 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_MULTI_SRC)
240 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_89 = \
241 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
242 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/stamp-gen-mode-single
243
244 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_90 = \
245 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
246 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
247 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
248 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
249
250 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_91 = \
251 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_SRC) \
252 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-igen \
253 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-run
254
255 @SIM_ENABLE_ARCH_mips_TRUE@am__append_92 = $(mips_BUILD_OUTPUTS)
256 @SIM_ENABLE_ARCH_mips_TRUE@am__append_93 = $(mips_BUILD_OUTPUTS)
257 @SIM_ENABLE_ARCH_mips_TRUE@am__append_94 = mips/multi-include.h mips/multi-run.c
258 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_95 = mn10300/run
259 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_96 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
260 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_97 = \
261 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \
262 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \
263 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \
264 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.h \
265 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.h \
266 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \
267 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h
268
269 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_98 = $(mn10300_BUILD_OUTPUTS)
270 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_99 = $(mn10300_BUILD_OUTPUTS)
271 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_100 = moxie/run
272 @SIM_ENABLE_ARCH_msp430_TRUE@am__append_101 = msp430/run
273 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_102 = or1k/run
274 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_103 = or1k/eng.h
275 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_104 = $(or1k_BUILD_OUTPUTS)
276 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_105 = $(or1k_BUILD_OUTPUTS)
277 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_106 = ppc/run ppc/psim
278 @SIM_ENABLE_ARCH_pru_TRUE@am__append_107 = pru/run
279 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_108 = riscv/run
280 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_109 = rl78/run
281 @SIM_ENABLE_ARCH_rx_TRUE@am__append_110 = rx/run
282 @SIM_ENABLE_ARCH_sh_TRUE@am__append_111 = sh/run
283 @SIM_ENABLE_ARCH_sh_TRUE@am__append_112 = \
284 @SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \
285 @SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c
286
287 @SIM_ENABLE_ARCH_sh_TRUE@am__append_113 = $(sh_BUILD_OUTPUTS)
288 @SIM_ENABLE_ARCH_sh_TRUE@am__append_114 = sh/gencode
289 @SIM_ENABLE_ARCH_sh_TRUE@am__append_115 = $(sh_BUILD_OUTPUTS)
290 @SIM_ENABLE_ARCH_v850_TRUE@am__append_116 = v850/run
291 @SIM_ENABLE_ARCH_v850_TRUE@am__append_117 = \
292 @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \
293 @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \
294 @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \
295 @SIM_ENABLE_ARCH_v850_TRUE@ v850/model.h \
296 @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.h \
297 @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \
298 @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h
299
300 @SIM_ENABLE_ARCH_v850_TRUE@am__append_118 = $(v850_BUILD_OUTPUTS)
301 @SIM_ENABLE_ARCH_v850_TRUE@am__append_119 = $(v850_BUILD_OUTPUTS)
302 subdir = .
303 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
304 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
305 $(top_srcdir)/../config/depstand.m4 \
306 $(top_srcdir)/../config/lead-dot.m4 \
307 $(top_srcdir)/../config/override.m4 \
308 $(top_srcdir)/../config/pkg.m4 $(top_srcdir)/../libtool.m4 \
309 $(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
310 $(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
311 $(top_srcdir)/m4/sim_ac_option_alignment.m4 \
312 $(top_srcdir)/m4/sim_ac_option_assert.m4 \
313 $(top_srcdir)/m4/sim_ac_option_cgen_maint.m4 \
314 $(top_srcdir)/m4/sim_ac_option_debug.m4 \
315 $(top_srcdir)/m4/sim_ac_option_endian.m4 \
316 $(top_srcdir)/m4/sim_ac_option_environment.m4 \
317 $(top_srcdir)/m4/sim_ac_option_hardware.m4 \
318 $(top_srcdir)/m4/sim_ac_option_inline.m4 \
319 $(top_srcdir)/m4/sim_ac_option_profile.m4 \
320 $(top_srcdir)/m4/sim_ac_option_reserved_bits.m4 \
321 $(top_srcdir)/m4/sim_ac_option_scache.m4 \
322 $(top_srcdir)/m4/sim_ac_option_smp.m4 \
323 $(top_srcdir)/m4/sim_ac_option_stdio.m4 \
324 $(top_srcdir)/m4/sim_ac_option_trace.m4 \
325 $(top_srcdir)/m4/sim_ac_option_warnings.m4 \
326 $(top_srcdir)/m4/sim_ac_platform.m4 \
327 $(top_srcdir)/m4/sim_ac_toolchain.m4 \
328 $(top_srcdir)/frv/acinclude.m4 $(top_srcdir)/mips/acinclude.m4 \
329 $(top_srcdir)/riscv/acinclude.m4 $(top_srcdir)/rx/acinclude.m4 \
330 $(top_srcdir)/configure.ac
331 am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
332 $(ACLOCAL_M4)
333 DIST_COMMON = $(srcdir)/Makefile.am $(top_srcdir)/configure \
334 $(am__configure_deps) $(am__pkginclude_HEADERS_DIST)
335 am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \
336 configure.lineno config.status.lineno
337 mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs
338 CONFIG_HEADER = config.h
339 CONFIG_CLEAN_FILES = Make-common.sim aarch64/Makefile.sim \
340 aarch64/.gdbinit arm/Makefile.sim arm/.gdbinit \
341 avr/Makefile.sim avr/.gdbinit bfin/Makefile.sim bfin/.gdbinit \
342 bpf/Makefile.sim bpf/.gdbinit cr16/Makefile.sim cr16/.gdbinit \
343 cris/Makefile.sim cris/.gdbinit d10v/Makefile.sim \
344 d10v/.gdbinit frv/Makefile.sim frv/.gdbinit ft32/Makefile.sim \
345 ft32/.gdbinit h8300/Makefile.sim h8300/.gdbinit \
346 iq2000/Makefile.sim iq2000/.gdbinit lm32/Makefile.sim \
347 lm32/.gdbinit m32c/Makefile.sim m32c/.gdbinit \
348 m32r/Makefile.sim m32r/.gdbinit m68hc11/Makefile.sim \
349 m68hc11/.gdbinit mcore/Makefile.sim mcore/.gdbinit \
350 microblaze/Makefile.sim microblaze/.gdbinit mips/Makefile.sim \
351 mips/.gdbinit mn10300/Makefile.sim mn10300/.gdbinit \
352 moxie/Makefile.sim moxie/.gdbinit msp430/Makefile.sim \
353 msp430/.gdbinit or1k/Makefile.sim or1k/.gdbinit ppc/.gdbinit \
354 pru/Makefile.sim pru/.gdbinit riscv/Makefile.sim \
355 riscv/.gdbinit rl78/Makefile.sim rl78/.gdbinit rx/Makefile.sim \
356 rx/.gdbinit sh/Makefile.sim sh/.gdbinit erc32/Makefile.sim \
357 erc32/.gdbinit v850/Makefile.sim v850/.gdbinit \
358 example-synacor/Makefile.sim example-synacor/.gdbinit \
359 arch-subdir.mk .gdbinit
360 CONFIG_CLEAN_VPATH_FILES =
361 LIBRARIES = $(noinst_LIBRARIES)
362 ARFLAGS = cru
363 AM_V_AR = $(am__v_AR_@AM_V@)
364 am__v_AR_ = $(am__v_AR_@AM_DEFAULT_V@)
365 am__v_AR_0 = @echo " AR " $@;
366 am__v_AR_1 =
367 aarch64_libsim_a_AR = $(AR) $(ARFLAGS)
368 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_DEPENDENCIES = \
369 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst \
370 @SIM_ENABLE_ARCH_aarch64_TRUE@ %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
371 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst \
372 @SIM_ENABLE_ARCH_aarch64_TRUE@ %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
373 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/cpustate.o \
374 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/interp.o \
375 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/memory.o \
376 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/modules.o \
377 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/sim-resume.o \
378 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/simulator.o
379 am_aarch64_libsim_a_OBJECTS =
380 aarch64_libsim_a_OBJECTS = $(am_aarch64_libsim_a_OBJECTS)
381 am__dirstamp = $(am__leading_dot)dirstamp
382 arm_libsim_a_AR = $(AR) $(ARFLAGS)
383 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_DEPENDENCIES = arm/wrapper.o \
384 @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst \
385 @SIM_ENABLE_ARCH_arm_TRUE@ %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
386 @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst \
387 @SIM_ENABLE_ARCH_arm_TRUE@ %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
388 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu.o arm/armemu32.o \
389 @SIM_ENABLE_ARCH_arm_TRUE@ arm/arminit.o arm/armos.o \
390 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armsupp.o arm/armvirt.o \
391 @SIM_ENABLE_ARCH_arm_TRUE@ arm/thumbemu.o arm/armcopro.o \
392 @SIM_ENABLE_ARCH_arm_TRUE@ arm/maverick.o arm/iwmmxt.o \
393 @SIM_ENABLE_ARCH_arm_TRUE@ arm/modules.o
394 am_arm_libsim_a_OBJECTS =
395 arm_libsim_a_OBJECTS = $(am_arm_libsim_a_OBJECTS)
396 avr_libsim_a_AR = $(AR) $(ARFLAGS)
397 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_DEPENDENCIES = avr/interp.o \
398 @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst \
399 @SIM_ENABLE_ARCH_avr_TRUE@ %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
400 @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst \
401 @SIM_ENABLE_ARCH_avr_TRUE@ %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
402 @SIM_ENABLE_ARCH_avr_TRUE@ avr/modules.o avr/sim-resume.o
403 am_avr_libsim_a_OBJECTS =
404 avr_libsim_a_OBJECTS = $(am_avr_libsim_a_OBJECTS)
405 bfin_libsim_a_AR = $(AR) $(ARFLAGS)
406 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_DEPENDENCIES = $(patsubst \
407 @SIM_ENABLE_ARCH_bfin_TRUE@ %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
408 @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst \
409 @SIM_ENABLE_ARCH_bfin_TRUE@ %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
410 @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst \
411 @SIM_ENABLE_ARCH_bfin_TRUE@ %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
412 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/bfin-sim.o bfin/devices.o \
413 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/gui.o bfin/interp.o \
414 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/machs.o bfin/modules.o \
415 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/sim-resume.o
416 am_bfin_libsim_a_OBJECTS =
417 bfin_libsim_a_OBJECTS = $(am_bfin_libsim_a_OBJECTS)
418 bpf_libsim_a_AR = $(AR) $(ARFLAGS)
419 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_DEPENDENCIES = $(patsubst \
420 @SIM_ENABLE_ARCH_bpf_TRUE@ %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
421 @SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst \
422 @SIM_ENABLE_ARCH_bpf_TRUE@ %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
423 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/modules.o bpf/cgen-run.o \
424 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-scache.o bpf/cgen-trace.o \
425 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-utils.o bpf/arch.o \
426 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cpu.o bpf/decode-le.o \
427 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-be.o bpf/sem-le.o \
428 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-be.o bpf/mloop-le.o \
429 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.o bpf/bpf.o \
430 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf-helpers.o bpf/sim-if.o \
431 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/traps.o
432 am_bpf_libsim_a_OBJECTS =
433 bpf_libsim_a_OBJECTS = $(am_bpf_libsim_a_OBJECTS)
434 common_libcommon_a_AR = $(AR) $(ARFLAGS)
435 common_libcommon_a_LIBADD =
436 am_common_libcommon_a_OBJECTS = common/callback.$(OBJEXT) \
437 common/portability.$(OBJEXT) common/sim-load.$(OBJEXT) \
438 common/syscall.$(OBJEXT) common/target-newlib-errno.$(OBJEXT) \
439 common/target-newlib-open.$(OBJEXT) \
440 common/target-newlib-signal.$(OBJEXT) \
441 common/target-newlib-syscall.$(OBJEXT) \
442 common/version.$(OBJEXT)
443 common_libcommon_a_OBJECTS = $(am_common_libcommon_a_OBJECTS)
444 cr16_libsim_a_AR = $(AR) $(ARFLAGS)
445 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_DEPENDENCIES = \
446 @SIM_ENABLE_ARCH_cr16_TRUE@ $(common_libcommon_a_OBJECTS) \
447 @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst \
448 @SIM_ENABLE_ARCH_cr16_TRUE@ %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
449 @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst \
450 @SIM_ENABLE_ARCH_cr16_TRUE@ %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
451 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/interp.o cr16/modules.o \
452 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/sim-resume.o cr16/simops.o \
453 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.o
454 am_cr16_libsim_a_OBJECTS =
455 cr16_libsim_a_OBJECTS = $(am_cr16_libsim_a_OBJECTS)
456 cris_libsim_a_AR = $(AR) $(ARFLAGS)
457 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_DEPENDENCIES = \
458 @SIM_ENABLE_ARCH_cris_TRUE@ $(common_libcommon_a_OBJECTS) \
459 @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst \
460 @SIM_ENABLE_ARCH_cris_TRUE@ %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
461 @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst \
462 @SIM_ENABLE_ARCH_cris_TRUE@ %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
463 @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst \
464 @SIM_ENABLE_ARCH_cris_TRUE@ %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
465 @SIM_ENABLE_ARCH_cris_TRUE@ cris/modules.o cris/cgen-run.o \
466 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-scache.o \
467 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-trace.o cris/cgen-utils.o \
468 @SIM_ENABLE_ARCH_cris_TRUE@ cris/arch.o cris/crisv10f.o \
469 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cpuv10.o cris/decodev10.o \
470 @SIM_ENABLE_ARCH_cris_TRUE@ cris/modelv10.o cris/mloopv10f.o \
471 @SIM_ENABLE_ARCH_cris_TRUE@ cris/crisv32f.o cris/cpuv32.o \
472 @SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev32.o cris/modelv32.o \
473 @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.o cris/sim-if.o \
474 @SIM_ENABLE_ARCH_cris_TRUE@ cris/traps.o
475 am_cris_libsim_a_OBJECTS =
476 cris_libsim_a_OBJECTS = $(am_cris_libsim_a_OBJECTS)
477 d10v_libsim_a_AR = $(AR) $(ARFLAGS)
478 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_DEPENDENCIES = \
479 @SIM_ENABLE_ARCH_d10v_TRUE@ $(common_libcommon_a_OBJECTS) \
480 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/interp.o $(patsubst \
481 @SIM_ENABLE_ARCH_d10v_TRUE@ %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
482 @SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst \
483 @SIM_ENABLE_ARCH_d10v_TRUE@ %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
484 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/endian.o d10v/modules.o \
485 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/sim-resume.o d10v/simops.o \
486 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.o
487 am_d10v_libsim_a_OBJECTS =
488 d10v_libsim_a_OBJECTS = $(am_d10v_libsim_a_OBJECTS)
489 erc32_libsim_a_AR = $(AR) $(ARFLAGS)
490 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_DEPENDENCIES = \
491 @SIM_ENABLE_ARCH_erc32_TRUE@ $(common_libcommon_a_OBJECTS) \
492 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/erc32.o erc32/exec.o \
493 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/float.o erc32/func.o \
494 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/help.o erc32/interf.o \
495 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/modules.o
496 am_erc32_libsim_a_OBJECTS =
497 erc32_libsim_a_OBJECTS = $(am_erc32_libsim_a_OBJECTS)
498 example_synacor_libsim_a_AR = $(AR) $(ARFLAGS)
499 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_DEPENDENCIES = \
500 @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_OBJECTS) \
501 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
502 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
503 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
504 @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
505 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
506 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.o \
507 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
508 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
509 am_example_synacor_libsim_a_OBJECTS =
510 example_synacor_libsim_a_OBJECTS = \
511 $(am_example_synacor_libsim_a_OBJECTS)
512 frv_libsim_a_AR = $(AR) $(ARFLAGS)
513 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_DEPENDENCIES = \
514 @SIM_ENABLE_ARCH_frv_TRUE@ $(common_libcommon_a_OBJECTS) \
515 @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst \
516 @SIM_ENABLE_ARCH_frv_TRUE@ %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
517 @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst \
518 @SIM_ENABLE_ARCH_frv_TRUE@ %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
519 @SIM_ENABLE_ARCH_frv_TRUE@ frv/modules.o frv/cgen-accfp.o \
520 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-fpu.o frv/cgen-run.o \
521 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-scache.o frv/cgen-trace.o \
522 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-utils.o frv/arch.o \
523 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-par.o frv/cpu.o \
524 @SIM_ENABLE_ARCH_frv_TRUE@ frv/decode.o frv/frv.o frv/mloop.o \
525 @SIM_ENABLE_ARCH_frv_TRUE@ frv/model.o frv/sem.o frv/cache.o \
526 @SIM_ENABLE_ARCH_frv_TRUE@ frv/interrupts.o frv/memory.o \
527 @SIM_ENABLE_ARCH_frv_TRUE@ frv/options.o frv/pipeline.o \
528 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile.o frv/profile-fr400.o \
529 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr450.o \
530 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr500.o \
531 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr550.o frv/registers.o \
532 @SIM_ENABLE_ARCH_frv_TRUE@ frv/reset.o frv/sim-if.o frv/traps.o
533 am_frv_libsim_a_OBJECTS =
534 frv_libsim_a_OBJECTS = $(am_frv_libsim_a_OBJECTS)
535 ft32_libsim_a_AR = $(AR) $(ARFLAGS)
536 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_DEPENDENCIES = \
537 @SIM_ENABLE_ARCH_ft32_TRUE@ $(common_libcommon_a_OBJECTS) \
538 @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst \
539 @SIM_ENABLE_ARCH_ft32_TRUE@ %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
540 @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst \
541 @SIM_ENABLE_ARCH_ft32_TRUE@ %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
542 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/interp.o ft32/modules.o \
543 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/sim-resume.o
544 am_ft32_libsim_a_OBJECTS =
545 ft32_libsim_a_OBJECTS = $(am_ft32_libsim_a_OBJECTS)
546 h8300_libsim_a_AR = $(AR) $(ARFLAGS)
547 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_DEPENDENCIES = \
548 @SIM_ENABLE_ARCH_h8300_TRUE@ $(common_libcommon_a_OBJECTS) \
549 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/compile.o $(patsubst \
550 @SIM_ENABLE_ARCH_h8300_TRUE@ %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
551 @SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst \
552 @SIM_ENABLE_ARCH_h8300_TRUE@ %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
553 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/modules.o h8300/sim-resume.o
554 am_h8300_libsim_a_OBJECTS =
555 h8300_libsim_a_OBJECTS = $(am_h8300_libsim_a_OBJECTS)
556 igen_libigen_a_AR = $(AR) $(ARFLAGS)
557 igen_libigen_a_LIBADD =
558 @SIM_ENABLE_IGEN_TRUE@am_igen_libigen_a_OBJECTS = \
559 @SIM_ENABLE_IGEN_TRUE@ igen/table.$(OBJEXT) igen/lf.$(OBJEXT) \
560 @SIM_ENABLE_IGEN_TRUE@ igen/misc.$(OBJEXT) \
561 @SIM_ENABLE_IGEN_TRUE@ igen/filter_host.$(OBJEXT) \
562 @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode.$(OBJEXT) \
563 @SIM_ENABLE_IGEN_TRUE@ igen/ld-cache.$(OBJEXT) \
564 @SIM_ENABLE_IGEN_TRUE@ igen/filter.$(OBJEXT) \
565 @SIM_ENABLE_IGEN_TRUE@ igen/ld-insn.$(OBJEXT) \
566 @SIM_ENABLE_IGEN_TRUE@ igen/gen-model.$(OBJEXT) \
567 @SIM_ENABLE_IGEN_TRUE@ igen/gen-itable.$(OBJEXT) \
568 @SIM_ENABLE_IGEN_TRUE@ igen/gen-icache.$(OBJEXT) \
569 @SIM_ENABLE_IGEN_TRUE@ igen/gen-semantics.$(OBJEXT) \
570 @SIM_ENABLE_IGEN_TRUE@ igen/gen-idecode.$(OBJEXT) \
571 @SIM_ENABLE_IGEN_TRUE@ igen/gen-support.$(OBJEXT) \
572 @SIM_ENABLE_IGEN_TRUE@ igen/gen-engine.$(OBJEXT) \
573 @SIM_ENABLE_IGEN_TRUE@ igen/gen.$(OBJEXT)
574 igen_libigen_a_OBJECTS = $(am_igen_libigen_a_OBJECTS)
575 iq2000_libsim_a_AR = $(AR) $(ARFLAGS)
576 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_DEPENDENCIES = \
577 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(common_libcommon_a_OBJECTS) \
578 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst \
579 @SIM_ENABLE_ARCH_iq2000_TRUE@ %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
580 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst \
581 @SIM_ENABLE_ARCH_iq2000_TRUE@ %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
582 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/modules.o \
583 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-run.o \
584 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-scache.o \
585 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-trace.o \
586 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-utils.o iq2000/arch.o \
587 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cpu.o iq2000/decode.o \
588 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/iq2000.o iq2000/sem.o \
589 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.o iq2000/model.o \
590 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sim-if.o
591 am_iq2000_libsim_a_OBJECTS =
592 iq2000_libsim_a_OBJECTS = $(am_iq2000_libsim_a_OBJECTS)
593 lm32_libsim_a_AR = $(AR) $(ARFLAGS)
594 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_DEPENDENCIES = \
595 @SIM_ENABLE_ARCH_lm32_TRUE@ $(common_libcommon_a_OBJECTS) \
596 @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst \
597 @SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
598 @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst \
599 @SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
600 @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst \
601 @SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
602 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/modules.o lm32/cgen-run.o \
603 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-scache.o \
604 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-trace.o lm32/cgen-utils.o \
605 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/arch.o lm32/cpu.o \
606 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/decode.o lm32/sem.o \
607 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.o lm32/model.o \
608 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/lm32.o lm32/sim-if.o \
609 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/traps.o lm32/user.o
610 am_lm32_libsim_a_OBJECTS =
611 lm32_libsim_a_OBJECTS = $(am_lm32_libsim_a_OBJECTS)
612 m32c_libsim_a_AR = $(AR) $(ARFLAGS)
613 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_DEPENDENCIES = \
614 @SIM_ENABLE_ARCH_m32c_TRUE@ $(common_libcommon_a_OBJECTS) \
615 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/gdb-if.o m32c/int.o \
616 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/load.o m32c/m32c.o m32c/mem.o \
617 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/misc.o m32c/modules.o \
618 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.o m32c/reg.o \
619 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/srcdest.o m32c/syscalls.o \
620 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/trace.o
621 am_m32c_libsim_a_OBJECTS =
622 m32c_libsim_a_OBJECTS = $(am_m32c_libsim_a_OBJECTS)
623 m32r_libsim_a_AR = $(AR) $(ARFLAGS)
624 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_DEPENDENCIES = \
625 @SIM_ENABLE_ARCH_m32r_TRUE@ $(common_libcommon_a_OBJECTS) \
626 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst \
627 @SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
628 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst \
629 @SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
630 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst \
631 @SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
632 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modules.o m32r/cgen-run.o \
633 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-scache.o \
634 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-trace.o m32r/cgen-utils.o \
635 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/arch.o m32r/m32r.o m32r/cpu.o \
636 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decode.o m32r/sem.o \
637 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model.o m32r/mloop.o \
638 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32rx.o m32r/cpux.o \
639 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decodex.o m32r/modelx.o \
640 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.o m32r/m32r2.o \
641 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu2.o m32r/decode2.o \
642 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model2.o m32r/mloop2.o \
643 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sim-if.o m32r/traps.o
644 am_m32r_libsim_a_OBJECTS =
645 m32r_libsim_a_OBJECTS = $(am_m32r_libsim_a_OBJECTS)
646 m68hc11_libsim_a_AR = $(AR) $(ARFLAGS)
647 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_DEPENDENCIES = \
648 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(common_libcommon_a_OBJECTS) \
649 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interp.o \
650 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.o \
651 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.o \
652 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/emulos.o \
653 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interrupts.o \
654 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11_sim.o $(patsubst \
655 @SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
656 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst \
657 @SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
658 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst \
659 @SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
660 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/modules.o \
661 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/sim-resume.o
662 am_m68hc11_libsim_a_OBJECTS =
663 m68hc11_libsim_a_OBJECTS = $(am_m68hc11_libsim_a_OBJECTS)
664 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) \
665 @SIM_ENABLE_IGEN_TRUE@ igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \
666 @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode$(EXEEXT) \
667 @SIM_ENABLE_IGEN_TRUE@ igen/ld-insn$(EXEEXT) \
668 @SIM_ENABLE_IGEN_TRUE@ igen/table$(EXEEXT)
669 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_2 = $(am__EXEEXT_1)
670 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_3 = cr16/gencode$(EXEEXT)
671 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_4 = d10v/gencode$(EXEEXT)
672 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_5 = m32c/opc2c$(EXEEXT)
673 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_6 = m68hc11/gencode$(EXEEXT)
674 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_7 = sh/gencode$(EXEEXT)
675 am__EXEEXT_8 = testsuite/common/bits32m0$(EXEEXT) \
676 testsuite/common/bits32m31$(EXEEXT) \
677 testsuite/common/bits64m0$(EXEEXT) \
678 testsuite/common/bits64m63$(EXEEXT) \
679 testsuite/common/alu-tst$(EXEEXT)
680 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_9 = cris/rvdummy$(EXEEXT)
681 @SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_10 = aarch64/run$(EXEEXT)
682 @SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_11 = arm/run$(EXEEXT)
683 @SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_12 = avr/run$(EXEEXT)
684 @SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_13 = bfin/run$(EXEEXT)
685 @SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_14 = bpf/run$(EXEEXT)
686 @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_15 = cr16/run$(EXEEXT)
687 @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_16 = cris/run$(EXEEXT)
688 @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_17 = d10v/run$(EXEEXT)
689 @SIM_ENABLE_ARCH_erc32_TRUE@am__EXEEXT_18 = erc32/run$(EXEEXT) \
690 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/sis$(EXEEXT)
691 @SIM_ENABLE_ARCH_examples_TRUE@am__EXEEXT_19 = \
692 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/run$(EXEEXT)
693 @SIM_ENABLE_ARCH_frv_TRUE@am__EXEEXT_20 = frv/run$(EXEEXT)
694 @SIM_ENABLE_ARCH_ft32_TRUE@am__EXEEXT_21 = ft32/run$(EXEEXT)
695 @SIM_ENABLE_ARCH_h8300_TRUE@am__EXEEXT_22 = h8300/run$(EXEEXT)
696 @SIM_ENABLE_ARCH_iq2000_TRUE@am__EXEEXT_23 = iq2000/run$(EXEEXT)
697 @SIM_ENABLE_ARCH_lm32_TRUE@am__EXEEXT_24 = lm32/run$(EXEEXT)
698 @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_25 = m32c/run$(EXEEXT)
699 @SIM_ENABLE_ARCH_m32r_TRUE@am__EXEEXT_26 = m32r/run$(EXEEXT)
700 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_27 = m68hc11/run$(EXEEXT)
701 @SIM_ENABLE_ARCH_mcore_TRUE@am__EXEEXT_28 = mcore/run$(EXEEXT)
702 @SIM_ENABLE_ARCH_microblaze_TRUE@am__EXEEXT_29 = \
703 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/run$(EXEEXT)
704 @SIM_ENABLE_ARCH_mips_TRUE@am__EXEEXT_30 = mips/run$(EXEEXT)
705 @SIM_ENABLE_ARCH_mn10300_TRUE@am__EXEEXT_31 = mn10300/run$(EXEEXT)
706 @SIM_ENABLE_ARCH_moxie_TRUE@am__EXEEXT_32 = moxie/run$(EXEEXT)
707 @SIM_ENABLE_ARCH_msp430_TRUE@am__EXEEXT_33 = msp430/run$(EXEEXT)
708 @SIM_ENABLE_ARCH_or1k_TRUE@am__EXEEXT_34 = or1k/run$(EXEEXT)
709 @SIM_ENABLE_ARCH_ppc_TRUE@am__EXEEXT_35 = ppc/run$(EXEEXT) \
710 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc/psim$(EXEEXT)
711 @SIM_ENABLE_ARCH_pru_TRUE@am__EXEEXT_36 = pru/run$(EXEEXT)
712 @SIM_ENABLE_ARCH_riscv_TRUE@am__EXEEXT_37 = riscv/run$(EXEEXT)
713 @SIM_ENABLE_ARCH_rl78_TRUE@am__EXEEXT_38 = rl78/run$(EXEEXT)
714 @SIM_ENABLE_ARCH_rx_TRUE@am__EXEEXT_39 = rx/run$(EXEEXT)
715 @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_40 = sh/run$(EXEEXT)
716 @SIM_ENABLE_ARCH_v850_TRUE@am__EXEEXT_41 = v850/run$(EXEEXT)
717 PROGRAMS = $(noinst_PROGRAMS)
718 am_aarch64_run_OBJECTS =
719 aarch64_run_OBJECTS = $(am_aarch64_run_OBJECTS)
720 am__DEPENDENCIES_1 = $(BFD_LIB) $(OPCODES_LIB) $(LIBIBERTY_LIB)
721 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_DEPENDENCIES = \
722 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/nrun.o aarch64/libsim.a \
723 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(am__DEPENDENCIES_1)
724 AM_V_lt = $(am__v_lt_@AM_V@)
725 am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@)
726 am__v_lt_0 = --silent
727 am__v_lt_1 =
728 am_arm_run_OBJECTS =
729 arm_run_OBJECTS = $(am_arm_run_OBJECTS)
730 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_DEPENDENCIES = arm/nrun.o \
731 @SIM_ENABLE_ARCH_arm_TRUE@ arm/libsim.a $(am__DEPENDENCIES_1)
732 am_avr_run_OBJECTS =
733 avr_run_OBJECTS = $(am_avr_run_OBJECTS)
734 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_DEPENDENCIES = avr/nrun.o \
735 @SIM_ENABLE_ARCH_avr_TRUE@ avr/libsim.a $(am__DEPENDENCIES_1)
736 am_bfin_run_OBJECTS =
737 bfin_run_OBJECTS = $(am_bfin_run_OBJECTS)
738 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_DEPENDENCIES = bfin/nrun.o \
739 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/libsim.a $(am__DEPENDENCIES_1)
740 am_bpf_run_OBJECTS =
741 bpf_run_OBJECTS = $(am_bpf_run_OBJECTS)
742 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_DEPENDENCIES = bpf/nrun.o \
743 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/libsim.a $(am__DEPENDENCIES_1)
744 @SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_gencode_OBJECTS = \
745 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/gencode.$(OBJEXT)
746 cr16_gencode_OBJECTS = $(am_cr16_gencode_OBJECTS)
747 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_DEPENDENCIES = \
748 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/cr16-opc.o
749 am_cr16_run_OBJECTS =
750 cr16_run_OBJECTS = $(am_cr16_run_OBJECTS)
751 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_DEPENDENCIES = cr16/nrun.o \
752 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/libsim.a $(am__DEPENDENCIES_1)
753 am_cris_run_OBJECTS =
754 cris_run_OBJECTS = $(am_cris_run_OBJECTS)
755 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_DEPENDENCIES = cris/nrun.o \
756 @SIM_ENABLE_ARCH_cris_TRUE@ cris/libsim.a $(am__DEPENDENCIES_1)
757 @SIM_ENABLE_ARCH_cris_TRUE@am_cris_rvdummy_OBJECTS = \
758 @SIM_ENABLE_ARCH_cris_TRUE@ cris/rvdummy.$(OBJEXT)
759 cris_rvdummy_OBJECTS = $(am_cris_rvdummy_OBJECTS)
760 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_DEPENDENCIES = \
761 @SIM_ENABLE_ARCH_cris_TRUE@ $(LIBIBERTY_LIB)
762 @SIM_ENABLE_ARCH_d10v_TRUE@am_d10v_gencode_OBJECTS = \
763 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/gencode.$(OBJEXT)
764 d10v_gencode_OBJECTS = $(am_d10v_gencode_OBJECTS)
765 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_DEPENDENCIES = \
766 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/d10v-opc.o
767 am_d10v_run_OBJECTS =
768 d10v_run_OBJECTS = $(am_d10v_run_OBJECTS)
769 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_DEPENDENCIES = d10v/nrun.o \
770 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/libsim.a $(am__DEPENDENCIES_1)
771 am_erc32_run_OBJECTS =
772 erc32_run_OBJECTS = $(am_erc32_run_OBJECTS)
773 am__DEPENDENCIES_2 =
774 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_DEPENDENCIES = erc32/sis.o \
775 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/libsim.a \
776 @SIM_ENABLE_ARCH_erc32_TRUE@ $(am__DEPENDENCIES_1) \
777 @SIM_ENABLE_ARCH_erc32_TRUE@ $(am__DEPENDENCIES_2) \
778 @SIM_ENABLE_ARCH_erc32_TRUE@ $(am__DEPENDENCIES_2)
779 erc32_sis_SOURCES = erc32/sis.c
780 erc32_sis_OBJECTS = erc32/sis.$(OBJEXT)
781 erc32_sis_LDADD = $(LDADD)
782 am_example_synacor_run_OBJECTS =
783 example_synacor_run_OBJECTS = $(am_example_synacor_run_OBJECTS)
784 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_DEPENDENCIES = \
785 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
786 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
787 @SIM_ENABLE_ARCH_examples_TRUE@ $(am__DEPENDENCIES_1)
788 am_frv_run_OBJECTS =
789 frv_run_OBJECTS = $(am_frv_run_OBJECTS)
790 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_DEPENDENCIES = frv/nrun.o \
791 @SIM_ENABLE_ARCH_frv_TRUE@ frv/libsim.a $(am__DEPENDENCIES_1)
792 am_ft32_run_OBJECTS =
793 ft32_run_OBJECTS = $(am_ft32_run_OBJECTS)
794 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_DEPENDENCIES = ft32/nrun.o \
795 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/libsim.a $(am__DEPENDENCIES_1)
796 am_h8300_run_OBJECTS =
797 h8300_run_OBJECTS = $(am_h8300_run_OBJECTS)
798 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_DEPENDENCIES = h8300/nrun.o \
799 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/libsim.a \
800 @SIM_ENABLE_ARCH_h8300_TRUE@ $(am__DEPENDENCIES_1)
801 am_igen_filter_OBJECTS =
802 igen_filter_OBJECTS = $(am_igen_filter_OBJECTS)
803 @SIM_ENABLE_IGEN_TRUE@igen_filter_DEPENDENCIES = igen/filter-main.o \
804 @SIM_ENABLE_IGEN_TRUE@ igen/libigen.a
805 am_igen_gen_OBJECTS =
806 igen_gen_OBJECTS = $(am_igen_gen_OBJECTS)
807 @SIM_ENABLE_IGEN_TRUE@igen_gen_DEPENDENCIES = igen/gen-main.o \
808 @SIM_ENABLE_IGEN_TRUE@ igen/libigen.a
809 @SIM_ENABLE_IGEN_TRUE@am_igen_igen_OBJECTS = igen/igen.$(OBJEXT)
810 igen_igen_OBJECTS = $(am_igen_igen_OBJECTS)
811 @SIM_ENABLE_IGEN_TRUE@igen_igen_DEPENDENCIES = igen/libigen.a
812 am_igen_ld_cache_OBJECTS =
813 igen_ld_cache_OBJECTS = $(am_igen_ld_cache_OBJECTS)
814 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_DEPENDENCIES = \
815 @SIM_ENABLE_IGEN_TRUE@ igen/ld-cache-main.o igen/libigen.a
816 am_igen_ld_decode_OBJECTS =
817 igen_ld_decode_OBJECTS = $(am_igen_ld_decode_OBJECTS)
818 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_DEPENDENCIES = \
819 @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode-main.o igen/libigen.a
820 am_igen_ld_insn_OBJECTS =
821 igen_ld_insn_OBJECTS = $(am_igen_ld_insn_OBJECTS)
822 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_DEPENDENCIES = igen/ld-insn-main.o \
823 @SIM_ENABLE_IGEN_TRUE@ igen/libigen.a
824 am_igen_table_OBJECTS =
825 igen_table_OBJECTS = $(am_igen_table_OBJECTS)
826 @SIM_ENABLE_IGEN_TRUE@igen_table_DEPENDENCIES = igen/table-main.o \
827 @SIM_ENABLE_IGEN_TRUE@ igen/libigen.a
828 am_iq2000_run_OBJECTS =
829 iq2000_run_OBJECTS = $(am_iq2000_run_OBJECTS)
830 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_DEPENDENCIES = iq2000/nrun.o \
831 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/libsim.a \
832 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(am__DEPENDENCIES_1)
833 am_lm32_run_OBJECTS =
834 lm32_run_OBJECTS = $(am_lm32_run_OBJECTS)
835 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_DEPENDENCIES = lm32/nrun.o \
836 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/libsim.a $(am__DEPENDENCIES_1)
837 @SIM_ENABLE_ARCH_m32c_TRUE@am_m32c_opc2c_OBJECTS = \
838 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/opc2c.$(OBJEXT)
839 m32c_opc2c_OBJECTS = $(am_m32c_opc2c_OBJECTS)
840 m32c_opc2c_LDADD = $(LDADD)
841 am_m32c_run_OBJECTS =
842 m32c_run_OBJECTS = $(am_m32c_run_OBJECTS)
843 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_DEPENDENCIES = m32c/main.o \
844 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/libsim.a $(am__DEPENDENCIES_1)
845 am_m32r_run_OBJECTS =
846 m32r_run_OBJECTS = $(am_m32r_run_OBJECTS)
847 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_DEPENDENCIES = m32r/nrun.o \
848 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/libsim.a $(am__DEPENDENCIES_1)
849 @SIM_ENABLE_ARCH_m68hc11_TRUE@am_m68hc11_gencode_OBJECTS = \
850 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/gencode.$(OBJEXT)
851 m68hc11_gencode_OBJECTS = $(am_m68hc11_gencode_OBJECTS)
852 m68hc11_gencode_LDADD = $(LDADD)
853 am_m68hc11_run_OBJECTS =
854 m68hc11_run_OBJECTS = $(am_m68hc11_run_OBJECTS)
855 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_DEPENDENCIES = \
856 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/nrun.o m68hc11/libsim.a \
857 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(am__DEPENDENCIES_1)
858 am_mcore_run_OBJECTS =
859 mcore_run_OBJECTS = $(am_mcore_run_OBJECTS)
860 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_DEPENDENCIES = mcore/nrun.o \
861 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/libsim.a \
862 @SIM_ENABLE_ARCH_mcore_TRUE@ $(am__DEPENDENCIES_1)
863 am_microblaze_run_OBJECTS =
864 microblaze_run_OBJECTS = $(am_microblaze_run_OBJECTS)
865 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_DEPENDENCIES = \
866 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/nrun.o \
867 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/libsim.a \
868 @SIM_ENABLE_ARCH_microblaze_TRUE@ $(am__DEPENDENCIES_1)
869 am_mips_run_OBJECTS =
870 mips_run_OBJECTS = $(am_mips_run_OBJECTS)
871 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_DEPENDENCIES = mips/nrun.o \
872 @SIM_ENABLE_ARCH_mips_TRUE@ mips/libsim.a $(am__DEPENDENCIES_1)
873 am_mn10300_run_OBJECTS =
874 mn10300_run_OBJECTS = $(am_mn10300_run_OBJECTS)
875 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_DEPENDENCIES = \
876 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/nrun.o mn10300/libsim.a \
877 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(am__DEPENDENCIES_1)
878 am_moxie_run_OBJECTS =
879 moxie_run_OBJECTS = $(am_moxie_run_OBJECTS)
880 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_DEPENDENCIES = moxie/nrun.o \
881 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/libsim.a \
882 @SIM_ENABLE_ARCH_moxie_TRUE@ $(am__DEPENDENCIES_1)
883 am_msp430_run_OBJECTS =
884 msp430_run_OBJECTS = $(am_msp430_run_OBJECTS)
885 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_DEPENDENCIES = msp430/nrun.o \
886 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/libsim.a \
887 @SIM_ENABLE_ARCH_msp430_TRUE@ $(am__DEPENDENCIES_1)
888 am_or1k_run_OBJECTS =
889 or1k_run_OBJECTS = $(am_or1k_run_OBJECTS)
890 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_DEPENDENCIES = or1k/nrun.o \
891 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/libsim.a $(am__DEPENDENCIES_1)
892 ppc_psim_SOURCES = ppc/psim.c
893 ppc_psim_OBJECTS = ppc/psim.$(OBJEXT)
894 ppc_psim_LDADD = $(LDADD)
895 am_ppc_run_OBJECTS =
896 ppc_run_OBJECTS = $(am_ppc_run_OBJECTS)
897 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_DEPENDENCIES = ppc/main.o \
898 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc/libsim.a $(am__DEPENDENCIES_1)
899 am_pru_run_OBJECTS =
900 pru_run_OBJECTS = $(am_pru_run_OBJECTS)
901 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_DEPENDENCIES = pru/nrun.o \
902 @SIM_ENABLE_ARCH_pru_TRUE@ pru/libsim.a $(am__DEPENDENCIES_1)
903 am_riscv_run_OBJECTS =
904 riscv_run_OBJECTS = $(am_riscv_run_OBJECTS)
905 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_DEPENDENCIES = riscv/nrun.o \
906 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/libsim.a \
907 @SIM_ENABLE_ARCH_riscv_TRUE@ $(am__DEPENDENCIES_1)
908 am_rl78_run_OBJECTS =
909 rl78_run_OBJECTS = $(am_rl78_run_OBJECTS)
910 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_DEPENDENCIES = rl78/main.o \
911 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/libsim.a $(am__DEPENDENCIES_1)
912 am_rx_run_OBJECTS =
913 rx_run_OBJECTS = $(am_rx_run_OBJECTS)
914 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_DEPENDENCIES = rx/main.o rx/libsim.a \
915 @SIM_ENABLE_ARCH_rx_TRUE@ $(am__DEPENDENCIES_1)
916 @SIM_ENABLE_ARCH_sh_TRUE@am_sh_gencode_OBJECTS = sh/gencode.$(OBJEXT)
917 sh_gencode_OBJECTS = $(am_sh_gencode_OBJECTS)
918 sh_gencode_LDADD = $(LDADD)
919 am_sh_run_OBJECTS =
920 sh_run_OBJECTS = $(am_sh_run_OBJECTS)
921 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_DEPENDENCIES = sh/nrun.o sh/libsim.a \
922 @SIM_ENABLE_ARCH_sh_TRUE@ $(am__DEPENDENCIES_1)
923 testsuite_common_alu_tst_SOURCES = testsuite/common/alu-tst.c
924 testsuite_common_alu_tst_OBJECTS = testsuite/common/alu-tst.$(OBJEXT)
925 testsuite_common_alu_tst_LDADD = $(LDADD)
926 testsuite_common_bits_gen_SOURCES = testsuite/common/bits-gen.c
927 testsuite_common_bits_gen_OBJECTS = \
928 testsuite/common/bits-gen.$(OBJEXT)
929 testsuite_common_bits_gen_LDADD = $(LDADD)
930 testsuite_common_bits32m0_SOURCES = testsuite/common/bits32m0.c
931 testsuite_common_bits32m0_OBJECTS = \
932 testsuite/common/bits32m0.$(OBJEXT)
933 testsuite_common_bits32m0_LDADD = $(LDADD)
934 testsuite_common_bits32m31_SOURCES = testsuite/common/bits32m31.c
935 testsuite_common_bits32m31_OBJECTS = \
936 testsuite/common/bits32m31.$(OBJEXT)
937 testsuite_common_bits32m31_LDADD = $(LDADD)
938 testsuite_common_bits64m0_SOURCES = testsuite/common/bits64m0.c
939 testsuite_common_bits64m0_OBJECTS = \
940 testsuite/common/bits64m0.$(OBJEXT)
941 testsuite_common_bits64m0_LDADD = $(LDADD)
942 testsuite_common_bits64m63_SOURCES = testsuite/common/bits64m63.c
943 testsuite_common_bits64m63_OBJECTS = \
944 testsuite/common/bits64m63.$(OBJEXT)
945 testsuite_common_bits64m63_LDADD = $(LDADD)
946 testsuite_common_fpu_tst_SOURCES = testsuite/common/fpu-tst.c
947 testsuite_common_fpu_tst_OBJECTS = testsuite/common/fpu-tst.$(OBJEXT)
948 testsuite_common_fpu_tst_LDADD = $(LDADD)
949 am_v850_run_OBJECTS =
950 v850_run_OBJECTS = $(am_v850_run_OBJECTS)
951 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_DEPENDENCIES = v850/nrun.o \
952 @SIM_ENABLE_ARCH_v850_TRUE@ v850/libsim.a $(am__DEPENDENCIES_1)
953 AM_V_P = $(am__v_P_@AM_V@)
954 am__v_P_ = $(am__v_P_@AM_DEFAULT_V@)
955 am__v_P_0 = false
956 am__v_P_1 = :
957 AM_V_GEN = $(am__v_GEN_@AM_V@)
958 am__v_GEN_ = $(am__v_GEN_@AM_DEFAULT_V@)
959 am__v_GEN_0 = @echo " GEN " $@;
960 am__v_GEN_1 =
961 AM_V_at = $(am__v_at_@AM_V@)
962 am__v_at_ = $(am__v_at_@AM_DEFAULT_V@)
963 am__v_at_0 = @
964 am__v_at_1 =
965 DEFAULT_INCLUDES = -I.@am__isrc@
966 depcomp = $(SHELL) $(top_srcdir)/../depcomp
967 am__depfiles_maybe = depfiles
968 am__mv = mv -f
969 COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
970 $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
971 LTCOMPILE = $(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) \
972 $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) \
973 $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) \
974 $(AM_CFLAGS) $(CFLAGS)
975 AM_V_CC = $(am__v_CC_@AM_V@)
976 am__v_CC_ = $(am__v_CC_@AM_DEFAULT_V@)
977 am__v_CC_0 = @echo " CC " $@;
978 am__v_CC_1 =
979 CCLD = $(CC)
980 LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) \
981 $(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \
982 $(AM_LDFLAGS) $(LDFLAGS) -o $@
983 AM_V_CCLD = $(am__v_CCLD_@AM_V@)
984 am__v_CCLD_ = $(am__v_CCLD_@AM_DEFAULT_V@)
985 am__v_CCLD_0 = @echo " CCLD " $@;
986 am__v_CCLD_1 =
987 SOURCES = $(aarch64_libsim_a_SOURCES) $(arm_libsim_a_SOURCES) \
988 $(avr_libsim_a_SOURCES) $(bfin_libsim_a_SOURCES) \
989 $(bpf_libsim_a_SOURCES) $(common_libcommon_a_SOURCES) \
990 $(cr16_libsim_a_SOURCES) $(cris_libsim_a_SOURCES) \
991 $(d10v_libsim_a_SOURCES) $(erc32_libsim_a_SOURCES) \
992 $(example_synacor_libsim_a_SOURCES) $(frv_libsim_a_SOURCES) \
993 $(ft32_libsim_a_SOURCES) $(h8300_libsim_a_SOURCES) \
994 $(igen_libigen_a_SOURCES) $(iq2000_libsim_a_SOURCES) \
995 $(lm32_libsim_a_SOURCES) $(m32c_libsim_a_SOURCES) \
996 $(m32r_libsim_a_SOURCES) $(m68hc11_libsim_a_SOURCES) \
997 $(aarch64_run_SOURCES) $(arm_run_SOURCES) $(avr_run_SOURCES) \
998 $(bfin_run_SOURCES) $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) \
999 $(cr16_run_SOURCES) $(cris_run_SOURCES) \
1000 $(cris_rvdummy_SOURCES) $(d10v_gencode_SOURCES) \
1001 $(d10v_run_SOURCES) $(erc32_run_SOURCES) erc32/sis.c \
1002 $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \
1003 $(ft32_run_SOURCES) $(h8300_run_SOURCES) \
1004 $(igen_filter_SOURCES) $(igen_gen_SOURCES) \
1005 $(igen_igen_SOURCES) $(igen_ld_cache_SOURCES) \
1006 $(igen_ld_decode_SOURCES) $(igen_ld_insn_SOURCES) \
1007 $(igen_table_SOURCES) $(iq2000_run_SOURCES) \
1008 $(lm32_run_SOURCES) $(m32c_opc2c_SOURCES) $(m32c_run_SOURCES) \
1009 $(m32r_run_SOURCES) $(m68hc11_gencode_SOURCES) \
1010 $(m68hc11_run_SOURCES) $(mcore_run_SOURCES) \
1011 $(microblaze_run_SOURCES) $(mips_run_SOURCES) \
1012 $(mn10300_run_SOURCES) $(moxie_run_SOURCES) \
1013 $(msp430_run_SOURCES) $(or1k_run_SOURCES) ppc/psim.c \
1014 $(ppc_run_SOURCES) $(pru_run_SOURCES) $(riscv_run_SOURCES) \
1015 $(rl78_run_SOURCES) $(rx_run_SOURCES) $(sh_gencode_SOURCES) \
1016 $(sh_run_SOURCES) testsuite/common/alu-tst.c \
1017 testsuite/common/bits-gen.c testsuite/common/bits32m0.c \
1018 testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1019 testsuite/common/bits64m63.c testsuite/common/fpu-tst.c \
1020 $(v850_run_SOURCES)
1021 RECURSIVE_TARGETS = all-recursive check-recursive cscopelist-recursive \
1022 ctags-recursive dvi-recursive html-recursive info-recursive \
1023 install-data-recursive install-dvi-recursive \
1024 install-exec-recursive install-html-recursive \
1025 install-info-recursive install-pdf-recursive \
1026 install-ps-recursive install-recursive installcheck-recursive \
1027 installdirs-recursive pdf-recursive ps-recursive \
1028 tags-recursive uninstall-recursive
1029 am__can_run_installinfo = \
1030 case $$AM_UPDATE_INFO_DIR in \
1031 n|no|NO) false;; \
1032 *) (install-info --version) >/dev/null 2>&1;; \
1033 esac
1034 am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`;
1035 am__vpath_adj = case $$p in \
1036 $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \
1037 *) f=$$p;; \
1038 esac;
1039 am__strip_dir = f=`echo $$p | sed -e 's|^.*/||'`;
1040 am__install_max = 40
1041 am__nobase_strip_setup = \
1042 srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*|]/\\\\&/g'`
1043 am__nobase_strip = \
1044 for p in $$list; do echo "$$p"; done | sed -e "s|$$srcdirstrip/||"
1045 am__nobase_list = $(am__nobase_strip_setup); \
1046 for p in $$list; do echo "$$p $$p"; done | \
1047 sed "s| $$srcdirstrip/| |;"' / .*\//!s/ .*/ ./; s,\( .*\)/[^/]*$$,\1,' | \
1048 $(AWK) 'BEGIN { files["."] = "" } { files[$$2] = files[$$2] " " $$1; \
1049 if (++n[$$2] == $(am__install_max)) \
1050 { print $$2, files[$$2]; n[$$2] = 0; files[$$2] = "" } } \
1051 END { for (dir in files) print dir, files[dir] }'
1052 am__base_list = \
1053 sed '$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \
1054 sed '$$!N;$$!N;$$!N;$$!N;s/\n/ /g'
1055 am__uninstall_files_from_dir = { \
1056 test -z "$$files" \
1057 || { test ! -d "$$dir" && test ! -f "$$dir" && test ! -r "$$dir"; } \
1058 || { echo " ( cd '$$dir' && rm -f" $$files ")"; \
1059 $(am__cd) "$$dir" && rm -f $$files; }; \
1060 }
1061 am__installdirs = "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" \
1062 "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" \
1063 "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" \
1064 "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"
1065 DATA = $(armdoc_DATA) $(dtb_DATA) $(erc32doc_DATA) $(frvdoc_DATA) \
1066 $(or1kdoc_DATA) $(ppcdoc_DATA) $(rxdoc_DATA)
1067 am__pkginclude_HEADERS_DIST = $(srcroot)/include/sim/callback.h \
1068 $(srcroot)/include/sim/sim.h
1069 HEADERS = $(pkginclude_HEADERS)
1070 RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
1071 distclean-recursive maintainer-clean-recursive
1072 am__recursive_targets = \
1073 $(RECURSIVE_TARGETS) \
1074 $(RECURSIVE_CLEAN_TARGETS) \
1075 $(am__extra_recursive_targets)
1076 AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \
1077 cscope check recheck
1078 am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \
1079 $(LISP)config.h.in
1080 # Read a list of newline-separated strings from the standard input,
1081 # and print each of them once, without duplicates. Input order is
1082 # *not* preserved.
1083 am__uniquify_input = $(AWK) '\
1084 BEGIN { nonempty = 0; } \
1085 { items[$$0] = 1; nonempty = 1; } \
1086 END { if (nonempty) { for (i in items) print i; }; } \
1087 '
1088 # Make sure the list of sources is unique. This is necessary because,
1089 # e.g., the same source file might be shared among _SOURCES variables
1090 # for different programs/libraries.
1091 am__define_uniq_tagged_files = \
1092 list='$(am__tagged_files)'; \
1093 unique=`for i in $$list; do \
1094 if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
1095 done | $(am__uniquify_input)`
1096 ETAGS = etags
1097 CTAGS = ctags
1098 CSCOPE = cscope
1099 DEJATOOL = $(PACKAGE)
1100 RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
1101 EXPECT = expect
1102 RUNTEST = runtest
1103 am__tty_colors_dummy = \
1104 mgn= red= grn= lgn= blu= brg= std=; \
1105 am__color_tests=no
1106 am__tty_colors = { \
1107 $(am__tty_colors_dummy); \
1108 if test "X$(AM_COLOR_TESTS)" = Xno; then \
1109 am__color_tests=no; \
1110 elif test "X$(AM_COLOR_TESTS)" = Xalways; then \
1111 am__color_tests=yes; \
1112 elif test "X$$TERM" != Xdumb && { test -t 1; } 2>/dev/null; then \
1113 am__color_tests=yes; \
1114 fi; \
1115 if test $$am__color_tests = yes; then \
1116 red='\e[0;31m'; \
1117 grn='\e[0;32m'; \
1118 lgn='\e[1;32m'; \
1119 blu='\e[1;34m'; \
1120 mgn='\e[0;35m'; \
1121 brg='\e[1m'; \
1122 std='\e[m'; \
1123 fi; \
1124 }
1125 am__recheck_rx = ^[ ]*:recheck:[ ]*
1126 am__global_test_result_rx = ^[ ]*:global-test-result:[ ]*
1127 am__copy_in_global_log_rx = ^[ ]*:copy-in-global-log:[ ]*
1128 # A command that, given a newline-separated list of test names on the
1129 # standard input, print the name of the tests that are to be re-run
1130 # upon "make recheck".
1131 am__list_recheck_tests = $(AWK) '{ \
1132 recheck = 1; \
1133 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1134 { \
1135 if (rc < 0) \
1136 { \
1137 if ((getline line2 < ($$0 ".log")) < 0) \
1138 recheck = 0; \
1139 break; \
1140 } \
1141 else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
1142 { \
1143 recheck = 0; \
1144 break; \
1145 } \
1146 else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \
1147 { \
1148 break; \
1149 } \
1150 }; \
1151 if (recheck) \
1152 print $$0; \
1153 close ($$0 ".trs"); \
1154 close ($$0 ".log"); \
1155 }'
1156 # A command that, given a newline-separated list of test names on the
1157 # standard input, create the global log from their .trs and .log files.
1158 am__create_global_log = $(AWK) ' \
1159 function fatal(msg) \
1160 { \
1161 print "fatal: making $@: " msg | "cat >&2"; \
1162 exit 1; \
1163 } \
1164 function rst_section(header) \
1165 { \
1166 print header; \
1167 len = length(header); \
1168 for (i = 1; i <= len; i = i + 1) \
1169 printf "="; \
1170 printf "\n\n"; \
1171 } \
1172 { \
1173 copy_in_global_log = 1; \
1174 global_test_result = "RUN"; \
1175 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1176 { \
1177 if (rc < 0) \
1178 fatal("failed to read from " $$0 ".trs"); \
1179 if (line ~ /$(am__global_test_result_rx)/) \
1180 { \
1181 sub("$(am__global_test_result_rx)", "", line); \
1182 sub("[ ]*$$", "", line); \
1183 global_test_result = line; \
1184 } \
1185 else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
1186 copy_in_global_log = 0; \
1187 }; \
1188 if (copy_in_global_log) \
1189 { \
1190 rst_section(global_test_result ": " $$0); \
1191 while ((rc = (getline line < ($$0 ".log"))) != 0) \
1192 { \
1193 if (rc < 0) \
1194 fatal("failed to read from " $$0 ".log"); \
1195 print line; \
1196 }; \
1197 printf "\n"; \
1198 }; \
1199 close ($$0 ".trs"); \
1200 close ($$0 ".log"); \
1201 }'
1202 # Restructured Text title.
1203 am__rst_title = { sed 's/.*/ & /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; }
1204 # Solaris 10 'make', and several other traditional 'make' implementations,
1205 # pass "-e" to $(SHELL), and POSIX 2008 even requires this. Work around it
1206 # by disabling -e (using the XSI extension "set +e") if it's set.
1207 am__sh_e_setup = case $$- in *e*) set +e;; esac
1208 # Default flags passed to test drivers.
1209 am__common_driver_flags = \
1210 --color-tests "$$am__color_tests" \
1211 --enable-hard-errors "$$am__enable_hard_errors" \
1212 --expect-failure "$$am__expect_failure"
1213 # To be inserted before the command running the test. Creates the
1214 # directory for the log if needed. Stores in $dir the directory
1215 # containing $f, in $tst the test, in $log the log. Executes the
1216 # developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
1217 # passes TESTS_ENVIRONMENT. Set up options for the wrapper that
1218 # will run the test scripts (or their associated LOG_COMPILER, if
1219 # thy have one).
1220 am__check_pre = \
1221 $(am__sh_e_setup); \
1222 $(am__vpath_adj_setup) $(am__vpath_adj) \
1223 $(am__tty_colors); \
1224 srcdir=$(srcdir); export srcdir; \
1225 case "$@" in \
1226 */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;; \
1227 *) am__odir=.;; \
1228 esac; \
1229 test "x$$am__odir" = x"." || test -d "$$am__odir" \
1230 || $(MKDIR_P) "$$am__odir" || exit $$?; \
1231 if test -f "./$$f"; then dir=./; \
1232 elif test -f "$$f"; then dir=; \
1233 else dir="$(srcdir)/"; fi; \
1234 tst=$$dir$$f; log='$@'; \
1235 if test -n '$(DISABLE_HARD_ERRORS)'; then \
1236 am__enable_hard_errors=no; \
1237 else \
1238 am__enable_hard_errors=yes; \
1239 fi; \
1240 case " $(XFAIL_TESTS) " in \
1241 *[\ \ ]$$f[\ \ ]* | *[\ \ ]$$dir$$f[\ \ ]*) \
1242 am__expect_failure=yes;; \
1243 *) \
1244 am__expect_failure=no;; \
1245 esac; \
1246 $(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
1247 # A shell command to get the names of the tests scripts with any registered
1248 # extension removed (i.e., equivalently, the names of the test logs, with
1249 # the '.log' extension removed). The result is saved in the shell variable
1250 # '$bases'. This honors runtime overriding of TESTS and TEST_LOGS. Sadly,
1251 # we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
1252 # since that might cause problem with VPATH rewrites for suffix-less tests.
1253 # See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
1254 am__set_TESTS_bases = \
1255 bases='$(TEST_LOGS)'; \
1256 bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
1257 bases=`echo $$bases`
1258 RECHECK_LOGS = $(TEST_LOGS)
1259 TEST_SUITE_LOG = test-suite.log
1260 TEST_EXTENSIONS = @EXEEXT@ .test
1261 LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1262 LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS)
1263 am__set_b = \
1264 case '$@' in \
1265 */*) \
1266 case '$*' in \
1267 */*) b='$*';; \
1268 *) b=`echo '$@' | sed 's/\.log$$//'`; \
1269 esac;; \
1270 *) \
1271 b='$*';; \
1272 esac
1273 am__test_logs1 = $(TESTS:=.log)
1274 am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
1275 TEST_LOGS = $(am__test_logs2:.test.log=.log)
1276 TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1277 TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
1278 $(TEST_LOG_FLAGS)
1279 DIST_SUBDIRS = $(SUBDIRS)
1280 ACLOCAL = @ACLOCAL@
1281 AMTAR = @AMTAR@
1282 AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
1283 AR = @AR@
1284 AR_FOR_BUILD = @AR_FOR_BUILD@
1285 AS_FOR_TARGET = @AS_FOR_TARGET@
1286 AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
1287 AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
1288 AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
1289 AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
1290 AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
1291 AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
1292 AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
1293 AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
1294 AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
1295 AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1296 AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
1297 AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
1298 AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
1299 AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
1300 AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
1301 AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
1302 AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
1303 AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
1304 AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
1305 AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
1306 AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
1307 AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
1308 AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
1309 AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
1310 AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
1311 AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
1312 AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
1313 AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
1314 AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
1315 AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
1316 AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
1317 AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
1318 AUTOCONF = @AUTOCONF@
1319 AUTOHEADER = @AUTOHEADER@
1320 AUTOMAKE = @AUTOMAKE@
1321 AWK = @AWK@
1322 CC = @CC@
1323 CCDEPMODE = @CCDEPMODE@
1324 CC_FOR_BUILD = @CC_FOR_BUILD@
1325 CC_FOR_TARGET = @CC_FOR_TARGET@
1326 CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
1327 CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
1328 CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
1329 CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
1330 CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
1331 CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
1332 CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
1333 CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
1334 CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
1335 CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1336 CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
1337 CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
1338 CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
1339 CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
1340 CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
1341 CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
1342 CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
1343 CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
1344 CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
1345 CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
1346 CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
1347 CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
1348 CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
1349 CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
1350 CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
1351 CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
1352 CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
1353 CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
1354 CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
1355 CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
1356 CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
1357 CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
1358 CFLAGS = @CFLAGS@
1359 CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
1360 CGEN_MAINT = @CGEN_MAINT@
1361 CPP = @CPP@
1362 CPPFLAGS = @CPPFLAGS@
1363 CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
1364 CYGPATH_W = @CYGPATH_W@
1365 C_DIALECT = @C_DIALECT@
1366 DEFS = @DEFS@
1367 DEPDIR = @DEPDIR@
1368 DSYMUTIL = @DSYMUTIL@
1369 DTC = @DTC@
1370 DUMPBIN = @DUMPBIN@
1371 ECHO_C = @ECHO_C@
1372 ECHO_N = @ECHO_N@
1373 ECHO_T = @ECHO_T@
1374 EGREP = @EGREP@
1375 EXEEXT = @EXEEXT@
1376 FGREP = @FGREP@
1377 GREP = @GREP@
1378 IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@
1379 INSTALL = @INSTALL@
1380 INSTALL_DATA = @INSTALL_DATA@
1381 INSTALL_PROGRAM = @INSTALL_PROGRAM@
1382 INSTALL_SCRIPT = @INSTALL_SCRIPT@
1383 INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
1384 LD = @LD@
1385 LDFLAGS = @LDFLAGS@
1386 LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
1387 LD_FOR_TARGET = @LD_FOR_TARGET@
1388 LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
1389 LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
1390 LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
1391 LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
1392 LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
1393 LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
1394 LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
1395 LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
1396 LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
1397 LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1398 LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
1399 LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
1400 LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
1401 LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
1402 LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
1403 LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
1404 LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
1405 LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
1406 LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
1407 LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
1408 LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
1409 LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
1410 LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
1411 LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
1412 LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
1413 LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
1414 LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
1415 LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
1416 LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
1417 LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
1418 LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
1419 LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
1420 LIBOBJS = @LIBOBJS@
1421 LIBS = @LIBS@
1422 LIBTOOL = @LIBTOOL@
1423 LIPO = @LIPO@
1424 LN_S = @LN_S@
1425 LTLIBOBJS = @LTLIBOBJS@
1426 MAINT = @MAINT@
1427 MAKEINFO = @MAKEINFO@
1428 MKDIR_P = @MKDIR_P@
1429 NM = @NM@
1430 NMEDIT = @NMEDIT@
1431 OBJDUMP = @OBJDUMP@
1432 OBJEXT = @OBJEXT@
1433 OTOOL = @OTOOL@
1434 OTOOL64 = @OTOOL64@
1435 PACKAGE = @PACKAGE@
1436 PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
1437 PACKAGE_NAME = @PACKAGE_NAME@
1438 PACKAGE_STRING = @PACKAGE_STRING@
1439 PACKAGE_TARNAME = @PACKAGE_TARNAME@
1440 PACKAGE_URL = @PACKAGE_URL@
1441 PACKAGE_VERSION = @PACKAGE_VERSION@
1442 PATH_SEPARATOR = @PATH_SEPARATOR@
1443 PKGVERSION = @PKGVERSION@
1444 PKG_CONFIG = @PKG_CONFIG@
1445 PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
1446 PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
1447 RANLIB = @RANLIB@
1448 RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
1449 READLINE_CFLAGS = @READLINE_CFLAGS@
1450 READLINE_LIB = @READLINE_LIB@
1451 REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
1452 REPORT_BUGS_TO = @REPORT_BUGS_TO@
1453 SDL_CFLAGS = @SDL_CFLAGS@
1454 SDL_LIBS = @SDL_LIBS@
1455 SED = @SED@
1456 SET_MAKE = @SET_MAKE@
1457 SHELL = @SHELL@
1458 SIM_COMMON_BUILD_FALSE = @SIM_COMMON_BUILD_FALSE@
1459 SIM_COMMON_BUILD_TRUE = @SIM_COMMON_BUILD_TRUE@
1460 SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
1461 SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
1462 SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
1463 SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
1464 SIM_INLINE = @SIM_INLINE@
1465 SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
1466 SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
1467 SIM_MIPS_GEN = @SIM_MIPS_GEN@
1468 SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
1469 SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
1470 SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
1471 SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
1472 SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
1473 SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
1474 SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
1475 SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
1476 SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
1477 SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
1478 SIM_SUBDIRS = @SIM_SUBDIRS@
1479 SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
1480 STRIP = @STRIP@
1481 TERMCAP_LIB = @TERMCAP_LIB@
1482 VERSION = @VERSION@
1483 WARN_CFLAGS = @WARN_CFLAGS@
1484 WERROR_CFLAGS = @WERROR_CFLAGS@
1485 abs_builddir = @abs_builddir@
1486 abs_srcdir = @abs_srcdir@
1487 abs_top_builddir = @abs_top_builddir@
1488 abs_top_srcdir = @abs_top_srcdir@
1489 ac_ct_CC = @ac_ct_CC@
1490 ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
1491 am__include = @am__include@
1492 am__leading_dot = @am__leading_dot@
1493 am__quote = @am__quote@
1494 am__tar = @am__tar@
1495 am__untar = @am__untar@
1496 bindir = @bindir@
1497 build = @build@
1498 build_alias = @build_alias@
1499 build_cpu = @build_cpu@
1500 build_os = @build_os@
1501 build_vendor = @build_vendor@
1502 builddir = @builddir@
1503 cgen = @cgen@
1504 cgendir = @cgendir@
1505 datadir = @datadir@
1506 datarootdir = @datarootdir@
1507 docdir = @docdir@
1508 dvidir = @dvidir@
1509 exec_prefix = @exec_prefix@
1510 host = @host@
1511 host_alias = @host_alias@
1512 host_cpu = @host_cpu@
1513 host_os = @host_os@
1514 host_vendor = @host_vendor@
1515 htmldir = @htmldir@
1516 includedir = @includedir@
1517 infodir = @infodir@
1518 install_sh = @install_sh@
1519 libdir = @libdir@
1520 libexecdir = @libexecdir@
1521 localedir = @localedir@
1522 localstatedir = @localstatedir@
1523 mandir = @mandir@
1524 mkdir_p = @mkdir_p@
1525 oldincludedir = @oldincludedir@
1526 pdfdir = @pdfdir@
1527 prefix = @prefix@
1528 program_transform_name = @program_transform_name@
1529 psdir = @psdir@
1530 sbindir = @sbindir@
1531 sharedstatedir = @sharedstatedir@
1532 sim_bitsize = @sim_bitsize@
1533 sim_float = @sim_float@
1534 srcdir = @srcdir@
1535 subdirs = @subdirs@
1536 sysconfdir = @sysconfdir@
1537 target = @target@
1538 target_alias = @target_alias@
1539 target_cpu = @target_cpu@
1540 target_os = @target_os@
1541 target_vendor = @target_vendor@
1542 top_build_prefix = @top_build_prefix@
1543 top_builddir = @top_builddir@
1544 top_srcdir = @top_srcdir@
1545 AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
1546 ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
1547 GNULIB_PARENT_DIR = ..
1548 srccom = $(srcdir)/common
1549 srcroot = $(srcdir)/..
1550 SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
1551 AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \
1552 $(am__append_3) $(am__append_16) $(am__append_30) \
1553 $(am__append_63) $(am__append_74) $(am__append_80) \
1554 $(am__append_87) $(am__append_96)
1555 pkginclude_HEADERS = $(am__append_1)
1556 noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \
1557 $(am__append_10) $(am__append_12) $(am__append_14) \
1558 $(am__append_17) $(am__append_22) $(am__append_28) \
1559 $(am__append_35) $(am__append_41) $(am__append_45) \
1560 $(am__append_47) $(am__append_52) $(am__append_54) \
1561 $(am__append_56) $(am__append_61) $(am__append_67) \
1562 $(am__append_72) $(am__append_78)
1563 BUILT_SOURCES = $(am__append_19) $(am__append_24) $(am__append_32) \
1564 $(am__append_37) $(am__append_49) $(am__append_58) \
1565 $(am__append_64) $(am__append_75) $(am__append_88) \
1566 $(am__append_97) $(am__append_103) $(am__append_112) \
1567 $(am__append_117)
1568 CLEANFILES = common/version.c common/version.c-stamp \
1569 testsuite/common/bits-gen testsuite/common/bits32m0.c \
1570 testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1571 testsuite/common/bits64m63.c
1572 DISTCLEANFILES = $(am__append_94)
1573 MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \
1574 %,%/stamp-hw,$(SIM_ENABLED_ARCHES)) \
1575 $(common_GEN_MODULES_C_TARGETS) $(patsubst \
1576 %,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_7) \
1577 site-sim-config.exp testrun.log testrun.sum $(am__append_21) \
1578 $(am__append_27) $(am__append_34) $(am__append_40) \
1579 $(am__append_51) $(am__append_60) $(am__append_66) \
1580 $(am__append_71) $(am__append_77) $(am__append_83) \
1581 $(am__append_93) $(am__append_99) $(am__append_105) \
1582 $(am__append_115) $(am__append_119)
1583 AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
1584 AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
1585 $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
1586 -DSIM_COMMON_BUILD
1587 AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
1588 $(SIM_INLINE) -I$(srcdir)/common
1589 COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
1590 LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
1591 SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
1592 $(common_HW_CONFIG_H_TARGETS) $(common_GEN_MODULES_C_TARGETS) \
1593 $(am__append_4) $(am__append_20) $(am__append_25) \
1594 $(am__append_33) $(am__append_38) $(am__append_50) \
1595 $(am__append_59) $(am__append_65) $(am__append_69) \
1596 $(am__append_76) $(am__append_81) $(am__append_92) \
1597 $(am__append_98) $(am__append_104) $(am__append_113) \
1598 $(am__append_118)
1599 SIM_INSTALL_DATA_LOCAL_DEPS =
1600 SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_43)
1601 SIM_UNINSTALL_LOCAL_DEPS = $(am__append_44)
1602 common_libcommon_a_SOURCES = \
1603 common/callback.c \
1604 common/portability.c \
1605 common/sim-load.c \
1606 common/syscall.c \
1607 common/target-newlib-errno.c \
1608 common/target-newlib-open.c \
1609 common/target-newlib-signal.c \
1610 common/target-newlib-syscall.c \
1611 common/version.c
1612
1613 SIM_COMMON_HW_OBJS = \
1614 hw-alloc.o \
1615 hw-base.o \
1616 hw-device.o \
1617 hw-events.o \
1618 hw-handles.o \
1619 hw-instances.o \
1620 hw-ports.o \
1621 hw-properties.o \
1622 hw-tree.o \
1623 sim-hw.o
1624
1625 SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
1626 sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1627 sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1628 sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1629 sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1630 sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1631 sim-watch.o $(am__append_2)
1632 SIM_HW_DEVICES = cfi core pal glue
1633 common_HW_CONFIG_H_TARGETS = $(patsubst %,%/hw-config.h,$(SIM_ENABLED_ARCHES))
1634 am_arch_d = $(subst -,_,$(@D))
1635 GEN_MODULES_C_SRCS = \
1636 $(wildcard \
1637 $(patsubst %.o,$(abs_srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \
1638 $(filter-out %.o,$(patsubst $(@D)/%.o,$(abs_srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD))))
1639
1640 common_GEN_MODULES_C_TARGETS = $(patsubst %,%/modules.c,$(filter-out ppc,$(SIM_ENABLED_ARCHES)))
1641 LIBIBERTY_LIB = ../libiberty/libiberty.a
1642 BFD_LIB = ../bfd/libbfd.la
1643 OPCODES_LIB = ../opcodes/libopcodes.la
1644 SIM_COMMON_LIBS = \
1645 $(BFD_LIB) \
1646 $(OPCODES_LIB) \
1647 $(LIBIBERTY_LIB) \
1648 $(LIBGNU) \
1649 $(LIBGNU_EXTRA_LIBS)
1650
1651 GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
1652 CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
1653 CGENFLAGS = -v
1654 CGEN_CPU_DIR = $(cgendir)/cpu
1655 CPU_DIR = $(srcroot)/cpu
1656 CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
1657 CGEN_READ_SCM = $(cgendir)/sim.scm
1658 CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
1659 CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
1660 CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
1661 CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
1662 CGEN_CPU_EXTR = /extr/
1663 CGEN_CPU_READ = /read/
1664 CGEN_CPU_WRITE = /write/
1665 CGEN_CPU_SEM = /sem/
1666 CGEN_CPU_SEMSW = /semsw/
1667 CGEN_WRAPPER = $(srccom)/cgen.sh
1668 CGEN_GEN_ARCH = \
1669 $(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
1670 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1671 $(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
1672 $(CGEN_ARCHFILE) ignored
1673
1674 CGEN_GEN_CPU = \
1675 $(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
1676 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1677 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1678 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1679
1680 CGEN_GEN_DEFS = \
1681 $(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
1682 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1683 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1684 $(CGEN_ARCHFILE) ignored
1685
1686 CGEN_GEN_DECODE = \
1687 $(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
1688 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1689 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1690 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1691
1692 CGEN_GEN_CPU_DECODE = \
1693 $(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
1694 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1695 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1696 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1697
1698 CGEN_GEN_CPU_DESC = \
1699 $(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
1700 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1701 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1702 $(CGEN_ARCHFILE) ignored $$opcfile
1703
1704
1705 # igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1706 # leak detection while running it.
1707 @SIM_ENABLE_IGEN_TRUE@IGEN = igen/igen$(EXEEXT)
1708 @SIM_ENABLE_IGEN_TRUE@IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP)
1709 @SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES = \
1710 @SIM_ENABLE_IGEN_TRUE@ igen/table.c \
1711 @SIM_ENABLE_IGEN_TRUE@ igen/lf.c \
1712 @SIM_ENABLE_IGEN_TRUE@ igen/misc.c \
1713 @SIM_ENABLE_IGEN_TRUE@ igen/filter_host.c \
1714 @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode.c \
1715 @SIM_ENABLE_IGEN_TRUE@ igen/ld-cache.c \
1716 @SIM_ENABLE_IGEN_TRUE@ igen/filter.c \
1717 @SIM_ENABLE_IGEN_TRUE@ igen/ld-insn.c \
1718 @SIM_ENABLE_IGEN_TRUE@ igen/gen-model.c \
1719 @SIM_ENABLE_IGEN_TRUE@ igen/gen-itable.c \
1720 @SIM_ENABLE_IGEN_TRUE@ igen/gen-icache.c \
1721 @SIM_ENABLE_IGEN_TRUE@ igen/gen-semantics.c \
1722 @SIM_ENABLE_IGEN_TRUE@ igen/gen-idecode.c \
1723 @SIM_ENABLE_IGEN_TRUE@ igen/gen-support.c \
1724 @SIM_ENABLE_IGEN_TRUE@ igen/gen-engine.c \
1725 @SIM_ENABLE_IGEN_TRUE@ igen/gen.c
1726
1727 @SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES = igen/igen.c
1728 @SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD = igen/libigen.a
1729 @SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES =
1730 @SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD = igen/filter-main.o igen/libigen.a
1731 @SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES =
1732 @SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD = igen/gen-main.o igen/libigen.a
1733 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES =
1734 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
1735 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES =
1736 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
1737 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES =
1738 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
1739 @SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES =
1740 @SIM_ENABLE_IGEN_TRUE@igen_table_LDADD = igen/table-main.o igen/libigen.a
1741 @SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS = \
1742 @SIM_ENABLE_IGEN_TRUE@ $(IGEN) \
1743 @SIM_ENABLE_IGEN_TRUE@ igen/filter \
1744 @SIM_ENABLE_IGEN_TRUE@ igen/gen \
1745 @SIM_ENABLE_IGEN_TRUE@ igen/ld-cache \
1746 @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode \
1747 @SIM_ENABLE_IGEN_TRUE@ igen/ld-insn \
1748 @SIM_ENABLE_IGEN_TRUE@ igen/table
1749
1750 EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp
1751
1752 # Custom verbose test variables that automake doesn't provide (yet?).
1753 AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
1754 AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
1755 AM_V_RUNTEST_0 = @echo " RUNTEST $(RUNTESTFLAGS) $*";
1756 AM_V_RUNTEST_1 =
1757 DO_RUNTEST = \
1758 LC_ALL=C; export LC_ALL; \
1759 EXPECT=${EXPECT} ; export EXPECT ; \
1760 runtest=$(RUNTEST); \
1761 $$runtest $(RUNTESTFLAGS)
1762
1763 testsuite_common_CPPFLAGS = \
1764 -I$(srcdir)/common \
1765 -I$(srcroot)/include \
1766 -I../bfd
1767
1768 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES =
1769 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD = \
1770 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(common_libcommon_a_OBJECTS) \
1771 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
1772 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
1773 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/cpustate.o \
1774 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/interp.o \
1775 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/memory.o \
1776 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/modules.o \
1777 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/sim-resume.o \
1778 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/simulator.o
1779
1780 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES =
1781 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
1782 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/nrun.o \
1783 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/libsim.a \
1784 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(SIM_COMMON_LIBS)
1785
1786 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES =
1787 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD = \
1788 @SIM_ENABLE_ARCH_arm_TRUE@ $(common_libcommon_a_OBJECTS) \
1789 @SIM_ENABLE_ARCH_arm_TRUE@ arm/wrapper.o \
1790 @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
1791 @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
1792 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu.o \
1793 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu32.o arm/arminit.o arm/armos.o arm/armsupp.o \
1794 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armvirt.o arm/thumbemu.o \
1795 @SIM_ENABLE_ARCH_arm_TRUE@ arm/armcopro.o arm/maverick.o arm/iwmmxt.o \
1796 @SIM_ENABLE_ARCH_arm_TRUE@ arm/modules.o
1797
1798 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES =
1799 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
1800 @SIM_ENABLE_ARCH_arm_TRUE@ arm/nrun.o \
1801 @SIM_ENABLE_ARCH_arm_TRUE@ arm/libsim.a \
1802 @SIM_ENABLE_ARCH_arm_TRUE@ $(SIM_COMMON_LIBS)
1803
1804 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
1805 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
1806 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES =
1807 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD = \
1808 @SIM_ENABLE_ARCH_avr_TRUE@ $(common_libcommon_a_OBJECTS) \
1809 @SIM_ENABLE_ARCH_avr_TRUE@ avr/interp.o \
1810 @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
1811 @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
1812 @SIM_ENABLE_ARCH_avr_TRUE@ avr/modules.o \
1813 @SIM_ENABLE_ARCH_avr_TRUE@ avr/sim-resume.o
1814
1815 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES =
1816 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
1817 @SIM_ENABLE_ARCH_avr_TRUE@ avr/nrun.o \
1818 @SIM_ENABLE_ARCH_avr_TRUE@ avr/libsim.a \
1819 @SIM_ENABLE_ARCH_avr_TRUE@ $(SIM_COMMON_LIBS)
1820
1821 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES =
1822 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD = \
1823 @SIM_ENABLE_ARCH_bfin_TRUE@ $(common_libcommon_a_OBJECTS) \
1824 @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
1825 @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
1826 @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
1827 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/bfin-sim.o \
1828 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/devices.o \
1829 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/gui.o \
1830 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/interp.o \
1831 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/machs.o \
1832 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/modules.o \
1833 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/sim-resume.o
1834
1835 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES =
1836 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
1837 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/nrun.o \
1838 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/libsim.a \
1839 @SIM_ENABLE_ARCH_bfin_TRUE@ $(SIM_COMMON_LIBS)
1840
1841 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \
1842 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_cec \
1843 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ctimer \
1844 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dma \
1845 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dmac \
1846 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_amc \
1847 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_ddrc \
1848 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_sdc \
1849 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_emac \
1850 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_eppi \
1851 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_evt \
1852 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio \
1853 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio2 \
1854 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gptimer \
1855 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_jtag \
1856 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_mmu \
1857 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_nfc \
1858 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_otp \
1859 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pfmon \
1860 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pint \
1861 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pll \
1862 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ppi \
1863 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_rtc \
1864 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_sic \
1865 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_spi \
1866 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_trace \
1867 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_twi \
1868 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart \
1869 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart2 \
1870 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wdog \
1871 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \
1872 @SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy
1873
1874 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES =
1875 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \
1876 @SIM_ENABLE_ARCH_bpf_TRUE@ $(common_libcommon_a_OBJECTS) \
1877 @SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
1878 @SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
1879 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/modules.o \
1880 @SIM_ENABLE_ARCH_bpf_TRUE@ \
1881 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-run.o \
1882 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-scache.o \
1883 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-trace.o \
1884 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-utils.o \
1885 @SIM_ENABLE_ARCH_bpf_TRUE@ \
1886 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/arch.o \
1887 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cpu.o \
1888 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-le.o \
1889 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-be.o \
1890 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-le.o \
1891 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-be.o \
1892 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-le.o \
1893 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.o \
1894 @SIM_ENABLE_ARCH_bpf_TRUE@ \
1895 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf.o \
1896 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf-helpers.o \
1897 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sim-if.o \
1898 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/traps.o
1899
1900 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES =
1901 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
1902 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/nrun.o \
1903 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/libsim.a \
1904 @SIM_ENABLE_ARCH_bpf_TRUE@ $(SIM_COMMON_LIBS)
1905
1906 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
1907 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-le.c \
1908 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-le \
1909 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.c \
1910 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-be
1911
1912 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES =
1913 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD = \
1914 @SIM_ENABLE_ARCH_cr16_TRUE@ $(common_libcommon_a_OBJECTS) \
1915 @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
1916 @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
1917 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/interp.o \
1918 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/modules.o \
1919 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/sim-resume.o \
1920 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/simops.o \
1921 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.o
1922
1923 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES =
1924 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
1925 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/nrun.o \
1926 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/libsim.a \
1927 @SIM_ENABLE_ARCH_cr16_TRUE@ $(SIM_COMMON_LIBS)
1928
1929 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
1930 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/gencode$(EXEEXT) \
1931 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.c
1932
1933 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
1934 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
1935 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES =
1936 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD = \
1937 @SIM_ENABLE_ARCH_cris_TRUE@ $(common_libcommon_a_OBJECTS) \
1938 @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
1939 @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
1940 @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
1941 @SIM_ENABLE_ARCH_cris_TRUE@ cris/modules.o \
1942 @SIM_ENABLE_ARCH_cris_TRUE@ \
1943 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-run.o \
1944 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-scache.o \
1945 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-trace.o \
1946 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-utils.o \
1947 @SIM_ENABLE_ARCH_cris_TRUE@ \
1948 @SIM_ENABLE_ARCH_cris_TRUE@ cris/arch.o \
1949 @SIM_ENABLE_ARCH_cris_TRUE@ cris/crisv10f.o \
1950 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cpuv10.o \
1951 @SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev10.o \
1952 @SIM_ENABLE_ARCH_cris_TRUE@ cris/modelv10.o \
1953 @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv10f.o \
1954 @SIM_ENABLE_ARCH_cris_TRUE@ cris/crisv32f.o \
1955 @SIM_ENABLE_ARCH_cris_TRUE@ cris/cpuv32.o \
1956 @SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev32.o \
1957 @SIM_ENABLE_ARCH_cris_TRUE@ cris/modelv32.o \
1958 @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.o \
1959 @SIM_ENABLE_ARCH_cris_TRUE@ \
1960 @SIM_ENABLE_ARCH_cris_TRUE@ cris/sim-if.o \
1961 @SIM_ENABLE_ARCH_cris_TRUE@ cris/traps.o
1962
1963 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES =
1964 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
1965 @SIM_ENABLE_ARCH_cris_TRUE@ cris/nrun.o \
1966 @SIM_ENABLE_ARCH_cris_TRUE@ cris/libsim.a \
1967 @SIM_ENABLE_ARCH_cris_TRUE@ $(SIM_COMMON_LIBS)
1968
1969 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
1970 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
1971 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
1972 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
1973 @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv10f.c \
1974 @SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v10f \
1975 @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.c \
1976 @SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v32f
1977
1978 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES =
1979 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD = \
1980 @SIM_ENABLE_ARCH_d10v_TRUE@ $(common_libcommon_a_OBJECTS) \
1981 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/interp.o \
1982 @SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
1983 @SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
1984 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/endian.o \
1985 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/modules.o \
1986 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/sim-resume.o \
1987 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/simops.o \
1988 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.o
1989
1990 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES =
1991 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
1992 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/nrun.o \
1993 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/libsim.a \
1994 @SIM_ENABLE_ARCH_d10v_TRUE@ $(SIM_COMMON_LIBS)
1995
1996 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
1997 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/gencode$(EXEEXT) \
1998 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.c
1999
2000 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
2001 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
2002 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES =
2003 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD = \
2004 @SIM_ENABLE_ARCH_erc32_TRUE@ $(common_libcommon_a_OBJECTS) \
2005 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/erc32.o \
2006 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/exec.o \
2007 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/float.o \
2008 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/func.o \
2009 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/help.o \
2010 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/interf.o \
2011 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/modules.o
2012
2013 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES =
2014 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
2015 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/sis.o \
2016 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/libsim.a \
2017 @SIM_ENABLE_ARCH_erc32_TRUE@ $(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)
2018
2019 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
2020 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
2021 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES =
2022 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD = \
2023 @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_OBJECTS) \
2024 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
2025 @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
2026 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
2027 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.o \
2028 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
2029 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
2030
2031 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES =
2032 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
2033 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
2034 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
2035 @SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS)
2036
2037 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES =
2038 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD = \
2039 @SIM_ENABLE_ARCH_frv_TRUE@ $(common_libcommon_a_OBJECTS) \
2040 @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
2041 @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
2042 @SIM_ENABLE_ARCH_frv_TRUE@ frv/modules.o \
2043 @SIM_ENABLE_ARCH_frv_TRUE@ \
2044 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-accfp.o \
2045 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-fpu.o \
2046 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-run.o \
2047 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-scache.o \
2048 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-trace.o \
2049 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-utils.o \
2050 @SIM_ENABLE_ARCH_frv_TRUE@ \
2051 @SIM_ENABLE_ARCH_frv_TRUE@ frv/arch.o \
2052 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-par.o \
2053 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cpu.o \
2054 @SIM_ENABLE_ARCH_frv_TRUE@ frv/decode.o \
2055 @SIM_ENABLE_ARCH_frv_TRUE@ frv/frv.o \
2056 @SIM_ENABLE_ARCH_frv_TRUE@ frv/mloop.o \
2057 @SIM_ENABLE_ARCH_frv_TRUE@ frv/model.o \
2058 @SIM_ENABLE_ARCH_frv_TRUE@ frv/sem.o \
2059 @SIM_ENABLE_ARCH_frv_TRUE@ \
2060 @SIM_ENABLE_ARCH_frv_TRUE@ frv/cache.o \
2061 @SIM_ENABLE_ARCH_frv_TRUE@ frv/interrupts.o \
2062 @SIM_ENABLE_ARCH_frv_TRUE@ frv/memory.o \
2063 @SIM_ENABLE_ARCH_frv_TRUE@ frv/options.o \
2064 @SIM_ENABLE_ARCH_frv_TRUE@ frv/pipeline.o \
2065 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile.o \
2066 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr400.o \
2067 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr450.o \
2068 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr500.o \
2069 @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr550.o \
2070 @SIM_ENABLE_ARCH_frv_TRUE@ frv/registers.o \
2071 @SIM_ENABLE_ARCH_frv_TRUE@ frv/reset.o \
2072 @SIM_ENABLE_ARCH_frv_TRUE@ frv/sim-if.o \
2073 @SIM_ENABLE_ARCH_frv_TRUE@ frv/traps.o
2074
2075 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES =
2076 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
2077 @SIM_ENABLE_ARCH_frv_TRUE@ frv/nrun.o \
2078 @SIM_ENABLE_ARCH_frv_TRUE@ frv/libsim.a \
2079 @SIM_ENABLE_ARCH_frv_TRUE@ $(SIM_COMMON_LIBS)
2080
2081 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
2082 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
2083 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
2084 @SIM_ENABLE_ARCH_frv_TRUE@ frv/mloop.c \
2085 @SIM_ENABLE_ARCH_frv_TRUE@ frv/stamp-mloop
2086
2087 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES =
2088 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD = \
2089 @SIM_ENABLE_ARCH_ft32_TRUE@ $(common_libcommon_a_OBJECTS) \
2090 @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
2091 @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
2092 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/interp.o \
2093 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/modules.o \
2094 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/sim-resume.o
2095
2096 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES =
2097 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
2098 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/nrun.o \
2099 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/libsim.a \
2100 @SIM_ENABLE_ARCH_ft32_TRUE@ $(SIM_COMMON_LIBS)
2101
2102 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES =
2103 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD = \
2104 @SIM_ENABLE_ARCH_h8300_TRUE@ $(common_libcommon_a_OBJECTS) \
2105 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/compile.o \
2106 @SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
2107 @SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
2108 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/modules.o \
2109 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/sim-resume.o
2110
2111 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES =
2112 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
2113 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/nrun.o \
2114 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/libsim.a \
2115 @SIM_ENABLE_ARCH_h8300_TRUE@ $(SIM_COMMON_LIBS)
2116
2117 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES =
2118 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD = \
2119 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(common_libcommon_a_OBJECTS) \
2120 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
2121 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
2122 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/modules.o \
2123 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2124 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-run.o \
2125 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-scache.o \
2126 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-trace.o \
2127 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-utils.o \
2128 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2129 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/arch.o \
2130 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cpu.o \
2131 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/decode.o \
2132 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/iq2000.o \
2133 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sem.o \
2134 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.o \
2135 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/model.o \
2136 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2137 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sim-if.o
2138
2139 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES =
2140 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
2141 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/nrun.o \
2142 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/libsim.a \
2143 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(SIM_COMMON_LIBS)
2144
2145 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
2146 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.c \
2147 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/stamp-mloop
2148
2149 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES =
2150 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD = \
2151 @SIM_ENABLE_ARCH_lm32_TRUE@ $(common_libcommon_a_OBJECTS) \
2152 @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
2153 @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
2154 @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
2155 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/modules.o \
2156 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2157 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-run.o \
2158 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-scache.o \
2159 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-trace.o \
2160 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-utils.o \
2161 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2162 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/arch.o \
2163 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cpu.o \
2164 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/decode.o \
2165 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/sem.o \
2166 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.o \
2167 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/model.o \
2168 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2169 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/lm32.o \
2170 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/sim-if.o \
2171 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/traps.o \
2172 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/user.o
2173
2174 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES =
2175 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
2176 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/nrun.o \
2177 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/libsim.a \
2178 @SIM_ENABLE_ARCH_lm32_TRUE@ $(SIM_COMMON_LIBS)
2179
2180 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart
2181 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
2182 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.c \
2183 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/stamp-mloop
2184
2185 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES =
2186 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD = \
2187 @SIM_ENABLE_ARCH_m32c_TRUE@ $(common_libcommon_a_OBJECTS) \
2188 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/gdb-if.o \
2189 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/int.o \
2190 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/load.o \
2191 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.o \
2192 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/mem.o \
2193 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/misc.o \
2194 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/modules.o \
2195 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.o \
2196 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/reg.o \
2197 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/srcdest.o \
2198 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/syscalls.o \
2199 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/trace.o
2200
2201 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES =
2202 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
2203 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/main.o \
2204 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/libsim.a \
2205 @SIM_ENABLE_ARCH_m32c_TRUE@ $(SIM_COMMON_LIBS)
2206
2207 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
2208 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/opc2c$(EXEEXT) \
2209 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c \
2210 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c
2211
2212 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c
2213
2214 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable
2215 # leak detection while running it.
2216 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
2217 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES =
2218 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD = \
2219 @SIM_ENABLE_ARCH_m32r_TRUE@ $(common_libcommon_a_OBJECTS) \
2220 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
2221 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
2222 @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
2223 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modules.o \
2224 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2225 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-run.o \
2226 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-scache.o \
2227 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-trace.o \
2228 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-utils.o \
2229 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2230 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/arch.o \
2231 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2232 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32r.o \
2233 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu.o \
2234 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decode.o \
2235 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sem.o \
2236 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model.o \
2237 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop.o \
2238 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2239 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32rx.o \
2240 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpux.o \
2241 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decodex.o \
2242 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modelx.o \
2243 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.o \
2244 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2245 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32r2.o \
2246 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu2.o \
2247 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decode2.o \
2248 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model2.o \
2249 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop2.o \
2250 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2251 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sim-if.o \
2252 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/traps.o
2253
2254 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES =
2255 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
2256 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/nrun.o \
2257 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/libsim.a \
2258 @SIM_ENABLE_ARCH_m32r_TRUE@ $(SIM_COMMON_LIBS)
2259
2260 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
2261 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
2262 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop.c \
2263 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop \
2264 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.c \
2265 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-x \
2266 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop2.c \
2267 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-2
2268
2269 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES =
2270 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD = \
2271 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(common_libcommon_a_OBJECTS) \
2272 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interp.o \
2273 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.o \
2274 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.o \
2275 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/emulos.o \
2276 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interrupts.o \
2277 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11_sim.o \
2278 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
2279 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
2280 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
2281 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/modules.o \
2282 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/sim-resume.o
2283
2284 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES =
2285 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
2286 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/nrun.o \
2287 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/libsim.a \
2288 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(SIM_COMMON_LIBS)
2289
2290 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
2291 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
2292 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/gencode$(EXEEXT) \
2293 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.c \
2294 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.c
2295
2296 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
2297 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES =
2298 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
2299 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/nrun.o \
2300 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/libsim.a \
2301 @SIM_ENABLE_ARCH_mcore_TRUE@ $(SIM_COMMON_LIBS)
2302
2303 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES =
2304 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
2305 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/nrun.o \
2306 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/libsim.a \
2307 @SIM_ENABLE_ARCH_microblaze_TRUE@ $(SIM_COMMON_LIBS)
2308
2309 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES =
2310 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
2311 @SIM_ENABLE_ARCH_mips_TRUE@ mips/nrun.o \
2312 @SIM_ENABLE_ARCH_mips_TRUE@ mips/libsim.a \
2313 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_COMMON_LIBS)
2314
2315 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
2316 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE = \
2317 @SIM_ENABLE_ARCH_mips_TRUE@ mips/itable.h \
2318 @SIM_ENABLE_ARCH_mips_TRUE@ mips/itable.c
2319
2320 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
2321 @SIM_ENABLE_ARCH_mips_TRUE@ mips/icache.h \
2322 @SIM_ENABLE_ARCH_mips_TRUE@ mips/icache.c \
2323 @SIM_ENABLE_ARCH_mips_TRUE@ mips/idecode.h \
2324 @SIM_ENABLE_ARCH_mips_TRUE@ mips/idecode.c \
2325 @SIM_ENABLE_ARCH_mips_TRUE@ mips/semantics.h \
2326 @SIM_ENABLE_ARCH_mips_TRUE@ mips/semantics.c \
2327 @SIM_ENABLE_ARCH_mips_TRUE@ mips/model.h \
2328 @SIM_ENABLE_ARCH_mips_TRUE@ mips/model.c \
2329 @SIM_ENABLE_ARCH_mips_TRUE@ mips/support.h \
2330 @SIM_ENABLE_ARCH_mips_TRUE@ mips/support.c \
2331 @SIM_ENABLE_ARCH_mips_TRUE@ mips/engine.h \
2332 @SIM_ENABLE_ARCH_mips_TRUE@ mips/engine.c \
2333 @SIM_ENABLE_ARCH_mips_TRUE@ mips/irun.c
2334
2335 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
2336 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_icache.h \
2337 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_icache.c \
2338 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_idecode.h \
2339 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_idecode.c \
2340 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_semantics.h \
2341 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_semantics.c \
2342 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_model.h \
2343 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_model.c \
2344 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_support.h \
2345 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_support.c \
2346 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
2347 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_icache.h \
2348 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_icache.c \
2349 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_idecode.h \
2350 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_idecode.c \
2351 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_semantics.h \
2352 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_semantics.c \
2353 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_model.h \
2354 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_model.c \
2355 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_support.h \
2356 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_support.c
2357
2358 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS = \
2359 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
2360 @SIM_ENABLE_ARCH_mips_TRUE@ mips/stamp-igen-itable \
2361 @SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_89) $(am__append_90) \
2362 @SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_91)
2363 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2364 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
2365 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
2366 @SIM_ENABLE_ARCH_mips_TRUE@ mips/dsp.igen \
2367 @SIM_ENABLE_ARCH_mips_TRUE@ mips/dsp2.igen \
2368 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16.igen \
2369 @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16e.igen \
2370 @SIM_ENABLE_ARCH_mips_TRUE@ mips/mdmx.igen \
2371 @SIM_ENABLE_ARCH_mips_TRUE@ mips/micromipsdsp.igen \
2372 @SIM_ENABLE_ARCH_mips_TRUE@ mips/micromips.igen \
2373 @SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3264r2.igen \
2374 @SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3264r6.igen \
2375 @SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3d.igen \
2376 @SIM_ENABLE_ARCH_mips_TRUE@ mips/sb1.igen \
2377 @SIM_ENABLE_ARCH_mips_TRUE@ mips/tx.igen \
2378 @SIM_ENABLE_ARCH_mips_TRUE@ mips/vr.igen
2379
2380 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
2381 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
2382 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
2383 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
2384 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES =
2385 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
2386 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/nrun.o \
2387 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/libsim.a \
2388 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(SIM_COMMON_LIBS)
2389
2390 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop
2391 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
2392 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \
2393 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.c \
2394 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \
2395 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.c \
2396 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \
2397 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.c \
2398 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.h \
2399 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.c \
2400 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.h \
2401 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.c \
2402 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \
2403 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.c \
2404 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h \
2405 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.c \
2406 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/irun.c
2407
2408 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
2409 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_BUILT_SRC_FROM_IGEN) \
2410 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/stamp-igen
2411
2412 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2413 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
2414 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
2415 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
2416 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES =
2417 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
2418 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/nrun.o \
2419 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/libsim.a \
2420 @SIM_ENABLE_ARCH_moxie_TRUE@ $(SIM_COMMON_LIBS)
2421
2422 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
2423 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
2424 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES =
2425 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
2426 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/nrun.o \
2427 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/libsim.a \
2428 @SIM_ENABLE_ARCH_msp430_TRUE@ $(SIM_COMMON_LIBS)
2429
2430 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES =
2431 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
2432 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/nrun.o \
2433 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/libsim.a \
2434 @SIM_ENABLE_ARCH_or1k_TRUE@ $(SIM_COMMON_LIBS)
2435
2436 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
2437 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
2438 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
2439 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/mloop.c \
2440 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/stamp-mloop
2441
2442 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES =
2443 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
2444 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc/main.o \
2445 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc/libsim.a \
2446 @SIM_ENABLE_ARCH_ppc_TRUE@ $(SIM_COMMON_LIBS)
2447
2448 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
2449 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
2450 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES =
2451 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
2452 @SIM_ENABLE_ARCH_pru_TRUE@ pru/nrun.o \
2453 @SIM_ENABLE_ARCH_pru_TRUE@ pru/libsim.a \
2454 @SIM_ENABLE_ARCH_pru_TRUE@ $(SIM_COMMON_LIBS)
2455
2456 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES =
2457 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
2458 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/nrun.o \
2459 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/libsim.a \
2460 @SIM_ENABLE_ARCH_riscv_TRUE@ $(SIM_COMMON_LIBS)
2461
2462 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES =
2463 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
2464 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/main.o \
2465 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/libsim.a \
2466 @SIM_ENABLE_ARCH_rl78_TRUE@ $(SIM_COMMON_LIBS)
2467
2468 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES =
2469 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
2470 @SIM_ENABLE_ARCH_rx_TRUE@ rx/main.o \
2471 @SIM_ENABLE_ARCH_rx_TRUE@ rx/libsim.a \
2472 @SIM_ENABLE_ARCH_rx_TRUE@ $(SIM_COMMON_LIBS)
2473
2474 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
2475 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
2476 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =
2477 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
2478 @SIM_ENABLE_ARCH_sh_TRUE@ sh/nrun.o \
2479 @SIM_ENABLE_ARCH_sh_TRUE@ sh/libsim.a \
2480 @SIM_ENABLE_ARCH_sh_TRUE@ $(SIM_COMMON_LIBS)
2481
2482 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
2483 @SIM_ENABLE_ARCH_sh_TRUE@ sh/gencode$(EXEEXT) \
2484 @SIM_ENABLE_ARCH_sh_TRUE@ sh/table.c
2485
2486 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
2487 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =
2488 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
2489 @SIM_ENABLE_ARCH_v850_TRUE@ v850/nrun.o \
2490 @SIM_ENABLE_ARCH_v850_TRUE@ v850/libsim.a \
2491 @SIM_ENABLE_ARCH_v850_TRUE@ $(SIM_COMMON_LIBS)
2492
2493 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
2494 @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \
2495 @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.c \
2496 @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \
2497 @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.c \
2498 @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \
2499 @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.c \
2500 @SIM_ENABLE_ARCH_v850_TRUE@ v850/model.h \
2501 @SIM_ENABLE_ARCH_v850_TRUE@ v850/model.c \
2502 @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.h \
2503 @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.c \
2504 @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \
2505 @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.c \
2506 @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h \
2507 @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.c \
2508 @SIM_ENABLE_ARCH_v850_TRUE@ v850/irun.c
2509
2510 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
2511 @SIM_ENABLE_ARCH_v850_TRUE@ $(v850_BUILT_SRC_FROM_IGEN) \
2512 @SIM_ENABLE_ARCH_v850_TRUE@ v850/stamp-igen
2513
2514 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2515 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
2516 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
2517 all: $(BUILT_SOURCES) config.h
2518 $(MAKE) $(AM_MAKEFLAGS) all-recursive
2519
2520 .SUFFIXES:
2521 .SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
2522 am--refresh: Makefile
2523 @:
2524 $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
2525 @for dep in $?; do \
2526 case '$(am__configure_deps)' in \
2527 *$$dep*) \
2528 echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
2529 $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \
2530 && exit 0; \
2531 exit 1;; \
2532 esac; \
2533 done; \
2534 echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
2535 $(am__cd) $(top_srcdir) && \
2536 $(AUTOMAKE) --foreign Makefile
2537 Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
2538 @case '$?' in \
2539 *config.status*) \
2540 echo ' $(SHELL) ./config.status'; \
2541 $(SHELL) ./config.status;; \
2542 *) \
2543 echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
2544 cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
2545 esac;
2546 $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
2547
2548 $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
2549 $(SHELL) ./config.status --recheck
2550
2551 $(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2552 $(am__cd) $(srcdir) && $(AUTOCONF)
2553 $(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
2554 $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
2555 $(am__aclocal_m4_deps):
2556
2557 config.h: stamp-h1
2558 @test -f $@ || rm -f stamp-h1
2559 @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1
2560
2561 stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status
2562 @rm -f stamp-h1
2563 cd $(top_builddir) && $(SHELL) ./config.status config.h
2564 $(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
2565 ($(am__cd) $(top_srcdir) && $(AUTOHEADER))
2566 rm -f stamp-h1
2567 touch $@
2568
2569 distclean-hdr:
2570 -rm -f config.h stamp-h1
2571 Make-common.sim: $(top_builddir)/config.status $(top_srcdir)/common/Make-common.in
2572 cd $(top_builddir) && $(SHELL) ./config.status $@
2573 aarch64/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/aarch64/Makefile.in
2574 cd $(top_builddir) && $(SHELL) ./config.status $@
2575 aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2576 cd $(top_builddir) && $(SHELL) ./config.status $@
2577 arm/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/arm/Makefile.in
2578 cd $(top_builddir) && $(SHELL) ./config.status $@
2579 arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2580 cd $(top_builddir) && $(SHELL) ./config.status $@
2581 avr/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/avr/Makefile.in
2582 cd $(top_builddir) && $(SHELL) ./config.status $@
2583 avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2584 cd $(top_builddir) && $(SHELL) ./config.status $@
2585 bfin/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bfin/Makefile.in
2586 cd $(top_builddir) && $(SHELL) ./config.status $@
2587 bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2588 cd $(top_builddir) && $(SHELL) ./config.status $@
2589 bpf/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bpf/Makefile.in
2590 cd $(top_builddir) && $(SHELL) ./config.status $@
2591 bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2592 cd $(top_builddir) && $(SHELL) ./config.status $@
2593 cr16/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cr16/Makefile.in
2594 cd $(top_builddir) && $(SHELL) ./config.status $@
2595 cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2596 cd $(top_builddir) && $(SHELL) ./config.status $@
2597 cris/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cris/Makefile.in
2598 cd $(top_builddir) && $(SHELL) ./config.status $@
2599 cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2600 cd $(top_builddir) && $(SHELL) ./config.status $@
2601 d10v/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/d10v/Makefile.in
2602 cd $(top_builddir) && $(SHELL) ./config.status $@
2603 d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2604 cd $(top_builddir) && $(SHELL) ./config.status $@
2605 frv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/frv/Makefile.in
2606 cd $(top_builddir) && $(SHELL) ./config.status $@
2607 frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2608 cd $(top_builddir) && $(SHELL) ./config.status $@
2609 ft32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/ft32/Makefile.in
2610 cd $(top_builddir) && $(SHELL) ./config.status $@
2611 ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2612 cd $(top_builddir) && $(SHELL) ./config.status $@
2613 h8300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/h8300/Makefile.in
2614 cd $(top_builddir) && $(SHELL) ./config.status $@
2615 h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2616 cd $(top_builddir) && $(SHELL) ./config.status $@
2617 iq2000/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/iq2000/Makefile.in
2618 cd $(top_builddir) && $(SHELL) ./config.status $@
2619 iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2620 cd $(top_builddir) && $(SHELL) ./config.status $@
2621 lm32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/lm32/Makefile.in
2622 cd $(top_builddir) && $(SHELL) ./config.status $@
2623 lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2624 cd $(top_builddir) && $(SHELL) ./config.status $@
2625 m32c/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32c/Makefile.in
2626 cd $(top_builddir) && $(SHELL) ./config.status $@
2627 m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2628 cd $(top_builddir) && $(SHELL) ./config.status $@
2629 m32r/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32r/Makefile.in
2630 cd $(top_builddir) && $(SHELL) ./config.status $@
2631 m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2632 cd $(top_builddir) && $(SHELL) ./config.status $@
2633 m68hc11/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m68hc11/Makefile.in
2634 cd $(top_builddir) && $(SHELL) ./config.status $@
2635 m68hc11/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2636 cd $(top_builddir) && $(SHELL) ./config.status $@
2637 mcore/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mcore/Makefile.in
2638 cd $(top_builddir) && $(SHELL) ./config.status $@
2639 mcore/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2640 cd $(top_builddir) && $(SHELL) ./config.status $@
2641 microblaze/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/microblaze/Makefile.in
2642 cd $(top_builddir) && $(SHELL) ./config.status $@
2643 microblaze/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2644 cd $(top_builddir) && $(SHELL) ./config.status $@
2645 mips/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mips/Makefile.in
2646 cd $(top_builddir) && $(SHELL) ./config.status $@
2647 mips/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2648 cd $(top_builddir) && $(SHELL) ./config.status $@
2649 mn10300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/mn10300/Makefile.in
2650 cd $(top_builddir) && $(SHELL) ./config.status $@
2651 mn10300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2652 cd $(top_builddir) && $(SHELL) ./config.status $@
2653 moxie/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/moxie/Makefile.in
2654 cd $(top_builddir) && $(SHELL) ./config.status $@
2655 moxie/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2656 cd $(top_builddir) && $(SHELL) ./config.status $@
2657 msp430/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/msp430/Makefile.in
2658 cd $(top_builddir) && $(SHELL) ./config.status $@
2659 msp430/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2660 cd $(top_builddir) && $(SHELL) ./config.status $@
2661 or1k/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/or1k/Makefile.in
2662 cd $(top_builddir) && $(SHELL) ./config.status $@
2663 or1k/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2664 cd $(top_builddir) && $(SHELL) ./config.status $@
2665 ppc/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2666 cd $(top_builddir) && $(SHELL) ./config.status $@
2667 pru/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/pru/Makefile.in
2668 cd $(top_builddir) && $(SHELL) ./config.status $@
2669 pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2670 cd $(top_builddir) && $(SHELL) ./config.status $@
2671 riscv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/riscv/Makefile.in
2672 cd $(top_builddir) && $(SHELL) ./config.status $@
2673 riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2674 cd $(top_builddir) && $(SHELL) ./config.status $@
2675 rl78/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rl78/Makefile.in
2676 cd $(top_builddir) && $(SHELL) ./config.status $@
2677 rl78/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2678 cd $(top_builddir) && $(SHELL) ./config.status $@
2679 rx/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rx/Makefile.in
2680 cd $(top_builddir) && $(SHELL) ./config.status $@
2681 rx/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2682 cd $(top_builddir) && $(SHELL) ./config.status $@
2683 sh/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/sh/Makefile.in
2684 cd $(top_builddir) && $(SHELL) ./config.status $@
2685 sh/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2686 cd $(top_builddir) && $(SHELL) ./config.status $@
2687 erc32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/erc32/Makefile.in
2688 cd $(top_builddir) && $(SHELL) ./config.status $@
2689 erc32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2690 cd $(top_builddir) && $(SHELL) ./config.status $@
2691 v850/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/v850/Makefile.in
2692 cd $(top_builddir) && $(SHELL) ./config.status $@
2693 v850/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2694 cd $(top_builddir) && $(SHELL) ./config.status $@
2695 example-synacor/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/example-synacor/Makefile.in
2696 cd $(top_builddir) && $(SHELL) ./config.status $@
2697 example-synacor/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
2698 cd $(top_builddir) && $(SHELL) ./config.status $@
2699 arch-subdir.mk: $(top_builddir)/config.status $(srcdir)/arch-subdir.mk.in
2700 cd $(top_builddir) && $(SHELL) ./config.status $@
2701 .gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in
2702 cd $(top_builddir) && $(SHELL) ./config.status $@
2703
2704 clean-noinstLIBRARIES:
2705 -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
2706 aarch64/$(am__dirstamp):
2707 @$(MKDIR_P) aarch64
2708 @: > aarch64/$(am__dirstamp)
2709
2710 aarch64/libsim.a: $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_DEPENDENCIES) $(EXTRA_aarch64_libsim_a_DEPENDENCIES) aarch64/$(am__dirstamp)
2711 $(AM_V_at)-rm -f aarch64/libsim.a
2712 $(AM_V_AR)$(aarch64_libsim_a_AR) aarch64/libsim.a $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD)
2713 $(AM_V_at)$(RANLIB) aarch64/libsim.a
2714 arm/$(am__dirstamp):
2715 @$(MKDIR_P) arm
2716 @: > arm/$(am__dirstamp)
2717
2718 arm/libsim.a: $(arm_libsim_a_OBJECTS) $(arm_libsim_a_DEPENDENCIES) $(EXTRA_arm_libsim_a_DEPENDENCIES) arm/$(am__dirstamp)
2719 $(AM_V_at)-rm -f arm/libsim.a
2720 $(AM_V_AR)$(arm_libsim_a_AR) arm/libsim.a $(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD)
2721 $(AM_V_at)$(RANLIB) arm/libsim.a
2722 avr/$(am__dirstamp):
2723 @$(MKDIR_P) avr
2724 @: > avr/$(am__dirstamp)
2725
2726 avr/libsim.a: $(avr_libsim_a_OBJECTS) $(avr_libsim_a_DEPENDENCIES) $(EXTRA_avr_libsim_a_DEPENDENCIES) avr/$(am__dirstamp)
2727 $(AM_V_at)-rm -f avr/libsim.a
2728 $(AM_V_AR)$(avr_libsim_a_AR) avr/libsim.a $(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD)
2729 $(AM_V_at)$(RANLIB) avr/libsim.a
2730 bfin/$(am__dirstamp):
2731 @$(MKDIR_P) bfin
2732 @: > bfin/$(am__dirstamp)
2733
2734 bfin/libsim.a: $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_DEPENDENCIES) $(EXTRA_bfin_libsim_a_DEPENDENCIES) bfin/$(am__dirstamp)
2735 $(AM_V_at)-rm -f bfin/libsim.a
2736 $(AM_V_AR)$(bfin_libsim_a_AR) bfin/libsim.a $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD)
2737 $(AM_V_at)$(RANLIB) bfin/libsim.a
2738 bpf/$(am__dirstamp):
2739 @$(MKDIR_P) bpf
2740 @: > bpf/$(am__dirstamp)
2741
2742 bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_DEPENDENCIES) $(EXTRA_bpf_libsim_a_DEPENDENCIES) bpf/$(am__dirstamp)
2743 $(AM_V_at)-rm -f bpf/libsim.a
2744 $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD)
2745 $(AM_V_at)$(RANLIB) bpf/libsim.a
2746 common/$(am__dirstamp):
2747 @$(MKDIR_P) common
2748 @: > common/$(am__dirstamp)
2749 common/$(DEPDIR)/$(am__dirstamp):
2750 @$(MKDIR_P) common/$(DEPDIR)
2751 @: > common/$(DEPDIR)/$(am__dirstamp)
2752 common/callback.$(OBJEXT): common/$(am__dirstamp) \
2753 common/$(DEPDIR)/$(am__dirstamp)
2754 common/portability.$(OBJEXT): common/$(am__dirstamp) \
2755 common/$(DEPDIR)/$(am__dirstamp)
2756 common/sim-load.$(OBJEXT): common/$(am__dirstamp) \
2757 common/$(DEPDIR)/$(am__dirstamp)
2758 common/syscall.$(OBJEXT): common/$(am__dirstamp) \
2759 common/$(DEPDIR)/$(am__dirstamp)
2760 common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \
2761 common/$(DEPDIR)/$(am__dirstamp)
2762 common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \
2763 common/$(DEPDIR)/$(am__dirstamp)
2764 common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \
2765 common/$(DEPDIR)/$(am__dirstamp)
2766 common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \
2767 common/$(DEPDIR)/$(am__dirstamp)
2768 common/version.$(OBJEXT): common/$(am__dirstamp) \
2769 common/$(DEPDIR)/$(am__dirstamp)
2770
2771 common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEPENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp)
2772 $(AM_V_at)-rm -f common/libcommon.a
2773 $(AM_V_AR)$(common_libcommon_a_AR) common/libcommon.a $(common_libcommon_a_OBJECTS) $(common_libcommon_a_LIBADD)
2774 $(AM_V_at)$(RANLIB) common/libcommon.a
2775 cr16/$(am__dirstamp):
2776 @$(MKDIR_P) cr16
2777 @: > cr16/$(am__dirstamp)
2778
2779 cr16/libsim.a: $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_DEPENDENCIES) $(EXTRA_cr16_libsim_a_DEPENDENCIES) cr16/$(am__dirstamp)
2780 $(AM_V_at)-rm -f cr16/libsim.a
2781 $(AM_V_AR)$(cr16_libsim_a_AR) cr16/libsim.a $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD)
2782 $(AM_V_at)$(RANLIB) cr16/libsim.a
2783 cris/$(am__dirstamp):
2784 @$(MKDIR_P) cris
2785 @: > cris/$(am__dirstamp)
2786
2787 cris/libsim.a: $(cris_libsim_a_OBJECTS) $(cris_libsim_a_DEPENDENCIES) $(EXTRA_cris_libsim_a_DEPENDENCIES) cris/$(am__dirstamp)
2788 $(AM_V_at)-rm -f cris/libsim.a
2789 $(AM_V_AR)$(cris_libsim_a_AR) cris/libsim.a $(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD)
2790 $(AM_V_at)$(RANLIB) cris/libsim.a
2791 d10v/$(am__dirstamp):
2792 @$(MKDIR_P) d10v
2793 @: > d10v/$(am__dirstamp)
2794
2795 d10v/libsim.a: $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_DEPENDENCIES) $(EXTRA_d10v_libsim_a_DEPENDENCIES) d10v/$(am__dirstamp)
2796 $(AM_V_at)-rm -f d10v/libsim.a
2797 $(AM_V_AR)$(d10v_libsim_a_AR) d10v/libsim.a $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD)
2798 $(AM_V_at)$(RANLIB) d10v/libsim.a
2799 erc32/$(am__dirstamp):
2800 @$(MKDIR_P) erc32
2801 @: > erc32/$(am__dirstamp)
2802
2803 erc32/libsim.a: $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_DEPENDENCIES) $(EXTRA_erc32_libsim_a_DEPENDENCIES) erc32/$(am__dirstamp)
2804 $(AM_V_at)-rm -f erc32/libsim.a
2805 $(AM_V_AR)$(erc32_libsim_a_AR) erc32/libsim.a $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD)
2806 $(AM_V_at)$(RANLIB) erc32/libsim.a
2807 example-synacor/$(am__dirstamp):
2808 @$(MKDIR_P) example-synacor
2809 @: > example-synacor/$(am__dirstamp)
2810
2811 example-synacor/libsim.a: $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_DEPENDENCIES) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES) example-synacor/$(am__dirstamp)
2812 $(AM_V_at)-rm -f example-synacor/libsim.a
2813 $(AM_V_AR)$(example_synacor_libsim_a_AR) example-synacor/libsim.a $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD)
2814 $(AM_V_at)$(RANLIB) example-synacor/libsim.a
2815 frv/$(am__dirstamp):
2816 @$(MKDIR_P) frv
2817 @: > frv/$(am__dirstamp)
2818
2819 frv/libsim.a: $(frv_libsim_a_OBJECTS) $(frv_libsim_a_DEPENDENCIES) $(EXTRA_frv_libsim_a_DEPENDENCIES) frv/$(am__dirstamp)
2820 $(AM_V_at)-rm -f frv/libsim.a
2821 $(AM_V_AR)$(frv_libsim_a_AR) frv/libsim.a $(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD)
2822 $(AM_V_at)$(RANLIB) frv/libsim.a
2823 ft32/$(am__dirstamp):
2824 @$(MKDIR_P) ft32
2825 @: > ft32/$(am__dirstamp)
2826
2827 ft32/libsim.a: $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_DEPENDENCIES) $(EXTRA_ft32_libsim_a_DEPENDENCIES) ft32/$(am__dirstamp)
2828 $(AM_V_at)-rm -f ft32/libsim.a
2829 $(AM_V_AR)$(ft32_libsim_a_AR) ft32/libsim.a $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD)
2830 $(AM_V_at)$(RANLIB) ft32/libsim.a
2831 h8300/$(am__dirstamp):
2832 @$(MKDIR_P) h8300
2833 @: > h8300/$(am__dirstamp)
2834
2835 h8300/libsim.a: $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_DEPENDENCIES) $(EXTRA_h8300_libsim_a_DEPENDENCIES) h8300/$(am__dirstamp)
2836 $(AM_V_at)-rm -f h8300/libsim.a
2837 $(AM_V_AR)$(h8300_libsim_a_AR) h8300/libsim.a $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD)
2838 $(AM_V_at)$(RANLIB) h8300/libsim.a
2839 igen/$(am__dirstamp):
2840 @$(MKDIR_P) igen
2841 @: > igen/$(am__dirstamp)
2842 igen/$(DEPDIR)/$(am__dirstamp):
2843 @$(MKDIR_P) igen/$(DEPDIR)
2844 @: > igen/$(DEPDIR)/$(am__dirstamp)
2845 igen/table.$(OBJEXT): igen/$(am__dirstamp) \
2846 igen/$(DEPDIR)/$(am__dirstamp)
2847 igen/lf.$(OBJEXT): igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp)
2848 igen/misc.$(OBJEXT): igen/$(am__dirstamp) \
2849 igen/$(DEPDIR)/$(am__dirstamp)
2850 igen/filter_host.$(OBJEXT): igen/$(am__dirstamp) \
2851 igen/$(DEPDIR)/$(am__dirstamp)
2852 igen/ld-decode.$(OBJEXT): igen/$(am__dirstamp) \
2853 igen/$(DEPDIR)/$(am__dirstamp)
2854 igen/ld-cache.$(OBJEXT): igen/$(am__dirstamp) \
2855 igen/$(DEPDIR)/$(am__dirstamp)
2856 igen/filter.$(OBJEXT): igen/$(am__dirstamp) \
2857 igen/$(DEPDIR)/$(am__dirstamp)
2858 igen/ld-insn.$(OBJEXT): igen/$(am__dirstamp) \
2859 igen/$(DEPDIR)/$(am__dirstamp)
2860 igen/gen-model.$(OBJEXT): igen/$(am__dirstamp) \
2861 igen/$(DEPDIR)/$(am__dirstamp)
2862 igen/gen-itable.$(OBJEXT): igen/$(am__dirstamp) \
2863 igen/$(DEPDIR)/$(am__dirstamp)
2864 igen/gen-icache.$(OBJEXT): igen/$(am__dirstamp) \
2865 igen/$(DEPDIR)/$(am__dirstamp)
2866 igen/gen-semantics.$(OBJEXT): igen/$(am__dirstamp) \
2867 igen/$(DEPDIR)/$(am__dirstamp)
2868 igen/gen-idecode.$(OBJEXT): igen/$(am__dirstamp) \
2869 igen/$(DEPDIR)/$(am__dirstamp)
2870 igen/gen-support.$(OBJEXT): igen/$(am__dirstamp) \
2871 igen/$(DEPDIR)/$(am__dirstamp)
2872 igen/gen-engine.$(OBJEXT): igen/$(am__dirstamp) \
2873 igen/$(DEPDIR)/$(am__dirstamp)
2874 igen/gen.$(OBJEXT): igen/$(am__dirstamp) \
2875 igen/$(DEPDIR)/$(am__dirstamp)
2876
2877 @SIM_ENABLE_IGEN_FALSE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
2878 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)-rm -f igen/libigen.a
2879 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_AR)$(igen_libigen_a_AR) igen/libigen.a $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
2880 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_at)$(RANLIB) igen/libigen.a
2881 iq2000/$(am__dirstamp):
2882 @$(MKDIR_P) iq2000
2883 @: > iq2000/$(am__dirstamp)
2884
2885 iq2000/libsim.a: $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_DEPENDENCIES) $(EXTRA_iq2000_libsim_a_DEPENDENCIES) iq2000/$(am__dirstamp)
2886 $(AM_V_at)-rm -f iq2000/libsim.a
2887 $(AM_V_AR)$(iq2000_libsim_a_AR) iq2000/libsim.a $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD)
2888 $(AM_V_at)$(RANLIB) iq2000/libsim.a
2889 lm32/$(am__dirstamp):
2890 @$(MKDIR_P) lm32
2891 @: > lm32/$(am__dirstamp)
2892
2893 lm32/libsim.a: $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_DEPENDENCIES) $(EXTRA_lm32_libsim_a_DEPENDENCIES) lm32/$(am__dirstamp)
2894 $(AM_V_at)-rm -f lm32/libsim.a
2895 $(AM_V_AR)$(lm32_libsim_a_AR) lm32/libsim.a $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD)
2896 $(AM_V_at)$(RANLIB) lm32/libsim.a
2897 m32c/$(am__dirstamp):
2898 @$(MKDIR_P) m32c
2899 @: > m32c/$(am__dirstamp)
2900
2901 m32c/libsim.a: $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_DEPENDENCIES) $(EXTRA_m32c_libsim_a_DEPENDENCIES) m32c/$(am__dirstamp)
2902 $(AM_V_at)-rm -f m32c/libsim.a
2903 $(AM_V_AR)$(m32c_libsim_a_AR) m32c/libsim.a $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD)
2904 $(AM_V_at)$(RANLIB) m32c/libsim.a
2905 m32r/$(am__dirstamp):
2906 @$(MKDIR_P) m32r
2907 @: > m32r/$(am__dirstamp)
2908
2909 m32r/libsim.a: $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_DEPENDENCIES) $(EXTRA_m32r_libsim_a_DEPENDENCIES) m32r/$(am__dirstamp)
2910 $(AM_V_at)-rm -f m32r/libsim.a
2911 $(AM_V_AR)$(m32r_libsim_a_AR) m32r/libsim.a $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD)
2912 $(AM_V_at)$(RANLIB) m32r/libsim.a
2913 m68hc11/$(am__dirstamp):
2914 @$(MKDIR_P) m68hc11
2915 @: > m68hc11/$(am__dirstamp)
2916
2917 m68hc11/libsim.a: $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_DEPENDENCIES) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES) m68hc11/$(am__dirstamp)
2918 $(AM_V_at)-rm -f m68hc11/libsim.a
2919 $(AM_V_AR)$(m68hc11_libsim_a_AR) m68hc11/libsim.a $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD)
2920 $(AM_V_at)$(RANLIB) m68hc11/libsim.a
2921
2922 clean-checkPROGRAMS:
2923 @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
2924 echo " rm -f" $$list; \
2925 rm -f $$list || exit $$?; \
2926 test -n "$(EXEEXT)" || exit 0; \
2927 list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2928 echo " rm -f" $$list; \
2929 rm -f $$list
2930
2931 clean-noinstPROGRAMS:
2932 @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \
2933 echo " rm -f" $$list; \
2934 rm -f $$list || exit $$?; \
2935 test -n "$(EXEEXT)" || exit 0; \
2936 list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2937 echo " rm -f" $$list; \
2938 rm -f $$list
2939
2940 aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA_aarch64_run_DEPENDENCIES) aarch64/$(am__dirstamp)
2941 @rm -f aarch64/run$(EXEEXT)
2942 $(AM_V_CCLD)$(LINK) $(aarch64_run_OBJECTS) $(aarch64_run_LDADD) $(LIBS)
2943
2944 arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp)
2945 @rm -f arm/run$(EXEEXT)
2946 $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS)
2947
2948 avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp)
2949 @rm -f avr/run$(EXEEXT)
2950 $(AM_V_CCLD)$(LINK) $(avr_run_OBJECTS) $(avr_run_LDADD) $(LIBS)
2951
2952 bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp)
2953 @rm -f bfin/run$(EXEEXT)
2954 $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS)
2955
2956 bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp)
2957 @rm -f bpf/run$(EXEEXT)
2958 $(AM_V_CCLD)$(LINK) $(bpf_run_OBJECTS) $(bpf_run_LDADD) $(LIBS)
2959 cr16/$(DEPDIR)/$(am__dirstamp):
2960 @$(MKDIR_P) cr16/$(DEPDIR)
2961 @: > cr16/$(DEPDIR)/$(am__dirstamp)
2962 cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \
2963 cr16/$(DEPDIR)/$(am__dirstamp)
2964
2965 @SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
2966 @SIM_ENABLE_ARCH_cr16_FALSE@ @rm -f cr16/gencode$(EXEEXT)
2967 @SIM_ENABLE_ARCH_cr16_FALSE@ $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) $(LIBS)
2968
2969 cr16/run$(EXEEXT): $(cr16_run_OBJECTS) $(cr16_run_DEPENDENCIES) $(EXTRA_cr16_run_DEPENDENCIES) cr16/$(am__dirstamp)
2970 @rm -f cr16/run$(EXEEXT)
2971 $(AM_V_CCLD)$(LINK) $(cr16_run_OBJECTS) $(cr16_run_LDADD) $(LIBS)
2972
2973 cris/run$(EXEEXT): $(cris_run_OBJECTS) $(cris_run_DEPENDENCIES) $(EXTRA_cris_run_DEPENDENCIES) cris/$(am__dirstamp)
2974 @rm -f cris/run$(EXEEXT)
2975 $(AM_V_CCLD)$(LINK) $(cris_run_OBJECTS) $(cris_run_LDADD) $(LIBS)
2976 cris/$(DEPDIR)/$(am__dirstamp):
2977 @$(MKDIR_P) cris/$(DEPDIR)
2978 @: > cris/$(DEPDIR)/$(am__dirstamp)
2979 cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \
2980 cris/$(DEPDIR)/$(am__dirstamp)
2981
2982 cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp)
2983 @rm -f cris/rvdummy$(EXEEXT)
2984 $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS)
2985 d10v/$(DEPDIR)/$(am__dirstamp):
2986 @$(MKDIR_P) d10v/$(DEPDIR)
2987 @: > d10v/$(DEPDIR)/$(am__dirstamp)
2988 d10v/gencode.$(OBJEXT): d10v/$(am__dirstamp) \
2989 d10v/$(DEPDIR)/$(am__dirstamp)
2990
2991 @SIM_ENABLE_ARCH_d10v_FALSE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) $(EXTRA_d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
2992 @SIM_ENABLE_ARCH_d10v_FALSE@ @rm -f d10v/gencode$(EXEEXT)
2993 @SIM_ENABLE_ARCH_d10v_FALSE@ $(AM_V_CCLD)$(LINK) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) $(LIBS)
2994
2995 d10v/run$(EXEEXT): $(d10v_run_OBJECTS) $(d10v_run_DEPENDENCIES) $(EXTRA_d10v_run_DEPENDENCIES) d10v/$(am__dirstamp)
2996 @rm -f d10v/run$(EXEEXT)
2997 $(AM_V_CCLD)$(LINK) $(d10v_run_OBJECTS) $(d10v_run_LDADD) $(LIBS)
2998
2999 erc32/run$(EXEEXT): $(erc32_run_OBJECTS) $(erc32_run_DEPENDENCIES) $(EXTRA_erc32_run_DEPENDENCIES) erc32/$(am__dirstamp)
3000 @rm -f erc32/run$(EXEEXT)
3001 $(AM_V_CCLD)$(LINK) $(erc32_run_OBJECTS) $(erc32_run_LDADD) $(LIBS)
3002 erc32/$(DEPDIR)/$(am__dirstamp):
3003 @$(MKDIR_P) erc32/$(DEPDIR)
3004 @: > erc32/$(DEPDIR)/$(am__dirstamp)
3005 erc32/sis.$(OBJEXT): erc32/$(am__dirstamp) \
3006 erc32/$(DEPDIR)/$(am__dirstamp)
3007
3008 @SIM_ENABLE_ARCH_erc32_FALSE@erc32/sis$(EXEEXT): $(erc32_sis_OBJECTS) $(erc32_sis_DEPENDENCIES) $(EXTRA_erc32_sis_DEPENDENCIES) erc32/$(am__dirstamp)
3009 @SIM_ENABLE_ARCH_erc32_FALSE@ @rm -f erc32/sis$(EXEEXT)
3010 @SIM_ENABLE_ARCH_erc32_FALSE@ $(AM_V_CCLD)$(LINK) $(erc32_sis_OBJECTS) $(erc32_sis_LDADD) $(LIBS)
3011
3012 example-synacor/run$(EXEEXT): $(example_synacor_run_OBJECTS) $(example_synacor_run_DEPENDENCIES) $(EXTRA_example_synacor_run_DEPENDENCIES) example-synacor/$(am__dirstamp)
3013 @rm -f example-synacor/run$(EXEEXT)
3014 $(AM_V_CCLD)$(LINK) $(example_synacor_run_OBJECTS) $(example_synacor_run_LDADD) $(LIBS)
3015
3016 frv/run$(EXEEXT): $(frv_run_OBJECTS) $(frv_run_DEPENDENCIES) $(EXTRA_frv_run_DEPENDENCIES) frv/$(am__dirstamp)
3017 @rm -f frv/run$(EXEEXT)
3018 $(AM_V_CCLD)$(LINK) $(frv_run_OBJECTS) $(frv_run_LDADD) $(LIBS)
3019
3020 ft32/run$(EXEEXT): $(ft32_run_OBJECTS) $(ft32_run_DEPENDENCIES) $(EXTRA_ft32_run_DEPENDENCIES) ft32/$(am__dirstamp)
3021 @rm -f ft32/run$(EXEEXT)
3022 $(AM_V_CCLD)$(LINK) $(ft32_run_OBJECTS) $(ft32_run_LDADD) $(LIBS)
3023
3024 h8300/run$(EXEEXT): $(h8300_run_OBJECTS) $(h8300_run_DEPENDENCIES) $(EXTRA_h8300_run_DEPENDENCIES) h8300/$(am__dirstamp)
3025 @rm -f h8300/run$(EXEEXT)
3026 $(AM_V_CCLD)$(LINK) $(h8300_run_OBJECTS) $(h8300_run_LDADD) $(LIBS)
3027
3028 igen/filter$(EXEEXT): $(igen_filter_OBJECTS) $(igen_filter_DEPENDENCIES) $(EXTRA_igen_filter_DEPENDENCIES) igen/$(am__dirstamp)
3029 @rm -f igen/filter$(EXEEXT)
3030 $(AM_V_CCLD)$(LINK) $(igen_filter_OBJECTS) $(igen_filter_LDADD) $(LIBS)
3031
3032 igen/gen$(EXEEXT): $(igen_gen_OBJECTS) $(igen_gen_DEPENDENCIES) $(EXTRA_igen_gen_DEPENDENCIES) igen/$(am__dirstamp)
3033 @rm -f igen/gen$(EXEEXT)
3034 $(AM_V_CCLD)$(LINK) $(igen_gen_OBJECTS) $(igen_gen_LDADD) $(LIBS)
3035 igen/igen.$(OBJEXT): igen/$(am__dirstamp) \
3036 igen/$(DEPDIR)/$(am__dirstamp)
3037
3038 @SIM_ENABLE_IGEN_FALSE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) $(EXTRA_igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
3039 @SIM_ENABLE_IGEN_FALSE@ @rm -f igen/igen$(EXEEXT)
3040 @SIM_ENABLE_IGEN_FALSE@ $(AM_V_CCLD)$(LINK) $(igen_igen_OBJECTS) $(igen_igen_LDADD) $(LIBS)
3041
3042 igen/ld-cache$(EXEEXT): $(igen_ld_cache_OBJECTS) $(igen_ld_cache_DEPENDENCIES) $(EXTRA_igen_ld_cache_DEPENDENCIES) igen/$(am__dirstamp)
3043 @rm -f igen/ld-cache$(EXEEXT)
3044 $(AM_V_CCLD)$(LINK) $(igen_ld_cache_OBJECTS) $(igen_ld_cache_LDADD) $(LIBS)
3045
3046 igen/ld-decode$(EXEEXT): $(igen_ld_decode_OBJECTS) $(igen_ld_decode_DEPENDENCIES) $(EXTRA_igen_ld_decode_DEPENDENCIES) igen/$(am__dirstamp)
3047 @rm -f igen/ld-decode$(EXEEXT)
3048 $(AM_V_CCLD)$(LINK) $(igen_ld_decode_OBJECTS) $(igen_ld_decode_LDADD) $(LIBS)
3049
3050 igen/ld-insn$(EXEEXT): $(igen_ld_insn_OBJECTS) $(igen_ld_insn_DEPENDENCIES) $(EXTRA_igen_ld_insn_DEPENDENCIES) igen/$(am__dirstamp)
3051 @rm -f igen/ld-insn$(EXEEXT)
3052 $(AM_V_CCLD)$(LINK) $(igen_ld_insn_OBJECTS) $(igen_ld_insn_LDADD) $(LIBS)
3053
3054 igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_igen_table_DEPENDENCIES) igen/$(am__dirstamp)
3055 @rm -f igen/table$(EXEEXT)
3056 $(AM_V_CCLD)$(LINK) $(igen_table_OBJECTS) $(igen_table_LDADD) $(LIBS)
3057
3058 iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp)
3059 @rm -f iq2000/run$(EXEEXT)
3060 $(AM_V_CCLD)$(LINK) $(iq2000_run_OBJECTS) $(iq2000_run_LDADD) $(LIBS)
3061
3062 lm32/run$(EXEEXT): $(lm32_run_OBJECTS) $(lm32_run_DEPENDENCIES) $(EXTRA_lm32_run_DEPENDENCIES) lm32/$(am__dirstamp)
3063 @rm -f lm32/run$(EXEEXT)
3064 $(AM_V_CCLD)$(LINK) $(lm32_run_OBJECTS) $(lm32_run_LDADD) $(LIBS)
3065 m32c/$(DEPDIR)/$(am__dirstamp):
3066 @$(MKDIR_P) m32c/$(DEPDIR)
3067 @: > m32c/$(DEPDIR)/$(am__dirstamp)
3068 m32c/opc2c.$(OBJEXT): m32c/$(am__dirstamp) \
3069 m32c/$(DEPDIR)/$(am__dirstamp)
3070
3071 @SIM_ENABLE_ARCH_m32c_FALSE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) $(EXTRA_m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
3072 @SIM_ENABLE_ARCH_m32c_FALSE@ @rm -f m32c/opc2c$(EXEEXT)
3073 @SIM_ENABLE_ARCH_m32c_FALSE@ $(AM_V_CCLD)$(LINK) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) $(LIBS)
3074
3075 m32c/run$(EXEEXT): $(m32c_run_OBJECTS) $(m32c_run_DEPENDENCIES) $(EXTRA_m32c_run_DEPENDENCIES) m32c/$(am__dirstamp)
3076 @rm -f m32c/run$(EXEEXT)
3077 $(AM_V_CCLD)$(LINK) $(m32c_run_OBJECTS) $(m32c_run_LDADD) $(LIBS)
3078
3079 m32r/run$(EXEEXT): $(m32r_run_OBJECTS) $(m32r_run_DEPENDENCIES) $(EXTRA_m32r_run_DEPENDENCIES) m32r/$(am__dirstamp)
3080 @rm -f m32r/run$(EXEEXT)
3081 $(AM_V_CCLD)$(LINK) $(m32r_run_OBJECTS) $(m32r_run_LDADD) $(LIBS)
3082 m68hc11/$(DEPDIR)/$(am__dirstamp):
3083 @$(MKDIR_P) m68hc11/$(DEPDIR)
3084 @: > m68hc11/$(DEPDIR)/$(am__dirstamp)
3085 m68hc11/gencode.$(OBJEXT): m68hc11/$(am__dirstamp) \
3086 m68hc11/$(DEPDIR)/$(am__dirstamp)
3087
3088 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) $(EXTRA_m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
3089 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @rm -f m68hc11/gencode$(EXEEXT)
3090 @SIM_ENABLE_ARCH_m68hc11_FALSE@ $(AM_V_CCLD)$(LINK) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) $(LIBS)
3091
3092 m68hc11/run$(EXEEXT): $(m68hc11_run_OBJECTS) $(m68hc11_run_DEPENDENCIES) $(EXTRA_m68hc11_run_DEPENDENCIES) m68hc11/$(am__dirstamp)
3093 @rm -f m68hc11/run$(EXEEXT)
3094 $(AM_V_CCLD)$(LINK) $(m68hc11_run_OBJECTS) $(m68hc11_run_LDADD) $(LIBS)
3095 mcore/$(am__dirstamp):
3096 @$(MKDIR_P) mcore
3097 @: > mcore/$(am__dirstamp)
3098
3099 mcore/run$(EXEEXT): $(mcore_run_OBJECTS) $(mcore_run_DEPENDENCIES) $(EXTRA_mcore_run_DEPENDENCIES) mcore/$(am__dirstamp)
3100 @rm -f mcore/run$(EXEEXT)
3101 $(AM_V_CCLD)$(LINK) $(mcore_run_OBJECTS) $(mcore_run_LDADD) $(LIBS)
3102 microblaze/$(am__dirstamp):
3103 @$(MKDIR_P) microblaze
3104 @: > microblaze/$(am__dirstamp)
3105
3106 microblaze/run$(EXEEXT): $(microblaze_run_OBJECTS) $(microblaze_run_DEPENDENCIES) $(EXTRA_microblaze_run_DEPENDENCIES) microblaze/$(am__dirstamp)
3107 @rm -f microblaze/run$(EXEEXT)
3108 $(AM_V_CCLD)$(LINK) $(microblaze_run_OBJECTS) $(microblaze_run_LDADD) $(LIBS)
3109 mips/$(am__dirstamp):
3110 @$(MKDIR_P) mips
3111 @: > mips/$(am__dirstamp)
3112
3113 mips/run$(EXEEXT): $(mips_run_OBJECTS) $(mips_run_DEPENDENCIES) $(EXTRA_mips_run_DEPENDENCIES) mips/$(am__dirstamp)
3114 @rm -f mips/run$(EXEEXT)
3115 $(AM_V_CCLD)$(LINK) $(mips_run_OBJECTS) $(mips_run_LDADD) $(LIBS)
3116 mn10300/$(am__dirstamp):
3117 @$(MKDIR_P) mn10300
3118 @: > mn10300/$(am__dirstamp)
3119
3120 mn10300/run$(EXEEXT): $(mn10300_run_OBJECTS) $(mn10300_run_DEPENDENCIES) $(EXTRA_mn10300_run_DEPENDENCIES) mn10300/$(am__dirstamp)
3121 @rm -f mn10300/run$(EXEEXT)
3122 $(AM_V_CCLD)$(LINK) $(mn10300_run_OBJECTS) $(mn10300_run_LDADD) $(LIBS)
3123 moxie/$(am__dirstamp):
3124 @$(MKDIR_P) moxie
3125 @: > moxie/$(am__dirstamp)
3126
3127 moxie/run$(EXEEXT): $(moxie_run_OBJECTS) $(moxie_run_DEPENDENCIES) $(EXTRA_moxie_run_DEPENDENCIES) moxie/$(am__dirstamp)
3128 @rm -f moxie/run$(EXEEXT)
3129 $(AM_V_CCLD)$(LINK) $(moxie_run_OBJECTS) $(moxie_run_LDADD) $(LIBS)
3130 msp430/$(am__dirstamp):
3131 @$(MKDIR_P) msp430
3132 @: > msp430/$(am__dirstamp)
3133
3134 msp430/run$(EXEEXT): $(msp430_run_OBJECTS) $(msp430_run_DEPENDENCIES) $(EXTRA_msp430_run_DEPENDENCIES) msp430/$(am__dirstamp)
3135 @rm -f msp430/run$(EXEEXT)
3136 $(AM_V_CCLD)$(LINK) $(msp430_run_OBJECTS) $(msp430_run_LDADD) $(LIBS)
3137 or1k/$(am__dirstamp):
3138 @$(MKDIR_P) or1k
3139 @: > or1k/$(am__dirstamp)
3140
3141 or1k/run$(EXEEXT): $(or1k_run_OBJECTS) $(or1k_run_DEPENDENCIES) $(EXTRA_or1k_run_DEPENDENCIES) or1k/$(am__dirstamp)
3142 @rm -f or1k/run$(EXEEXT)
3143 $(AM_V_CCLD)$(LINK) $(or1k_run_OBJECTS) $(or1k_run_LDADD) $(LIBS)
3144 ppc/$(am__dirstamp):
3145 @$(MKDIR_P) ppc
3146 @: > ppc/$(am__dirstamp)
3147 ppc/$(DEPDIR)/$(am__dirstamp):
3148 @$(MKDIR_P) ppc/$(DEPDIR)
3149 @: > ppc/$(DEPDIR)/$(am__dirstamp)
3150 ppc/psim.$(OBJEXT): ppc/$(am__dirstamp) ppc/$(DEPDIR)/$(am__dirstamp)
3151
3152 @SIM_ENABLE_ARCH_ppc_FALSE@ppc/psim$(EXEEXT): $(ppc_psim_OBJECTS) $(ppc_psim_DEPENDENCIES) $(EXTRA_ppc_psim_DEPENDENCIES) ppc/$(am__dirstamp)
3153 @SIM_ENABLE_ARCH_ppc_FALSE@ @rm -f ppc/psim$(EXEEXT)
3154 @SIM_ENABLE_ARCH_ppc_FALSE@ $(AM_V_CCLD)$(LINK) $(ppc_psim_OBJECTS) $(ppc_psim_LDADD) $(LIBS)
3155
3156 ppc/run$(EXEEXT): $(ppc_run_OBJECTS) $(ppc_run_DEPENDENCIES) $(EXTRA_ppc_run_DEPENDENCIES) ppc/$(am__dirstamp)
3157 @rm -f ppc/run$(EXEEXT)
3158 $(AM_V_CCLD)$(LINK) $(ppc_run_OBJECTS) $(ppc_run_LDADD) $(LIBS)
3159 pru/$(am__dirstamp):
3160 @$(MKDIR_P) pru
3161 @: > pru/$(am__dirstamp)
3162
3163 pru/run$(EXEEXT): $(pru_run_OBJECTS) $(pru_run_DEPENDENCIES) $(EXTRA_pru_run_DEPENDENCIES) pru/$(am__dirstamp)
3164 @rm -f pru/run$(EXEEXT)
3165 $(AM_V_CCLD)$(LINK) $(pru_run_OBJECTS) $(pru_run_LDADD) $(LIBS)
3166 riscv/$(am__dirstamp):
3167 @$(MKDIR_P) riscv
3168 @: > riscv/$(am__dirstamp)
3169
3170 riscv/run$(EXEEXT): $(riscv_run_OBJECTS) $(riscv_run_DEPENDENCIES) $(EXTRA_riscv_run_DEPENDENCIES) riscv/$(am__dirstamp)
3171 @rm -f riscv/run$(EXEEXT)
3172 $(AM_V_CCLD)$(LINK) $(riscv_run_OBJECTS) $(riscv_run_LDADD) $(LIBS)
3173 rl78/$(am__dirstamp):
3174 @$(MKDIR_P) rl78
3175 @: > rl78/$(am__dirstamp)
3176
3177 rl78/run$(EXEEXT): $(rl78_run_OBJECTS) $(rl78_run_DEPENDENCIES) $(EXTRA_rl78_run_DEPENDENCIES) rl78/$(am__dirstamp)
3178 @rm -f rl78/run$(EXEEXT)
3179 $(AM_V_CCLD)$(LINK) $(rl78_run_OBJECTS) $(rl78_run_LDADD) $(LIBS)
3180 rx/$(am__dirstamp):
3181 @$(MKDIR_P) rx
3182 @: > rx/$(am__dirstamp)
3183
3184 rx/run$(EXEEXT): $(rx_run_OBJECTS) $(rx_run_DEPENDENCIES) $(EXTRA_rx_run_DEPENDENCIES) rx/$(am__dirstamp)
3185 @rm -f rx/run$(EXEEXT)
3186 $(AM_V_CCLD)$(LINK) $(rx_run_OBJECTS) $(rx_run_LDADD) $(LIBS)
3187 sh/$(am__dirstamp):
3188 @$(MKDIR_P) sh
3189 @: > sh/$(am__dirstamp)
3190 sh/$(DEPDIR)/$(am__dirstamp):
3191 @$(MKDIR_P) sh/$(DEPDIR)
3192 @: > sh/$(DEPDIR)/$(am__dirstamp)
3193 sh/gencode.$(OBJEXT): sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp)
3194
3195 @SIM_ENABLE_ARCH_sh_FALSE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) $(EXTRA_sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
3196 @SIM_ENABLE_ARCH_sh_FALSE@ @rm -f sh/gencode$(EXEEXT)
3197 @SIM_ENABLE_ARCH_sh_FALSE@ $(AM_V_CCLD)$(LINK) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD) $(LIBS)
3198
3199 sh/run$(EXEEXT): $(sh_run_OBJECTS) $(sh_run_DEPENDENCIES) $(EXTRA_sh_run_DEPENDENCIES) sh/$(am__dirstamp)
3200 @rm -f sh/run$(EXEEXT)
3201 $(AM_V_CCLD)$(LINK) $(sh_run_OBJECTS) $(sh_run_LDADD) $(LIBS)
3202 testsuite/common/$(am__dirstamp):
3203 @$(MKDIR_P) testsuite/common
3204 @: > testsuite/common/$(am__dirstamp)
3205 testsuite/common/$(DEPDIR)/$(am__dirstamp):
3206 @$(MKDIR_P) testsuite/common/$(DEPDIR)
3207 @: > testsuite/common/$(DEPDIR)/$(am__dirstamp)
3208 testsuite/common/alu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3209 testsuite/common/$(DEPDIR)/$(am__dirstamp)
3210 testsuite/common/bits-gen.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3211 testsuite/common/$(DEPDIR)/$(am__dirstamp)
3212 testsuite/common/bits32m0.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3213 testsuite/common/$(DEPDIR)/$(am__dirstamp)
3214 testsuite/common/bits32m31.$(OBJEXT): \
3215 testsuite/common/$(am__dirstamp) \
3216 testsuite/common/$(DEPDIR)/$(am__dirstamp)
3217 testsuite/common/bits64m0.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3218 testsuite/common/$(DEPDIR)/$(am__dirstamp)
3219 testsuite/common/bits64m63.$(OBJEXT): \
3220 testsuite/common/$(am__dirstamp) \
3221 testsuite/common/$(DEPDIR)/$(am__dirstamp)
3222 testsuite/common/fpu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3223 testsuite/common/$(DEPDIR)/$(am__dirstamp)
3224 v850/$(am__dirstamp):
3225 @$(MKDIR_P) v850
3226 @: > v850/$(am__dirstamp)
3227
3228 v850/run$(EXEEXT): $(v850_run_OBJECTS) $(v850_run_DEPENDENCIES) $(EXTRA_v850_run_DEPENDENCIES) v850/$(am__dirstamp)
3229 @rm -f v850/run$(EXEEXT)
3230 $(AM_V_CCLD)$(LINK) $(v850_run_OBJECTS) $(v850_run_LDADD) $(LIBS)
3231
3232 mostlyclean-compile:
3233 -rm -f *.$(OBJEXT)
3234 -rm -f common/*.$(OBJEXT)
3235 -rm -f cr16/*.$(OBJEXT)
3236 -rm -f cris/*.$(OBJEXT)
3237 -rm -f d10v/*.$(OBJEXT)
3238 -rm -f erc32/*.$(OBJEXT)
3239 -rm -f igen/*.$(OBJEXT)
3240 -rm -f m32c/*.$(OBJEXT)
3241 -rm -f m68hc11/*.$(OBJEXT)
3242 -rm -f ppc/*.$(OBJEXT)
3243 -rm -f sh/*.$(OBJEXT)
3244 -rm -f testsuite/common/*.$(OBJEXT)
3245
3246 distclean-compile:
3247 -rm -f *.tab.c
3248
3249 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/callback.Po@am__quote@
3250 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/portability.Po@am__quote@
3251 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/sim-load.Po@am__quote@
3252 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/syscall.Po@am__quote@
3253 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-errno.Po@am__quote@
3254 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-open.Po@am__quote@
3255 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-signal.Po@am__quote@
3256 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-syscall.Po@am__quote@
3257 @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/version.Po@am__quote@
3258 @AMDEP_TRUE@@am__include@ @am__quote@cr16/$(DEPDIR)/gencode.Po@am__quote@
3259 @AMDEP_TRUE@@am__include@ @am__quote@cris/$(DEPDIR)/rvdummy.Po@am__quote@
3260 @AMDEP_TRUE@@am__include@ @am__quote@d10v/$(DEPDIR)/gencode.Po@am__quote@
3261 @AMDEP_TRUE@@am__include@ @am__quote@erc32/$(DEPDIR)/sis.Po@am__quote@
3262 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/filter.Po@am__quote@
3263 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/filter_host.Po@am__quote@
3264 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-engine.Po@am__quote@
3265 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-icache.Po@am__quote@
3266 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-idecode.Po@am__quote@
3267 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-itable.Po@am__quote@
3268 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-model.Po@am__quote@
3269 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-semantics.Po@am__quote@
3270 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-support.Po@am__quote@
3271 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen.Po@am__quote@
3272 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/igen.Po@am__quote@
3273 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/ld-cache.Po@am__quote@
3274 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/ld-decode.Po@am__quote@
3275 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/ld-insn.Po@am__quote@
3276 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/lf.Po@am__quote@
3277 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/misc.Po@am__quote@
3278 @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/table.Po@am__quote@
3279 @AMDEP_TRUE@@am__include@ @am__quote@m32c/$(DEPDIR)/opc2c.Po@am__quote@
3280 @AMDEP_TRUE@@am__include@ @am__quote@m68hc11/$(DEPDIR)/gencode.Po@am__quote@
3281 @AMDEP_TRUE@@am__include@ @am__quote@ppc/$(DEPDIR)/psim.Po@am__quote@
3282 @AMDEP_TRUE@@am__include@ @am__quote@sh/$(DEPDIR)/gencode.Po@am__quote@
3283 @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/alu-tst.Po@am__quote@
3284 @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits-gen.Po@am__quote@
3285 @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits32m0.Po@am__quote@
3286 @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits32m31.Po@am__quote@
3287 @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits64m0.Po@am__quote@
3288 @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits64m63.Po@am__quote@
3289 @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/fpu-tst.Po@am__quote@
3290
3291 .c.o:
3292 @am__fastdepCC_TRUE@ $(AM_V_CC)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.o$$||'`;\
3293 @am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ $< &&\
3294 @am__fastdepCC_TRUE@ $(am__mv) $$depbase.Tpo $$depbase.Po
3295 @AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
3296 @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
3297 @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(COMPILE) -c -o $@ $<
3298
3299 .c.obj:
3300 @am__fastdepCC_TRUE@ $(AM_V_CC)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.obj$$||'`;\
3301 @am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ `$(CYGPATH_W) '$<'` &&\
3302 @am__fastdepCC_TRUE@ $(am__mv) $$depbase.Tpo $$depbase.Po
3303 @AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
3304 @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
3305 @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(COMPILE) -c -o $@ `$(CYGPATH_W) '$<'`
3306
3307 .c.lo:
3308 @am__fastdepCC_TRUE@ $(AM_V_CC)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.lo$$||'`;\
3309 @am__fastdepCC_TRUE@ $(LTCOMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ $< &&\
3310 @am__fastdepCC_TRUE@ $(am__mv) $$depbase.Tpo $$depbase.Plo
3311 @AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='$<' object='$@' libtool=yes @AMDEPBACKSLASH@
3312 @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
3313 @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LTCOMPILE) -c -o $@ $<
3314
3315 mostlyclean-libtool:
3316 -rm -f *.lo
3317
3318 clean-libtool:
3319 -rm -rf .libs _libs
3320 -rm -rf aarch64/.libs aarch64/_libs
3321 -rm -rf arm/.libs arm/_libs
3322 -rm -rf avr/.libs avr/_libs
3323 -rm -rf bfin/.libs bfin/_libs
3324 -rm -rf bpf/.libs bpf/_libs
3325 -rm -rf cr16/.libs cr16/_libs
3326 -rm -rf cris/.libs cris/_libs
3327 -rm -rf d10v/.libs d10v/_libs
3328 -rm -rf erc32/.libs erc32/_libs
3329 -rm -rf example-synacor/.libs example-synacor/_libs
3330 -rm -rf frv/.libs frv/_libs
3331 -rm -rf ft32/.libs ft32/_libs
3332 -rm -rf h8300/.libs h8300/_libs
3333 -rm -rf igen/.libs igen/_libs
3334 -rm -rf iq2000/.libs iq2000/_libs
3335 -rm -rf lm32/.libs lm32/_libs
3336 -rm -rf m32c/.libs m32c/_libs
3337 -rm -rf m32r/.libs m32r/_libs
3338 -rm -rf m68hc11/.libs m68hc11/_libs
3339 -rm -rf mcore/.libs mcore/_libs
3340 -rm -rf microblaze/.libs microblaze/_libs
3341 -rm -rf mips/.libs mips/_libs
3342 -rm -rf mn10300/.libs mn10300/_libs
3343 -rm -rf moxie/.libs moxie/_libs
3344 -rm -rf msp430/.libs msp430/_libs
3345 -rm -rf or1k/.libs or1k/_libs
3346 -rm -rf ppc/.libs ppc/_libs
3347 -rm -rf pru/.libs pru/_libs
3348 -rm -rf riscv/.libs riscv/_libs
3349 -rm -rf rl78/.libs rl78/_libs
3350 -rm -rf rx/.libs rx/_libs
3351 -rm -rf sh/.libs sh/_libs
3352 -rm -rf testsuite/common/.libs testsuite/common/_libs
3353 -rm -rf v850/.libs v850/_libs
3354
3355 distclean-libtool:
3356 -rm -f libtool config.lt
3357 install-armdocDATA: $(armdoc_DATA)
3358 @$(NORMAL_INSTALL)
3359 @list='$(armdoc_DATA)'; test -n "$(armdocdir)" || list=; \
3360 if test -n "$$list"; then \
3361 echo " $(MKDIR_P) '$(DESTDIR)$(armdocdir)'"; \
3362 $(MKDIR_P) "$(DESTDIR)$(armdocdir)" || exit 1; \
3363 fi; \
3364 for p in $$list; do \
3365 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3366 echo "$$d$$p"; \
3367 done | $(am__base_list) | \
3368 while read files; do \
3369 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(armdocdir)'"; \
3370 $(INSTALL_DATA) $$files "$(DESTDIR)$(armdocdir)" || exit $$?; \
3371 done
3372
3373 uninstall-armdocDATA:
3374 @$(NORMAL_UNINSTALL)
3375 @list='$(armdoc_DATA)'; test -n "$(armdocdir)" || list=; \
3376 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3377 dir='$(DESTDIR)$(armdocdir)'; $(am__uninstall_files_from_dir)
3378 install-dtbDATA: $(dtb_DATA)
3379 @$(NORMAL_INSTALL)
3380 @list='$(dtb_DATA)'; test -n "$(dtbdir)" || list=; \
3381 if test -n "$$list"; then \
3382 echo " $(MKDIR_P) '$(DESTDIR)$(dtbdir)'"; \
3383 $(MKDIR_P) "$(DESTDIR)$(dtbdir)" || exit 1; \
3384 fi; \
3385 for p in $$list; do \
3386 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3387 echo "$$d$$p"; \
3388 done | $(am__base_list) | \
3389 while read files; do \
3390 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(dtbdir)'"; \
3391 $(INSTALL_DATA) $$files "$(DESTDIR)$(dtbdir)" || exit $$?; \
3392 done
3393
3394 uninstall-dtbDATA:
3395 @$(NORMAL_UNINSTALL)
3396 @list='$(dtb_DATA)'; test -n "$(dtbdir)" || list=; \
3397 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3398 dir='$(DESTDIR)$(dtbdir)'; $(am__uninstall_files_from_dir)
3399 install-erc32docDATA: $(erc32doc_DATA)
3400 @$(NORMAL_INSTALL)
3401 @list='$(erc32doc_DATA)'; test -n "$(erc32docdir)" || list=; \
3402 if test -n "$$list"; then \
3403 echo " $(MKDIR_P) '$(DESTDIR)$(erc32docdir)'"; \
3404 $(MKDIR_P) "$(DESTDIR)$(erc32docdir)" || exit 1; \
3405 fi; \
3406 for p in $$list; do \
3407 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3408 echo "$$d$$p"; \
3409 done | $(am__base_list) | \
3410 while read files; do \
3411 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(erc32docdir)'"; \
3412 $(INSTALL_DATA) $$files "$(DESTDIR)$(erc32docdir)" || exit $$?; \
3413 done
3414
3415 uninstall-erc32docDATA:
3416 @$(NORMAL_UNINSTALL)
3417 @list='$(erc32doc_DATA)'; test -n "$(erc32docdir)" || list=; \
3418 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3419 dir='$(DESTDIR)$(erc32docdir)'; $(am__uninstall_files_from_dir)
3420 install-frvdocDATA: $(frvdoc_DATA)
3421 @$(NORMAL_INSTALL)
3422 @list='$(frvdoc_DATA)'; test -n "$(frvdocdir)" || list=; \
3423 if test -n "$$list"; then \
3424 echo " $(MKDIR_P) '$(DESTDIR)$(frvdocdir)'"; \
3425 $(MKDIR_P) "$(DESTDIR)$(frvdocdir)" || exit 1; \
3426 fi; \
3427 for p in $$list; do \
3428 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3429 echo "$$d$$p"; \
3430 done | $(am__base_list) | \
3431 while read files; do \
3432 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(frvdocdir)'"; \
3433 $(INSTALL_DATA) $$files "$(DESTDIR)$(frvdocdir)" || exit $$?; \
3434 done
3435
3436 uninstall-frvdocDATA:
3437 @$(NORMAL_UNINSTALL)
3438 @list='$(frvdoc_DATA)'; test -n "$(frvdocdir)" || list=; \
3439 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3440 dir='$(DESTDIR)$(frvdocdir)'; $(am__uninstall_files_from_dir)
3441 install-or1kdocDATA: $(or1kdoc_DATA)
3442 @$(NORMAL_INSTALL)
3443 @list='$(or1kdoc_DATA)'; test -n "$(or1kdocdir)" || list=; \
3444 if test -n "$$list"; then \
3445 echo " $(MKDIR_P) '$(DESTDIR)$(or1kdocdir)'"; \
3446 $(MKDIR_P) "$(DESTDIR)$(or1kdocdir)" || exit 1; \
3447 fi; \
3448 for p in $$list; do \
3449 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3450 echo "$$d$$p"; \
3451 done | $(am__base_list) | \
3452 while read files; do \
3453 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(or1kdocdir)'"; \
3454 $(INSTALL_DATA) $$files "$(DESTDIR)$(or1kdocdir)" || exit $$?; \
3455 done
3456
3457 uninstall-or1kdocDATA:
3458 @$(NORMAL_UNINSTALL)
3459 @list='$(or1kdoc_DATA)'; test -n "$(or1kdocdir)" || list=; \
3460 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3461 dir='$(DESTDIR)$(or1kdocdir)'; $(am__uninstall_files_from_dir)
3462 install-ppcdocDATA: $(ppcdoc_DATA)
3463 @$(NORMAL_INSTALL)
3464 @list='$(ppcdoc_DATA)'; test -n "$(ppcdocdir)" || list=; \
3465 if test -n "$$list"; then \
3466 echo " $(MKDIR_P) '$(DESTDIR)$(ppcdocdir)'"; \
3467 $(MKDIR_P) "$(DESTDIR)$(ppcdocdir)" || exit 1; \
3468 fi; \
3469 for p in $$list; do \
3470 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3471 echo "$$d$$p"; \
3472 done | $(am__base_list) | \
3473 while read files; do \
3474 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(ppcdocdir)'"; \
3475 $(INSTALL_DATA) $$files "$(DESTDIR)$(ppcdocdir)" || exit $$?; \
3476 done
3477
3478 uninstall-ppcdocDATA:
3479 @$(NORMAL_UNINSTALL)
3480 @list='$(ppcdoc_DATA)'; test -n "$(ppcdocdir)" || list=; \
3481 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3482 dir='$(DESTDIR)$(ppcdocdir)'; $(am__uninstall_files_from_dir)
3483 install-rxdocDATA: $(rxdoc_DATA)
3484 @$(NORMAL_INSTALL)
3485 @list='$(rxdoc_DATA)'; test -n "$(rxdocdir)" || list=; \
3486 if test -n "$$list"; then \
3487 echo " $(MKDIR_P) '$(DESTDIR)$(rxdocdir)'"; \
3488 $(MKDIR_P) "$(DESTDIR)$(rxdocdir)" || exit 1; \
3489 fi; \
3490 for p in $$list; do \
3491 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3492 echo "$$d$$p"; \
3493 done | $(am__base_list) | \
3494 while read files; do \
3495 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(rxdocdir)'"; \
3496 $(INSTALL_DATA) $$files "$(DESTDIR)$(rxdocdir)" || exit $$?; \
3497 done
3498
3499 uninstall-rxdocDATA:
3500 @$(NORMAL_UNINSTALL)
3501 @list='$(rxdoc_DATA)'; test -n "$(rxdocdir)" || list=; \
3502 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3503 dir='$(DESTDIR)$(rxdocdir)'; $(am__uninstall_files_from_dir)
3504 install-pkgincludeHEADERS: $(pkginclude_HEADERS)
3505 @$(NORMAL_INSTALL)
3506 @list='$(pkginclude_HEADERS)'; test -n "$(pkgincludedir)" || list=; \
3507 if test -n "$$list"; then \
3508 echo " $(MKDIR_P) '$(DESTDIR)$(pkgincludedir)'"; \
3509 $(MKDIR_P) "$(DESTDIR)$(pkgincludedir)" || exit 1; \
3510 fi; \
3511 for p in $$list; do \
3512 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
3513 echo "$$d$$p"; \
3514 done | $(am__base_list) | \
3515 while read files; do \
3516 echo " $(INSTALL_HEADER) $$files '$(DESTDIR)$(pkgincludedir)'"; \
3517 $(INSTALL_HEADER) $$files "$(DESTDIR)$(pkgincludedir)" || exit $$?; \
3518 done
3519
3520 uninstall-pkgincludeHEADERS:
3521 @$(NORMAL_UNINSTALL)
3522 @list='$(pkginclude_HEADERS)'; test -n "$(pkgincludedir)" || list=; \
3523 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
3524 dir='$(DESTDIR)$(pkgincludedir)'; $(am__uninstall_files_from_dir)
3525
3526 # This directory's subdirectories are mostly independent; you can cd
3527 # into them and run 'make' without going through this Makefile.
3528 # To change the values of 'make' variables: instead of editing Makefiles,
3529 # (1) if the variable is set in 'config.status', edit 'config.status'
3530 # (which will cause the Makefiles to be regenerated when you run 'make');
3531 # (2) otherwise, pass the desired values on the 'make' command line.
3532 $(am__recursive_targets):
3533 @fail=; \
3534 if $(am__make_keepgoing); then \
3535 failcom='fail=yes'; \
3536 else \
3537 failcom='exit 1'; \
3538 fi; \
3539 dot_seen=no; \
3540 target=`echo $@ | sed s/-recursive//`; \
3541 case "$@" in \
3542 distclean-* | maintainer-clean-*) list='$(DIST_SUBDIRS)' ;; \
3543 *) list='$(SUBDIRS)' ;; \
3544 esac; \
3545 for subdir in $$list; do \
3546 echo "Making $$target in $$subdir"; \
3547 if test "$$subdir" = "."; then \
3548 dot_seen=yes; \
3549 local_target="$$target-am"; \
3550 else \
3551 local_target="$$target"; \
3552 fi; \
3553 ($(am__cd) $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
3554 || eval $$failcom; \
3555 done; \
3556 if test "$$dot_seen" = "no"; then \
3557 $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
3558 fi; test -z "$$fail"
3559
3560 ID: $(am__tagged_files)
3561 $(am__define_uniq_tagged_files); mkid -fID $$unique
3562 tags: tags-recursive
3563 TAGS: tags
3564
3565 tags-am: $(TAGS_DEPENDENCIES) $(am__tagged_files)
3566 set x; \
3567 here=`pwd`; \
3568 if ($(ETAGS) --etags-include --version) >/dev/null 2>&1; then \
3569 include_option=--etags-include; \
3570 empty_fix=.; \
3571 else \
3572 include_option=--include; \
3573 empty_fix=; \
3574 fi; \
3575 list='$(SUBDIRS)'; for subdir in $$list; do \
3576 if test "$$subdir" = .; then :; else \
3577 test ! -f $$subdir/TAGS || \
3578 set "$$@" "$$include_option=$$here/$$subdir/TAGS"; \
3579 fi; \
3580 done; \
3581 $(am__define_uniq_tagged_files); \
3582 shift; \
3583 if test -z "$(ETAGS_ARGS)$$*$$unique"; then :; else \
3584 test -n "$$unique" || unique=$$empty_fix; \
3585 if test $$# -gt 0; then \
3586 $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
3587 "$$@" $$unique; \
3588 else \
3589 $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
3590 $$unique; \
3591 fi; \
3592 fi
3593 ctags: ctags-recursive
3594
3595 CTAGS: ctags
3596 ctags-am: $(TAGS_DEPENDENCIES) $(am__tagged_files)
3597 $(am__define_uniq_tagged_files); \
3598 test -z "$(CTAGS_ARGS)$$unique" \
3599 || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
3600 $$unique
3601
3602 GTAGS:
3603 here=`$(am__cd) $(top_builddir) && pwd` \
3604 && $(am__cd) $(top_srcdir) \
3605 && gtags -i $(GTAGS_ARGS) "$$here"
3606 cscope: cscope.files
3607 test ! -s cscope.files \
3608 || $(CSCOPE) -b -q $(AM_CSCOPEFLAGS) $(CSCOPEFLAGS) -i cscope.files $(CSCOPE_ARGS)
3609 clean-cscope:
3610 -rm -f cscope.files
3611 cscope.files: clean-cscope cscopelist
3612 cscopelist: cscopelist-recursive
3613
3614 cscopelist-am: $(am__tagged_files)
3615 list='$(am__tagged_files)'; \
3616 case "$(srcdir)" in \
3617 [\\/]* | ?:[\\/]*) sdir="$(srcdir)" ;; \
3618 *) sdir=$(subdir)/$(srcdir) ;; \
3619 esac; \
3620 for i in $$list; do \
3621 if test -f "$$i"; then \
3622 echo "$(subdir)/$$i"; \
3623 else \
3624 echo "$$sdir/$$i"; \
3625 fi; \
3626 done >> $(top_builddir)/cscope.files
3627
3628 distclean-tags:
3629 -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
3630 -rm -f cscope.out cscope.in.out cscope.po.out cscope.files
3631 site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG)
3632 @echo 'Making a new site.exp file ...'
3633 @echo '## these variables are automatically generated by make ##' >site.tmp
3634 @echo '# Do not edit here. If you wish to override these values' >>site.tmp
3635 @echo '# edit the last section' >>site.tmp
3636 @echo 'set srcdir "$(srcdir)"' >>site.tmp
3637 @echo "set objdir `pwd`" >>site.tmp
3638 @echo 'set build_alias "$(build_alias)"' >>site.tmp
3639 @echo 'set build_triplet $(build_triplet)' >>site.tmp
3640 @echo 'set host_alias "$(host_alias)"' >>site.tmp
3641 @echo 'set host_triplet $(host_triplet)' >>site.tmp
3642 @echo 'set target_alias "$(target_alias)"' >>site.tmp
3643 @echo 'set target_triplet $(target_triplet)' >>site.tmp
3644 @list='$(EXTRA_DEJAGNU_SITE_CONFIG)'; for f in $$list; do \
3645 echo "## Begin content included from file $$f. Do not modify. ##" \
3646 && cat `test -f "$$f" || echo '$(srcdir)/'`$$f \
3647 && echo "## End content included from file $$f. ##" \
3648 || exit 1; \
3649 done >> site.tmp
3650 @echo "## End of auto-generated content; you can edit from here. ##" >> site.tmp
3651 @if test -f site.exp; then \
3652 sed -e '1,/^## End of auto-generated content.*##/d' site.exp >> site.tmp; \
3653 fi
3654 @-rm -f site.bak
3655 @test ! -f site.exp || mv site.exp site.bak
3656 @mv site.tmp site.exp
3657
3658 distclean-DEJAGNU:
3659 -rm -f site.exp site.bak
3660 -l='$(DEJATOOL)'; for tool in $$l; do \
3661 rm -f $$tool.sum $$tool.log; \
3662 done
3663
3664 # Recover from deleted '.trs' file; this should ensure that
3665 # "rm -f foo.log; make foo.trs" re-run 'foo.test', and re-create
3666 # both 'foo.log' and 'foo.trs'. Break the recipe in two subshells
3667 # to avoid problems with "make -n".
3668 .log.trs:
3669 rm -f $< $@
3670 $(MAKE) $(AM_MAKEFLAGS) $<
3671
3672 # Leading 'am--fnord' is there to ensure the list of targets does not
3673 # expand to empty, as could happen e.g. with make check TESTS=''.
3674 am--fnord $(TEST_LOGS) $(TEST_LOGS:.log=.trs): $(am__force_recheck)
3675 am--force-recheck:
3676 @:
3677
3678 $(TEST_SUITE_LOG): $(TEST_LOGS)
3679 @$(am__set_TESTS_bases); \
3680 am__f_ok () { test -f "$$1" && test -r "$$1"; }; \
3681 redo_bases=`for i in $$bases; do \
3682 am__f_ok $$i.trs && am__f_ok $$i.log || echo $$i; \
3683 done`; \
3684 if test -n "$$redo_bases"; then \
3685 redo_logs=`for i in $$redo_bases; do echo $$i.log; done`; \
3686 redo_results=`for i in $$redo_bases; do echo $$i.trs; done`; \
3687 if $(am__make_dryrun); then :; else \
3688 rm -f $$redo_logs && rm -f $$redo_results || exit 1; \
3689 fi; \
3690 fi; \
3691 if test -n "$$am__remaking_logs"; then \
3692 echo "fatal: making $(TEST_SUITE_LOG): possible infinite" \
3693 "recursion detected" >&2; \
3694 elif test -n "$$redo_logs"; then \
3695 am__remaking_logs=yes $(MAKE) $(AM_MAKEFLAGS) $$redo_logs; \
3696 fi; \
3697 if $(am__make_dryrun); then :; else \
3698 st=0; \
3699 errmsg="fatal: making $(TEST_SUITE_LOG): failed to create"; \
3700 for i in $$redo_bases; do \
3701 test -f $$i.trs && test -r $$i.trs \
3702 || { echo "$$errmsg $$i.trs" >&2; st=1; }; \
3703 test -f $$i.log && test -r $$i.log \
3704 || { echo "$$errmsg $$i.log" >&2; st=1; }; \
3705 done; \
3706 test $$st -eq 0 || exit 1; \
3707 fi
3708 @$(am__sh_e_setup); $(am__tty_colors); $(am__set_TESTS_bases); \
3709 ws='[ ]'; \
3710 results=`for b in $$bases; do echo $$b.trs; done`; \
3711 test -n "$$results" || results=/dev/null; \
3712 all=` grep "^$$ws*:test-result:" $$results | wc -l`; \
3713 pass=` grep "^$$ws*:test-result:$$ws*PASS" $$results | wc -l`; \
3714 fail=` grep "^$$ws*:test-result:$$ws*FAIL" $$results | wc -l`; \
3715 skip=` grep "^$$ws*:test-result:$$ws*SKIP" $$results | wc -l`; \
3716 xfail=`grep "^$$ws*:test-result:$$ws*XFAIL" $$results | wc -l`; \
3717 xpass=`grep "^$$ws*:test-result:$$ws*XPASS" $$results | wc -l`; \
3718 error=`grep "^$$ws*:test-result:$$ws*ERROR" $$results | wc -l`; \
3719 if test `expr $$fail + $$xpass + $$error` -eq 0; then \
3720 success=true; \
3721 else \
3722 success=false; \
3723 fi; \
3724 br='==================='; br=$$br$$br$$br$$br; \
3725 result_count () \
3726 { \
3727 if test x"$$1" = x"--maybe-color"; then \
3728 maybe_colorize=yes; \
3729 elif test x"$$1" = x"--no-color"; then \
3730 maybe_colorize=no; \
3731 else \
3732 echo "$@: invalid 'result_count' usage" >&2; exit 4; \
3733 fi; \
3734 shift; \
3735 desc=$$1 count=$$2; \
3736 if test $$maybe_colorize = yes && test $$count -gt 0; then \
3737 color_start=$$3 color_end=$$std; \
3738 else \
3739 color_start= color_end=; \
3740 fi; \
3741 echo "$${color_start}# $$desc $$count$${color_end}"; \
3742 }; \
3743 create_testsuite_report () \
3744 { \
3745 result_count $$1 "TOTAL:" $$all "$$brg"; \
3746 result_count $$1 "PASS: " $$pass "$$grn"; \
3747 result_count $$1 "SKIP: " $$skip "$$blu"; \
3748 result_count $$1 "XFAIL:" $$xfail "$$lgn"; \
3749 result_count $$1 "FAIL: " $$fail "$$red"; \
3750 result_count $$1 "XPASS:" $$xpass "$$red"; \
3751 result_count $$1 "ERROR:" $$error "$$mgn"; \
3752 }; \
3753 { \
3754 echo "$(PACKAGE_STRING): $(subdir)/$(TEST_SUITE_LOG)" | \
3755 $(am__rst_title); \
3756 create_testsuite_report --no-color; \
3757 echo; \
3758 echo ".. contents:: :depth: 2"; \
3759 echo; \
3760 for b in $$bases; do echo $$b; done \
3761 | $(am__create_global_log); \
3762 } >$(TEST_SUITE_LOG).tmp || exit 1; \
3763 mv $(TEST_SUITE_LOG).tmp $(TEST_SUITE_LOG); \
3764 if $$success; then \
3765 col="$$grn"; \
3766 else \
3767 col="$$red"; \
3768 test x"$$VERBOSE" = x || cat $(TEST_SUITE_LOG); \
3769 fi; \
3770 echo "$${col}$$br$${std}"; \
3771 echo "$${col}Testsuite summary for $(PACKAGE_STRING)$${std}"; \
3772 echo "$${col}$$br$${std}"; \
3773 create_testsuite_report --maybe-color; \
3774 echo "$$col$$br$$std"; \
3775 if $$success; then :; else \
3776 echo "$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}"; \
3777 if test -n "$(PACKAGE_BUGREPORT)"; then \
3778 echo "$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \
3779 fi; \
3780 echo "$$col$$br$$std"; \
3781 fi; \
3782 $$success || exit 1
3783
3784 check-TESTS:
3785 @list='$(RECHECK_LOGS)'; test -z "$$list" || rm -f $$list
3786 @list='$(RECHECK_LOGS:.log=.trs)'; test -z "$$list" || rm -f $$list
3787 @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
3788 @set +e; $(am__set_TESTS_bases); \
3789 log_list=`for i in $$bases; do echo $$i.log; done`; \
3790 trs_list=`for i in $$bases; do echo $$i.trs; done`; \
3791 log_list=`echo $$log_list`; trs_list=`echo $$trs_list`; \
3792 $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) TEST_LOGS="$$log_list"; \
3793 exit $$?;
3794 recheck: all $(check_PROGRAMS)
3795 @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
3796 @set +e; $(am__set_TESTS_bases); \
3797 bases=`for i in $$bases; do echo $$i; done \
3798 | $(am__list_recheck_tests)` || exit 1; \
3799 log_list=`for i in $$bases; do echo $$i.log; done`; \
3800 log_list=`echo $$log_list`; \
3801 $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) \
3802 am__force_recheck=am--force-recheck \
3803 TEST_LOGS="$$log_list"; \
3804 exit $$?
3805 testsuite/common/bits32m0.log: testsuite/common/bits32m0$(EXEEXT)
3806 @p='testsuite/common/bits32m0$(EXEEXT)'; \
3807 b='testsuite/common/bits32m0'; \
3808 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3809 --log-file $$b.log --trs-file $$b.trs \
3810 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3811 "$$tst" $(AM_TESTS_FD_REDIRECT)
3812 testsuite/common/bits32m31.log: testsuite/common/bits32m31$(EXEEXT)
3813 @p='testsuite/common/bits32m31$(EXEEXT)'; \
3814 b='testsuite/common/bits32m31'; \
3815 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3816 --log-file $$b.log --trs-file $$b.trs \
3817 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3818 "$$tst" $(AM_TESTS_FD_REDIRECT)
3819 testsuite/common/bits64m0.log: testsuite/common/bits64m0$(EXEEXT)
3820 @p='testsuite/common/bits64m0$(EXEEXT)'; \
3821 b='testsuite/common/bits64m0'; \
3822 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3823 --log-file $$b.log --trs-file $$b.trs \
3824 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3825 "$$tst" $(AM_TESTS_FD_REDIRECT)
3826 testsuite/common/bits64m63.log: testsuite/common/bits64m63$(EXEEXT)
3827 @p='testsuite/common/bits64m63$(EXEEXT)'; \
3828 b='testsuite/common/bits64m63'; \
3829 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3830 --log-file $$b.log --trs-file $$b.trs \
3831 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3832 "$$tst" $(AM_TESTS_FD_REDIRECT)
3833 testsuite/common/alu-tst.log: testsuite/common/alu-tst$(EXEEXT)
3834 @p='testsuite/common/alu-tst$(EXEEXT)'; \
3835 b='testsuite/common/alu-tst'; \
3836 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
3837 --log-file $$b.log --trs-file $$b.trs \
3838 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
3839 "$$tst" $(AM_TESTS_FD_REDIRECT)
3840 .test.log:
3841 @p='$<'; \
3842 $(am__set_b); \
3843 $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
3844 --log-file $$b.log --trs-file $$b.trs \
3845 $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
3846 "$$tst" $(AM_TESTS_FD_REDIRECT)
3847 @am__EXEEXT_TRUE@.test$(EXEEXT).log:
3848 @am__EXEEXT_TRUE@ @p='$<'; \
3849 @am__EXEEXT_TRUE@ $(am__set_b); \
3850 @am__EXEEXT_TRUE@ $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
3851 @am__EXEEXT_TRUE@ --log-file $$b.log --trs-file $$b.trs \
3852 @am__EXEEXT_TRUE@ $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
3853 @am__EXEEXT_TRUE@ "$$tst" $(AM_TESTS_FD_REDIRECT)
3854 check-am: all-am
3855 $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
3856 $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check-TESTS
3857 check: $(BUILT_SOURCES)
3858 $(MAKE) $(AM_MAKEFLAGS) check-recursive
3859 all-am: Makefile $(LIBRARIES) $(PROGRAMS) $(DATA) $(HEADERS) config.h
3860 installdirs: installdirs-recursive
3861 installdirs-am:
3862 for dir in "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \
3863 test -z "$$dir" || $(MKDIR_P) "$$dir"; \
3864 done
3865 install: $(BUILT_SOURCES)
3866 $(MAKE) $(AM_MAKEFLAGS) install-recursive
3867 install-exec: install-exec-recursive
3868 install-data: install-data-recursive
3869 uninstall: uninstall-recursive
3870
3871 install-am: all-am
3872 @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
3873
3874 installcheck: installcheck-recursive
3875 install-strip:
3876 if test -z '$(STRIP)'; then \
3877 $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
3878 install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
3879 install; \
3880 else \
3881 $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
3882 install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
3883 "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
3884 fi
3885 mostlyclean-generic:
3886 -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES)
3887 -test -z "$(TEST_LOGS)" || rm -f $(TEST_LOGS)
3888 -test -z "$(TEST_LOGS:.log=.trs)" || rm -f $(TEST_LOGS:.log=.trs)
3889 -test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
3890
3891 clean-generic:
3892 -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
3893
3894 distclean-generic:
3895 -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
3896 -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES)
3897 -rm -f aarch64/$(am__dirstamp)
3898 -rm -f arm/$(am__dirstamp)
3899 -rm -f avr/$(am__dirstamp)
3900 -rm -f bfin/$(am__dirstamp)
3901 -rm -f bpf/$(am__dirstamp)
3902 -rm -f common/$(DEPDIR)/$(am__dirstamp)
3903 -rm -f common/$(am__dirstamp)
3904 -rm -f cr16/$(DEPDIR)/$(am__dirstamp)
3905 -rm -f cr16/$(am__dirstamp)
3906 -rm -f cris/$(DEPDIR)/$(am__dirstamp)
3907 -rm -f cris/$(am__dirstamp)
3908 -rm -f d10v/$(DEPDIR)/$(am__dirstamp)
3909 -rm -f d10v/$(am__dirstamp)
3910 -rm -f erc32/$(DEPDIR)/$(am__dirstamp)
3911 -rm -f erc32/$(am__dirstamp)
3912 -rm -f example-synacor/$(am__dirstamp)
3913 -rm -f frv/$(am__dirstamp)
3914 -rm -f ft32/$(am__dirstamp)
3915 -rm -f h8300/$(am__dirstamp)
3916 -rm -f igen/$(DEPDIR)/$(am__dirstamp)
3917 -rm -f igen/$(am__dirstamp)
3918 -rm -f iq2000/$(am__dirstamp)
3919 -rm -f lm32/$(am__dirstamp)
3920 -rm -f m32c/$(DEPDIR)/$(am__dirstamp)
3921 -rm -f m32c/$(am__dirstamp)
3922 -rm -f m32r/$(am__dirstamp)
3923 -rm -f m68hc11/$(DEPDIR)/$(am__dirstamp)
3924 -rm -f m68hc11/$(am__dirstamp)
3925 -rm -f mcore/$(am__dirstamp)
3926 -rm -f microblaze/$(am__dirstamp)
3927 -rm -f mips/$(am__dirstamp)
3928 -rm -f mn10300/$(am__dirstamp)
3929 -rm -f moxie/$(am__dirstamp)
3930 -rm -f msp430/$(am__dirstamp)
3931 -rm -f or1k/$(am__dirstamp)
3932 -rm -f ppc/$(DEPDIR)/$(am__dirstamp)
3933 -rm -f ppc/$(am__dirstamp)
3934 -rm -f pru/$(am__dirstamp)
3935 -rm -f riscv/$(am__dirstamp)
3936 -rm -f rl78/$(am__dirstamp)
3937 -rm -f rx/$(am__dirstamp)
3938 -rm -f sh/$(DEPDIR)/$(am__dirstamp)
3939 -rm -f sh/$(am__dirstamp)
3940 -rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp)
3941 -rm -f testsuite/common/$(am__dirstamp)
3942 -rm -f v850/$(am__dirstamp)
3943 -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
3944
3945 maintainer-clean-generic:
3946 @echo "This command is intended for maintainers to use"
3947 @echo "it deletes files that may require special tools to rebuild."
3948 -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES)
3949 clean: clean-recursive
3950
3951 clean-am: clean-checkPROGRAMS clean-generic clean-libtool \
3952 clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
3953
3954 distclean: distclean-recursive
3955 -rm -f $(am__CONFIG_DISTCLEAN_FILES)
3956 -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
3957 -rm -f Makefile
3958 distclean-am: clean-am distclean-DEJAGNU distclean-compile \
3959 distclean-generic distclean-hdr distclean-libtool \
3960 distclean-tags
3961
3962 dvi: dvi-recursive
3963
3964 dvi-am:
3965
3966 html: html-recursive
3967
3968 html-am:
3969
3970 info: info-recursive
3971
3972 info-am:
3973
3974 install-data-am: install-armdocDATA install-data-local install-dtbDATA \
3975 install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
3976 install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
3977
3978 install-dvi: install-dvi-recursive
3979
3980 install-dvi-am:
3981
3982 install-exec-am: install-exec-local
3983
3984 install-html: install-html-recursive
3985
3986 install-html-am:
3987
3988 install-info: install-info-recursive
3989
3990 install-info-am:
3991
3992 install-man:
3993
3994 install-pdf: install-pdf-recursive
3995
3996 install-pdf-am:
3997
3998 install-ps: install-ps-recursive
3999
4000 install-ps-am:
4001
4002 installcheck-am:
4003
4004 maintainer-clean: maintainer-clean-recursive
4005 -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4006 -rm -rf $(top_srcdir)/autom4te.cache
4007 -rm -rf common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) igen/$(DEPDIR) m32c/$(DEPDIR) m68hc11/$(DEPDIR) ppc/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR)
4008 -rm -f Makefile
4009 maintainer-clean-am: distclean-am maintainer-clean-generic
4010
4011 mostlyclean: mostlyclean-recursive
4012
4013 mostlyclean-am: mostlyclean-compile mostlyclean-generic \
4014 mostlyclean-libtool
4015
4016 pdf: pdf-recursive
4017
4018 pdf-am:
4019
4020 ps: ps-recursive
4021
4022 ps-am:
4023
4024 uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \
4025 uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
4026 uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
4027 uninstall-ppcdocDATA uninstall-rxdocDATA
4028
4029 .MAKE: $(am__recursive_targets) all check check-am install install-am \
4030 install-strip
4031
4032 .PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
4033 am--refresh check check-DEJAGNU check-TESTS check-am clean \
4034 clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
4035 clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
4036 cscopelist-am ctags ctags-am distclean distclean-DEJAGNU \
4037 distclean-compile distclean-generic distclean-hdr \
4038 distclean-libtool distclean-tags dvi dvi-am html html-am info \
4039 info-am install install-am install-armdocDATA install-data \
4040 install-data-am install-data-local install-dtbDATA install-dvi \
4041 install-dvi-am install-erc32docDATA install-exec \
4042 install-exec-am install-exec-local install-frvdocDATA \
4043 install-html install-html-am install-info install-info-am \
4044 install-man install-or1kdocDATA install-pdf install-pdf-am \
4045 install-pkgincludeHEADERS install-ppcdocDATA install-ps \
4046 install-ps-am install-rxdocDATA install-strip installcheck \
4047 installcheck-am installdirs installdirs-am maintainer-clean \
4048 maintainer-clean-generic mostlyclean mostlyclean-compile \
4049 mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
4050 recheck tags tags-am uninstall uninstall-am \
4051 uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
4052 uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
4053 uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
4054 uninstall-rxdocDATA
4055
4056 .PRECIOUS: Makefile
4057
4058 @am__include@ @am__quote@$(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc@am__quote@
4059
4060 # Generate target constants for newlib/libgloss from its source tree.
4061 # This file is shipped with distributions so we build in the source dir.
4062 # Use `make nltvals' to rebuild.
4063 .PHONY: nltvals
4064 nltvals:
4065 $(srccom)/gennltvals.py --cpp "$(CPP)"
4066
4067 common/version.c: common/version.c-stamp ; @true
4068 common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
4069 $(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp
4070 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=)
4071 $(AM_V_at)touch $@
4072
4073 # FIXME This is one very simple-minded way of generating the file hw-config.h.
4074 %/hw-config.h: %/stamp-hw ; @true
4075 %/stamp-hw: Makefile
4076 $(AM_V_GEN)set -e; \
4077 ( \
4078 sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
4079 echo "/* generated by Makefile */" ; \
4080 printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
4081 echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
4082 printf " dv_%s_descriptor,\n" $$sim_hw ; \
4083 echo " NULL," ; \
4084 echo "};" \
4085 ) > $@.tmp; \
4086 $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
4087 touch $@
4088 .PRECIOUS: %/stamp-hw
4089 %/modules.c:
4090 $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) GEN_MODULES_C_SRCS="$(GEN_MODULES_C_SRCS)" -C $(@D) $(@F)
4091
4092 # Alias for developers.
4093 @SIM_ENABLE_IGEN_TRUE@igen: $(IGEN)
4094
4095 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4096 @SIM_ENABLE_IGEN_TRUE@igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
4097 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_at)-rm -f $@
4098 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
4099 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_at)$(RANLIB_FOR_BUILD) $@
4100
4101 @SIM_ENABLE_IGEN_TRUE@igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
4102 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD)
4103
4104 # igen is a build-time only tool. Override the default rules for it.
4105 @SIM_ENABLE_IGEN_TRUE@igen/%.o: igen/%.c
4106 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4107
4108 # Build some of the files in standalone mode for developers of igen itself.
4109 @SIM_ENABLE_IGEN_TRUE@igen/%-main.o: igen/%.c
4110 @SIM_ENABLE_IGEN_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@
4111
4112 site-sim-config.exp: Makefile
4113 $(AM_V_GEN)( \
4114 echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
4115 echo "set builddir \"$(builddir)\""; \
4116 echo "set srcdir \"$(srcdir)/testsuite\""; \
4117 $(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \
4118 ) > $@
4119
4120 # Ignore dirs that only contain configuration settings.
4121 check/./config/%.exp: ; @true
4122 check/config/%.exp: ; @true
4123 check/./lib/%.exp: ; @true
4124 check/lib/%.exp: ; @true
4125
4126 check/%.exp:
4127 $(AM_V_at)mkdir -p testsuite/$*
4128 $(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp
4129
4130 check-DEJAGNU-parallel:
4131 $(AM_V_at)( \
4132 set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
4133 $(MAKE) -k `printf 'check/%s.exp ' $$@`; \
4134 ret=$$?; \
4135 set -- `printf 'testsuite/%s/ ' $$@`; \
4136 $(SHELL) $(srcroot)/contrib/dg-extract-results.sh \
4137 `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \
4138 $(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \
4139 `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \
4140 echo; \
4141 $(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \
4142 exit $$ret)
4143
4144 check-DEJAGNU-single:
4145 $(AM_V_RUNTEST)$(DO_RUNTEST)
4146
4147 # If running a single job, invoking runtest once is faster & has nicer output.
4148 check-DEJAGNU: site.exp
4149 $(AM_V_at)(set -e; \
4150 EXPECT=${EXPECT} ; export EXPECT ; \
4151 runtest=$(RUNTEST); \
4152 if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
4153 case "$(MAKEFLAGS)" in \
4154 *-j*) $(MAKE) check-DEJAGNU-parallel;; \
4155 *) $(MAKE) check-DEJAGNU-single;; \
4156 esac; \
4157 else \
4158 echo "WARNING: could not find \`runtest'" 1>&2; :;\
4159 fi)
4160
4161 # These tests are build-time only tools. Override the default rules for them.
4162 testsuite/common/%.o: testsuite/common/%.c
4163 $(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@
4164
4165 testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4166 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD)
4167
4168 testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4169 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD)
4170
4171 testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4172 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD)
4173
4174 testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4175 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD)
4176
4177 testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4178 $(AM_V_GEN)$< 32 0 big > $@.tmp
4179 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4180 $(AM_V_at)mv $@.tmp $@
4181
4182 testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4183 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD)
4184
4185 testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4186 $(AM_V_GEN)$< 32 31 little > $@.tmp
4187 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4188 $(AM_V_at)mv $@.tmp $@
4189
4190 testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4191 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD)
4192
4193 testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4194 $(AM_V_GEN)$< 64 0 big > $@.tmp
4195 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4196 $(AM_V_at)mv $@.tmp $@
4197
4198 testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4199 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)
4200
4201 testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
4202 $(AM_V_GEN)$< 64 63 little > $@.tmp
4203 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4204 $(AM_V_at)mv $@.tmp $@
4205 @SIM_ENABLE_ARCH_aarch64_TRUE@$(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD): aarch64/hw-config.h
4206
4207 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: aarch64/%.c
4208 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4209
4210 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: common/%.c
4211 @SIM_ENABLE_ARCH_aarch64_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4212 @SIM_ENABLE_ARCH_arm_TRUE@$(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD): arm/hw-config.h
4213
4214 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: arm/%.c
4215 @SIM_ENABLE_ARCH_arm_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4216
4217 @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c
4218 @SIM_ENABLE_ARCH_arm_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4219 @SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h
4220
4221 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: avr/%.c
4222 @SIM_ENABLE_ARCH_avr_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4223
4224 @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c
4225 @SIM_ENABLE_ARCH_avr_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4226 @SIM_ENABLE_ARCH_bfin_TRUE@$(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD): bfin/hw-config.h
4227
4228 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: bfin/%.c
4229 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4230
4231 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: common/%.c
4232 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4233
4234 @SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp)
4235 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o
4236 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)(\
4237 @SIM_ENABLE_ARCH_bfin_TRUE@ set -e; \
4238 @SIM_ENABLE_ARCH_bfin_TRUE@ echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \
4239 @SIM_ENABLE_ARCH_bfin_TRUE@ echo "static const unsigned char bfin_linux_fixed_code[] ="; \
4240 @SIM_ENABLE_ARCH_bfin_TRUE@ echo "{"; \
4241 @SIM_ENABLE_ARCH_bfin_TRUE@ $(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \
4242 @SIM_ENABLE_ARCH_bfin_TRUE@ sed -n \
4243 @SIM_ENABLE_ARCH_bfin_TRUE@ -e 's:^[^ ]* :0x:' \
4244 @SIM_ENABLE_ARCH_bfin_TRUE@ -e '/^0x/{s: .*::;s: *$$:,:;s: :, 0x:g;p;}' \
4245 @SIM_ENABLE_ARCH_bfin_TRUE@ $@.dis; \
4246 @SIM_ENABLE_ARCH_bfin_TRUE@ rm -f $@.dis; \
4247 @SIM_ENABLE_ARCH_bfin_TRUE@ echo "};" \
4248 @SIM_ENABLE_ARCH_bfin_TRUE@ ) > $@.tmp
4249 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h
4250 @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h
4251 @SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h
4252
4253 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: bpf/%.c
4254 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4255
4256 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c
4257 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4258 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS)
4259
4260 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
4261 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
4262 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4263 @SIM_ENABLE_ARCH_bpf_TRUE@ -mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
4264 @SIM_ENABLE_ARCH_bpf_TRUE@ -infile $(srcdir)/bpf/mloop.in \
4265 @SIM_ENABLE_ARCH_bpf_TRUE@ -outfile-prefix bpf/ -outfile-suffix -le
4266 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
4267 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
4268 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)touch $@
4269
4270 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
4271 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
4272 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4273 @SIM_ENABLE_ARCH_bpf_TRUE@ -mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
4274 @SIM_ENABLE_ARCH_bpf_TRUE@ -infile $(srcdir)/bpf/mloop.in \
4275 @SIM_ENABLE_ARCH_bpf_TRUE@ -outfile-prefix bpf/ -outfile-suffix -be
4276 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
4277 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
4278 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)touch $@
4279
4280 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen: bpf/cgen-arch bpf/cgen-cpu bpf/cgen-defs-le bpf/cgen-defs-be bpf/cgen-decode-le bpf/cgen-decode-be
4281
4282 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-arch:
4283 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)mach=bpf cpu=bpfbf FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4284 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/arch.h bpf/arch.c bpf/cpuall.h: @CGEN_MAINT@ bpf/cgen-arch
4285
4286 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-cpu:
4287 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf FLAGS="with-multiple-isa with-scache"; $(CGEN_GEN_CPU)
4288 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)rm -f $(srcdir)/bpf/model.c
4289 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cpu.h bpf/cpu.c bpf/model.c: @CGEN_MAINT@ bpf/cgen-cpu
4290
4291 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-le:
4292 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le"; $(CGEN_GEN_DEFS)
4293 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-le.h: @CGEN_MAINT@ bpf/cgen-defs-le
4294
4295 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-be:
4296 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be"; $(CGEN_GEN_DEFS)
4297 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-be.h: @CGEN_MAINT@ bpf/cgen-defs-be
4298
4299 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-le:
4300 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4301 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-le.c bpf/decode-le.c bpf/decode-le.h: @CGEN_MAINT@ bpf/cgen-decode-vle
4302
4303 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-be:
4304 @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
4305 @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @CGEN_MAINT@ bpf/cgen-decode-be
4306 @SIM_ENABLE_ARCH_cr16_TRUE@$(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD): cr16/hw-config.h
4307
4308 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: cr16/%.c
4309 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4310
4311 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: common/%.c
4312 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4313 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS)
4314
4315 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4316 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
4317 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)
4318
4319 # gencode is a build-time only tool. Override the default rules for it.
4320 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
4321 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4322 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
4323 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4324
4325 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
4326 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< -h >$@
4327
4328 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
4329 @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< >$@
4330 @SIM_ENABLE_ARCH_cris_TRUE@$(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD): cris/hw-config.h
4331
4332 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: cris/%.c
4333 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4334
4335 @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c
4336 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4337 @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
4338
4339 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
4340 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
4341 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4342 @SIM_ENABLE_ARCH_cris_TRUE@ -mono -no-fast -pbb -switch semcrisv10f-switch.c \
4343 @SIM_ENABLE_ARCH_cris_TRUE@ -cpu crisv10f \
4344 @SIM_ENABLE_ARCH_cris_TRUE@ -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
4345 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
4346 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
4347 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)touch $@
4348
4349 @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
4350 @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
4351 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4352 @SIM_ENABLE_ARCH_cris_TRUE@ -mono -no-fast -pbb -switch semcrisv32f-switch.c \
4353 @SIM_ENABLE_ARCH_cris_TRUE@ -cpu crisv32f \
4354 @SIM_ENABLE_ARCH_cris_TRUE@ -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
4355 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
4356 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
4357 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)touch $@
4358
4359 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen: cris/cgen-arch cris/cgen-cpu-decode-v10f cris/cgen-cpu-decode-v32f
4360
4361 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-arch:
4362 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4363 @SIM_ENABLE_ARCH_cris_TRUE@cris/arch.h cris/arch.c cris/cpuall.h: @CGEN_MAINT@ cris/cgen-arch
4364
4365 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v10f:
4366 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4367 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv10-switch.c $(srcdir)/cris/semcrisv10f-switch.c
4368 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv10.h cris/cpuv10.c cris/semcrisv10f-switch.c cris/modelv10.c cris/decodev10.c cris/decodev10.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v10f
4369
4370 @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v32f:
4371 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4372 @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c
4373 @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-switch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f
4374 @SIM_ENABLE_ARCH_d10v_TRUE@$(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD): d10v/hw-config.h
4375
4376 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: d10v/%.c
4377 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4378
4379 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: common/%.c
4380 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4381 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS)
4382
4383 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4384 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
4385 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)
4386
4387 # gencode is a build-time only tool. Override the default rules for it.
4388 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
4389 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4390 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
4391 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4392
4393 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
4394 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< -h >$@
4395
4396 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
4397 @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< >$@
4398 @SIM_ENABLE_ARCH_erc32_TRUE@$(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD): erc32/hw-config.h
4399
4400 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: erc32/%.c
4401 @SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4402
4403 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: common/%.c
4404 @SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4405
4406 @SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
4407 @SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
4408 @SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
4409 @SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
4410 @SIM_ENABLE_ARCH_erc32_TRUE@ n=`echo sis | sed '$(program_transform_name)'`; \
4411 @SIM_ENABLE_ARCH_erc32_TRUE@ $(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
4412 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
4413 @SIM_ENABLE_ARCH_erc32_TRUE@ rm -f $(DESTDIR)$(bindir)/sis
4414 @SIM_ENABLE_ARCH_examples_TRUE@$(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD): example-synacor/hw-config.h
4415
4416 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: example-synacor/%.c
4417 @SIM_ENABLE_ARCH_examples_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4418
4419 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: common/%.c
4420 @SIM_ENABLE_ARCH_examples_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4421 @SIM_ENABLE_ARCH_frv_TRUE@$(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD): frv/hw-config.h
4422
4423 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: frv/%.c
4424 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4425
4426 @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: common/%.c
4427 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4428 @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS)
4429
4430 @SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
4431 @SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
4432 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4433 @SIM_ENABLE_ARCH_frv_TRUE@ -mono -scache -parallel-generic-write -parallel-only \
4434 @SIM_ENABLE_ARCH_frv_TRUE@ -cpu frvbf \
4435 @SIM_ENABLE_ARCH_frv_TRUE@ -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
4436 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
4437 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
4438 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)touch $@
4439
4440 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen: frv/cgen-arch frv/cgen-cpu-decode
4441
4442 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-arch:
4443 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4444 @SIM_ENABLE_ARCH_frv_TRUE@frv/arch.h frv/arch.c frv/cpuall.h: @CGEN_MAINT@ frv/cgen-arch
4445
4446 @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode:
4447 @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE)
4448 @SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode
4449 @SIM_ENABLE_ARCH_ft32_TRUE@$(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD): ft32/hw-config.h
4450
4451 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: ft32/%.c
4452 @SIM_ENABLE_ARCH_ft32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4453
4454 @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: common/%.c
4455 @SIM_ENABLE_ARCH_ft32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4456 @SIM_ENABLE_ARCH_h8300_TRUE@$(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD): h8300/hw-config.h
4457
4458 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: h8300/%.c
4459 @SIM_ENABLE_ARCH_h8300_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4460
4461 @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: common/%.c
4462 @SIM_ENABLE_ARCH_h8300_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4463 @SIM_ENABLE_ARCH_iq2000_TRUE@$(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD): iq2000/hw-config.h
4464
4465 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: iq2000/%.c
4466 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4467
4468 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: common/%.c
4469 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4470 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS)
4471
4472 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
4473 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
4474 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4475 @SIM_ENABLE_ARCH_iq2000_TRUE@ -mono -fast -pbb -switch sem-switch.c \
4476 @SIM_ENABLE_ARCH_iq2000_TRUE@ -cpu iq2000bf \
4477 @SIM_ENABLE_ARCH_iq2000_TRUE@ -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
4478 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
4479 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
4480 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)touch $@
4481
4482 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode
4483
4484 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch:
4485 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4486 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/arch.h iq2000/arch.c iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch
4487
4488 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode:
4489 @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4490 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode
4491 @SIM_ENABLE_ARCH_lm32_TRUE@$(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD): lm32/hw-config.h
4492
4493 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: lm32/%.c
4494 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4495
4496 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: common/%.c
4497 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4498 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS)
4499
4500 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
4501 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
4502 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4503 @SIM_ENABLE_ARCH_lm32_TRUE@ -mono -fast -pbb -switch sem-switch.c \
4504 @SIM_ENABLE_ARCH_lm32_TRUE@ -cpu lm32bf \
4505 @SIM_ENABLE_ARCH_lm32_TRUE@ -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
4506 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
4507 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
4508 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)touch $@
4509
4510 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode
4511
4512 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch:
4513 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4514 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/arch.h lm32/arch.c lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch
4515
4516 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode:
4517 @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4518 @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode
4519 @SIM_ENABLE_ARCH_m32c_TRUE@$(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD): m32c/hw-config.h
4520
4521 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: m32c/%.c
4522 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4523
4524 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: common/%.c
4525 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4526 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS)
4527
4528 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4529 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
4530 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)
4531
4532 # opc2c is a build-time only tool. Override the default rules for it.
4533 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
4534 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4535
4536 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
4537 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
4538 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@
4539
4540 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
4541 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
4542 @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@
4543 @SIM_ENABLE_ARCH_m32r_TRUE@$(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD): m32r/hw-config.h
4544
4545 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: m32r/%.c
4546 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4547
4548 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: common/%.c
4549 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4550 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS)
4551
4552 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
4553 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
4554 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4555 @SIM_ENABLE_ARCH_m32r_TRUE@ -mono -fast -pbb -switch sem-switch.c \
4556 @SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rbf \
4557 @SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
4558 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
4559 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
4560 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
4561
4562 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop ; @true
4563 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
4564 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4565 @SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
4566 @SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rxf \
4567 @SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
4568 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
4569 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
4570 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
4571
4572 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop ; @true
4573 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
4574 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4575 @SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
4576 @SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32r2f \
4577 @SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
4578 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
4579 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
4580 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
4581
4582 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2
4583
4584 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch:
4585 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
4586 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/arch.h m32r/arch.c m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch
4587
4588 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode:
4589 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4590 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu.h m32r/sem.c m32r/sem-switch.c m32r/model.c m32r/decode.c m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode
4591
4592 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x:
4593 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4594 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpux.h m32r/semx-switch.c m32r/modelx.c m32r/decodex.c m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x
4595
4596 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2:
4597 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4598 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2
4599 @SIM_ENABLE_ARCH_m68hc11_TRUE@$(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD): m68hc11/hw-config.h
4600
4601 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: m68hc11/%.c
4602 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4603
4604 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: common/%.c
4605 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4606 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
4607
4608 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4609 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
4610 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)
4611
4612 # gencode is a build-time only tool. Override the default rules for it.
4613 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
4614 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4615
4616 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
4617 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6811 >$@
4618
4619 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
4620 @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6812 >$@
4621 @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS)
4622
4623 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
4624 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single
4625 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16
4626 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32
4627 @SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run
4628
4629 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
4630 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4631 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
4632 @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
4633 @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
4634 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
4635 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnowidth \
4636 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnounimplemented \
4637 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
4638 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
4639 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
4640 @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
4641 @SIM_ENABLE_ARCH_mips_TRUE@ -n itable.h -ht mips/itable.h \
4642 @SIM_ENABLE_ARCH_mips_TRUE@ -n itable.c -t mips/itable.c
4643 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4644
4645 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
4646 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4647 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
4648 @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
4649 @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
4650 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
4651 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_SINGLE_FLAGS) \
4652 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
4653 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
4654 @SIM_ENABLE_ARCH_mips_TRUE@ -B 32 \
4655 @SIM_ENABLE_ARCH_mips_TRUE@ -H 31 \
4656 @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
4657 @SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_IGEN_DC) \
4658 @SIM_ENABLE_ARCH_mips_TRUE@ -x \
4659 @SIM_ENABLE_ARCH_mips_TRUE@ -n icache.h -hc mips/icache.h \
4660 @SIM_ENABLE_ARCH_mips_TRUE@ -n icache.c -c mips/icache.c \
4661 @SIM_ENABLE_ARCH_mips_TRUE@ -n semantics.h -hs mips/semantics.h \
4662 @SIM_ENABLE_ARCH_mips_TRUE@ -n semantics.c -s mips/semantics.c \
4663 @SIM_ENABLE_ARCH_mips_TRUE@ -n idecode.h -hd mips/idecode.h \
4664 @SIM_ENABLE_ARCH_mips_TRUE@ -n idecode.c -d mips/idecode.c \
4665 @SIM_ENABLE_ARCH_mips_TRUE@ -n model.h -hm mips/model.h \
4666 @SIM_ENABLE_ARCH_mips_TRUE@ -n model.c -m mips/model.c \
4667 @SIM_ENABLE_ARCH_mips_TRUE@ -n support.h -hf mips/support.h \
4668 @SIM_ENABLE_ARCH_mips_TRUE@ -n support.c -f mips/support.c \
4669 @SIM_ENABLE_ARCH_mips_TRUE@ -n engine.h -he mips/engine.h \
4670 @SIM_ENABLE_ARCH_mips_TRUE@ -n engine.c -e mips/engine.c \
4671 @SIM_ENABLE_ARCH_mips_TRUE@ -n irun.c -r mips/irun.c
4672 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4673
4674 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m16: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_M16_DC) $(IGEN)
4675 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4676 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
4677 @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
4678 @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
4679 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
4680 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_M16_FLAGS) \
4681 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
4682 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
4683 @SIM_ENABLE_ARCH_mips_TRUE@ -B 16 \
4684 @SIM_ENABLE_ARCH_mips_TRUE@ -H 15 \
4685 @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
4686 @SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_M16_DC) \
4687 @SIM_ENABLE_ARCH_mips_TRUE@ -P m16_ \
4688 @SIM_ENABLE_ARCH_mips_TRUE@ -x \
4689 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_icache.h -hc mips/m16_icache.h \
4690 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_icache.c -c mips/m16_icache.c \
4691 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_semantics.h -hs mips/m16_semantics.h \
4692 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_semantics.c -s mips/m16_semantics.c \
4693 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_idecode.h -hd mips/m16_idecode.h \
4694 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_idecode.c -d mips/m16_idecode.c \
4695 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_model.h -hm mips/m16_model.h \
4696 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_model.c -m mips/m16_model.c \
4697 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_support.h -hf mips/m16_support.h \
4698 @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_support.c -f mips/m16_support.c
4699 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4700
4701 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m32: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
4702 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4703 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
4704 @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
4705 @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
4706 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
4707 @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_SINGLE_FLAGS) \
4708 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
4709 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
4710 @SIM_ENABLE_ARCH_mips_TRUE@ -B 32 \
4711 @SIM_ENABLE_ARCH_mips_TRUE@ -H 31 \
4712 @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
4713 @SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_IGEN_DC) \
4714 @SIM_ENABLE_ARCH_mips_TRUE@ -P m32_ \
4715 @SIM_ENABLE_ARCH_mips_TRUE@ -x \
4716 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_icache.h -hc mips/m32_icache.h \
4717 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_icache.c -c mips/m32_icache.c \
4718 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_semantics.h -hs mips/m32_semantics.h \
4719 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_semantics.c -s mips/m32_semantics.c \
4720 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_idecode.h -hd mips/m32_idecode.h \
4721 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_idecode.c -d mips/m32_idecode.c \
4722 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_model.h -hm mips/m32_model.h \
4723 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_model.c -m mips/m32_model.c \
4724 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_support.h -hf mips/m32_support.h \
4725 @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_support.c -f mips/m32_support.c
4726 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4727
4728 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN)
4729 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)\
4730 @SIM_ENABLE_ARCH_mips_TRUE@ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
4731 @SIM_ENABLE_ARCH_mips_TRUE@ p=`echo $${t} | sed -e 's/:.*//'` ; \
4732 @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
4733 @SIM_ENABLE_ARCH_mips_TRUE@ f=`echo $${t} | sed -e 's/.*://'` ; \
4734 @SIM_ENABLE_ARCH_mips_TRUE@ case $${p} in \
4735 @SIM_ENABLE_ARCH_mips_TRUE@ micromips16*) \
4736 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
4737 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32* | micromips64*) \
4738 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
4739 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m32*) \
4740 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
4741 @SIM_ENABLE_ARCH_mips_TRUE@ m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
4742 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m64*) \
4743 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
4744 @SIM_ENABLE_ARCH_mips_TRUE@ m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
4745 @SIM_ENABLE_ARCH_mips_TRUE@ m16*) \
4746 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
4747 @SIM_ENABLE_ARCH_mips_TRUE@ *) \
4748 @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
4749 @SIM_ENABLE_ARCH_mips_TRUE@ esac; \
4750 @SIM_ENABLE_ARCH_mips_TRUE@ $(IGEN_RUN) \
4751 @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
4752 @SIM_ENABLE_ARCH_mips_TRUE@ $${e} \
4753 @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
4754 @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
4755 @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
4756 @SIM_ENABLE_ARCH_mips_TRUE@ -M $${m} \
4757 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
4758 @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
4759 @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
4760 @SIM_ENABLE_ARCH_mips_TRUE@ -P $${p}_ \
4761 @SIM_ENABLE_ARCH_mips_TRUE@ -x \
4762 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_icache.h -hc mips/$${p}_icache.h \
4763 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_icache.c -c mips/$${p}_icache.c \
4764 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_semantics.h -hs mips/$${p}_semantics.h \
4765 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_semantics.c -s mips/$${p}_semantics.c \
4766 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_idecode.h -hd mips/$${p}_idecode.h \
4767 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_idecode.c -d mips/$${p}_idecode.c \
4768 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_model.h -hm mips/$${p}_model.h \
4769 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_model.c -m mips/$${p}_model.c \
4770 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_support.h -hf mips/$${p}_support.h \
4771 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_support.c -f mips/$${p}_support.c \
4772 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_engine.h -he mips/$${p}_engine.h \
4773 @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_engine.c -e mips/$${p}_engine.c \
4774 @SIM_ENABLE_ARCH_mips_TRUE@ || exit; \
4775 @SIM_ENABLE_ARCH_mips_TRUE@ done
4776 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4777
4778 @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c
4779 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)\
4780 @SIM_ENABLE_ARCH_mips_TRUE@ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
4781 @SIM_ENABLE_ARCH_mips_TRUE@ case $${t} in \
4782 @SIM_ENABLE_ARCH_mips_TRUE@ m16*) \
4783 @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
4784 @SIM_ENABLE_ARCH_mips_TRUE@ o=mips/m16$${m}_run.c; \
4785 @SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/m16run.c > $$o.tmp \
4786 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/m16$${m}_/" \
4787 @SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/m16$${m}_engine/" \
4788 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m16_/m16$${m}_/" \
4789 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m32$${m}_/" \
4790 @SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
4791 @SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
4792 @SIM_ENABLE_ARCH_mips_TRUE@ ;;\
4793 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32*) \
4794 @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
4795 @SIM_ENABLE_ARCH_mips_TRUE@ o=mips/micromips$${m}_run.c; \
4796 @SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
4797 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/micromips32$${m}_/" \
4798 @SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/micromips32$${m}_engine/" \
4799 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips16_/micromips16$${m}_/" \
4800 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips32_/micromips32$${m}_/" \
4801 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m32$${m}_/" \
4802 @SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
4803 @SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
4804 @SIM_ENABLE_ARCH_mips_TRUE@ ;;\
4805 @SIM_ENABLE_ARCH_mips_TRUE@ micromips64*) \
4806 @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
4807 @SIM_ENABLE_ARCH_mips_TRUE@ o=mips/micromips$${m}_run.c; \
4808 @SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
4809 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/micromips64$${m}_/" \
4810 @SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/micromips64$${m}_engine/" \
4811 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips16_/micromips16$${m}_/" \
4812 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips32_/micromips64$${m}_/" \
4813 @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m64$${m}_/" \
4814 @SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
4815 @SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
4816 @SIM_ENABLE_ARCH_mips_TRUE@ ;;\
4817 @SIM_ENABLE_ARCH_mips_TRUE@ esac \
4818 @SIM_ENABLE_ARCH_mips_TRUE@ done
4819 @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4820 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS)
4821
4822 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
4823 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
4824 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4825 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_IGEN_TRACE) \
4826 @SIM_ENABLE_ARCH_mn10300_TRUE@ -G gen-direct-access \
4827 @SIM_ENABLE_ARCH_mn10300_TRUE@ -M mn10300,am33 -G gen-multi-sim=am33 \
4828 @SIM_ENABLE_ARCH_mn10300_TRUE@ -M am33_2 \
4829 @SIM_ENABLE_ARCH_mn10300_TRUE@ -I $(srcdir)/mn10300 \
4830 @SIM_ENABLE_ARCH_mn10300_TRUE@ -i $(mn10300_IGEN_INSN) \
4831 @SIM_ENABLE_ARCH_mn10300_TRUE@ -o $(mn10300_IGEN_DC) \
4832 @SIM_ENABLE_ARCH_mn10300_TRUE@ -x \
4833 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.h -hc mn10300/icache.h \
4834 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.c -c mn10300/icache.c \
4835 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.h -hs mn10300/semantics.h \
4836 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.c -s mn10300/semantics.c \
4837 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.h -hd mn10300/idecode.h \
4838 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.c -d mn10300/idecode.c \
4839 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.h -hm mn10300/model.h \
4840 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.c -m mn10300/model.c \
4841 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.h -hf mn10300/support.h \
4842 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.c -f mn10300/support.c \
4843 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.h -ht mn10300/itable.h \
4844 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.c -t mn10300/itable.c \
4845 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.h -he mn10300/engine.h \
4846 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.c -e mn10300/engine.c \
4847 @SIM_ENABLE_ARCH_mn10300_TRUE@ -n irun.c -r mn10300/irun.c
4848 @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)touch $@
4849
4850 @SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
4851 @SIM_ENABLE_ARCH_moxie_TRUE@ $(AM_V_GEN) \
4852 @SIM_ENABLE_ARCH_moxie_TRUE@ if test "x$(DTC)" != x; then \
4853 @SIM_ENABLE_ARCH_moxie_TRUE@ $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
4854 @SIM_ENABLE_ARCH_moxie_TRUE@ $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
4855 @SIM_ENABLE_ARCH_moxie_TRUE@ touch ${srcdir}/moxie/moxie-gdb.dtb; \
4856 @SIM_ENABLE_ARCH_moxie_TRUE@ else \
4857 @SIM_ENABLE_ARCH_moxie_TRUE@ echo "Could not update the moxie-gdb.dtb file because the device "; \
4858 @SIM_ENABLE_ARCH_moxie_TRUE@ echo "tree compiler tool (dtc) is missing. Install the tool to "; \
4859 @SIM_ENABLE_ARCH_moxie_TRUE@ echo "update the device tree blob."; \
4860 @SIM_ENABLE_ARCH_moxie_TRUE@ fi
4861 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS)
4862
4863 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
4864 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
4865 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
4866 @SIM_ENABLE_ARCH_or1k_TRUE@ -mono -fast -pbb -switch sem-switch.c \
4867 @SIM_ENABLE_ARCH_or1k_TRUE@ -cpu or1k32bf \
4868 @SIM_ENABLE_ARCH_or1k_TRUE@ -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
4869 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
4870 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
4871 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)touch $@
4872
4873 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode
4874
4875 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch:
4876 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH)
4877 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/arch.h or1k/arch.c or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch
4878
4879 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode:
4880 @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
4881 @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cpu.h or1k/cpu.c or1k/model.c or1k/sem.c or1k/sem-switch.c or1k/decode.c or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode
4882
4883 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/psim$(EXEEXT): ppc/run$(EXEEXT)
4884 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
4885
4886 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
4887 @SIM_ENABLE_ARCH_ppc_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4888
4889 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
4890 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp
4891 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
4892 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)touch $(srcdir)/ppc/spreg.c
4893
4894 @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
4895 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp
4896 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
4897 @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)touch $(srcdir)/ppc/spreg.h
4898
4899 @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: rl78/%.c | rl78/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
4900 @SIM_ENABLE_ARCH_rl78_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4901
4902 @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: rx/%.c | rx/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
4903 @SIM_ENABLE_ARCH_rx_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4904 @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS)
4905
4906 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4907 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
4908 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)
4909
4910 # gencode is a build-time only tool. Override the default rules for it.
4911 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
4912 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
4913
4914 @SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
4915 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -x >$@
4916
4917 @SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
4918 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -p >$@
4919
4920 @SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
4921 @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -s >$@
4922 @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS)
4923
4924 @SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
4925 @SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
4926 @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
4927 @SIM_ENABLE_ARCH_v850_TRUE@ $(v850_IGEN_TRACE) \
4928 @SIM_ENABLE_ARCH_v850_TRUE@ -G gen-direct-access \
4929 @SIM_ENABLE_ARCH_v850_TRUE@ -G gen-zero-r0 \
4930 @SIM_ENABLE_ARCH_v850_TRUE@ -i $(v850_IGEN_INSN) \
4931 @SIM_ENABLE_ARCH_v850_TRUE@ -o $(v850_IGEN_DC) \
4932 @SIM_ENABLE_ARCH_v850_TRUE@ -x \
4933 @SIM_ENABLE_ARCH_v850_TRUE@ -n icache.h -hc v850/icache.h \
4934 @SIM_ENABLE_ARCH_v850_TRUE@ -n icache.c -c v850/icache.c \
4935 @SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.h -hs v850/semantics.h \
4936 @SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.c -s v850/semantics.c \
4937 @SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.h -hd v850/idecode.h \
4938 @SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.c -d v850/idecode.c \
4939 @SIM_ENABLE_ARCH_v850_TRUE@ -n model.h -hm v850/model.h \
4940 @SIM_ENABLE_ARCH_v850_TRUE@ -n model.c -m v850/model.c \
4941 @SIM_ENABLE_ARCH_v850_TRUE@ -n support.h -hf v850/support.h \
4942 @SIM_ENABLE_ARCH_v850_TRUE@ -n support.c -f v850/support.c \
4943 @SIM_ENABLE_ARCH_v850_TRUE@ -n itable.h -ht v850/itable.h \
4944 @SIM_ENABLE_ARCH_v850_TRUE@ -n itable.c -t v850/itable.c \
4945 @SIM_ENABLE_ARCH_v850_TRUE@ -n engine.h -he v850/engine.h \
4946 @SIM_ENABLE_ARCH_v850_TRUE@ -n engine.c -e v850/engine.c \
4947 @SIM_ENABLE_ARCH_v850_TRUE@ -n irun.c -r v850/irun.c
4948 @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)touch $@
4949
4950 %/libsim.a: | $(SIM_ALL_RECURSIVE_DEPS)
4951 $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4952
4953 %/nrun.o: common/nrun.c | %/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
4954 $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
4955
4956 all-recursive: $(SIM_ALL_RECURSIVE_DEPS)
4957
4958 install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
4959 $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
4960 lib=`echo sim | sed '$(program_transform_name)'`; \
4961 for d in $(SIM_ENABLED_ARCHES); do \
4962 n="$$lib"; \
4963 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
4964 n="lib$$n.a"; \
4965 $(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
4966 done
4967
4968 install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
4969 $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
4970 run=`echo run | sed '$(program_transform_name)'`; \
4971 for d in $(SIM_ENABLED_ARCHES); do \
4972 n="$$run"; \
4973 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
4974 $(LIBTOOL) --mode=install \
4975 $(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
4976 done
4977
4978 uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
4979 rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
4980 for d in $(SIM_ENABLED_ARCHES); do \
4981 rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
4982 done
4983
4984 # Tell versions [3.59,3.63) of GNU make to not export all variables.
4985 # Otherwise a system limit (for SysV at least) may be exceeded.
4986 .NOEXPORT: