1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
4 # Copyright (C) 1994-2017 Free Software Foundation, Inc.
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12 # even the implied warranty of MERCHANTABILITY or FITNESS FOR A
17 # Copyright (C) 1993-2023 Free Software Foundation, Inc.
19 # This program is free software; you can redistribute it and/or modify
20 # it under the terms of the GNU General Public License as published by
21 # the Free Software Foundation; either version 3 of the License, or
22 # (at your option) any later version.
24 # This program is distributed in the hope that it will be useful,
25 # but WITHOUT ANY WARRANTY; without even the implied warranty of
26 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 # GNU General Public License for more details.
29 # You should have received a copy of the GNU General Public License
30 # along with this program. If not, see <http://www.gnu.org/licenses/>.
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160 @SIM_ENABLE_ARCH_bpf_TRUE@am__append_21
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161 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_22
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162 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_23
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165 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_26
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167 @SIM_ENABLE_ARCH_cris_TRUE@am__append_28
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173 @SIM_ENABLE_ARCH_cris_TRUE@ cris
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176 @SIM_ENABLE_ARCH_cris_TRUE@am__append_34
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183 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_41
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184 @SIM_ENABLE_ARCH_erc32_TRUE@am__append_42
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187 @SIM_ENABLE_ARCH_examples_TRUE@am__append_45
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193 @SIM_ENABLE_ARCH_frv_TRUE@am__append_51
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195 @SIM_ENABLE_ARCH_ft32_TRUE@am__append_53
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197 @SIM_ENABLE_ARCH_h8300_TRUE@am__append_55
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202 @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_60
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203 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_61
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207 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_65
= $(lm32_BUILD_OUTPUTS
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208 @SIM_ENABLE_ARCH_lm32_TRUE@am__append_66
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209 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_67
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212 @SIM_ENABLE_ARCH_m32c_TRUE@am__append_70
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216 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
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221 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_75
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223 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
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227 @SIM_ENABLE_ARCH_m32r_TRUE@am__append_77
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228 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_78
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231 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_81
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232 @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_82
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234 @SIM_ENABLE_ARCH_mcore_TRUE@am__append_84
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235 @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_85
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236 @SIM_ENABLE_ARCH_mips_TRUE@am__append_86
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238 @SIM_ENABLE_ARCH_mips_TRUE@am__append_88
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240 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_89
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244 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_90
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246 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32
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247 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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248 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips
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250 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_91
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252 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips
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256 @SIM_ENABLE_ARCH_mips_TRUE@am__append_93
= $(mips_BUILD_OUTPUTS
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257 @SIM_ENABLE_ARCH_mips_TRUE@am__append_94
= mips
/multi-include.h mips
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258 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_95
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259 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_96
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260 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_97
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262 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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263 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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264 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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265 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.h \
266 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.h \
267 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.h
269 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_98
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270 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_99
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271 @SIM_ENABLE_ARCH_moxie_TRUE@am__append_100
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273 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_102
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276 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_105
= $(or1k_BUILD_OUTPUTS
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277 @SIM_ENABLE_ARCH_ppc_TRUE@am__append_106
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278 @SIM_ENABLE_ARCH_pru_TRUE@am__append_107
= pru
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279 @SIM_ENABLE_ARCH_riscv_TRUE@am__append_108
= riscv
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280 @SIM_ENABLE_ARCH_rl78_TRUE@am__append_109
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/idecode.h \
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295 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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296 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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/Makefile.sim bfin
/.gdbinit \
342 bpf
/Makefile.sim bpf
/.gdbinit cr16
/Makefile.sim cr16
/.gdbinit \
343 cris
/Makefile.sim cris
/.gdbinit d10v
/Makefile.sim \
344 d10v
/.gdbinit frv
/Makefile.sim frv
/.gdbinit ft32
/Makefile.sim \
345 ft32
/.gdbinit h8300
/Makefile.sim h8300
/.gdbinit \
346 iq2000
/Makefile.sim iq2000
/.gdbinit lm32
/Makefile.sim \
347 lm32
/.gdbinit m32c
/Makefile.sim m32c
/.gdbinit \
348 m32r
/Makefile.sim m32r
/.gdbinit m68hc11
/Makefile.sim \
349 m68hc11
/.gdbinit mcore
/Makefile.sim mcore
/.gdbinit \
350 microblaze
/Makefile.sim microblaze
/.gdbinit mips
/Makefile.sim \
351 mips
/.gdbinit mn10300
/Makefile.sim mn10300
/.gdbinit \
352 moxie
/Makefile.sim moxie
/.gdbinit msp430
/Makefile.sim \
353 msp430
/.gdbinit or1k
/Makefile.sim or1k
/.gdbinit ppc
/.gdbinit \
354 pru
/Makefile.sim pru
/.gdbinit riscv
/Makefile.sim \
355 riscv
/.gdbinit rl78
/Makefile.sim rl78
/.gdbinit rx
/Makefile.sim \
356 rx
/.gdbinit sh
/Makefile.sim sh
/.gdbinit erc32
/Makefile.sim \
357 erc32
/.gdbinit v850
/Makefile.sim v850
/.gdbinit \
358 example-synacor
/Makefile.sim example-synacor
/.gdbinit \
359 arch-subdir.mk .gdbinit
360 CONFIG_CLEAN_VPATH_FILES
=
361 LIBRARIES
= $(noinst_LIBRARIES
)
363 AM_V_AR
= $(am__v_AR_@AM_V@
)
364 am__v_AR_
= $(am__v_AR_@AM_DEFAULT_V@
)
365 am__v_AR_0
= @echo
" AR " $@
;
367 aarch64_libsim_a_AR
= $(AR
) $(ARFLAGS
)
368 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_DEPENDENCIES
= \
369 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(patsubst \
370 @SIM_ENABLE_ARCH_aarch64_TRUE@
%,aarch64
/%,$(SIM_NEW_COMMON_OBJS
)) \
371 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(patsubst \
372 @SIM_ENABLE_ARCH_aarch64_TRUE@
%,aarch64
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
373 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/cpustate.o \
374 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/interp.o \
375 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/memory.o \
376 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/modules.o \
377 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/sim-resume.o \
378 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/simulator.o
379 am_aarch64_libsim_a_OBJECTS
=
380 aarch64_libsim_a_OBJECTS
= $(am_aarch64_libsim_a_OBJECTS
)
381 am__dirstamp
= $(am__leading_dot
)dirstamp
382 arm_libsim_a_AR
= $(AR
) $(ARFLAGS
)
383 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_DEPENDENCIES
= arm
/wrapper.o \
384 @SIM_ENABLE_ARCH_arm_TRUE@
$(patsubst \
385 @SIM_ENABLE_ARCH_arm_TRUE@
%,arm
/%,$(SIM_NEW_COMMON_OBJS
)) \
386 @SIM_ENABLE_ARCH_arm_TRUE@
$(patsubst \
387 @SIM_ENABLE_ARCH_arm_TRUE@
%,arm
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
388 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armemu.o arm
/armemu32.o \
389 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/arminit.o arm
/armos.o \
390 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armsupp.o arm
/armvirt.o \
391 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/thumbemu.o arm
/armcopro.o \
392 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/maverick.o arm
/iwmmxt.o \
393 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/modules.o
394 am_arm_libsim_a_OBJECTS
=
395 arm_libsim_a_OBJECTS
= $(am_arm_libsim_a_OBJECTS
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396 avr_libsim_a_AR
= $(AR
) $(ARFLAGS
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397 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_DEPENDENCIES
= avr
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398 @SIM_ENABLE_ARCH_avr_TRUE@
$(patsubst \
399 @SIM_ENABLE_ARCH_avr_TRUE@
%,avr
/%,$(SIM_NEW_COMMON_OBJS
)) \
400 @SIM_ENABLE_ARCH_avr_TRUE@
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401 @SIM_ENABLE_ARCH_avr_TRUE@
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%.o
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)) \
402 @SIM_ENABLE_ARCH_avr_TRUE@ avr
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/sim-resume.o
403 am_avr_libsim_a_OBJECTS
=
404 avr_libsim_a_OBJECTS
= $(am_avr_libsim_a_OBJECTS
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405 bfin_libsim_a_AR
= $(AR
) $(ARFLAGS
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406 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_DEPENDENCIES
= $(patsubst \
407 @SIM_ENABLE_ARCH_bfin_TRUE@
%,bfin
/%,$(SIM_NEW_COMMON_OBJS
)) \
408 @SIM_ENABLE_ARCH_bfin_TRUE@
$(patsubst \
409 @SIM_ENABLE_ARCH_bfin_TRUE@
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/dv-
%.o
,$(SIM_HW_DEVICES
)) \
410 @SIM_ENABLE_ARCH_bfin_TRUE@
$(patsubst \
411 @SIM_ENABLE_ARCH_bfin_TRUE@
%,bfin
/dv-
%.o
,$(bfin_SIM_EXTRA_HW_DEVICES
)) \
412 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/bfin-sim.o bfin
/devices.o \
413 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/gui.o bfin
/interp.o \
414 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/machs.o bfin
/modules.o \
415 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/sim-resume.o
416 am_bfin_libsim_a_OBJECTS
=
417 bfin_libsim_a_OBJECTS
= $(am_bfin_libsim_a_OBJECTS
)
418 bpf_libsim_a_AR
= $(AR
) $(ARFLAGS
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419 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_DEPENDENCIES
= $(patsubst \
420 @SIM_ENABLE_ARCH_bpf_TRUE@
%,bpf
/%,$(SIM_NEW_COMMON_OBJS
)) \
421 @SIM_ENABLE_ARCH_bpf_TRUE@
$(patsubst \
422 @SIM_ENABLE_ARCH_bpf_TRUE@
%,bpf
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%.o
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)) \
423 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/modules.o bpf
/cgen-run.o \
424 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cgen-scache.o bpf
/cgen-trace.o \
425 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cgen-utils.o bpf
/arch.o \
426 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cpu.o bpf
/decode-le.o \
427 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/decode-be.o bpf
/sem-le.o \
428 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/sem-be.o bpf
/mloop-le.o \
429 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-be.o bpf
/bpf.o \
430 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/bpf-helpers.o bpf
/sim-if.o \
431 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/traps.o
432 am_bpf_libsim_a_OBJECTS
=
433 bpf_libsim_a_OBJECTS
= $(am_bpf_libsim_a_OBJECTS
)
434 common_libcommon_a_AR
= $(AR
) $(ARFLAGS
)
435 common_libcommon_a_LIBADD
=
436 am_common_libcommon_a_OBJECTS
= common
/callback.
$(OBJEXT
) \
437 common
/portability.
$(OBJEXT
) common
/sim-load.
$(OBJEXT
) \
438 common
/syscall.
$(OBJEXT
) common
/target-newlib-errno.
$(OBJEXT
) \
439 common
/target-newlib-open.
$(OBJEXT
) \
440 common
/target-newlib-signal.
$(OBJEXT
) \
441 common
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$(OBJEXT
) \
442 common
/version.
$(OBJEXT
)
443 common_libcommon_a_OBJECTS
= $(am_common_libcommon_a_OBJECTS
)
444 cr16_libsim_a_AR
= $(AR
) $(ARFLAGS
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445 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_DEPENDENCIES
= \
446 @SIM_ENABLE_ARCH_cr16_TRUE@
$(common_libcommon_a_OBJECTS
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447 @SIM_ENABLE_ARCH_cr16_TRUE@
$(patsubst \
448 @SIM_ENABLE_ARCH_cr16_TRUE@
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)) \
449 @SIM_ENABLE_ARCH_cr16_TRUE@
$(patsubst \
450 @SIM_ENABLE_ARCH_cr16_TRUE@
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%.o
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)) \
451 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/interp.o cr16
/modules.o \
452 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/sim-resume.o cr16
/simops.o \
453 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/table.o
454 am_cr16_libsim_a_OBJECTS
=
455 cr16_libsim_a_OBJECTS
= $(am_cr16_libsim_a_OBJECTS
)
456 cris_libsim_a_AR
= $(AR
) $(ARFLAGS
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457 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_DEPENDENCIES
= \
458 @SIM_ENABLE_ARCH_cris_TRUE@
$(common_libcommon_a_OBJECTS
) \
459 @SIM_ENABLE_ARCH_cris_TRUE@
$(patsubst \
460 @SIM_ENABLE_ARCH_cris_TRUE@
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)) \
461 @SIM_ENABLE_ARCH_cris_TRUE@
$(patsubst \
462 @SIM_ENABLE_ARCH_cris_TRUE@
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/dv-
%.o
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)) \
463 @SIM_ENABLE_ARCH_cris_TRUE@
$(patsubst \
464 @SIM_ENABLE_ARCH_cris_TRUE@
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%.o
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)) \
465 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/modules.o cris
/cgen-run.o \
466 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-scache.o \
467 @SIM_ENABLE_ARCH_cris_TRUE@ cris
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/cgen-utils.o \
468 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/arch.o cris
/crisv10f.o \
469 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cpuv10.o cris
/decodev10.o \
470 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/modelv10.o cris
/mloopv10f.o \
471 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/crisv32f.o cris
/cpuv32.o \
472 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/decodev32.o cris
/modelv32.o \
473 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv32f.o cris
/sim-if.o \
474 @SIM_ENABLE_ARCH_cris_TRUE@ cris
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475 am_cris_libsim_a_OBJECTS
=
476 cris_libsim_a_OBJECTS
= $(am_cris_libsim_a_OBJECTS
)
477 d10v_libsim_a_AR
= $(AR
) $(ARFLAGS
)
478 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_DEPENDENCIES
= \
479 @SIM_ENABLE_ARCH_d10v_TRUE@
$(common_libcommon_a_OBJECTS
) \
480 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/interp.o
$(patsubst \
481 @SIM_ENABLE_ARCH_d10v_TRUE@
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)) \
482 @SIM_ENABLE_ARCH_d10v_TRUE@
$(patsubst \
483 @SIM_ENABLE_ARCH_d10v_TRUE@
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%.o
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)) \
484 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/endian.o d10v
/modules.o \
485 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/sim-resume.o d10v
/simops.o \
486 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/table.o
487 am_d10v_libsim_a_OBJECTS
=
488 d10v_libsim_a_OBJECTS
= $(am_d10v_libsim_a_OBJECTS
)
489 erc32_libsim_a_AR
= $(AR
) $(ARFLAGS
)
490 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_DEPENDENCIES
= \
491 @SIM_ENABLE_ARCH_erc32_TRUE@
$(common_libcommon_a_OBJECTS
) \
492 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/erc32.o erc32
/exec.o \
493 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/float.o erc32
/func.o \
494 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/help.o erc32
/interf.o \
495 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/modules.o
496 am_erc32_libsim_a_OBJECTS
=
497 erc32_libsim_a_OBJECTS
= $(am_erc32_libsim_a_OBJECTS
)
498 example_synacor_libsim_a_AR
= $(AR
) $(ARFLAGS
)
499 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_DEPENDENCIES
= \
500 @SIM_ENABLE_ARCH_examples_TRUE@
$(common_libcommon_a_OBJECTS
) \
501 @SIM_ENABLE_ARCH_examples_TRUE@
$(patsubst \
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)) \
503 @SIM_ENABLE_ARCH_examples_TRUE@
$(patsubst \
504 @SIM_ENABLE_ARCH_examples_TRUE@
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)) \
505 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
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506 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/modules.o \
507 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/sim-main.o \
508 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
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509 am_example_synacor_libsim_a_OBJECTS
=
510 example_synacor_libsim_a_OBJECTS
= \
511 $(am_example_synacor_libsim_a_OBJECTS
)
512 frv_libsim_a_AR
= $(AR
) $(ARFLAGS
)
513 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_DEPENDENCIES
= \
514 @SIM_ENABLE_ARCH_frv_TRUE@
$(common_libcommon_a_OBJECTS
) \
515 @SIM_ENABLE_ARCH_frv_TRUE@
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517 @SIM_ENABLE_ARCH_frv_TRUE@
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523 @SIM_ENABLE_ARCH_frv_TRUE@ frv
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524 @SIM_ENABLE_ARCH_frv_TRUE@ frv
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526 @SIM_ENABLE_ARCH_frv_TRUE@ frv
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/memory.o \
527 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/options.o frv
/pipeline.o \
528 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile.o frv
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529 @SIM_ENABLE_ARCH_frv_TRUE@ frv
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530 @SIM_ENABLE_ARCH_frv_TRUE@ frv
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531 @SIM_ENABLE_ARCH_frv_TRUE@ frv
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/registers.o \
532 @SIM_ENABLE_ARCH_frv_TRUE@ frv
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533 am_frv_libsim_a_OBJECTS
=
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= $(am_frv_libsim_a_OBJECTS
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535 ft32_libsim_a_AR
= $(AR
) $(ARFLAGS
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536 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_DEPENDENCIES
= \
537 @SIM_ENABLE_ARCH_ft32_TRUE@
$(common_libcommon_a_OBJECTS
) \
538 @SIM_ENABLE_ARCH_ft32_TRUE@
$(patsubst \
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%.o
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)) \
542 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
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544 am_ft32_libsim_a_OBJECTS
=
545 ft32_libsim_a_OBJECTS
= $(am_ft32_libsim_a_OBJECTS
)
546 h8300_libsim_a_AR
= $(AR
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547 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_DEPENDENCIES
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$(patsubst \
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)) \
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554 am_h8300_libsim_a_OBJECTS
=
555 h8300_libsim_a_OBJECTS
= $(am_h8300_libsim_a_OBJECTS
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556 igen_libigen_a_AR
= $(AR
) $(ARFLAGS
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557 igen_libigen_a_LIBADD
=
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= \
559 @SIM_ENABLE_IGEN_TRUE@ igen
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$(OBJEXT
) igen
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$(OBJEXT
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$(OBJEXT
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$(OBJEXT
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$(OBJEXT
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$(OBJEXT
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$(OBJEXT
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$(OBJEXT
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$(OBJEXT
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$(OBJEXT
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$(OBJEXT
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$(OBJEXT
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$(OBJEXT
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$(OBJEXT
) \
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$(OBJEXT
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= $(am_igen_libigen_a_OBJECTS
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= $(AR
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= $(am_iq2000_libsim_a_OBJECTS
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593 lm32_libsim_a_AR
= $(AR
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=
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= $(am_lm32_libsim_a_OBJECTS
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= $(AR
) $(ARFLAGS
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/srcdest.o m32c
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=
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= $(am_m32c_libsim_a_OBJECTS
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= $(AR
) $(ARFLAGS
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=
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= $(AR
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$(patsubst \
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)) \
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=
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= $(IGEN
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= cr16
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= d10v
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= sh
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$(EXEEXT
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= testsuite
/common
/bits32m0
$(EXEEXT
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676 testsuite
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) \
677 testsuite
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$(EXEEXT
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678 testsuite
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/bits64m63
$(EXEEXT
) \
679 testsuite
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)
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= cris
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= aarch64
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= arm
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= avr
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= bfin
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$(EXEEXT
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= cr16
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= cris
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$(EXEEXT
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= d10v
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$(EXEEXT
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= erc32
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$(EXEEXT
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/sis
$(EXEEXT
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= \
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$(EXEEXT
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= frv
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$(EXEEXT
)
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= ft32
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$(EXEEXT
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= h8300
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= iq2000
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= lm32
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= m32c
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$(EXEEXT
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= m32r
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= m68hc11
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= mcore
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= \
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)
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= mips
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$(EXEEXT
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= mn10300
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706 @SIM_ENABLE_ARCH_moxie_TRUE@am__EXEEXT_32
= moxie
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)
707 @SIM_ENABLE_ARCH_msp430_TRUE@am__EXEEXT_33
= msp430
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= or1k
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709 @SIM_ENABLE_ARCH_ppc_TRUE@am__EXEEXT_35
= ppc
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)
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= pru
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= riscv
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= rl78
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= rx
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= sh
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$(EXEEXT
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716 @SIM_ENABLE_ARCH_v850_TRUE@am__EXEEXT_41
= v850
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$(EXEEXT
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= $(noinst_PROGRAMS
)
718 am_aarch64_run_OBJECTS
=
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= $(am_aarch64_run_OBJECTS
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= $(BFD_LIB
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= \
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$(am__DEPENDENCIES_1
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724 AM_V_lt
= $(am__v_lt_@AM_V@
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= $(am_arm_run_OBJECTS
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= \
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= $(am_d10v_gencode_OBJECTS
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=
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$(OBJEXT
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= igen
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=
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= igen
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= igen
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$(OBJEXT
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= igen
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= \
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/ld-cache-main.o igen
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= \
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/ld-decode-main.o igen
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=
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871 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_DEPENDENCIES
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873 am_mn10300_run_OBJECTS
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874 mn10300_run_OBJECTS
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875 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_DEPENDENCIES
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876 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/nrun.o mn10300
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877 @SIM_ENABLE_ARCH_mn10300_TRUE@
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878 am_moxie_run_OBJECTS
=
879 moxie_run_OBJECTS
= $(am_moxie_run_OBJECTS
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880 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_DEPENDENCIES
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881 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
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882 @SIM_ENABLE_ARCH_moxie_TRUE@
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883 am_msp430_run_OBJECTS
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884 msp430_run_OBJECTS
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885 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_DEPENDENCIES
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888 am_or1k_run_OBJECTS
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892 ppc_psim_SOURCES
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896 ppc_run_OBJECTS
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897 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_DEPENDENCIES
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900 pru_run_OBJECTS
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901 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_DEPENDENCIES
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903 am_riscv_run_OBJECTS
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906 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
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907 @SIM_ENABLE_ARCH_riscv_TRUE@
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908 am_rl78_run_OBJECTS
=
909 rl78_run_OBJECTS
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910 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_DEPENDENCIES
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913 rx_run_OBJECTS
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914 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_DEPENDENCIES
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$(am__DEPENDENCIES_1
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= $(am_sh_gencode_OBJECTS
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920 sh_run_OBJECTS
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)
923 testsuite_common_alu_tst_SOURCES
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925 testsuite_common_alu_tst_LDADD
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926 testsuite_common_bits_gen_SOURCES
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927 testsuite_common_bits_gen_OBJECTS
= \
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$(OBJEXT
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929 testsuite_common_bits_gen_LDADD
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930 testsuite_common_bits32m0_SOURCES
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933 testsuite_common_bits32m0_LDADD
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934 testsuite_common_bits32m31_SOURCES
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935 testsuite_common_bits32m31_OBJECTS
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$(OBJEXT
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937 testsuite_common_bits32m31_LDADD
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941 testsuite_common_bits64m0_LDADD
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943 testsuite_common_bits64m63_OBJECTS
= \
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$(OBJEXT
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945 testsuite_common_bits64m63_LDADD
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946 testsuite_common_fpu_tst_SOURCES
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949 am_v850_run_OBJECTS
=
950 v850_run_OBJECTS
= $(am_v850_run_OBJECTS
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951 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_DEPENDENCIES
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952 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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953 AM_V_P
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954 am__v_P_
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957 AM_V_GEN
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958 am__v_GEN_
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959 am__v_GEN_0
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962 am__v_at_
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965 DEFAULT_INCLUDES
= -I.@am__isrc@
966 depcomp
= $(SHELL
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967 am__depfiles_maybe
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969 COMPILE
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971 LTCOMPILE
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1000 $(cris_rvdummy_SOURCES
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1017 testsuite
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1018 testsuite
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1019 testsuite
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1022 ctags-recursive dvi-recursive html-recursive info-recursive \
1023 install-data-recursive install-dvi-recursive \
1024 install-exec-recursive install-html-recursive \
1025 install-info-recursive install-pdf-recursive \
1026 install-ps-recursive install-recursive installcheck-recursive \
1027 installdirs-recursive pdf-recursive ps-recursive \
1028 tags-recursive uninstall-recursive
1029 am__can_run_installinfo
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1030 case
$$AM_UPDATE_INFO_DIR in \
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1053 sed
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1063 "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" \
1064 "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"
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1067 am__pkginclude_HEADERS_DIST
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1068 $(srcroot
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1070 RECURSIVE_CLEAN_TARGETS
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1072 am__recursive_targets
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1073 $(RECURSIVE_TARGETS
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1074 $(RECURSIVE_CLEAN_TARGETS
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1076 AM_RECURSIVE_TARGETS
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1080 # Read a list of newline-separated strings from the standard input,
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1085 { items[$$0] = 1; nonempty = 1; } \
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1090 # for different programs/libraries.
1091 am__define_uniq_tagged_files
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1092 list
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1099 DEJATOOL
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1100 RUNTESTDEFAULTFLAGS
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1103 am__tty_colors_dummy
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1104 mgn
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1106 am__tty_colors
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1107 $(am__tty_colors_dummy
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1108 if
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1109 am__color_tests
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1110 elif
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1111 am__color_tests
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test "X$$TERM" != Xdumb
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1113 am__color_tests
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1125 am__recheck_rx
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1126 am__global_test_result_rx
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[ ]*:global-test-result
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1127 am__copy_in_global_log_rx
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[ ]*:copy-in-global-log
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1128 # A command that, given a newline-separated list of test names on the
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1131 am__list_recheck_tests
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1133 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
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1153 close ($$0 ".trs"); \
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1158 am__create_global_log
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1159 function fatal(msg) \
1161 print "fatal: making $@: " msg | "cat >&2"; \
1164 function rst_section(header) \
1167 len = length(header); \
1168 for (i = 1; i <= len; i = i + 1) \
1173 copy_in_global_log = 1; \
1174 global_test_result = "RUN"; \
1175 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
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1179 if (line ~ /$(am__global_test_result_rx)/) \
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1182 sub("[ ]*$$", "", line); \
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1186 copy_in_global_log = 0; \
1188 if (copy_in_global_log) \
1190 rst_section(global_test_result ": " $$0); \
1191 while ((rc = (getline line < ($$0 ".log"))) != 0) \
1194 fatal("failed to read from " $$0 ".log"); \
1199 close ($$0 ".trs"); \
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1203 am__rst_title
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1204 # Solaris 10 'make', and several other traditional 'make' implementations,
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1207 am__sh_e_setup
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1211 --enable-hard-errors
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1216 # developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
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1223 $(am__tty_colors
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1224 srcdir=$(srcdir); export srcdir; \
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1238 am__enable_hard_errors
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1240 case
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1242 am__expect_failure
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1248 # extension removed (i.e., equivalently, the names of the test logs, with
1249 # the '.log' extension removed). The result is saved in the shell variable
1250 # '$bases'. This honors runtime overriding of TESTS and TEST_LOGS. Sadly,
1251 # we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
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1254 am__set_TESTS_bases
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1255 bases
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1256 bases
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1257 bases
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1258 RECHECK_LOGS
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1259 TEST_SUITE_LOG
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1260 TEST_EXTENSIONS
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1262 LOG_COMPILE
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1268 *) b
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1273 am__test_logs1
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1274 am__test_logs2
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1275 TEST_LOGS
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1276 TEST_LOG_DRIVER
= $(SHELL
) $(top_srcdir
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1277 TEST_LOG_COMPILE
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1279 DIST_SUBDIRS
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1282 AM_DEFAULT_VERBOSITY
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1284 AR_FOR_BUILD
= @AR_FOR_BUILD@
1285 AS_FOR_TARGET
= @AS_FOR_TARGET@
1286 AS_FOR_TARGET_AARCH64
= @AS_FOR_TARGET_AARCH64@
1287 AS_FOR_TARGET_ARM
= @AS_FOR_TARGET_ARM@
1288 AS_FOR_TARGET_AVR
= @AS_FOR_TARGET_AVR@
1289 AS_FOR_TARGET_BFIN
= @AS_FOR_TARGET_BFIN@
1290 AS_FOR_TARGET_BPF
= @AS_FOR_TARGET_BPF@
1291 AS_FOR_TARGET_CR16
= @AS_FOR_TARGET_CR16@
1292 AS_FOR_TARGET_CRIS
= @AS_FOR_TARGET_CRIS@
1293 AS_FOR_TARGET_D10V
= @AS_FOR_TARGET_D10V@
1294 AS_FOR_TARGET_ERC32
= @AS_FOR_TARGET_ERC32@
1295 AS_FOR_TARGET_EXAMPLE_SYNACOR
= @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1296 AS_FOR_TARGET_FRV
= @AS_FOR_TARGET_FRV@
1297 AS_FOR_TARGET_FT32
= @AS_FOR_TARGET_FT32@
1298 AS_FOR_TARGET_H8300
= @AS_FOR_TARGET_H8300@
1299 AS_FOR_TARGET_IQ2000
= @AS_FOR_TARGET_IQ2000@
1300 AS_FOR_TARGET_LM32
= @AS_FOR_TARGET_LM32@
1301 AS_FOR_TARGET_M32C
= @AS_FOR_TARGET_M32C@
1302 AS_FOR_TARGET_M32R
= @AS_FOR_TARGET_M32R@
1303 AS_FOR_TARGET_M68HC11
= @AS_FOR_TARGET_M68HC11@
1304 AS_FOR_TARGET_MCORE
= @AS_FOR_TARGET_MCORE@
1305 AS_FOR_TARGET_MICROBLAZE
= @AS_FOR_TARGET_MICROBLAZE@
1306 AS_FOR_TARGET_MIPS
= @AS_FOR_TARGET_MIPS@
1307 AS_FOR_TARGET_MN10300
= @AS_FOR_TARGET_MN10300@
1308 AS_FOR_TARGET_MOXIE
= @AS_FOR_TARGET_MOXIE@
1309 AS_FOR_TARGET_MSP430
= @AS_FOR_TARGET_MSP430@
1310 AS_FOR_TARGET_OR1K
= @AS_FOR_TARGET_OR1K@
1311 AS_FOR_TARGET_PPC
= @AS_FOR_TARGET_PPC@
1312 AS_FOR_TARGET_PRU
= @AS_FOR_TARGET_PRU@
1313 AS_FOR_TARGET_RISCV
= @AS_FOR_TARGET_RISCV@
1314 AS_FOR_TARGET_RL78
= @AS_FOR_TARGET_RL78@
1315 AS_FOR_TARGET_RX
= @AS_FOR_TARGET_RX@
1316 AS_FOR_TARGET_SH
= @AS_FOR_TARGET_SH@
1317 AS_FOR_TARGET_V850
= @AS_FOR_TARGET_V850@
1318 AUTOCONF
= @AUTOCONF@
1319 AUTOHEADER
= @AUTOHEADER@
1320 AUTOMAKE
= @AUTOMAKE@
1323 CCDEPMODE
= @CCDEPMODE@
1324 CC_FOR_BUILD
= @CC_FOR_BUILD@
1325 CC_FOR_TARGET
= @CC_FOR_TARGET@
1326 CC_FOR_TARGET_AARCH64
= @CC_FOR_TARGET_AARCH64@
1327 CC_FOR_TARGET_ARM
= @CC_FOR_TARGET_ARM@
1328 CC_FOR_TARGET_AVR
= @CC_FOR_TARGET_AVR@
1329 CC_FOR_TARGET_BFIN
= @CC_FOR_TARGET_BFIN@
1330 CC_FOR_TARGET_BPF
= @CC_FOR_TARGET_BPF@
1331 CC_FOR_TARGET_CR16
= @CC_FOR_TARGET_CR16@
1332 CC_FOR_TARGET_CRIS
= @CC_FOR_TARGET_CRIS@
1333 CC_FOR_TARGET_D10V
= @CC_FOR_TARGET_D10V@
1334 CC_FOR_TARGET_ERC32
= @CC_FOR_TARGET_ERC32@
1335 CC_FOR_TARGET_EXAMPLE_SYNACOR
= @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1336 CC_FOR_TARGET_FRV
= @CC_FOR_TARGET_FRV@
1337 CC_FOR_TARGET_FT32
= @CC_FOR_TARGET_FT32@
1338 CC_FOR_TARGET_H8300
= @CC_FOR_TARGET_H8300@
1339 CC_FOR_TARGET_IQ2000
= @CC_FOR_TARGET_IQ2000@
1340 CC_FOR_TARGET_LM32
= @CC_FOR_TARGET_LM32@
1341 CC_FOR_TARGET_M32C
= @CC_FOR_TARGET_M32C@
1342 CC_FOR_TARGET_M32R
= @CC_FOR_TARGET_M32R@
1343 CC_FOR_TARGET_M68HC11
= @CC_FOR_TARGET_M68HC11@
1344 CC_FOR_TARGET_MCORE
= @CC_FOR_TARGET_MCORE@
1345 CC_FOR_TARGET_MICROBLAZE
= @CC_FOR_TARGET_MICROBLAZE@
1346 CC_FOR_TARGET_MIPS
= @CC_FOR_TARGET_MIPS@
1347 CC_FOR_TARGET_MN10300
= @CC_FOR_TARGET_MN10300@
1348 CC_FOR_TARGET_MOXIE
= @CC_FOR_TARGET_MOXIE@
1349 CC_FOR_TARGET_MSP430
= @CC_FOR_TARGET_MSP430@
1350 CC_FOR_TARGET_OR1K
= @CC_FOR_TARGET_OR1K@
1351 CC_FOR_TARGET_PPC
= @CC_FOR_TARGET_PPC@
1352 CC_FOR_TARGET_PRU
= @CC_FOR_TARGET_PRU@
1353 CC_FOR_TARGET_RISCV
= @CC_FOR_TARGET_RISCV@
1354 CC_FOR_TARGET_RL78
= @CC_FOR_TARGET_RL78@
1355 CC_FOR_TARGET_RX
= @CC_FOR_TARGET_RX@
1356 CC_FOR_TARGET_SH
= @CC_FOR_TARGET_SH@
1357 CC_FOR_TARGET_V850
= @CC_FOR_TARGET_V850@
1359 CFLAGS_FOR_BUILD
= @CFLAGS_FOR_BUILD@
1360 CGEN_MAINT
= @CGEN_MAINT@
1362 CPPFLAGS
= @CPPFLAGS@
1363 CPPFLAGS_FOR_BUILD
= @CPPFLAGS_FOR_BUILD@
1364 CYGPATH_W
= @CYGPATH_W@
1365 C_DIALECT
= @C_DIALECT@
1368 DSYMUTIL
= @DSYMUTIL@
1378 IGEN_FLAGS_SMP
= @IGEN_FLAGS_SMP@
1380 INSTALL_DATA
= @INSTALL_DATA@
1381 INSTALL_PROGRAM
= @INSTALL_PROGRAM@
1382 INSTALL_SCRIPT
= @INSTALL_SCRIPT@
1383 INSTALL_STRIP_PROGRAM
= @INSTALL_STRIP_PROGRAM@
1386 LDFLAGS_FOR_BUILD
= @LDFLAGS_FOR_BUILD@
1387 LD_FOR_TARGET
= @LD_FOR_TARGET@
1388 LD_FOR_TARGET_AARCH64
= @LD_FOR_TARGET_AARCH64@
1389 LD_FOR_TARGET_ARM
= @LD_FOR_TARGET_ARM@
1390 LD_FOR_TARGET_AVR
= @LD_FOR_TARGET_AVR@
1391 LD_FOR_TARGET_BFIN
= @LD_FOR_TARGET_BFIN@
1392 LD_FOR_TARGET_BPF
= @LD_FOR_TARGET_BPF@
1393 LD_FOR_TARGET_CR16
= @LD_FOR_TARGET_CR16@
1394 LD_FOR_TARGET_CRIS
= @LD_FOR_TARGET_CRIS@
1395 LD_FOR_TARGET_D10V
= @LD_FOR_TARGET_D10V@
1396 LD_FOR_TARGET_ERC32
= @LD_FOR_TARGET_ERC32@
1397 LD_FOR_TARGET_EXAMPLE_SYNACOR
= @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1398 LD_FOR_TARGET_FRV
= @LD_FOR_TARGET_FRV@
1399 LD_FOR_TARGET_FT32
= @LD_FOR_TARGET_FT32@
1400 LD_FOR_TARGET_H8300
= @LD_FOR_TARGET_H8300@
1401 LD_FOR_TARGET_IQ2000
= @LD_FOR_TARGET_IQ2000@
1402 LD_FOR_TARGET_LM32
= @LD_FOR_TARGET_LM32@
1403 LD_FOR_TARGET_M32C
= @LD_FOR_TARGET_M32C@
1404 LD_FOR_TARGET_M32R
= @LD_FOR_TARGET_M32R@
1405 LD_FOR_TARGET_M68HC11
= @LD_FOR_TARGET_M68HC11@
1406 LD_FOR_TARGET_MCORE
= @LD_FOR_TARGET_MCORE@
1407 LD_FOR_TARGET_MICROBLAZE
= @LD_FOR_TARGET_MICROBLAZE@
1408 LD_FOR_TARGET_MIPS
= @LD_FOR_TARGET_MIPS@
1409 LD_FOR_TARGET_MN10300
= @LD_FOR_TARGET_MN10300@
1410 LD_FOR_TARGET_MOXIE
= @LD_FOR_TARGET_MOXIE@
1411 LD_FOR_TARGET_MSP430
= @LD_FOR_TARGET_MSP430@
1412 LD_FOR_TARGET_OR1K
= @LD_FOR_TARGET_OR1K@
1413 LD_FOR_TARGET_PPC
= @LD_FOR_TARGET_PPC@
1414 LD_FOR_TARGET_PRU
= @LD_FOR_TARGET_PRU@
1415 LD_FOR_TARGET_RISCV
= @LD_FOR_TARGET_RISCV@
1416 LD_FOR_TARGET_RL78
= @LD_FOR_TARGET_RL78@
1417 LD_FOR_TARGET_RX
= @LD_FOR_TARGET_RX@
1418 LD_FOR_TARGET_SH
= @LD_FOR_TARGET_SH@
1419 LD_FOR_TARGET_V850
= @LD_FOR_TARGET_V850@
1425 LTLIBOBJS
= @LTLIBOBJS@
1427 MAKEINFO
= @MAKEINFO@
1436 PACKAGE_BUGREPORT
= @PACKAGE_BUGREPORT@
1437 PACKAGE_NAME
= @PACKAGE_NAME@
1438 PACKAGE_STRING
= @PACKAGE_STRING@
1439 PACKAGE_TARNAME
= @PACKAGE_TARNAME@
1440 PACKAGE_URL
= @PACKAGE_URL@
1441 PACKAGE_VERSION
= @PACKAGE_VERSION@
1442 PATH_SEPARATOR
= @PATH_SEPARATOR@
1443 PKGVERSION
= @PKGVERSION@
1444 PKG_CONFIG
= @PKG_CONFIG@
1445 PKG_CONFIG_LIBDIR
= @PKG_CONFIG_LIBDIR@
1446 PKG_CONFIG_PATH
= @PKG_CONFIG_PATH@
1448 RANLIB_FOR_BUILD
= @RANLIB_FOR_BUILD@
1449 READLINE_CFLAGS
= @READLINE_CFLAGS@
1450 READLINE_LIB
= @READLINE_LIB@
1451 REPORT_BUGS_TEXI
= @REPORT_BUGS_TEXI@
1452 REPORT_BUGS_TO
= @REPORT_BUGS_TO@
1453 SDL_CFLAGS
= @SDL_CFLAGS@
1454 SDL_LIBS
= @SDL_LIBS@
1456 SET_MAKE
= @SET_MAKE@
1458 SIM_COMMON_BUILD_FALSE
= @SIM_COMMON_BUILD_FALSE@
1459 SIM_COMMON_BUILD_TRUE
= @SIM_COMMON_BUILD_TRUE@
1460 SIM_ENABLED_ARCHES
= @SIM_ENABLED_ARCHES@
1461 SIM_FRV_TRAPDUMP_FLAGS
= @SIM_FRV_TRAPDUMP_FLAGS@
1462 SIM_HW_CFLAGS
= @SIM_HW_CFLAGS@
1463 SIM_HW_SOCKSER
= @SIM_HW_SOCKSER@
1464 SIM_INLINE
= @SIM_INLINE@
1465 SIM_MIPS_BITSIZE
= @SIM_MIPS_BITSIZE@
1466 SIM_MIPS_FPU_BITSIZE
= @SIM_MIPS_FPU_BITSIZE@
1467 SIM_MIPS_GEN
= @SIM_MIPS_GEN@
1468 SIM_MIPS_IGEN_ITABLE_FLAGS
= @SIM_MIPS_IGEN_ITABLE_FLAGS@
1469 SIM_MIPS_M16_FLAGS
= @SIM_MIPS_M16_FLAGS@
1470 SIM_MIPS_MULTI_IGEN_CONFIGS
= @SIM_MIPS_MULTI_IGEN_CONFIGS@
1471 SIM_MIPS_MULTI_OBJ
= @SIM_MIPS_MULTI_OBJ@
1472 SIM_MIPS_MULTI_SRC
= @SIM_MIPS_MULTI_SRC@
1473 SIM_MIPS_SINGLE_FLAGS
= @SIM_MIPS_SINGLE_FLAGS@
1474 SIM_MIPS_SUBTARGET
= @SIM_MIPS_SUBTARGET@
1475 SIM_PRIMARY_TARGET
= @SIM_PRIMARY_TARGET@
1476 SIM_RISCV_BITSIZE
= @SIM_RISCV_BITSIZE@
1477 SIM_RX_CYCLE_ACCURATE_FLAGS
= @SIM_RX_CYCLE_ACCURATE_FLAGS@
1478 SIM_SUBDIRS
= @SIM_SUBDIRS@
1479 SIM_TOOLCHAIN_VARS
= @SIM_TOOLCHAIN_VARS@
1481 TERMCAP_LIB
= @TERMCAP_LIB@
1483 WARN_CFLAGS
= @WARN_CFLAGS@
1484 WERROR_CFLAGS
= @WERROR_CFLAGS@
1485 abs_builddir
= @abs_builddir@
1486 abs_srcdir
= @abs_srcdir@
1487 abs_top_builddir
= @abs_top_builddir@
1488 abs_top_srcdir
= @abs_top_srcdir@
1489 ac_ct_CC
= @ac_ct_CC@
1490 ac_ct_DUMPBIN
= @ac_ct_DUMPBIN@
1491 am__include
= @am__include@
1492 am__leading_dot
= @am__leading_dot@
1493 am__quote
= @am__quote@
1495 am__untar
= @am__untar@
1498 build_alias
= @build_alias@
1499 build_cpu
= @build_cpu@
1500 build_os
= @build_os@
1501 build_vendor
= @build_vendor@
1502 builddir
= @builddir@
1506 datarootdir
= @datarootdir@
1509 exec_prefix = @
exec_prefix@
1511 host_alias
= @host_alias@
1512 host_cpu
= @host_cpu@
1514 host_vendor
= @host_vendor@
1516 includedir = @
includedir@
1518 install_sh
= @install_sh@
1520 libexecdir
= @libexecdir@
1521 localedir
= @localedir@
1522 localstatedir
= @localstatedir@
1525 oldincludedir = @
oldincludedir@
1528 program_transform_name
= @program_transform_name@
1531 sharedstatedir
= @sharedstatedir@
1532 sim_bitsize
= @sim_bitsize@
1533 sim_float
= @sim_float@
1536 sysconfdir
= @sysconfdir@
1538 target_alias
= @target_alias@
1539 target_cpu
= @target_cpu@
1540 target_os
= @target_os@
1541 target_vendor
= @target_vendor@
1542 top_build_prefix
= @top_build_prefix@
1543 top_builddir
= @top_builddir@
1544 top_srcdir
= @top_srcdir@
1545 AUTOMAKE_OPTIONS
= dejagnu foreign no-dist subdir-objects
1546 ACLOCAL_AMFLAGS
= -Im4
-I..
-I..
/config
1547 GNULIB_PARENT_DIR
= ..
1548 srccom
= $(srcdir)/common
1549 srcroot
= $(srcdir)/..
1550 SUBDIRS
= @subdirs@
$(SIM_SUBDIRS
)
1551 AM_MAKEFLAGS
= SIM_NEW_COMMON_OBJS_
="$(SIM_NEW_COMMON_OBJS)" \
1552 $(am__append_3
) $(am__append_16
) $(am__append_30
) \
1553 $(am__append_63
) $(am__append_74
) $(am__append_80
) \
1554 $(am__append_87
) $(am__append_96
)
1555 pkginclude_HEADERS
= $(am__append_1
)
1556 noinst_LIBRARIES
= common
/libcommon.a
$(am__append_5
) $(am__append_8
) \
1557 $(am__append_10
) $(am__append_12
) $(am__append_14
) \
1558 $(am__append_17
) $(am__append_22
) $(am__append_28
) \
1559 $(am__append_35
) $(am__append_41
) $(am__append_45
) \
1560 $(am__append_47
) $(am__append_52
) $(am__append_54
) \
1561 $(am__append_56
) $(am__append_61
) $(am__append_67
) \
1562 $(am__append_72
) $(am__append_78
)
1563 BUILT_SOURCES
= $(am__append_19
) $(am__append_24
) $(am__append_32
) \
1564 $(am__append_37
) $(am__append_49
) $(am__append_58
) \
1565 $(am__append_64
) $(am__append_75
) $(am__append_88
) \
1566 $(am__append_97
) $(am__append_103
) $(am__append_112
) \
1568 CLEANFILES
= common
/version.c common
/version.c-stamp \
1569 testsuite
/common
/bits-gen testsuite
/common
/bits32m0.c \
1570 testsuite
/common
/bits32m31.c testsuite
/common
/bits64m0.c \
1571 testsuite
/common
/bits64m63.c
1572 DISTCLEANFILES
= $(am__append_94
)
1573 MOSTLYCLEANFILES
= core
$(common_HW_CONFIG_H_TARGETS
) $(patsubst \
1574 %,%/stamp-hw
,$(SIM_ENABLED_ARCHES
)) \
1575 $(common_GEN_MODULES_C_TARGETS
) $(patsubst \
1576 %,%/stamp-modules
,$(SIM_ENABLED_ARCHES
)) $(am__append_7
) \
1577 site-sim-config.exp testrun.log testrun.sum
$(am__append_21
) \
1578 $(am__append_27
) $(am__append_34
) $(am__append_40
) \
1579 $(am__append_51
) $(am__append_60
) $(am__append_66
) \
1580 $(am__append_71
) $(am__append_77
) $(am__append_83
) \
1581 $(am__append_93
) $(am__append_99
) $(am__append_105
) \
1582 $(am__append_115
) $(am__append_119
)
1583 AM_CFLAGS
= $(WERROR_CFLAGS
) $(WARN_CFLAGS
)
1584 AM_CPPFLAGS
= $(INCGNU
) -I
$(srcroot
)/include -I..
/bfd
-I.. \
1585 $(SIM_HW_CFLAGS
) $(SIM_INLINE
) -I
$(srcdir)/common \
1587 AM_CPPFLAGS_FOR_BUILD
= -I
$(srcroot
)/include $(SIM_HW_CFLAGS
) \
1588 $(SIM_INLINE
) -I
$(srcdir)/common
1589 COMPILE_FOR_BUILD
= $(CC_FOR_BUILD
) $(AM_CPPFLAGS_FOR_BUILD
) $(CPPFLAGS_FOR_BUILD
) $(CFLAGS_FOR_BUILD
)
1590 LINK_FOR_BUILD
= $(CC_FOR_BUILD
) $(CFLAGS_FOR_BUILD
) $(LDFLAGS_FOR_BUILD
) -o
$@
1591 SIM_ALL_RECURSIVE_DEPS
= common
/libcommon.a \
1592 $(common_HW_CONFIG_H_TARGETS
) $(common_GEN_MODULES_C_TARGETS
) \
1593 $(am__append_4
) $(am__append_20
) $(am__append_25
) \
1594 $(am__append_33
) $(am__append_38
) $(am__append_50
) \
1595 $(am__append_59
) $(am__append_65
) $(am__append_69
) \
1596 $(am__append_76
) $(am__append_81
) $(am__append_92
) \
1597 $(am__append_98
) $(am__append_104
) $(am__append_113
) \
1599 SIM_INSTALL_DATA_LOCAL_DEPS
=
1600 SIM_INSTALL_EXEC_LOCAL_DEPS
= $(am__append_43
)
1601 SIM_UNINSTALL_LOCAL_DEPS
= $(am__append_44
)
1602 common_libcommon_a_SOURCES
= \
1604 common
/portability.c \
1607 common
/target-newlib-errno.c \
1608 common
/target-newlib-open.c \
1609 common
/target-newlib-signal.c \
1610 common
/target-newlib-syscall.c \
1613 SIM_COMMON_HW_OBJS
= \
1625 SIM_NEW_COMMON_OBJS
= sim-arange.o sim-bits.o sim-close.o \
1626 sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1627 sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1628 sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1629 sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1630 sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1631 sim-watch.o
$(am__append_2
)
1632 SIM_HW_DEVICES
= cfi core pal glue
1633 common_HW_CONFIG_H_TARGETS
= $(patsubst %,%/hw-config.h
,$(SIM_ENABLED_ARCHES
))
1634 am_arch_d
= $(subst -,_
,$(@D
))
1635 GEN_MODULES_C_SRCS
= \
1637 $(patsubst %.o
,$(abs_srcdir
)/%.c
,$($(am_arch_d
)_libsim_a_OBJECTS
) $($(am_arch_d
)_libsim_a_LIBADD
)) \
1638 $(filter-out %.o
,$(patsubst $(@D
)/%.o
,$(abs_srcdir
)/common
/%.c
,$($(am_arch_d
)_libsim_a_LIBADD
))))
1640 common_GEN_MODULES_C_TARGETS
= $(patsubst %,%/modules.c
,$(filter-out ppc
,$(SIM_ENABLED_ARCHES
)))
1641 LIBIBERTY_LIB
= ..
/libiberty
/libiberty.a
1642 BFD_LIB
= ..
/bfd
/libbfd.la
1643 OPCODES_LIB
= ..
/opcodes
/libopcodes.la
1649 $(LIBGNU_EXTRA_LIBS
)
1651 GUILE
= $(or
$(wildcard ..
/guile
/libguile
/guile
),guile
)
1652 CGEN
= "$(GUILE) -l $(cgendir)/guile.scm -s"
1654 CGEN_CPU_DIR
= $(cgendir
)/cpu
1655 CPU_DIR
= $(srcroot
)/cpu
1656 CGEN_ARCHFILE
= $(CPU_DIR
)/$(@D
).cpu
1657 CGEN_READ_SCM
= $(cgendir
)/sim.scm
1658 CGEN_ARCH_SCM
= $(cgendir
)/sim-arch.scm
1659 CGEN_CPU_SCM
= $(cgendir
)/sim-cpu.scm
$(cgendir
)/sim-model.scm
1660 CGEN_DECODE_SCM
= $(cgendir
)/sim-decode.scm
1661 CGEN_DESC_SCM
= $(cgendir
)/desc.scm
$(cgendir
)/desc-cpu.scm
1662 CGEN_CPU_EXTR
= /extr
/
1663 CGEN_CPU_READ
= /read
/
1664 CGEN_CPU_WRITE
= /write
/
1665 CGEN_CPU_SEM
= /sem
/
1666 CGEN_CPU_SEMSW
= /semsw
/
1667 CGEN_WRAPPER
= $(srccom
)/cgen.sh
1669 $(SHELL
) $(CGEN_WRAPPER
) arch
$(srcdir)/$(@D
) \
1670 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1671 $(@D
) "$$FLAGS" ignored
"$$isa" $$mach ignored \
1672 $(CGEN_ARCHFILE
) ignored
1675 $(SHELL
) $(CGEN_WRAPPER
) cpu
$(srcdir)/$(@D
) \
1676 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1677 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1678 $(CGEN_ARCHFILE
) "$$EXTRAFILES"
1681 $(SHELL
) $(CGEN_WRAPPER
) defs
$(srcdir)/$(@D
) \
1682 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1683 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1684 $(CGEN_ARCHFILE
) ignored
1687 $(SHELL
) $(CGEN_WRAPPER
) decode
$(srcdir)/$(@D
) \
1688 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1689 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1690 $(CGEN_ARCHFILE
) "$$EXTRAFILES"
1692 CGEN_GEN_CPU_DECODE
= \
1693 $(SHELL
) $(CGEN_WRAPPER
) cpu-decode
$(srcdir)/$(@D
) \
1694 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1695 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1696 $(CGEN_ARCHFILE
) "$$EXTRAFILES"
1698 CGEN_GEN_CPU_DESC
= \
1699 $(SHELL
) $(CGEN_WRAPPER
) desc
$(srcdir)/$(@D
) \
1700 $(CGEN
) $(cgendir
) "$(CGENFLAGS)" \
1701 $(@D
) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1702 $(CGEN_ARCHFILE
) ignored
$$opcfile
1705 # igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1706 # leak detection while running it.
1707 @SIM_ENABLE_IGEN_TRUE@IGEN
= igen
/igen
$(EXEEXT
)
1708 @SIM_ENABLE_IGEN_TRUE@IGEN_RUN
= ASAN_OPTIONS
=detect_leaks
=0 $(IGEN
) $(IGEN_FLAGS_SMP
)
1709 @SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES
= \
1710 @SIM_ENABLE_IGEN_TRUE@ igen
/table.c \
1711 @SIM_ENABLE_IGEN_TRUE@ igen
/lf.c \
1712 @SIM_ENABLE_IGEN_TRUE@ igen
/misc.c \
1713 @SIM_ENABLE_IGEN_TRUE@ igen
/filter_host.c \
1714 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode.c \
1715 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache.c \
1716 @SIM_ENABLE_IGEN_TRUE@ igen
/filter.c \
1717 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn.c \
1718 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-model.c \
1719 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-itable.c \
1720 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-icache.c \
1721 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-semantics.c \
1722 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-idecode.c \
1723 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-support.c \
1724 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-engine.c \
1725 @SIM_ENABLE_IGEN_TRUE@ igen
/gen.c
1727 @SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES
= igen
/igen.c
1728 @SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD
= igen
/libigen.a
1729 @SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES
=
1730 @SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD
= igen
/filter-main.o igen
/libigen.a
1731 @SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES
=
1732 @SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD
= igen
/gen-main.o igen
/libigen.a
1733 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES
=
1734 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD
= igen
/ld-cache-main.o igen
/libigen.a
1735 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES
=
1736 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD
= igen
/ld-decode-main.o igen
/libigen.a
1737 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES
=
1738 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD
= igen
/ld-insn-main.o igen
/libigen.a
1739 @SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES
=
1740 @SIM_ENABLE_IGEN_TRUE@igen_table_LDADD
= igen
/table-main.o igen
/libigen.a
1741 @SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS
= \
1742 @SIM_ENABLE_IGEN_TRUE@
$(IGEN
) \
1743 @SIM_ENABLE_IGEN_TRUE@ igen
/filter \
1744 @SIM_ENABLE_IGEN_TRUE@ igen
/gen \
1745 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache \
1746 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode \
1747 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn \
1748 @SIM_ENABLE_IGEN_TRUE@ igen
/table
1750 EXTRA_DEJAGNU_SITE_CONFIG
= site-sim-config.exp
1752 # Custom verbose test variables that automake doesn't provide (yet?).
1753 AM_V_RUNTEST
= $(AM_V_RUNTEST_@AM_V@
)
1754 AM_V_RUNTEST_
= $(AM_V_RUNTEST_@AM_DEFAULT_V@
)
1755 AM_V_RUNTEST_0
= @echo
" RUNTEST $(RUNTESTFLAGS) $*";
1758 LC_ALL
=C
; export LC_ALL
; \
1759 EXPECT
=${EXPECT} ; export EXPECT
; \
1760 runtest
=$(RUNTEST
); \
1761 $$runtest $(RUNTESTFLAGS
)
1763 testsuite_common_CPPFLAGS
= \
1764 -I
$(srcdir)/common \
1765 -I
$(srcroot
)/include \
1768 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES
=
1769 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD
= \
1770 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(common_libcommon_a_OBJECTS
) \
1771 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(patsubst %,aarch64
/%,$(SIM_NEW_COMMON_OBJS
)) \
1772 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(patsubst %,aarch64
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
1773 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/cpustate.o \
1774 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/interp.o \
1775 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/memory.o \
1776 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/modules.o \
1777 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/sim-resume.o \
1778 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/simulator.o
1780 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES
=
1781 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD
= \
1782 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/nrun.o \
1783 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/libsim.a \
1784 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(SIM_COMMON_LIBS
)
1786 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES
=
1787 @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD
= \
1788 @SIM_ENABLE_ARCH_arm_TRUE@
$(common_libcommon_a_OBJECTS
) \
1789 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/wrapper.o \
1790 @SIM_ENABLE_ARCH_arm_TRUE@
$(patsubst %,arm
/%,$(SIM_NEW_COMMON_OBJS
)) \
1791 @SIM_ENABLE_ARCH_arm_TRUE@
$(patsubst %,arm
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
1792 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armemu.o \
1793 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armemu32.o arm
/arminit.o arm
/armos.o arm
/armsupp.o \
1794 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armvirt.o arm
/thumbemu.o \
1795 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/armcopro.o arm
/maverick.o arm
/iwmmxt.o \
1796 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/modules.o
1798 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES
=
1799 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD
= \
1800 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/nrun.o \
1801 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/libsim.a \
1802 @SIM_ENABLE_ARCH_arm_TRUE@
$(SIM_COMMON_LIBS
)
1804 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir
= $(docdir
)/arm
1805 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA
= arm
/README
1806 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES
=
1807 @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD
= \
1808 @SIM_ENABLE_ARCH_avr_TRUE@
$(common_libcommon_a_OBJECTS
) \
1809 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/interp.o \
1810 @SIM_ENABLE_ARCH_avr_TRUE@
$(patsubst %,avr
/%,$(SIM_NEW_COMMON_OBJS
)) \
1811 @SIM_ENABLE_ARCH_avr_TRUE@
$(patsubst %,avr
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
1812 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/modules.o \
1813 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/sim-resume.o
1815 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES
=
1816 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD
= \
1817 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/nrun.o \
1818 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/libsim.a \
1819 @SIM_ENABLE_ARCH_avr_TRUE@
$(SIM_COMMON_LIBS
)
1821 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES
=
1822 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD
= \
1823 @SIM_ENABLE_ARCH_bfin_TRUE@
$(common_libcommon_a_OBJECTS
) \
1824 @SIM_ENABLE_ARCH_bfin_TRUE@
$(patsubst %,bfin
/%,$(SIM_NEW_COMMON_OBJS
)) \
1825 @SIM_ENABLE_ARCH_bfin_TRUE@
$(patsubst %,bfin
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
1826 @SIM_ENABLE_ARCH_bfin_TRUE@
$(patsubst %,bfin
/dv-
%.o
,$(bfin_SIM_EXTRA_HW_DEVICES
)) \
1827 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/bfin-sim.o \
1828 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/devices.o \
1829 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/gui.o \
1830 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/interp.o \
1831 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/machs.o \
1832 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/modules.o \
1833 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/sim-resume.o
1835 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES
=
1836 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD
= \
1837 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/nrun.o \
1838 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/libsim.a \
1839 @SIM_ENABLE_ARCH_bfin_TRUE@
$(SIM_COMMON_LIBS
)
1841 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES
= \
1842 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_cec \
1843 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ctimer \
1844 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dma \
1845 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dmac \
1846 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_amc \
1847 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_ddrc \
1848 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_sdc \
1849 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_emac \
1850 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_eppi \
1851 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_evt \
1852 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio \
1853 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio2 \
1854 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gptimer \
1855 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_jtag \
1856 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_mmu \
1857 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_nfc \
1858 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_otp \
1859 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pfmon \
1860 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pint \
1861 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pll \
1862 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ppi \
1863 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_rtc \
1864 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_sic \
1865 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_spi \
1866 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_trace \
1867 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_twi \
1868 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart \
1869 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart2 \
1870 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wdog \
1871 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \
1872 @SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy
1874 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES
=
1875 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD
= \
1876 @SIM_ENABLE_ARCH_bpf_TRUE@
$(common_libcommon_a_OBJECTS
) \
1877 @SIM_ENABLE_ARCH_bpf_TRUE@
$(patsubst %,bpf
/%,$(SIM_NEW_COMMON_OBJS
)) \
1878 @SIM_ENABLE_ARCH_bpf_TRUE@
$(patsubst %,bpf
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
1879 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/modules.o \
1880 @SIM_ENABLE_ARCH_bpf_TRUE@ \
1881 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cgen-run.o \
1882 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cgen-scache.o \
1883 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cgen-trace.o \
1884 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cgen-utils.o \
1885 @SIM_ENABLE_ARCH_bpf_TRUE@ \
1886 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/arch.o \
1887 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/cpu.o \
1888 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/decode-le.o \
1889 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/decode-be.o \
1890 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/sem-le.o \
1891 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/sem-be.o \
1892 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-le.o \
1893 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-be.o \
1894 @SIM_ENABLE_ARCH_bpf_TRUE@ \
1895 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/bpf.o \
1896 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/bpf-helpers.o \
1897 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/sim-if.o \
1898 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/traps.o
1900 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES
=
1901 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD
= \
1902 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/nrun.o \
1903 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/libsim.a \
1904 @SIM_ENABLE_ARCH_bpf_TRUE@
$(SIM_COMMON_LIBS
)
1906 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS
= \
1907 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-le.c \
1908 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/stamp-mloop-le \
1909 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-be.c \
1910 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/stamp-mloop-be
1912 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES
=
1913 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD
= \
1914 @SIM_ENABLE_ARCH_cr16_TRUE@
$(common_libcommon_a_OBJECTS
) \
1915 @SIM_ENABLE_ARCH_cr16_TRUE@
$(patsubst %,cr16
/%,$(SIM_NEW_COMMON_OBJS
)) \
1916 @SIM_ENABLE_ARCH_cr16_TRUE@
$(patsubst %,cr16
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
1917 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/interp.o \
1918 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/modules.o \
1919 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/sim-resume.o \
1920 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/simops.o \
1921 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/table.o
1923 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES
=
1924 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD
= \
1925 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/nrun.o \
1926 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/libsim.a \
1927 @SIM_ENABLE_ARCH_cr16_TRUE@
$(SIM_COMMON_LIBS
)
1929 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS
= \
1930 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/gencode
$(EXEEXT
) \
1931 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/table.c
1933 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES
= cr16
/gencode.c
1934 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD
= cr16
/cr16-opc.o
1935 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES
=
1936 @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD
= \
1937 @SIM_ENABLE_ARCH_cris_TRUE@
$(common_libcommon_a_OBJECTS
) \
1938 @SIM_ENABLE_ARCH_cris_TRUE@
$(patsubst %,cris
/%,$(SIM_NEW_COMMON_OBJS
)) \
1939 @SIM_ENABLE_ARCH_cris_TRUE@
$(patsubst %,cris
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
1940 @SIM_ENABLE_ARCH_cris_TRUE@
$(patsubst %,cris
/dv-
%.o
,$(cris_SIM_EXTRA_HW_DEVICES
)) \
1941 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/modules.o \
1942 @SIM_ENABLE_ARCH_cris_TRUE@ \
1943 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-run.o \
1944 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-scache.o \
1945 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-trace.o \
1946 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cgen-utils.o \
1947 @SIM_ENABLE_ARCH_cris_TRUE@ \
1948 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/arch.o \
1949 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/crisv10f.o \
1950 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cpuv10.o \
1951 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/decodev10.o \
1952 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/modelv10.o \
1953 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv10f.o \
1954 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/crisv32f.o \
1955 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/cpuv32.o \
1956 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/decodev32.o \
1957 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/modelv32.o \
1958 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv32f.o \
1959 @SIM_ENABLE_ARCH_cris_TRUE@ \
1960 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/sim-if.o \
1961 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/traps.o
1963 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES
=
1964 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD
= \
1965 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/nrun.o \
1966 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/libsim.a \
1967 @SIM_ENABLE_ARCH_cris_TRUE@
$(SIM_COMMON_LIBS
)
1969 @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES
= rv cris cris_900000xx
1970 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES
= cris
/rvdummy.c
1971 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD
= $(LIBIBERTY_LIB
)
1972 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS
= \
1973 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv10f.c \
1974 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v10f \
1975 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv32f.c \
1976 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v32f
1978 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES
=
1979 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD
= \
1980 @SIM_ENABLE_ARCH_d10v_TRUE@
$(common_libcommon_a_OBJECTS
) \
1981 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/interp.o \
1982 @SIM_ENABLE_ARCH_d10v_TRUE@
$(patsubst %,d10v
/%,$(SIM_NEW_COMMON_OBJS
)) \
1983 @SIM_ENABLE_ARCH_d10v_TRUE@
$(patsubst %,d10v
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
1984 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/endian.o \
1985 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/modules.o \
1986 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/sim-resume.o \
1987 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/simops.o \
1988 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/table.o
1990 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES
=
1991 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD
= \
1992 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/nrun.o \
1993 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/libsim.a \
1994 @SIM_ENABLE_ARCH_d10v_TRUE@
$(SIM_COMMON_LIBS
)
1996 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS
= \
1997 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/gencode
$(EXEEXT
) \
1998 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/table.c
2000 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES
= d10v
/gencode.c
2001 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD
= d10v
/d10v-opc.o
2002 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES
=
2003 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD
= \
2004 @SIM_ENABLE_ARCH_erc32_TRUE@
$(common_libcommon_a_OBJECTS
) \
2005 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/erc32.o \
2006 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/exec.o \
2007 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/float.o \
2008 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/func.o \
2009 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/help.o \
2010 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/interf.o \
2011 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/modules.o
2013 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES
=
2014 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD
= \
2015 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/sis.o \
2016 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/libsim.a \
2017 @SIM_ENABLE_ARCH_erc32_TRUE@
$(SIM_COMMON_LIBS
) $(READLINE_LIB
) $(TERMCAP_LIB
)
2019 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir
= $(docdir
)/erc32
2020 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA
= erc32
/README.erc32 erc32
/README.gdb erc32
/README.sis
2021 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES
=
2022 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD
= \
2023 @SIM_ENABLE_ARCH_examples_TRUE@
$(common_libcommon_a_OBJECTS
) \
2024 @SIM_ENABLE_ARCH_examples_TRUE@
$(patsubst %,example-synacor
/%,$(SIM_NEW_COMMON_OBJS
)) \
2025 @SIM_ENABLE_ARCH_examples_TRUE@
$(patsubst %,example-synacor
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2026 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/interp.o \
2027 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/modules.o \
2028 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/sim-main.o \
2029 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/sim-resume.o
2031 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES
=
2032 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD
= \
2033 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/nrun.o \
2034 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/libsim.a \
2035 @SIM_ENABLE_ARCH_examples_TRUE@
$(SIM_COMMON_LIBS
)
2037 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES
=
2038 @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD
= \
2039 @SIM_ENABLE_ARCH_frv_TRUE@
$(common_libcommon_a_OBJECTS
) \
2040 @SIM_ENABLE_ARCH_frv_TRUE@
$(patsubst %,frv
/%,$(SIM_NEW_COMMON_OBJS
)) \
2041 @SIM_ENABLE_ARCH_frv_TRUE@
$(patsubst %,frv
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2042 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/modules.o \
2043 @SIM_ENABLE_ARCH_frv_TRUE@ \
2044 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-accfp.o \
2045 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-fpu.o \
2046 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-run.o \
2047 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-scache.o \
2048 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-trace.o \
2049 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-utils.o \
2050 @SIM_ENABLE_ARCH_frv_TRUE@ \
2051 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/arch.o \
2052 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cgen-par.o \
2053 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cpu.o \
2054 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/decode.o \
2055 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/frv.o \
2056 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/mloop.o \
2057 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/model.o \
2058 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/sem.o \
2059 @SIM_ENABLE_ARCH_frv_TRUE@ \
2060 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/cache.o \
2061 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/interrupts.o \
2062 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/memory.o \
2063 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/options.o \
2064 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/pipeline.o \
2065 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile.o \
2066 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr400.o \
2067 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr450.o \
2068 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr500.o \
2069 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/profile-fr550.o \
2070 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/registers.o \
2071 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/reset.o \
2072 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/sim-if.o \
2073 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/traps.o
2075 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES
=
2076 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD
= \
2077 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/nrun.o \
2078 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/libsim.a \
2079 @SIM_ENABLE_ARCH_frv_TRUE@
$(SIM_COMMON_LIBS
)
2081 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir
= $(docdir
)/frv
2082 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA
= frv
/README
2083 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS
= \
2084 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/mloop.c \
2085 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/stamp-mloop
2087 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES
=
2088 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD
= \
2089 @SIM_ENABLE_ARCH_ft32_TRUE@
$(common_libcommon_a_OBJECTS
) \
2090 @SIM_ENABLE_ARCH_ft32_TRUE@
$(patsubst %,ft32
/%,$(SIM_NEW_COMMON_OBJS
)) \
2091 @SIM_ENABLE_ARCH_ft32_TRUE@
$(patsubst %,ft32
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2092 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/interp.o \
2093 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/modules.o \
2094 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/sim-resume.o
2096 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES
=
2097 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD
= \
2098 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/nrun.o \
2099 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/libsim.a \
2100 @SIM_ENABLE_ARCH_ft32_TRUE@
$(SIM_COMMON_LIBS
)
2102 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES
=
2103 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD
= \
2104 @SIM_ENABLE_ARCH_h8300_TRUE@
$(common_libcommon_a_OBJECTS
) \
2105 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/compile.o \
2106 @SIM_ENABLE_ARCH_h8300_TRUE@
$(patsubst %,h8300
/%,$(SIM_NEW_COMMON_OBJS
)) \
2107 @SIM_ENABLE_ARCH_h8300_TRUE@
$(patsubst %,h8300
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2108 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/modules.o \
2109 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/sim-resume.o
2111 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES
=
2112 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD
= \
2113 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/nrun.o \
2114 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/libsim.a \
2115 @SIM_ENABLE_ARCH_h8300_TRUE@
$(SIM_COMMON_LIBS
)
2117 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES
=
2118 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD
= \
2119 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(common_libcommon_a_OBJECTS
) \
2120 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(patsubst %,iq2000
/%,$(SIM_NEW_COMMON_OBJS
)) \
2121 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(patsubst %,iq2000
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2122 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/modules.o \
2123 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2124 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-run.o \
2125 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-scache.o \
2126 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-trace.o \
2127 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cgen-utils.o \
2128 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2129 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/arch.o \
2130 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/cpu.o \
2131 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/decode.o \
2132 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/iq2000.o \
2133 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/sem.o \
2134 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/mloop.o \
2135 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/model.o \
2136 @SIM_ENABLE_ARCH_iq2000_TRUE@ \
2137 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/sim-if.o
2139 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES
=
2140 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD
= \
2141 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/nrun.o \
2142 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/libsim.a \
2143 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(SIM_COMMON_LIBS
)
2145 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS
= \
2146 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/mloop.c \
2147 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/stamp-mloop
2149 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES
=
2150 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD
= \
2151 @SIM_ENABLE_ARCH_lm32_TRUE@
$(common_libcommon_a_OBJECTS
) \
2152 @SIM_ENABLE_ARCH_lm32_TRUE@
$(patsubst %,lm32
/%,$(SIM_NEW_COMMON_OBJS
)) \
2153 @SIM_ENABLE_ARCH_lm32_TRUE@
$(patsubst %,lm32
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2154 @SIM_ENABLE_ARCH_lm32_TRUE@
$(patsubst %,lm32
/dv-
%.o
,$(lm32_SIM_EXTRA_HW_DEVICES
)) \
2155 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/modules.o \
2156 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2157 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-run.o \
2158 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-scache.o \
2159 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-trace.o \
2160 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cgen-utils.o \
2161 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2162 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/arch.o \
2163 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/cpu.o \
2164 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/decode.o \
2165 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/sem.o \
2166 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/mloop.o \
2167 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/model.o \
2168 @SIM_ENABLE_ARCH_lm32_TRUE@ \
2169 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/lm32.o \
2170 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/sim-if.o \
2171 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/traps.o \
2172 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/user.o
2174 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES
=
2175 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD
= \
2176 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/nrun.o \
2177 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/libsim.a \
2178 @SIM_ENABLE_ARCH_lm32_TRUE@
$(SIM_COMMON_LIBS
)
2180 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES
= lm32cpu lm32timer lm32uart
2181 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS
= \
2182 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/mloop.c \
2183 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/stamp-mloop
2185 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES
=
2186 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD
= \
2187 @SIM_ENABLE_ARCH_m32c_TRUE@
$(common_libcommon_a_OBJECTS
) \
2188 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/gdb-if.o \
2189 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/int.o \
2190 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/load.o \
2191 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/m32c.o \
2192 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/mem.o \
2193 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/misc.o \
2194 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/modules.o \
2195 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/r8c.o \
2196 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/reg.o \
2197 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/srcdest.o \
2198 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/syscalls.o \
2199 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/trace.o
2201 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES
=
2202 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD
= \
2203 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/main.o \
2204 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/libsim.a \
2205 @SIM_ENABLE_ARCH_m32c_TRUE@
$(SIM_COMMON_LIBS
)
2207 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS
= \
2208 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/opc2c
$(EXEEXT
) \
2209 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/m32c.c \
2210 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/r8c.c
2212 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES
= m32c
/opc2c.c
2214 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable
2215 # leak detection while running it.
2216 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN
= ASAN_OPTIONS
=detect_leaks
=0 m32c
/opc2c
$(EXEEXT
)
2217 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES
=
2218 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD
= \
2219 @SIM_ENABLE_ARCH_m32r_TRUE@
$(common_libcommon_a_OBJECTS
) \
2220 @SIM_ENABLE_ARCH_m32r_TRUE@
$(patsubst %,m32r
/%,$(SIM_NEW_COMMON_OBJS
)) \
2221 @SIM_ENABLE_ARCH_m32r_TRUE@
$(patsubst %,m32r
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2222 @SIM_ENABLE_ARCH_m32r_TRUE@
$(patsubst %,m32r
/dv-
%.o
,$(m32r_SIM_EXTRA_HW_DEVICES
)) \
2223 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/modules.o \
2224 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2225 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-run.o \
2226 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-scache.o \
2227 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-trace.o \
2228 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cgen-utils.o \
2229 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2230 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/arch.o \
2231 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2232 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/m32r.o \
2233 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cpu.o \
2234 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/decode.o \
2235 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/sem.o \
2236 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/model.o \
2237 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop.o \
2238 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2239 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/m32rx.o \
2240 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cpux.o \
2241 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/decodex.o \
2242 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/modelx.o \
2243 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloopx.o \
2244 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2245 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/m32r2.o \
2246 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/cpu2.o \
2247 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/decode2.o \
2248 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/model2.o \
2249 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop2.o \
2250 @SIM_ENABLE_ARCH_m32r_TRUE@ \
2251 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/sim-if.o \
2252 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/traps.o
2254 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES
=
2255 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD
= \
2256 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/nrun.o \
2257 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/libsim.a \
2258 @SIM_ENABLE_ARCH_m32r_TRUE@
$(SIM_COMMON_LIBS
)
2260 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES
= m32r_cache m32r_uart
2261 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS
= \
2262 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop.c \
2263 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop \
2264 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloopx.c \
2265 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-x \
2266 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop2.c \
2267 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-2
2269 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES
=
2270 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD
= \
2271 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(common_libcommon_a_OBJECTS
) \
2272 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/interp.o \
2273 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11int.o \
2274 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc12int.o \
2275 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/emulos.o \
2276 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/interrupts.o \
2277 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11_sim.o \
2278 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(patsubst %,m68hc11
/%,$(SIM_NEW_COMMON_OBJS
)) \
2279 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(patsubst %,m68hc11
/dv-
%.o
,$(SIM_HW_DEVICES
)) \
2280 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(patsubst %,m68hc11
/dv-
%.o
,$(m68hc11_SIM_EXTRA_HW_DEVICES
)) \
2281 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/modules.o \
2282 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/sim-resume.o
2284 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES
=
2285 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD
= \
2286 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/nrun.o \
2287 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/libsim.a \
2288 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(SIM_COMMON_LIBS
)
2290 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES
= m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
2291 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS
= \
2292 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/gencode
$(EXEEXT
) \
2293 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11int.c \
2294 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc12int.c
2296 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES
= m68hc11
/gencode.c
2297 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES
=
2298 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD
= \
2299 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/nrun.o \
2300 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/libsim.a \
2301 @SIM_ENABLE_ARCH_mcore_TRUE@
$(SIM_COMMON_LIBS
)
2303 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES
=
2304 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD
= \
2305 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/nrun.o \
2306 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/libsim.a \
2307 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(SIM_COMMON_LIBS
)
2309 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES
=
2310 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD
= \
2311 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/nrun.o \
2312 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/libsim.a \
2313 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_COMMON_LIBS
)
2315 @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES
= tx3904cpu tx3904irc tx3904tmr tx3904sio
2316 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE
= \
2317 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/itable.h \
2318 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/itable.c
2320 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE
= \
2321 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/icache.h \
2322 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/icache.c \
2323 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/idecode.h \
2324 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/idecode.c \
2325 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/semantics.h \
2326 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/semantics.c \
2327 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/model.h \
2328 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/model.c \
2329 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/support.h \
2330 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/support.c \
2331 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/engine.h \
2332 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/engine.c \
2333 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/irun.c
2335 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16
= \
2336 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_icache.h \
2337 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_icache.c \
2338 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_idecode.h \
2339 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_idecode.c \
2340 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_semantics.h \
2341 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_semantics.c \
2342 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_model.h \
2343 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_model.c \
2344 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_support.h \
2345 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16_support.c \
2346 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32
= \
2347 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_icache.h \
2348 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_icache.c \
2349 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_idecode.h \
2350 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_idecode.c \
2351 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_semantics.h \
2352 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_semantics.c \
2353 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_model.h \
2354 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_model.c \
2355 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_support.h \
2356 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m32_support.c
2358 @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS
= \
2359 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_IGEN_ITABLE
) \
2360 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/stamp-igen-itable \
2361 @SIM_ENABLE_ARCH_mips_TRUE@
$(am__append_89
) $(am__append_90
) \
2362 @SIM_ENABLE_ARCH_mips_TRUE@
$(am__append_91
)
2363 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2364 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN
= $(srcdir)/mips
/mips.igen
2365 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC
= \
2366 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/dsp.igen \
2367 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/dsp2.igen \
2368 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16.igen \
2369 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/m16e.igen \
2370 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mdmx.igen \
2371 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/micromipsdsp.igen \
2372 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/micromips.igen \
2373 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3264r2.igen \
2374 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3264r6.igen \
2375 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/mips3d.igen \
2376 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/sb1.igen \
2377 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/tx.igen \
2378 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/vr.igen
2380 @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC
= $(srcdir)/mips
/mips.dc
2381 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC
= $(srcdir)/mips
/m16.dc
2382 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC
= $(srcdir)/mips
/micromips.dc
2383 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC
= $(srcdir)/mips
/micromips16.dc
2384 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES
=
2385 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD
= \
2386 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/nrun.o \
2387 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/libsim.a \
2388 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(SIM_COMMON_LIBS
)
2390 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES
= mn103cpu mn103int mn103tim mn103ser mn103iop
2391 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN
= \
2392 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.h \
2393 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.c \
2394 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.h \
2395 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.c \
2396 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.h \
2397 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.c \
2398 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.h \
2399 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.c \
2400 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.h \
2401 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.c \
2402 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.h \
2403 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.c \
2404 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.h \
2405 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/engine.c \
2406 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/irun.c
2408 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS
= \
2409 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_BUILT_SRC_FROM_IGEN
) \
2410 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/stamp-igen
2412 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2413 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN
= $(srcdir)/mn10300
/mn10300.igen
2414 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC
= mn10300
/am33.igen mn10300
/am33-2.igen
2415 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC
= $(srcdir)/mn10300
/mn10300.dc
2416 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES
=
2417 @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD
= \
2418 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/nrun.o \
2419 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
/libsim.a \
2420 @SIM_ENABLE_ARCH_moxie_TRUE@
$(SIM_COMMON_LIBS
)
2422 @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir
= $(datadir)/gdb
/dtb
2423 @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA
= moxie
/moxie-gdb.dtb
2424 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES
=
2425 @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD
= \
2426 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/nrun.o \
2427 @SIM_ENABLE_ARCH_msp430_TRUE@ msp430
/libsim.a \
2428 @SIM_ENABLE_ARCH_msp430_TRUE@
$(SIM_COMMON_LIBS
)
2430 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES
=
2431 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD
= \
2432 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/nrun.o \
2433 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/libsim.a \
2434 @SIM_ENABLE_ARCH_or1k_TRUE@
$(SIM_COMMON_LIBS
)
2436 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir
= $(docdir
)/or1k
2437 @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA
= or1k
/README
2438 @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS
= \
2439 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/mloop.c \
2440 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
/stamp-mloop
2442 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES
=
2443 @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD
= \
2444 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/main.o \
2445 @SIM_ENABLE_ARCH_ppc_TRUE@ ppc
/libsim.a \
2446 @SIM_ENABLE_ARCH_ppc_TRUE@
$(SIM_COMMON_LIBS
)
2448 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir
= $(docdir
)/ppc
2449 @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA
= ppc
/BUGS ppc
/INSTALL ppc
/README ppc
/RUN
2450 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES
=
2451 @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD
= \
2452 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/nrun.o \
2453 @SIM_ENABLE_ARCH_pru_TRUE@ pru
/libsim.a \
2454 @SIM_ENABLE_ARCH_pru_TRUE@
$(SIM_COMMON_LIBS
)
2456 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES
=
2457 @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD
= \
2458 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/nrun.o \
2459 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
/libsim.a \
2460 @SIM_ENABLE_ARCH_riscv_TRUE@
$(SIM_COMMON_LIBS
)
2462 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES
=
2463 @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD
= \
2464 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/main.o \
2465 @SIM_ENABLE_ARCH_rl78_TRUE@ rl78
/libsim.a \
2466 @SIM_ENABLE_ARCH_rl78_TRUE@
$(SIM_COMMON_LIBS
)
2468 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES
=
2469 @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD
= \
2470 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/main.o \
2471 @SIM_ENABLE_ARCH_rx_TRUE@ rx
/libsim.a \
2472 @SIM_ENABLE_ARCH_rx_TRUE@
$(SIM_COMMON_LIBS
)
2474 @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir
= $(docdir
)/rx
2475 @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA
= rx
/README.txt
2476 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES
=
2477 @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD
= \
2478 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/nrun.o \
2479 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/libsim.a \
2480 @SIM_ENABLE_ARCH_sh_TRUE@
$(SIM_COMMON_LIBS
)
2482 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS
= \
2483 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/gencode
$(EXEEXT
) \
2484 @SIM_ENABLE_ARCH_sh_TRUE@ sh
/table.c
2486 @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES
= sh
/gencode.c
2487 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES
=
2488 @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD
= \
2489 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/nrun.o \
2490 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/libsim.a \
2491 @SIM_ENABLE_ARCH_v850_TRUE@
$(SIM_COMMON_LIBS
)
2493 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN
= \
2494 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.h \
2495 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/icache.c \
2496 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.h \
2497 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/idecode.c \
2498 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/semantics.h \
2499 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/semantics.c \
2500 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/model.h \
2501 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/model.c \
2502 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.h \
2503 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/support.c \
2504 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/itable.h \
2505 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/itable.c \
2506 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.h \
2507 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/engine.c \
2508 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/irun.c
2510 @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS
= \
2511 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_BUILT_SRC_FROM_IGEN
) \
2512 @SIM_ENABLE_ARCH_v850_TRUE@ v850
/stamp-igen
2514 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2515 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN
= $(srcdir)/v850
/v850.igen
2516 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC
= $(srcdir)/v850
/v850.dc
2517 all: $(BUILT_SOURCES
) config.h
2518 $(MAKE
) $(AM_MAKEFLAGS
) all-recursive
2521 .SUFFIXES
: .c .lo .log .o .obj .
test .
test$(EXEEXT
) .trs
2522 am--refresh
: Makefile
2524 $(srcdir)/Makefile.in
: @MAINTAINER_MODE_TRUE@
$(srcdir)/Makefile.am
$(srcdir)/common
/local.mk
$(srcdir)/igen
/local.mk
$(srcdir)/testsuite
/local.mk
$(srcdir)/testsuite
/common
/local.mk
$(srcdir)/aarch64
/local.mk
$(srcdir)/arm
/local.mk
$(srcdir)/avr
/local.mk
$(srcdir)/bfin
/local.mk
$(srcdir)/bpf
/local.mk
$(srcdir)/cr16
/local.mk
$(srcdir)/cris
/local.mk
$(srcdir)/d10v
/local.mk
$(srcdir)/erc32
/local.mk
$(srcdir)/example-synacor
/local.mk
$(srcdir)/frv
/local.mk
$(srcdir)/ft32
/local.mk
$(srcdir)/h8300
/local.mk
$(srcdir)/iq2000
/local.mk
$(srcdir)/lm32
/local.mk
$(srcdir)/m32c
/local.mk
$(srcdir)/m32r
/local.mk
$(srcdir)/m68hc11
/local.mk
$(srcdir)/mcore
/local.mk
$(srcdir)/microblaze
/local.mk
$(srcdir)/mips
/local.mk
$(srcdir)/mn10300
/local.mk
$(srcdir)/moxie
/local.mk
$(srcdir)/msp430
/local.mk
$(srcdir)/or1k
/local.mk
$(srcdir)/ppc
/local.mk
$(srcdir)/pru
/local.mk
$(srcdir)/riscv
/local.mk
$(srcdir)/rl78
/local.mk
$(srcdir)/rx
/local.mk
$(srcdir)/sh
/local.mk
$(srcdir)/v850
/local.mk
$(am__configure_deps
)
2525 @for dep in
$?
; do \
2526 case
'$(am__configure_deps)' in \
2528 echo
' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
2529 $(am__cd
) $(srcdir) && $(AUTOMAKE
) --foreign \
2534 echo
' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
2535 $(am__cd
) $(top_srcdir
) && \
2536 $(AUTOMAKE
) --foreign Makefile
2537 Makefile
: $(srcdir)/Makefile.in
$(top_builddir
)/config.status
2540 echo
' $(SHELL) ./config.status'; \
2541 $(SHELL
) .
/config.status
;; \
2543 echo
' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
2544 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
$(am__depfiles_maybe
);; \
2546 $(srcdir)/common
/local.mk
$(srcdir)/igen
/local.mk
$(srcdir)/testsuite
/local.mk
$(srcdir)/testsuite
/common
/local.mk
$(srcdir)/aarch64
/local.mk
$(srcdir)/arm
/local.mk
$(srcdir)/avr
/local.mk
$(srcdir)/bfin
/local.mk
$(srcdir)/bpf
/local.mk
$(srcdir)/cr16
/local.mk
$(srcdir)/cris
/local.mk
$(srcdir)/d10v
/local.mk
$(srcdir)/erc32
/local.mk
$(srcdir)/example-synacor
/local.mk
$(srcdir)/frv
/local.mk
$(srcdir)/ft32
/local.mk
$(srcdir)/h8300
/local.mk
$(srcdir)/iq2000
/local.mk
$(srcdir)/lm32
/local.mk
$(srcdir)/m32c
/local.mk
$(srcdir)/m32r
/local.mk
$(srcdir)/m68hc11
/local.mk
$(srcdir)/mcore
/local.mk
$(srcdir)/microblaze
/local.mk
$(srcdir)/mips
/local.mk
$(srcdir)/mn10300
/local.mk
$(srcdir)/moxie
/local.mk
$(srcdir)/msp430
/local.mk
$(srcdir)/or1k
/local.mk
$(srcdir)/ppc
/local.mk
$(srcdir)/pru
/local.mk
$(srcdir)/riscv
/local.mk
$(srcdir)/rl78
/local.mk
$(srcdir)/rx
/local.mk
$(srcdir)/sh
/local.mk
$(srcdir)/v850
/local.mk
$(am__empty
):
2548 $(top_builddir
)/config.status
: $(top_srcdir
)/configure
$(CONFIG_STATUS_DEPENDENCIES
)
2549 $(SHELL
) .
/config.status
--recheck
2551 $(top_srcdir
)/configure
: @MAINTAINER_MODE_TRUE@
$(am__configure_deps
)
2552 $(am__cd
) $(srcdir) && $(AUTOCONF
)
2553 $(ACLOCAL_M4
): @MAINTAINER_MODE_TRUE@
$(am__aclocal_m4_deps
)
2554 $(am__cd
) $(srcdir) && $(ACLOCAL
) $(ACLOCAL_AMFLAGS
)
2555 $(am__aclocal_m4_deps
):
2558 @
test -f
$@ ||
rm -f stamp-h1
2559 @
test -f
$@ ||
$(MAKE
) $(AM_MAKEFLAGS
) stamp-h1
2561 stamp-h1
: $(srcdir)/config.h.in
$(top_builddir
)/config.status
2563 cd
$(top_builddir
) && $(SHELL
) .
/config.status config.h
2564 $(srcdir)/config.h.in
: @MAINTAINER_MODE_TRUE@
$(am__configure_deps
)
2565 ($(am__cd
) $(top_srcdir
) && $(AUTOHEADER
))
2570 -rm -f config.h stamp-h1
2571 Make-common.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/Make-common.in
2572 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2573 aarch64
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/aarch64
/Makefile.in
2574 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2575 aarch64
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2576 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2577 arm
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/arm
/Makefile.in
2578 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2579 arm
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2580 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2581 avr
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/avr
/Makefile.in
2582 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2583 avr
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2584 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2585 bfin
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/bfin
/Makefile.in
2586 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2587 bfin
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2588 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2589 bpf
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/bpf
/Makefile.in
2590 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2591 bpf
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2592 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2593 cr16
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/cr16
/Makefile.in
2594 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2595 cr16
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2596 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2597 cris
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/cris
/Makefile.in
2598 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2599 cris
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2600 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2601 d10v
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/d10v
/Makefile.in
2602 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2603 d10v
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2604 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2605 frv
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/frv
/Makefile.in
2606 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2607 frv
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2608 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2609 ft32
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/ft32
/Makefile.in
2610 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2611 ft32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2612 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2613 h8300
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/h8300
/Makefile.in
2614 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2615 h8300
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2616 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2617 iq2000
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/iq2000
/Makefile.in
2618 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2619 iq2000
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2620 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2621 lm32
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/lm32
/Makefile.in
2622 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2623 lm32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2624 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2625 m32c
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/m32c
/Makefile.in
2626 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2627 m32c
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2628 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2629 m32r
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/m32r
/Makefile.in
2630 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2631 m32r
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2632 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2633 m68hc11
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/m68hc11
/Makefile.in
2634 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2635 m68hc11
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2636 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2637 mcore
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/mcore
/Makefile.in
2638 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2639 mcore
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2640 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2641 microblaze
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/microblaze
/Makefile.in
2642 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2643 microblaze
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2644 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2645 mips
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/mips
/Makefile.in
2646 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2647 mips
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2648 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2649 mn10300
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/mn10300
/Makefile.in
2650 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2651 mn10300
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2652 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2653 moxie
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/moxie
/Makefile.in
2654 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2655 moxie
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2656 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2657 msp430
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/msp430
/Makefile.in
2658 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2659 msp430
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2660 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2661 or1k
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/or1k
/Makefile.in
2662 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2663 or1k
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2664 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2665 ppc
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2666 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2667 pru
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/pru
/Makefile.in
2668 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2669 pru
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2670 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2671 riscv
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/riscv
/Makefile.in
2672 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2673 riscv
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2674 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2675 rl78
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/rl78
/Makefile.in
2676 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2677 rl78
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2678 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2679 rx
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/rx
/Makefile.in
2680 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2681 rx
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2682 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2683 sh
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/sh
/Makefile.in
2684 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2685 sh
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2686 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2687 erc32
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/erc32
/Makefile.in
2688 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2689 erc32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2690 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2691 v850
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/v850
/Makefile.in
2692 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2693 v850
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2694 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2695 example-synacor
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/example-synacor
/Makefile.in
2696 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2697 example-synacor
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
2698 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2699 arch-subdir.mk
: $(top_builddir
)/config.status
$(srcdir)/arch-subdir.mk.in
2700 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2701 .gdbinit
: $(top_builddir
)/config.status
$(srcdir)/gdbinit.in
2702 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
2704 clean-noinstLIBRARIES
:
2705 -test -z
"$(noinst_LIBRARIES)" ||
rm -f
$(noinst_LIBRARIES
)
2706 aarch64
/$(am__dirstamp
):
2708 @
: > aarch64
/$(am__dirstamp
)
2710 aarch64
/libsim.a
: $(aarch64_libsim_a_OBJECTS
) $(aarch64_libsim_a_DEPENDENCIES
) $(EXTRA_aarch64_libsim_a_DEPENDENCIES
) aarch64
/$(am__dirstamp
)
2711 $(AM_V_at
)-rm -f aarch64
/libsim.a
2712 $(AM_V_AR
)$(aarch64_libsim_a_AR
) aarch64
/libsim.a
$(aarch64_libsim_a_OBJECTS
) $(aarch64_libsim_a_LIBADD
)
2713 $(AM_V_at
)$(RANLIB
) aarch64
/libsim.a
2714 arm
/$(am__dirstamp
):
2716 @
: > arm
/$(am__dirstamp
)
2718 arm
/libsim.a
: $(arm_libsim_a_OBJECTS
) $(arm_libsim_a_DEPENDENCIES
) $(EXTRA_arm_libsim_a_DEPENDENCIES
) arm
/$(am__dirstamp
)
2719 $(AM_V_at
)-rm -f arm
/libsim.a
2720 $(AM_V_AR
)$(arm_libsim_a_AR
) arm
/libsim.a
$(arm_libsim_a_OBJECTS
) $(arm_libsim_a_LIBADD
)
2721 $(AM_V_at
)$(RANLIB
) arm
/libsim.a
2722 avr
/$(am__dirstamp
):
2724 @
: > avr
/$(am__dirstamp
)
2726 avr
/libsim.a
: $(avr_libsim_a_OBJECTS
) $(avr_libsim_a_DEPENDENCIES
) $(EXTRA_avr_libsim_a_DEPENDENCIES
) avr
/$(am__dirstamp
)
2727 $(AM_V_at
)-rm -f avr
/libsim.a
2728 $(AM_V_AR
)$(avr_libsim_a_AR
) avr
/libsim.a
$(avr_libsim_a_OBJECTS
) $(avr_libsim_a_LIBADD
)
2729 $(AM_V_at
)$(RANLIB
) avr
/libsim.a
2730 bfin
/$(am__dirstamp
):
2732 @
: > bfin
/$(am__dirstamp
)
2734 bfin
/libsim.a
: $(bfin_libsim_a_OBJECTS
) $(bfin_libsim_a_DEPENDENCIES
) $(EXTRA_bfin_libsim_a_DEPENDENCIES
) bfin
/$(am__dirstamp
)
2735 $(AM_V_at
)-rm -f bfin
/libsim.a
2736 $(AM_V_AR
)$(bfin_libsim_a_AR
) bfin
/libsim.a
$(bfin_libsim_a_OBJECTS
) $(bfin_libsim_a_LIBADD
)
2737 $(AM_V_at
)$(RANLIB
) bfin
/libsim.a
2738 bpf
/$(am__dirstamp
):
2740 @
: > bpf
/$(am__dirstamp
)
2742 bpf
/libsim.a
: $(bpf_libsim_a_OBJECTS
) $(bpf_libsim_a_DEPENDENCIES
) $(EXTRA_bpf_libsim_a_DEPENDENCIES
) bpf
/$(am__dirstamp
)
2743 $(AM_V_at
)-rm -f bpf
/libsim.a
2744 $(AM_V_AR
)$(bpf_libsim_a_AR
) bpf
/libsim.a
$(bpf_libsim_a_OBJECTS
) $(bpf_libsim_a_LIBADD
)
2745 $(AM_V_at
)$(RANLIB
) bpf
/libsim.a
2746 common
/$(am__dirstamp
):
2748 @
: > common
/$(am__dirstamp
)
2749 common
/$(DEPDIR
)/$(am__dirstamp
):
2750 @
$(MKDIR_P
) common
/$(DEPDIR
)
2751 @
: > common
/$(DEPDIR
)/$(am__dirstamp
)
2752 common
/callback.
$(OBJEXT
): common
/$(am__dirstamp
) \
2753 common
/$(DEPDIR
)/$(am__dirstamp
)
2754 common
/portability.
$(OBJEXT
): common
/$(am__dirstamp
) \
2755 common
/$(DEPDIR
)/$(am__dirstamp
)
2756 common
/sim-load.
$(OBJEXT
): common
/$(am__dirstamp
) \
2757 common
/$(DEPDIR
)/$(am__dirstamp
)
2758 common
/syscall.
$(OBJEXT
): common
/$(am__dirstamp
) \
2759 common
/$(DEPDIR
)/$(am__dirstamp
)
2760 common
/target-newlib-errno.
$(OBJEXT
): common
/$(am__dirstamp
) \
2761 common
/$(DEPDIR
)/$(am__dirstamp
)
2762 common
/target-newlib-open.
$(OBJEXT
): common
/$(am__dirstamp
) \
2763 common
/$(DEPDIR
)/$(am__dirstamp
)
2764 common
/target-newlib-signal.
$(OBJEXT
): common
/$(am__dirstamp
) \
2765 common
/$(DEPDIR
)/$(am__dirstamp
)
2766 common
/target-newlib-syscall.
$(OBJEXT
): common
/$(am__dirstamp
) \
2767 common
/$(DEPDIR
)/$(am__dirstamp
)
2768 common
/version.
$(OBJEXT
): common
/$(am__dirstamp
) \
2769 common
/$(DEPDIR
)/$(am__dirstamp
)
2771 common
/libcommon.a
: $(common_libcommon_a_OBJECTS
) $(common_libcommon_a_DEPENDENCIES
) $(EXTRA_common_libcommon_a_DEPENDENCIES
) common
/$(am__dirstamp
)
2772 $(AM_V_at
)-rm -f common
/libcommon.a
2773 $(AM_V_AR
)$(common_libcommon_a_AR
) common
/libcommon.a
$(common_libcommon_a_OBJECTS
) $(common_libcommon_a_LIBADD
)
2774 $(AM_V_at
)$(RANLIB
) common
/libcommon.a
2775 cr16
/$(am__dirstamp
):
2777 @
: > cr16
/$(am__dirstamp
)
2779 cr16
/libsim.a
: $(cr16_libsim_a_OBJECTS
) $(cr16_libsim_a_DEPENDENCIES
) $(EXTRA_cr16_libsim_a_DEPENDENCIES
) cr16
/$(am__dirstamp
)
2780 $(AM_V_at
)-rm -f cr16
/libsim.a
2781 $(AM_V_AR
)$(cr16_libsim_a_AR
) cr16
/libsim.a
$(cr16_libsim_a_OBJECTS
) $(cr16_libsim_a_LIBADD
)
2782 $(AM_V_at
)$(RANLIB
) cr16
/libsim.a
2783 cris
/$(am__dirstamp
):
2785 @
: > cris
/$(am__dirstamp
)
2787 cris
/libsim.a
: $(cris_libsim_a_OBJECTS
) $(cris_libsim_a_DEPENDENCIES
) $(EXTRA_cris_libsim_a_DEPENDENCIES
) cris
/$(am__dirstamp
)
2788 $(AM_V_at
)-rm -f cris
/libsim.a
2789 $(AM_V_AR
)$(cris_libsim_a_AR
) cris
/libsim.a
$(cris_libsim_a_OBJECTS
) $(cris_libsim_a_LIBADD
)
2790 $(AM_V_at
)$(RANLIB
) cris
/libsim.a
2791 d10v
/$(am__dirstamp
):
2793 @
: > d10v
/$(am__dirstamp
)
2795 d10v
/libsim.a
: $(d10v_libsim_a_OBJECTS
) $(d10v_libsim_a_DEPENDENCIES
) $(EXTRA_d10v_libsim_a_DEPENDENCIES
) d10v
/$(am__dirstamp
)
2796 $(AM_V_at
)-rm -f d10v
/libsim.a
2797 $(AM_V_AR
)$(d10v_libsim_a_AR
) d10v
/libsim.a
$(d10v_libsim_a_OBJECTS
) $(d10v_libsim_a_LIBADD
)
2798 $(AM_V_at
)$(RANLIB
) d10v
/libsim.a
2799 erc32
/$(am__dirstamp
):
2801 @
: > erc32
/$(am__dirstamp
)
2803 erc32
/libsim.a
: $(erc32_libsim_a_OBJECTS
) $(erc32_libsim_a_DEPENDENCIES
) $(EXTRA_erc32_libsim_a_DEPENDENCIES
) erc32
/$(am__dirstamp
)
2804 $(AM_V_at
)-rm -f erc32
/libsim.a
2805 $(AM_V_AR
)$(erc32_libsim_a_AR
) erc32
/libsim.a
$(erc32_libsim_a_OBJECTS
) $(erc32_libsim_a_LIBADD
)
2806 $(AM_V_at
)$(RANLIB
) erc32
/libsim.a
2807 example-synacor
/$(am__dirstamp
):
2808 @
$(MKDIR_P
) example-synacor
2809 @
: > example-synacor
/$(am__dirstamp
)
2811 example-synacor
/libsim.a
: $(example_synacor_libsim_a_OBJECTS
) $(example_synacor_libsim_a_DEPENDENCIES
) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES
) example-synacor
/$(am__dirstamp
)
2812 $(AM_V_at
)-rm -f example-synacor
/libsim.a
2813 $(AM_V_AR
)$(example_synacor_libsim_a_AR
) example-synacor
/libsim.a
$(example_synacor_libsim_a_OBJECTS
) $(example_synacor_libsim_a_LIBADD
)
2814 $(AM_V_at
)$(RANLIB
) example-synacor
/libsim.a
2815 frv
/$(am__dirstamp
):
2817 @
: > frv
/$(am__dirstamp
)
2819 frv
/libsim.a
: $(frv_libsim_a_OBJECTS
) $(frv_libsim_a_DEPENDENCIES
) $(EXTRA_frv_libsim_a_DEPENDENCIES
) frv
/$(am__dirstamp
)
2820 $(AM_V_at
)-rm -f frv
/libsim.a
2821 $(AM_V_AR
)$(frv_libsim_a_AR
) frv
/libsim.a
$(frv_libsim_a_OBJECTS
) $(frv_libsim_a_LIBADD
)
2822 $(AM_V_at
)$(RANLIB
) frv
/libsim.a
2823 ft32
/$(am__dirstamp
):
2825 @
: > ft32
/$(am__dirstamp
)
2827 ft32
/libsim.a
: $(ft32_libsim_a_OBJECTS
) $(ft32_libsim_a_DEPENDENCIES
) $(EXTRA_ft32_libsim_a_DEPENDENCIES
) ft32
/$(am__dirstamp
)
2828 $(AM_V_at
)-rm -f ft32
/libsim.a
2829 $(AM_V_AR
)$(ft32_libsim_a_AR
) ft32
/libsim.a
$(ft32_libsim_a_OBJECTS
) $(ft32_libsim_a_LIBADD
)
2830 $(AM_V_at
)$(RANLIB
) ft32
/libsim.a
2831 h8300
/$(am__dirstamp
):
2833 @
: > h8300
/$(am__dirstamp
)
2835 h8300
/libsim.a
: $(h8300_libsim_a_OBJECTS
) $(h8300_libsim_a_DEPENDENCIES
) $(EXTRA_h8300_libsim_a_DEPENDENCIES
) h8300
/$(am__dirstamp
)
2836 $(AM_V_at
)-rm -f h8300
/libsim.a
2837 $(AM_V_AR
)$(h8300_libsim_a_AR
) h8300
/libsim.a
$(h8300_libsim_a_OBJECTS
) $(h8300_libsim_a_LIBADD
)
2838 $(AM_V_at
)$(RANLIB
) h8300
/libsim.a
2839 igen
/$(am__dirstamp
):
2841 @
: > igen
/$(am__dirstamp
)
2842 igen
/$(DEPDIR
)/$(am__dirstamp
):
2843 @
$(MKDIR_P
) igen
/$(DEPDIR
)
2844 @
: > igen
/$(DEPDIR
)/$(am__dirstamp
)
2845 igen
/table.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2846 igen
/$(DEPDIR
)/$(am__dirstamp
)
2847 igen
/lf.
$(OBJEXT
): igen
/$(am__dirstamp
) igen
/$(DEPDIR
)/$(am__dirstamp
)
2848 igen
/misc.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2849 igen
/$(DEPDIR
)/$(am__dirstamp
)
2850 igen
/filter_host.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2851 igen
/$(DEPDIR
)/$(am__dirstamp
)
2852 igen
/ld-decode.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2853 igen
/$(DEPDIR
)/$(am__dirstamp
)
2854 igen
/ld-cache.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2855 igen
/$(DEPDIR
)/$(am__dirstamp
)
2856 igen
/filter.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2857 igen
/$(DEPDIR
)/$(am__dirstamp
)
2858 igen
/ld-insn.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2859 igen
/$(DEPDIR
)/$(am__dirstamp
)
2860 igen
/gen-model.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2861 igen
/$(DEPDIR
)/$(am__dirstamp
)
2862 igen
/gen-itable.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2863 igen
/$(DEPDIR
)/$(am__dirstamp
)
2864 igen
/gen-icache.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2865 igen
/$(DEPDIR
)/$(am__dirstamp
)
2866 igen
/gen-semantics.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2867 igen
/$(DEPDIR
)/$(am__dirstamp
)
2868 igen
/gen-idecode.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2869 igen
/$(DEPDIR
)/$(am__dirstamp
)
2870 igen
/gen-support.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2871 igen
/$(DEPDIR
)/$(am__dirstamp
)
2872 igen
/gen-engine.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2873 igen
/$(DEPDIR
)/$(am__dirstamp
)
2874 igen
/gen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2875 igen
/$(DEPDIR
)/$(am__dirstamp
)
2877 @SIM_ENABLE_IGEN_FALSE@igen
/libigen.a
: $(igen_libigen_a_OBJECTS
) $(igen_libigen_a_DEPENDENCIES
) $(EXTRA_igen_libigen_a_DEPENDENCIES
) igen
/$(am__dirstamp
)
2878 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_at
)-rm -f igen
/libigen.a
2879 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_AR
)$(igen_libigen_a_AR
) igen
/libigen.a
$(igen_libigen_a_OBJECTS
) $(igen_libigen_a_LIBADD
)
2880 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_at
)$(RANLIB
) igen
/libigen.a
2881 iq2000
/$(am__dirstamp
):
2883 @
: > iq2000
/$(am__dirstamp
)
2885 iq2000
/libsim.a
: $(iq2000_libsim_a_OBJECTS
) $(iq2000_libsim_a_DEPENDENCIES
) $(EXTRA_iq2000_libsim_a_DEPENDENCIES
) iq2000
/$(am__dirstamp
)
2886 $(AM_V_at
)-rm -f iq2000
/libsim.a
2887 $(AM_V_AR
)$(iq2000_libsim_a_AR
) iq2000
/libsim.a
$(iq2000_libsim_a_OBJECTS
) $(iq2000_libsim_a_LIBADD
)
2888 $(AM_V_at
)$(RANLIB
) iq2000
/libsim.a
2889 lm32
/$(am__dirstamp
):
2891 @
: > lm32
/$(am__dirstamp
)
2893 lm32
/libsim.a
: $(lm32_libsim_a_OBJECTS
) $(lm32_libsim_a_DEPENDENCIES
) $(EXTRA_lm32_libsim_a_DEPENDENCIES
) lm32
/$(am__dirstamp
)
2894 $(AM_V_at
)-rm -f lm32
/libsim.a
2895 $(AM_V_AR
)$(lm32_libsim_a_AR
) lm32
/libsim.a
$(lm32_libsim_a_OBJECTS
) $(lm32_libsim_a_LIBADD
)
2896 $(AM_V_at
)$(RANLIB
) lm32
/libsim.a
2897 m32c
/$(am__dirstamp
):
2899 @
: > m32c
/$(am__dirstamp
)
2901 m32c
/libsim.a
: $(m32c_libsim_a_OBJECTS
) $(m32c_libsim_a_DEPENDENCIES
) $(EXTRA_m32c_libsim_a_DEPENDENCIES
) m32c
/$(am__dirstamp
)
2902 $(AM_V_at
)-rm -f m32c
/libsim.a
2903 $(AM_V_AR
)$(m32c_libsim_a_AR
) m32c
/libsim.a
$(m32c_libsim_a_OBJECTS
) $(m32c_libsim_a_LIBADD
)
2904 $(AM_V_at
)$(RANLIB
) m32c
/libsim.a
2905 m32r
/$(am__dirstamp
):
2907 @
: > m32r
/$(am__dirstamp
)
2909 m32r
/libsim.a
: $(m32r_libsim_a_OBJECTS
) $(m32r_libsim_a_DEPENDENCIES
) $(EXTRA_m32r_libsim_a_DEPENDENCIES
) m32r
/$(am__dirstamp
)
2910 $(AM_V_at
)-rm -f m32r
/libsim.a
2911 $(AM_V_AR
)$(m32r_libsim_a_AR
) m32r
/libsim.a
$(m32r_libsim_a_OBJECTS
) $(m32r_libsim_a_LIBADD
)
2912 $(AM_V_at
)$(RANLIB
) m32r
/libsim.a
2913 m68hc11
/$(am__dirstamp
):
2915 @
: > m68hc11
/$(am__dirstamp
)
2917 m68hc11
/libsim.a
: $(m68hc11_libsim_a_OBJECTS
) $(m68hc11_libsim_a_DEPENDENCIES
) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
2918 $(AM_V_at
)-rm -f m68hc11
/libsim.a
2919 $(AM_V_AR
)$(m68hc11_libsim_a_AR
) m68hc11
/libsim.a
$(m68hc11_libsim_a_OBJECTS
) $(m68hc11_libsim_a_LIBADD
)
2920 $(AM_V_at
)$(RANLIB
) m68hc11
/libsim.a
2922 clean-checkPROGRAMS
:
2923 @list
='$(check_PROGRAMS)'; test -n
"$$list" || exit
0; \
2924 echo
" rm -f" $$list; \
2925 rm -f
$$list || exit
$$?
; \
2926 test -n
"$(EXEEXT)" || exit
0; \
2927 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2928 echo
" rm -f" $$list; \
2931 clean-noinstPROGRAMS
:
2932 @list
='$(noinst_PROGRAMS)'; test -n
"$$list" || exit
0; \
2933 echo
" rm -f" $$list; \
2934 rm -f
$$list || exit
$$?
; \
2935 test -n
"$(EXEEXT)" || exit
0; \
2936 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
2937 echo
" rm -f" $$list; \
2940 aarch64
/run
$(EXEEXT
): $(aarch64_run_OBJECTS
) $(aarch64_run_DEPENDENCIES
) $(EXTRA_aarch64_run_DEPENDENCIES
) aarch64
/$(am__dirstamp
)
2941 @
rm -f aarch64
/run
$(EXEEXT
)
2942 $(AM_V_CCLD
)$(LINK
) $(aarch64_run_OBJECTS
) $(aarch64_run_LDADD
) $(LIBS
)
2944 arm
/run
$(EXEEXT
): $(arm_run_OBJECTS
) $(arm_run_DEPENDENCIES
) $(EXTRA_arm_run_DEPENDENCIES
) arm
/$(am__dirstamp
)
2945 @
rm -f arm
/run
$(EXEEXT
)
2946 $(AM_V_CCLD
)$(LINK
) $(arm_run_OBJECTS
) $(arm_run_LDADD
) $(LIBS
)
2948 avr
/run
$(EXEEXT
): $(avr_run_OBJECTS
) $(avr_run_DEPENDENCIES
) $(EXTRA_avr_run_DEPENDENCIES
) avr
/$(am__dirstamp
)
2949 @
rm -f avr
/run
$(EXEEXT
)
2950 $(AM_V_CCLD
)$(LINK
) $(avr_run_OBJECTS
) $(avr_run_LDADD
) $(LIBS
)
2952 bfin
/run
$(EXEEXT
): $(bfin_run_OBJECTS
) $(bfin_run_DEPENDENCIES
) $(EXTRA_bfin_run_DEPENDENCIES
) bfin
/$(am__dirstamp
)
2953 @
rm -f bfin
/run
$(EXEEXT
)
2954 $(AM_V_CCLD
)$(LINK
) $(bfin_run_OBJECTS
) $(bfin_run_LDADD
) $(LIBS
)
2956 bpf
/run
$(EXEEXT
): $(bpf_run_OBJECTS
) $(bpf_run_DEPENDENCIES
) $(EXTRA_bpf_run_DEPENDENCIES
) bpf
/$(am__dirstamp
)
2957 @
rm -f bpf
/run
$(EXEEXT
)
2958 $(AM_V_CCLD
)$(LINK
) $(bpf_run_OBJECTS
) $(bpf_run_LDADD
) $(LIBS
)
2959 cr16
/$(DEPDIR
)/$(am__dirstamp
):
2960 @
$(MKDIR_P
) cr16
/$(DEPDIR
)
2961 @
: > cr16
/$(DEPDIR
)/$(am__dirstamp
)
2962 cr16
/gencode.
$(OBJEXT
): cr16
/$(am__dirstamp
) \
2963 cr16
/$(DEPDIR
)/$(am__dirstamp
)
2965 @SIM_ENABLE_ARCH_cr16_FALSE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) $(EXTRA_cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
2966 @SIM_ENABLE_ARCH_cr16_FALSE@ @
rm -f cr16
/gencode
$(EXEEXT
)
2967 @SIM_ENABLE_ARCH_cr16_FALSE@
$(AM_V_CCLD
)$(LINK
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
) $(LIBS
)
2969 cr16
/run
$(EXEEXT
): $(cr16_run_OBJECTS
) $(cr16_run_DEPENDENCIES
) $(EXTRA_cr16_run_DEPENDENCIES
) cr16
/$(am__dirstamp
)
2970 @
rm -f cr16
/run
$(EXEEXT
)
2971 $(AM_V_CCLD
)$(LINK
) $(cr16_run_OBJECTS
) $(cr16_run_LDADD
) $(LIBS
)
2973 cris
/run
$(EXEEXT
): $(cris_run_OBJECTS
) $(cris_run_DEPENDENCIES
) $(EXTRA_cris_run_DEPENDENCIES
) cris
/$(am__dirstamp
)
2974 @
rm -f cris
/run
$(EXEEXT
)
2975 $(AM_V_CCLD
)$(LINK
) $(cris_run_OBJECTS
) $(cris_run_LDADD
) $(LIBS
)
2976 cris
/$(DEPDIR
)/$(am__dirstamp
):
2977 @
$(MKDIR_P
) cris
/$(DEPDIR
)
2978 @
: > cris
/$(DEPDIR
)/$(am__dirstamp
)
2979 cris
/rvdummy.
$(OBJEXT
): cris
/$(am__dirstamp
) \
2980 cris
/$(DEPDIR
)/$(am__dirstamp
)
2982 cris
/rvdummy
$(EXEEXT
): $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_DEPENDENCIES
) $(EXTRA_cris_rvdummy_DEPENDENCIES
) cris
/$(am__dirstamp
)
2983 @
rm -f cris
/rvdummy
$(EXEEXT
)
2984 $(AM_V_CCLD
)$(LINK
) $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_LDADD
) $(LIBS
)
2985 d10v
/$(DEPDIR
)/$(am__dirstamp
):
2986 @
$(MKDIR_P
) d10v
/$(DEPDIR
)
2987 @
: > d10v
/$(DEPDIR
)/$(am__dirstamp
)
2988 d10v
/gencode.
$(OBJEXT
): d10v
/$(am__dirstamp
) \
2989 d10v
/$(DEPDIR
)/$(am__dirstamp
)
2991 @SIM_ENABLE_ARCH_d10v_FALSE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) $(EXTRA_d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
2992 @SIM_ENABLE_ARCH_d10v_FALSE@ @
rm -f d10v
/gencode
$(EXEEXT
)
2993 @SIM_ENABLE_ARCH_d10v_FALSE@
$(AM_V_CCLD
)$(LINK
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
) $(LIBS
)
2995 d10v
/run
$(EXEEXT
): $(d10v_run_OBJECTS
) $(d10v_run_DEPENDENCIES
) $(EXTRA_d10v_run_DEPENDENCIES
) d10v
/$(am__dirstamp
)
2996 @
rm -f d10v
/run
$(EXEEXT
)
2997 $(AM_V_CCLD
)$(LINK
) $(d10v_run_OBJECTS
) $(d10v_run_LDADD
) $(LIBS
)
2999 erc32
/run
$(EXEEXT
): $(erc32_run_OBJECTS
) $(erc32_run_DEPENDENCIES
) $(EXTRA_erc32_run_DEPENDENCIES
) erc32
/$(am__dirstamp
)
3000 @
rm -f erc32
/run
$(EXEEXT
)
3001 $(AM_V_CCLD
)$(LINK
) $(erc32_run_OBJECTS
) $(erc32_run_LDADD
) $(LIBS
)
3002 erc32
/$(DEPDIR
)/$(am__dirstamp
):
3003 @
$(MKDIR_P
) erc32
/$(DEPDIR
)
3004 @
: > erc32
/$(DEPDIR
)/$(am__dirstamp
)
3005 erc32
/sis.
$(OBJEXT
): erc32
/$(am__dirstamp
) \
3006 erc32
/$(DEPDIR
)/$(am__dirstamp
)
3008 @SIM_ENABLE_ARCH_erc32_FALSE@erc32
/sis
$(EXEEXT
): $(erc32_sis_OBJECTS
) $(erc32_sis_DEPENDENCIES
) $(EXTRA_erc32_sis_DEPENDENCIES
) erc32
/$(am__dirstamp
)
3009 @SIM_ENABLE_ARCH_erc32_FALSE@ @
rm -f erc32
/sis
$(EXEEXT
)
3010 @SIM_ENABLE_ARCH_erc32_FALSE@
$(AM_V_CCLD
)$(LINK
) $(erc32_sis_OBJECTS
) $(erc32_sis_LDADD
) $(LIBS
)
3012 example-synacor
/run
$(EXEEXT
): $(example_synacor_run_OBJECTS
) $(example_synacor_run_DEPENDENCIES
) $(EXTRA_example_synacor_run_DEPENDENCIES
) example-synacor
/$(am__dirstamp
)
3013 @
rm -f example-synacor
/run
$(EXEEXT
)
3014 $(AM_V_CCLD
)$(LINK
) $(example_synacor_run_OBJECTS
) $(example_synacor_run_LDADD
) $(LIBS
)
3016 frv
/run
$(EXEEXT
): $(frv_run_OBJECTS
) $(frv_run_DEPENDENCIES
) $(EXTRA_frv_run_DEPENDENCIES
) frv
/$(am__dirstamp
)
3017 @
rm -f frv
/run
$(EXEEXT
)
3018 $(AM_V_CCLD
)$(LINK
) $(frv_run_OBJECTS
) $(frv_run_LDADD
) $(LIBS
)
3020 ft32
/run
$(EXEEXT
): $(ft32_run_OBJECTS
) $(ft32_run_DEPENDENCIES
) $(EXTRA_ft32_run_DEPENDENCIES
) ft32
/$(am__dirstamp
)
3021 @
rm -f ft32
/run
$(EXEEXT
)
3022 $(AM_V_CCLD
)$(LINK
) $(ft32_run_OBJECTS
) $(ft32_run_LDADD
) $(LIBS
)
3024 h8300
/run
$(EXEEXT
): $(h8300_run_OBJECTS
) $(h8300_run_DEPENDENCIES
) $(EXTRA_h8300_run_DEPENDENCIES
) h8300
/$(am__dirstamp
)
3025 @
rm -f h8300
/run
$(EXEEXT
)
3026 $(AM_V_CCLD
)$(LINK
) $(h8300_run_OBJECTS
) $(h8300_run_LDADD
) $(LIBS
)
3028 igen
/filter$(EXEEXT
): $(igen_filter_OBJECTS
) $(igen_filter_DEPENDENCIES
) $(EXTRA_igen_filter_DEPENDENCIES
) igen
/$(am__dirstamp
)
3029 @
rm -f igen
/filter$(EXEEXT
)
3030 $(AM_V_CCLD
)$(LINK
) $(igen_filter_OBJECTS
) $(igen_filter_LDADD
) $(LIBS
)
3032 igen
/gen
$(EXEEXT
): $(igen_gen_OBJECTS
) $(igen_gen_DEPENDENCIES
) $(EXTRA_igen_gen_DEPENDENCIES
) igen
/$(am__dirstamp
)
3033 @
rm -f igen
/gen
$(EXEEXT
)
3034 $(AM_V_CCLD
)$(LINK
) $(igen_gen_OBJECTS
) $(igen_gen_LDADD
) $(LIBS
)
3035 igen
/igen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
3036 igen
/$(DEPDIR
)/$(am__dirstamp
)
3038 @SIM_ENABLE_IGEN_FALSE@igen
/igen
$(EXEEXT
): $(igen_igen_OBJECTS
) $(igen_igen_DEPENDENCIES
) $(EXTRA_igen_igen_DEPENDENCIES
) igen
/$(am__dirstamp
)
3039 @SIM_ENABLE_IGEN_FALSE@ @
rm -f igen
/igen
$(EXEEXT
)
3040 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_CCLD
)$(LINK
) $(igen_igen_OBJECTS
) $(igen_igen_LDADD
) $(LIBS
)
3042 igen
/ld-cache
$(EXEEXT
): $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_DEPENDENCIES
) $(EXTRA_igen_ld_cache_DEPENDENCIES
) igen
/$(am__dirstamp
)
3043 @
rm -f igen
/ld-cache
$(EXEEXT
)
3044 $(AM_V_CCLD
)$(LINK
) $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_LDADD
) $(LIBS
)
3046 igen
/ld-decode
$(EXEEXT
): $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_DEPENDENCIES
) $(EXTRA_igen_ld_decode_DEPENDENCIES
) igen
/$(am__dirstamp
)
3047 @
rm -f igen
/ld-decode
$(EXEEXT
)
3048 $(AM_V_CCLD
)$(LINK
) $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_LDADD
) $(LIBS
)
3050 igen
/ld-insn
$(EXEEXT
): $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_DEPENDENCIES
) $(EXTRA_igen_ld_insn_DEPENDENCIES
) igen
/$(am__dirstamp
)
3051 @
rm -f igen
/ld-insn
$(EXEEXT
)
3052 $(AM_V_CCLD
)$(LINK
) $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_LDADD
) $(LIBS
)
3054 igen
/table
$(EXEEXT
): $(igen_table_OBJECTS
) $(igen_table_DEPENDENCIES
) $(EXTRA_igen_table_DEPENDENCIES
) igen
/$(am__dirstamp
)
3055 @
rm -f igen
/table
$(EXEEXT
)
3056 $(AM_V_CCLD
)$(LINK
) $(igen_table_OBJECTS
) $(igen_table_LDADD
) $(LIBS
)
3058 iq2000
/run
$(EXEEXT
): $(iq2000_run_OBJECTS
) $(iq2000_run_DEPENDENCIES
) $(EXTRA_iq2000_run_DEPENDENCIES
) iq2000
/$(am__dirstamp
)
3059 @
rm -f iq2000
/run
$(EXEEXT
)
3060 $(AM_V_CCLD
)$(LINK
) $(iq2000_run_OBJECTS
) $(iq2000_run_LDADD
) $(LIBS
)
3062 lm32
/run
$(EXEEXT
): $(lm32_run_OBJECTS
) $(lm32_run_DEPENDENCIES
) $(EXTRA_lm32_run_DEPENDENCIES
) lm32
/$(am__dirstamp
)
3063 @
rm -f lm32
/run
$(EXEEXT
)
3064 $(AM_V_CCLD
)$(LINK
) $(lm32_run_OBJECTS
) $(lm32_run_LDADD
) $(LIBS
)
3065 m32c
/$(DEPDIR
)/$(am__dirstamp
):
3066 @
$(MKDIR_P
) m32c
/$(DEPDIR
)
3067 @
: > m32c
/$(DEPDIR
)/$(am__dirstamp
)
3068 m32c
/opc2c.
$(OBJEXT
): m32c
/$(am__dirstamp
) \
3069 m32c
/$(DEPDIR
)/$(am__dirstamp
)
3071 @SIM_ENABLE_ARCH_m32c_FALSE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) $(EXTRA_m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
3072 @SIM_ENABLE_ARCH_m32c_FALSE@ @
rm -f m32c
/opc2c
$(EXEEXT
)
3073 @SIM_ENABLE_ARCH_m32c_FALSE@
$(AM_V_CCLD
)$(LINK
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
) $(LIBS
)
3075 m32c
/run
$(EXEEXT
): $(m32c_run_OBJECTS
) $(m32c_run_DEPENDENCIES
) $(EXTRA_m32c_run_DEPENDENCIES
) m32c
/$(am__dirstamp
)
3076 @
rm -f m32c
/run
$(EXEEXT
)
3077 $(AM_V_CCLD
)$(LINK
) $(m32c_run_OBJECTS
) $(m32c_run_LDADD
) $(LIBS
)
3079 m32r
/run
$(EXEEXT
): $(m32r_run_OBJECTS
) $(m32r_run_DEPENDENCIES
) $(EXTRA_m32r_run_DEPENDENCIES
) m32r
/$(am__dirstamp
)
3080 @
rm -f m32r
/run
$(EXEEXT
)
3081 $(AM_V_CCLD
)$(LINK
) $(m32r_run_OBJECTS
) $(m32r_run_LDADD
) $(LIBS
)
3082 m68hc11
/$(DEPDIR
)/$(am__dirstamp
):
3083 @
$(MKDIR_P
) m68hc11
/$(DEPDIR
)
3084 @
: > m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
3085 m68hc11
/gencode.
$(OBJEXT
): m68hc11
/$(am__dirstamp
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3086 m68hc11
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3130 msp430
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3141 or1k
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3820 @p
='testsuite/common/bits64m0$(EXEEXT)'; \
3821 b
='testsuite/common/bits64m0'; \
3822 $(am__check_pre
) $(LOG_DRIVER
) --test-name
"$$f" \
3823 --log-file
$$b.log
--trs-file
$$b.trs \
3824 $(am__common_driver_flags
) $(AM_LOG_DRIVER_FLAGS
) $(LOG_DRIVER_FLAGS
) -- $(LOG_COMPILE
) \
3825 "$$tst" $(AM_TESTS_FD_REDIRECT
)
3826 testsuite
/common
/bits64m63.log
: testsuite
/common
/bits64m63
$(EXEEXT
)
3827 @p
='testsuite/common/bits64m63$(EXEEXT)'; \
3828 b
='testsuite/common/bits64m63'; \
3829 $(am__check_pre
) $(LOG_DRIVER
) --test-name
"$$f" \
3830 --log-file
$$b.log
--trs-file
$$b.trs \
3831 $(am__common_driver_flags
) $(AM_LOG_DRIVER_FLAGS
) $(LOG_DRIVER_FLAGS
) -- $(LOG_COMPILE
) \
3832 "$$tst" $(AM_TESTS_FD_REDIRECT
)
3833 testsuite
/common
/alu-tst.log
: testsuite
/common
/alu-tst
$(EXEEXT
)
3834 @p
='testsuite/common/alu-tst$(EXEEXT)'; \
3835 b
='testsuite/common/alu-tst'; \
3836 $(am__check_pre
) $(LOG_DRIVER
) --test-name
"$$f" \
3837 --log-file
$$b.log
--trs-file
$$b.trs \
3838 $(am__common_driver_flags
) $(AM_LOG_DRIVER_FLAGS
) $(LOG_DRIVER_FLAGS
) -- $(LOG_COMPILE
) \
3839 "$$tst" $(AM_TESTS_FD_REDIRECT
)
3843 $(am__check_pre
) $(TEST_LOG_DRIVER
) --test-name
"$$f" \
3844 --log-file
$$b.log
--trs-file
$$b.trs \
3845 $(am__common_driver_flags
) $(AM_TEST_LOG_DRIVER_FLAGS
) $(TEST_LOG_DRIVER_FLAGS
) -- $(TEST_LOG_COMPILE
) \
3846 "$$tst" $(AM_TESTS_FD_REDIRECT
)
3847 @am__EXEEXT_TRUE@.
test$(EXEEXT
).log
:
3848 @am__EXEEXT_TRUE@ @p
='$<'; \
3849 @am__EXEEXT_TRUE@
$(am__set_b
); \
3850 @am__EXEEXT_TRUE@
$(am__check_pre
) $(TEST_LOG_DRIVER
) --test-name
"$$f" \
3851 @am__EXEEXT_TRUE@
--log-file
$$b.log
--trs-file
$$b.trs \
3852 @am__EXEEXT_TRUE@
$(am__common_driver_flags
) $(AM_TEST_LOG_DRIVER_FLAGS
) $(TEST_LOG_DRIVER_FLAGS
) -- $(TEST_LOG_COMPILE
) \
3853 @am__EXEEXT_TRUE@
"$$tst" $(AM_TESTS_FD_REDIRECT
)
3855 $(MAKE
) $(AM_MAKEFLAGS
) $(check_PROGRAMS
)
3856 $(MAKE
) $(AM_MAKEFLAGS
) check-DEJAGNU check-TESTS
3857 check: $(BUILT_SOURCES
)
3858 $(MAKE
) $(AM_MAKEFLAGS
) check-recursive
3859 all-am
: Makefile
$(LIBRARIES
) $(PROGRAMS
) $(DATA
) $(HEADERS
) config.h
3860 installdirs: installdirs-recursive
3862 for
dir in
"$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \
3863 test -z
"$$dir" ||
$(MKDIR_P
) "$$dir"; \
3865 install: $(BUILT_SOURCES
)
3866 $(MAKE
) $(AM_MAKEFLAGS
) install-recursive
3867 install-exec
: install-exec-recursive
3868 install-data
: install-data-recursive
3869 uninstall: uninstall-recursive
3872 @
$(MAKE
) $(AM_MAKEFLAGS
) install-exec-am install-data-am
3874 installcheck: installcheck-recursive
3876 if
test -z
'$(STRIP)'; then \
3877 $(MAKE
) $(AM_MAKEFLAGS
) INSTALL_PROGRAM
="$(INSTALL_STRIP_PROGRAM)" \
3878 install_sh_PROGRAM
="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG
=-s \
3881 $(MAKE
) $(AM_MAKEFLAGS
) INSTALL_PROGRAM
="$(INSTALL_STRIP_PROGRAM)" \
3882 install_sh_PROGRAM
="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG
=-s \
3883 "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
3885 mostlyclean-generic
:
3886 -test -z
"$(MOSTLYCLEANFILES)" ||
rm -f
$(MOSTLYCLEANFILES
)
3887 -test -z
"$(TEST_LOGS)" ||
rm -f
$(TEST_LOGS
)
3888 -test -z
"$(TEST_LOGS:.log=.trs)" ||
rm -f
$(TEST_LOGS
:.log
=.trs
)
3889 -test -z
"$(TEST_SUITE_LOG)" ||
rm -f
$(TEST_SUITE_LOG
)
3892 -test -z
"$(CLEANFILES)" ||
rm -f
$(CLEANFILES
)
3895 -test -z
"$(CONFIG_CLEAN_FILES)" ||
rm -f
$(CONFIG_CLEAN_FILES
)
3896 -test .
= "$(srcdir)" ||
test -z
"$(CONFIG_CLEAN_VPATH_FILES)" ||
rm -f
$(CONFIG_CLEAN_VPATH_FILES
)
3897 -rm -f aarch64
/$(am__dirstamp
)
3898 -rm -f arm
/$(am__dirstamp
)
3899 -rm -f avr
/$(am__dirstamp
)
3900 -rm -f bfin
/$(am__dirstamp
)
3901 -rm -f bpf
/$(am__dirstamp
)
3902 -rm -f common
/$(DEPDIR
)/$(am__dirstamp
)
3903 -rm -f common
/$(am__dirstamp
)
3904 -rm -f cr16
/$(DEPDIR
)/$(am__dirstamp
)
3905 -rm -f cr16
/$(am__dirstamp
)
3906 -rm -f cris
/$(DEPDIR
)/$(am__dirstamp
)
3907 -rm -f cris
/$(am__dirstamp
)
3908 -rm -f d10v
/$(DEPDIR
)/$(am__dirstamp
)
3909 -rm -f d10v
/$(am__dirstamp
)
3910 -rm -f erc32
/$(DEPDIR
)/$(am__dirstamp
)
3911 -rm -f erc32
/$(am__dirstamp
)
3912 -rm -f example-synacor
/$(am__dirstamp
)
3913 -rm -f frv
/$(am__dirstamp
)
3914 -rm -f ft32
/$(am__dirstamp
)
3915 -rm -f h8300
/$(am__dirstamp
)
3916 -rm -f igen
/$(DEPDIR
)/$(am__dirstamp
)
3917 -rm -f igen
/$(am__dirstamp
)
3918 -rm -f iq2000
/$(am__dirstamp
)
3919 -rm -f lm32
/$(am__dirstamp
)
3920 -rm -f m32c
/$(DEPDIR
)/$(am__dirstamp
)
3921 -rm -f m32c
/$(am__dirstamp
)
3922 -rm -f m32r
/$(am__dirstamp
)
3923 -rm -f m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
3924 -rm -f m68hc11
/$(am__dirstamp
)
3925 -rm -f mcore
/$(am__dirstamp
)
3926 -rm -f microblaze
/$(am__dirstamp
)
3927 -rm -f mips
/$(am__dirstamp
)
3928 -rm -f mn10300
/$(am__dirstamp
)
3929 -rm -f moxie
/$(am__dirstamp
)
3930 -rm -f msp430
/$(am__dirstamp
)
3931 -rm -f or1k
/$(am__dirstamp
)
3932 -rm -f ppc
/$(DEPDIR
)/$(am__dirstamp
)
3933 -rm -f ppc
/$(am__dirstamp
)
3934 -rm -f pru
/$(am__dirstamp
)
3935 -rm -f riscv
/$(am__dirstamp
)
3936 -rm -f rl78
/$(am__dirstamp
)
3937 -rm -f rx
/$(am__dirstamp
)
3938 -rm -f sh
/$(DEPDIR
)/$(am__dirstamp
)
3939 -rm -f sh
/$(am__dirstamp
)
3940 -rm -f testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
3941 -rm -f testsuite
/common
/$(am__dirstamp
)
3942 -rm -f v850
/$(am__dirstamp
)
3943 -test -z
"$(DISTCLEANFILES)" ||
rm -f
$(DISTCLEANFILES
)
3945 maintainer-clean-generic
:
3946 @echo
"This command is intended for maintainers to use"
3947 @echo
"it deletes files that may require special tools to rebuild."
3948 -test -z
"$(BUILT_SOURCES)" ||
rm -f
$(BUILT_SOURCES
)
3949 clean: clean-recursive
3951 clean-am
: clean-checkPROGRAMS clean-generic clean-libtool \
3952 clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
3954 distclean: distclean-recursive
3955 -rm -f
$(am__CONFIG_DISTCLEAN_FILES
)
3956 -rm -rf common
/$(DEPDIR
) cr16
/$(DEPDIR
) cris
/$(DEPDIR
) d10v
/$(DEPDIR
) erc32
/$(DEPDIR
) igen
/$(DEPDIR
) m32c
/$(DEPDIR
) m68hc11
/$(DEPDIR
) ppc
/$(DEPDIR
) sh
/$(DEPDIR
) testsuite
/common
/$(DEPDIR
)
3958 distclean-am
: clean-am distclean-DEJAGNU distclean-compile \
3959 distclean-generic distclean-hdr distclean-libtool \
3966 html
: html-recursive
3970 info: info-recursive
3974 install-data-am
: install-armdocDATA install-data-local install-dtbDATA \
3975 install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
3976 install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
3978 install-dvi
: install-dvi-recursive
3982 install-exec-am
: install-exec-local
3984 install-html
: install-html-recursive
3988 install-info
: install-info-recursive
3994 install-pdf
: install-pdf-recursive
3998 install-ps
: install-ps-recursive
4004 maintainer-clean
: maintainer-clean-recursive
4005 -rm -f
$(am__CONFIG_DISTCLEAN_FILES
)
4006 -rm -rf
$(top_srcdir
)/autom4te.cache
4007 -rm -rf common
/$(DEPDIR
) cr16
/$(DEPDIR
) cris
/$(DEPDIR
) d10v
/$(DEPDIR
) erc32
/$(DEPDIR
) igen
/$(DEPDIR
) m32c
/$(DEPDIR
) m68hc11
/$(DEPDIR
) ppc
/$(DEPDIR
) sh
/$(DEPDIR
) testsuite
/common
/$(DEPDIR
)
4009 maintainer-clean-am
: distclean-am maintainer-clean-generic
4011 mostlyclean: mostlyclean-recursive
4013 mostlyclean-am
: mostlyclean-compile mostlyclean-generic \
4024 uninstall-am
: uninstall-armdocDATA uninstall-dtbDATA \
4025 uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
4026 uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
4027 uninstall-ppcdocDATA uninstall-rxdocDATA
4029 .MAKE
: $(am__recursive_targets
) all check check-am
install install-am \
4032 .PHONY
: $(am__recursive_targets
) CTAGS GTAGS TAGS
all all-am \
4033 am--refresh
check check-DEJAGNU check-TESTS check-am
clean \
4034 clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
4035 clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
4036 cscopelist-am ctags ctags-am
distclean distclean-DEJAGNU \
4037 distclean-compile distclean-generic distclean-hdr \
4038 distclean-libtool distclean-tags
dvi dvi-am html html-am
info \
4039 info-am
install install-am install-armdocDATA install-data \
4040 install-data-am install-data-local install-dtbDATA install-dvi \
4041 install-dvi-am install-erc32docDATA install-exec \
4042 install-exec-am install-exec-local install-frvdocDATA \
4043 install-html install-html-am install-info install-info-am \
4044 install-man install-or1kdocDATA install-pdf install-pdf-am \
4045 install-pkgincludeHEADERS install-ppcdocDATA install-ps \
4046 install-ps-am install-rxdocDATA install-strip
installcheck \
4047 installcheck-am
installdirs installdirs-am maintainer-clean \
4048 maintainer-clean-generic
mostlyclean mostlyclean-compile \
4049 mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
4050 recheck
tags tags-am
uninstall uninstall-am \
4051 uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
4052 uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
4053 uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
4058 @am__include@ @am__quote@
$(GNULIB_PARENT_DIR
)/gnulib
/Makefile.gnulib.inc@am__quote@
4060 # Generate target constants for newlib/libgloss from its source tree.
4061 # This file is shipped with distributions so we build in the source dir.
4062 # Use `make nltvals' to rebuild.
4065 $(srccom
)/gennltvals.py
--cpp "$(CPP)"
4067 common
/version.c
: common
/version.c-stamp
; @true
4068 common
/version.c-stamp
: $(srcroot
)/gdb
/version.in
$(srcroot
)/bfd
/version.h
$(srcdir)/common
/create-version.sh
4069 $(AM_V_GEN
)$(SHELL
) $(srcdir)/common
/create-version.sh
$(srcroot
)/gdb
$@.tmp
4070 $(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@
:-stamp
=)
4073 # FIXME This is one very simple-minded way of generating the file hw-config.h.
4074 %/hw-config.h
: %/stamp-hw
; @true
4075 %/stamp-hw
: Makefile
4076 $(AM_V_GEN
)set
-e
; \
4078 sim_hw
="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
4079 echo
"/* generated by Makefile */" ; \
4080 printf
"extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
4081 echo
"const struct hw_descriptor * const hw_descriptors[] = {" ; \
4082 printf
" dv_%s_descriptor,\n" $$sim_hw ; \
4086 $(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(@D
)/hw-config.h
; \
4088 .PRECIOUS
: %/stamp-hw
4090 $(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) GEN_MODULES_C_SRCS
="$(GEN_MODULES_C_SRCS)" -C
$(@D
) $(@F
)
4092 # Alias for developers.
4093 @SIM_ENABLE_IGEN_TRUE@igen
: $(IGEN
)
4095 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4096 @SIM_ENABLE_IGEN_TRUE@igen
/libigen.a
: $(igen_libigen_a_OBJECTS
) $(igen_libigen_a_DEPENDENCIES
) $(EXTRA_igen_libigen_a_DEPENDENCIES
) igen
/$(am__dirstamp
)
4097 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_at
)-rm -f
$@
4098 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_AR
)$(AR_FOR_BUILD
) $(ARFLAGS
) $@
$(igen_libigen_a_OBJECTS
) $(igen_libigen_a_LIBADD
)
4099 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_at
)$(RANLIB_FOR_BUILD
) $@
4101 @SIM_ENABLE_IGEN_TRUE@igen
/igen
$(EXEEXT
): $(igen_igen_OBJECTS
) $(igen_igen_DEPENDENCIES
) igen
/$(am__dirstamp
)
4102 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(igen_igen_OBJECTS
) $(igen_igen_LDADD
)
4104 # igen is a build-time only tool. Override the default rules for it.
4105 @SIM_ENABLE_IGEN_TRUE@igen
/%.o
: igen
/%.c
4106 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4108 # Build some of the files in standalone mode for developers of igen itself.
4109 @SIM_ENABLE_IGEN_TRUE@igen
/%-main.o
: igen
/%.c
4110 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -DMAIN
-c
$< -o
$@
4112 site-sim-config.exp
: Makefile
4114 echo
"set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
4115 echo
"set builddir \"$(builddir)\""; \
4116 echo
"set srcdir \"$(srcdir)/testsuite\""; \
4117 $(foreach V
,$(SIM_TOOLCHAIN_VARS
),echo
"set $(V) \"$($(V))\"";) \
4120 # Ignore dirs that only contain configuration settings.
4121 check/.
/config
/%.exp
: ; @true
4122 check/config
/%.exp
: ; @true
4123 check/.
/lib
/%.exp
: ; @true
4124 check/lib
/%.exp
: ; @true
4127 $(AM_V_at
)mkdir
-p testsuite
/$*
4128 $(AM_V_RUNTEST
)$(DO_RUNTEST
) --objdir testsuite
/$* --outdir testsuite
/$* $*.exp
4130 check-DEJAGNU-parallel
:
4132 set
-- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
4133 $(MAKE
) -k
`printf 'check/%s.exp ' $$@`; \
4135 set
-- `printf 'testsuite/%s/ ' $$@`; \
4136 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh \
4137 `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum
; \
4138 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh
-L \
4139 `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log
; \
4141 $(SED
) -n
'/^.*===.*Summary.*===/,$$p' testrun.sum
; \
4144 check-DEJAGNU-single
:
4145 $(AM_V_RUNTEST
)$(DO_RUNTEST
)
4147 # If running a single job, invoking runtest once is faster & has nicer output.
4148 check-DEJAGNU
: site.exp
4149 $(AM_V_at
)(set
-e
; \
4150 EXPECT
=${EXPECT} ; export EXPECT
; \
4151 runtest
=$(RUNTEST
); \
4152 if
$(SHELL
) -c
"$$runtest --version" > /dev
/null
2>&1; then \
4153 case
"$(MAKEFLAGS)" in \
4154 *-j
*) $(MAKE
) check-DEJAGNU-parallel
;; \
4155 *) $(MAKE
) check-DEJAGNU-single
;; \
4158 echo
"WARNING: could not find \`runtest'" 1>&2; :;\
4161 # These tests are build-time only tools. Override the default rules for them.
4162 testsuite
/common
/%.o
: testsuite
/common
/%.c
4163 $(AM_V_CC
)$(COMPILE_FOR_BUILD
) $(testsuite_common_CPPFLAGS
) -c
$< -o
$@
4165 testsuite
/common
/alu-tst
$(EXEEXT
): $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4166 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_LDADD
)
4168 testsuite
/common
/fpu-tst
$(EXEEXT
): $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4169 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_LDADD
)
4171 testsuite
/common
/bits-gen
$(EXEEXT
): $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4172 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_LDADD
)
4174 testsuite
/common
/bits32m0
$(EXEEXT
): $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4175 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_LDADD
)
4177 testsuite
/common
/bits32m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
4178 $(AM_V_GEN
)$< 32 0 big
> $@.tmp
4179 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
4180 $(AM_V_at
)mv
$@.tmp
$@
4182 testsuite
/common
/bits32m31
$(EXEEXT
): $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4183 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_LDADD
)
4185 testsuite
/common
/bits32m31.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
4186 $(AM_V_GEN
)$< 32 31 little
> $@.tmp
4187 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
4188 $(AM_V_at
)mv
$@.tmp
$@
4190 testsuite
/common
/bits64m0
$(EXEEXT
): $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4191 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_LDADD
)
4193 testsuite
/common
/bits64m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
4194 $(AM_V_GEN
)$< 64 0 big
> $@.tmp
4195 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
4196 $(AM_V_at
)mv
$@.tmp
$@
4198 testsuite
/common
/bits64m63
$(EXEEXT
): $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
4199 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_LDADD
)
4201 testsuite
/common
/bits64m63.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
4202 $(AM_V_GEN
)$< 64 63 little
> $@.tmp
4203 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
4204 $(AM_V_at
)mv
$@.tmp
$@
4205 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(aarch64_libsim_a_OBJECTS
) $(aarch64_libsim_a_LIBADD
): aarch64
/hw-config.h
4207 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64
/%.o
: aarch64
/%.c
4208 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4210 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64
/%.o
: common
/%.c
4211 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4212 @SIM_ENABLE_ARCH_arm_TRUE@
$(arm_libsim_a_OBJECTS
) $(arm_libsim_a_LIBADD
): arm
/hw-config.h
4214 @SIM_ENABLE_ARCH_arm_TRUE@arm
/%.o
: arm
/%.c
4215 @SIM_ENABLE_ARCH_arm_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4217 @SIM_ENABLE_ARCH_arm_TRUE@arm
/%.o
: common
/%.c
4218 @SIM_ENABLE_ARCH_arm_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4219 @SIM_ENABLE_ARCH_avr_TRUE@
$(avr_libsim_a_OBJECTS
) $(avr_libsim_a_LIBADD
): avr
/hw-config.h
4221 @SIM_ENABLE_ARCH_avr_TRUE@avr
/%.o
: avr
/%.c
4222 @SIM_ENABLE_ARCH_avr_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4224 @SIM_ENABLE_ARCH_avr_TRUE@avr
/%.o
: common
/%.c
4225 @SIM_ENABLE_ARCH_avr_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4226 @SIM_ENABLE_ARCH_bfin_TRUE@
$(bfin_libsim_a_OBJECTS
) $(bfin_libsim_a_LIBADD
): bfin
/hw-config.h
4228 @SIM_ENABLE_ARCH_bfin_TRUE@bfin
/%.o
: bfin
/%.c
4229 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4231 @SIM_ENABLE_ARCH_bfin_TRUE@bfin
/%.o
: common
/%.c
4232 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4234 @SIM_ENABLE_ARCH_bfin_TRUE@bfin
/linux-fixed-code.h
: @MAINT@
$(srcdir)/bfin
/linux-fixed-code.s bfin
/local.mk bfin
/$(am__dirstamp
)
4235 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_GEN
)$(AS_FOR_TARGET_BFIN
) $(srcdir)/bfin
/linux-fixed-code.s
-o bfin
/linux-fixed-code.o
4236 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)(\
4237 @SIM_ENABLE_ARCH_bfin_TRUE@ set
-e
; \
4238 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \
4239 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"static const unsigned char bfin_linux_fixed_code[] ="; \
4240 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"{"; \
4241 @SIM_ENABLE_ARCH_bfin_TRUE@
$(OBJDUMP_FOR_TARGET_BFIN
) -d
-z bfin
/linux-fixed-code.o
> $@.dis
; \
4242 @SIM_ENABLE_ARCH_bfin_TRUE@ sed
-n \
4243 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
's:^[^ ]* :0x:' \
4244 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
'/^0x/{s: .*::;s: *$$:,:;s: :, 0x:g;p;}' \
4245 @SIM_ENABLE_ARCH_bfin_TRUE@
$@.dis
; \
4246 @SIM_ENABLE_ARCH_bfin_TRUE@
rm -f
$@.dis
; \
4247 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"};" \
4248 @SIM_ENABLE_ARCH_bfin_TRUE@
) > $@.tmp
4249 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/bfin
/linux-fixed-code.h
4250 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)touch
$(srcdir)/bfin
/linux-fixed-code.h
4251 @SIM_ENABLE_ARCH_bpf_TRUE@
$(bpf_libsim_a_OBJECTS
) $(bpf_libsim_a_LIBADD
): bpf
/hw-config.h
4253 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/%.o
: bpf
/%.c
4254 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4256 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/%.o
: common
/%.c
4257 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4258 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/modules.c
: |
$(bpf_BUILD_OUTPUTS
)
4260 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/mloop-le.c bpf
/eng-le.h
: bpf
/stamp-mloop-le
; @true
4261 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/stamp-mloop-le
: $(srccom
)/genmloop.sh bpf
/mloop.in
4262 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4263 @SIM_ENABLE_ARCH_bpf_TRUE@
-mono
-scache
-prefix bpfbf_ebpfle
-cpu bpfbf \
4264 @SIM_ENABLE_ARCH_bpf_TRUE@
-infile
$(srcdir)/bpf
/mloop.in \
4265 @SIM_ENABLE_ARCH_bpf_TRUE@
-outfile-prefix bpf
/ -outfile-suffix
-le
4266 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/eng-le.hin bpf
/eng-le.h
4267 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/mloop-le.cin bpf
/mloop-le.c
4268 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)touch
$@
4270 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/mloop-be.c bpf
/eng-be.h
: bpf
/stamp-mloop-be
; @true
4271 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/stamp-mloop-be
: $(srccom
)/genmloop.sh bpf
/mloop.in
4272 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4273 @SIM_ENABLE_ARCH_bpf_TRUE@
-mono
-scache
-prefix bpfbf_ebpfbe
-cpu bpfbf \
4274 @SIM_ENABLE_ARCH_bpf_TRUE@
-infile
$(srcdir)/bpf
/mloop.in \
4275 @SIM_ENABLE_ARCH_bpf_TRUE@
-outfile-prefix bpf
/ -outfile-suffix
-be
4276 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/eng-be.hin bpf
/eng-be.h
4277 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/mloop-be.cin bpf
/mloop-be.c
4278 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)touch
$@
4280 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen
: bpf
/cgen-arch bpf
/cgen-cpu bpf
/cgen-defs-le bpf
/cgen-defs-be bpf
/cgen-decode-le bpf
/cgen-decode-be
4282 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-arch
:
4283 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)mach
=bpf cpu
=bpfbf FLAGS
="with-scache"; $(CGEN_GEN_ARCH
)
4284 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/arch.h bpf
/arch.c bpf
/cpuall.h
: @CGEN_MAINT@ bpf
/cgen-arch
4286 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-cpu
:
4287 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfle
,ebpfbe cpu
=bpfbf mach
=bpf FLAGS
="with-multiple-isa with-scache"; $(CGEN_GEN_CPU
)
4288 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)rm -f
$(srcdir)/bpf
/model.c
4289 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cpu.h bpf
/cpu.c bpf
/model.c
: @CGEN_MAINT@ bpf
/cgen-cpu
4291 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-defs-le
:
4292 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfle cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-le"; $(CGEN_GEN_DEFS
)
4293 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/defs-le.h
: @CGEN_MAINT@ bpf
/cgen-defs-le
4295 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-defs-be
:
4296 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfbe cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-be"; $(CGEN_GEN_DEFS
)
4297 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/defs-be.h
: @CGEN_MAINT@ bpf
/cgen-defs-be
4299 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-decode-le
:
4300 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfle cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-le" EXTRAFILES
="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE
)
4301 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/sem-le.c bpf
/decode-le.c bpf
/decode-le.h
: @CGEN_MAINT@ bpf
/cgen-decode-vle
4303 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/cgen-decode-be
:
4304 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)isa
=ebpfbe cpu
=bpfbf mach
=bpf FLAGS
="with-scache" SUFFIX
="-be" EXTRAFILES
="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE
)
4305 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/sem-be.c bpf
/decode-be.c bpf
/decode-be.h
: @CGEN_MAINT@ bpf
/cgen-decode-be
4306 @SIM_ENABLE_ARCH_cr16_TRUE@
$(cr16_libsim_a_OBJECTS
) $(cr16_libsim_a_LIBADD
): cr16
/hw-config.h
4308 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/%.o
: cr16
/%.c
4309 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4311 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/%.o
: common
/%.c
4312 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4313 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/modules.c
: |
$(cr16_BUILD_OUTPUTS
)
4315 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4316 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
4317 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
)
4319 # gencode is a build-time only tool. Override the default rules for it.
4320 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode.o
: cr16
/gencode.c
4321 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4322 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/cr16-opc.o
: ..
/opcodes
/cr16-opc.c
4323 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4325 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/simops.h
: cr16
/gencode
$(EXEEXT
)
4326 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< -h
>$@
4328 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/table.c
: cr16
/gencode
$(EXEEXT
)
4329 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< >$@
4330 @SIM_ENABLE_ARCH_cris_TRUE@
$(cris_libsim_a_OBJECTS
) $(cris_libsim_a_LIBADD
): cris
/hw-config.h
4332 @SIM_ENABLE_ARCH_cris_TRUE@cris
/%.o
: cris
/%.c
4333 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4335 @SIM_ENABLE_ARCH_cris_TRUE@cris
/%.o
: common
/%.c
4336 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4337 @SIM_ENABLE_ARCH_cris_TRUE@cris
/modules.c
: |
$(cris_BUILD_OUTPUTS
)
4339 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv10f.c cris
/engv10.h
: cris
/stamp-mloop-v10f
; @true
4340 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v10f
: $(srccom
)/genmloop.sh cris
/mloop.in
4341 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4342 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv10f-switch.c \
4343 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv10f \
4344 @SIM_ENABLE_ARCH_cris_TRUE@
-infile
$(srcdir)/cris
/mloop.in
-outfile-prefix cris
/ -outfile-suffix
-v10f
4345 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v10f.hin cris
/engv10.h
4346 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v10f.cin cris
/mloopv10f.c
4347 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
4349 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv32f.c cris
/engv32.h
: cris
/stamp-mloop-v32f
; @true
4350 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v32f
: $(srccom
)/genmloop.sh cris
/mloop.in
4351 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4352 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv32f-switch.c \
4353 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv32f \
4354 @SIM_ENABLE_ARCH_cris_TRUE@
-infile
$(srcdir)/cris
/mloop.in
-outfile-prefix cris
/ -outfile-suffix
-v32f
4355 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v32f.hin cris
/engv32.h
4356 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v32f.cin cris
/mloopv32f.c
4357 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
4359 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen
: cris
/cgen-arch cris
/cgen-cpu-decode-v10f cris
/cgen-cpu-decode-v32f
4361 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen-arch
:
4362 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)mach
=crisv10
,crisv32 FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
4363 @SIM_ENABLE_ARCH_cris_TRUE@cris
/arch.h cris
/arch.c cris
/cpuall.h
: @CGEN_MAINT@ cris
/cgen-arch
4365 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen-cpu-decode-v10f
:
4366 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)cpu
=crisv10f mach
=crisv10 SUFFIX
=v10 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4367 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$(srcdir)/cris
/semv10-switch.c
$(srcdir)/cris
/semcrisv10f-switch.c
4368 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cpuv10.h cris
/cpuv10.c cris
/semcrisv10f-switch.c cris
/modelv10.c cris
/decodev10.c cris
/decodev10.h
: @CGEN_MAINT@ cris
/cgen-cpu-decode-v10f
4370 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cgen-cpu-decode-v32f
:
4371 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)cpu
=crisv32f mach
=crisv32 SUFFIX
=v32 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4372 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$(srcdir)/cris
/semv32-switch.c
$(srcdir)/cris
/semcrisv32f-switch.c
4373 @SIM_ENABLE_ARCH_cris_TRUE@cris
/cpuv32.h cris
/cpuv32.c cris
/semcrisv32f-switch.c cris
/modelv32.c cris
/decodev32.c cris
/decodev32.h
: @CGEN_MAINT@ cris
/cgen-cpu-decode-v32f
4374 @SIM_ENABLE_ARCH_d10v_TRUE@
$(d10v_libsim_a_OBJECTS
) $(d10v_libsim_a_LIBADD
): d10v
/hw-config.h
4376 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/%.o
: d10v
/%.c
4377 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4379 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/%.o
: common
/%.c
4380 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4381 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/modules.c
: |
$(d10v_BUILD_OUTPUTS
)
4383 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4384 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
4385 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
)
4387 # gencode is a build-time only tool. Override the default rules for it.
4388 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode.o
: d10v
/gencode.c
4389 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4390 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/d10v-opc.o
: ..
/opcodes
/d10v-opc.c
4391 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4393 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/simops.h
: d10v
/gencode
$(EXEEXT
)
4394 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< -h
>$@
4396 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/table.c
: d10v
/gencode
$(EXEEXT
)
4397 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< >$@
4398 @SIM_ENABLE_ARCH_erc32_TRUE@
$(erc32_libsim_a_OBJECTS
) $(erc32_libsim_a_LIBADD
): erc32
/hw-config.h
4400 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/%.o
: erc32
/%.c
4401 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4403 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/%.o
: common
/%.c
4404 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4406 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/sis
$(EXEEXT
): erc32
/run
$(EXEEXT
)
4407 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_GEN
)ln
$< $@
2>/dev
/null ||
$(LN_S
) $< $@
2>/dev
/null || cp
-p
$< $@
4408 @SIM_ENABLE_ARCH_erc32_TRUE@sim-
%D-install-exec-local
: installdirs
4409 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
4410 @SIM_ENABLE_ARCH_erc32_TRUE@ n
=`echo sis | sed '$(program_transform_name)'`; \
4411 @SIM_ENABLE_ARCH_erc32_TRUE@
$(LIBTOOL
) --mode
=install $(INSTALL_PROGRAM
) erc32
/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
)
4412 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local
:
4413 @SIM_ENABLE_ARCH_erc32_TRUE@
rm -f
$(DESTDIR
)$(bindir)/sis
4414 @SIM_ENABLE_ARCH_examples_TRUE@
$(example_synacor_libsim_a_OBJECTS
) $(example_synacor_libsim_a_LIBADD
): example-synacor
/hw-config.h
4416 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor
/%.o
: example-synacor
/%.c
4417 @SIM_ENABLE_ARCH_examples_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4419 @SIM_ENABLE_ARCH_examples_TRUE@example-synacor
/%.o
: common
/%.c
4420 @SIM_ENABLE_ARCH_examples_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4421 @SIM_ENABLE_ARCH_frv_TRUE@
$(frv_libsim_a_OBJECTS
) $(frv_libsim_a_LIBADD
): frv
/hw-config.h
4423 @SIM_ENABLE_ARCH_frv_TRUE@frv
/%.o
: frv
/%.c
4424 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4426 @SIM_ENABLE_ARCH_frv_TRUE@frv
/%.o
: common
/%.c
4427 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4428 @SIM_ENABLE_ARCH_frv_TRUE@frv
/modules.c
: |
$(frv_BUILD_OUTPUTS
)
4430 @SIM_ENABLE_ARCH_frv_TRUE@frv
/mloop.c frv
/eng.h
: frv
/stamp-mloop
; @true
4431 @SIM_ENABLE_ARCH_frv_TRUE@frv
/stamp-mloop
: $(srccom
)/genmloop.sh frv
/mloop.in
4432 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4433 @SIM_ENABLE_ARCH_frv_TRUE@
-mono
-scache
-parallel-generic-write
-parallel-only \
4434 @SIM_ENABLE_ARCH_frv_TRUE@
-cpu frvbf \
4435 @SIM_ENABLE_ARCH_frv_TRUE@
-infile
$(srcdir)/frv
/mloop.in
-outfile-prefix frv
/
4436 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/eng.hin frv
/eng.h
4437 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/mloop.cin frv
/mloop.c
4438 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)touch
$@
4440 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cgen
: frv
/cgen-arch frv
/cgen-cpu-decode
4442 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cgen-arch
:
4443 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)mach
=all FLAGS
="with-scache"; $(CGEN_GEN_ARCH
)
4444 @SIM_ENABLE_ARCH_frv_TRUE@frv
/arch.h frv
/arch.c frv
/cpuall.h
: @CGEN_MAINT@ frv
/cgen-arch
4446 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cgen-cpu-decode
:
4447 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)cpu
=frvbf mach
=frv
,fr550
,fr500
,fr450
,fr400
,tomcat
,simple FLAGS
="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES
="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE
)
4448 @SIM_ENABLE_ARCH_frv_TRUE@frv
/cpu.h frv
/sem.c frv
/model.c frv
/decode.c frv
/decode.h
: @CGEN_MAINT@ frv
/cgen-cpu-decode
4449 @SIM_ENABLE_ARCH_ft32_TRUE@
$(ft32_libsim_a_OBJECTS
) $(ft32_libsim_a_LIBADD
): ft32
/hw-config.h
4451 @SIM_ENABLE_ARCH_ft32_TRUE@ft32
/%.o
: ft32
/%.c
4452 @SIM_ENABLE_ARCH_ft32_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4454 @SIM_ENABLE_ARCH_ft32_TRUE@ft32
/%.o
: common
/%.c
4455 @SIM_ENABLE_ARCH_ft32_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4456 @SIM_ENABLE_ARCH_h8300_TRUE@
$(h8300_libsim_a_OBJECTS
) $(h8300_libsim_a_LIBADD
): h8300
/hw-config.h
4458 @SIM_ENABLE_ARCH_h8300_TRUE@h8300
/%.o
: h8300
/%.c
4459 @SIM_ENABLE_ARCH_h8300_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4461 @SIM_ENABLE_ARCH_h8300_TRUE@h8300
/%.o
: common
/%.c
4462 @SIM_ENABLE_ARCH_h8300_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4463 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(iq2000_libsim_a_OBJECTS
) $(iq2000_libsim_a_LIBADD
): iq2000
/hw-config.h
4465 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/%.o
: iq2000
/%.c
4466 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4468 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/%.o
: common
/%.c
4469 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4470 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/modules.c
: |
$(iq2000_BUILD_OUTPUTS
)
4472 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/mloop.c iq2000
/eng.h
: iq2000
/stamp-mloop
; @true
4473 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/stamp-mloop
: $(srccom
)/genmloop.sh iq2000
/mloop.in
4474 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4475 @SIM_ENABLE_ARCH_iq2000_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
4476 @SIM_ENABLE_ARCH_iq2000_TRUE@
-cpu iq2000bf \
4477 @SIM_ENABLE_ARCH_iq2000_TRUE@
-infile
$(srcdir)/iq2000
/mloop.in
-outfile-prefix iq2000
/
4478 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/eng.hin iq2000
/eng.h
4479 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/mloop.cin iq2000
/mloop.c
4480 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)touch
$@
4482 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cgen
: iq2000
/cgen-arch iq2000
/cgen-cpu-decode
4484 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cgen-arch
:
4485 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)mach
=iq2000 FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
4486 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/arch.h iq2000
/arch.c iq2000
/cpuall.h
: @CGEN_MAINT@ iq2000
/cgen-arch
4488 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cgen-cpu-decode
:
4489 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)cpu
=iq2000bf mach
=iq2000 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4490 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/cpu.h iq2000
/sem.c iq2000
/sem-switch.c iq2000
/model.c iq2000
/decode.c iq2000
/decode.h
: @CGEN_MAINT@ iq2000
/cgen-cpu-decode
4491 @SIM_ENABLE_ARCH_lm32_TRUE@
$(lm32_libsim_a_OBJECTS
) $(lm32_libsim_a_LIBADD
): lm32
/hw-config.h
4493 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/%.o
: lm32
/%.c
4494 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4496 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/%.o
: common
/%.c
4497 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4498 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/modules.c
: |
$(lm32_BUILD_OUTPUTS
)
4500 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/mloop.c lm32
/eng.h
: lm32
/stamp-mloop
; @true
4501 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/stamp-mloop
: $(srccom
)/genmloop.sh lm32
/mloop.in
4502 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4503 @SIM_ENABLE_ARCH_lm32_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
4504 @SIM_ENABLE_ARCH_lm32_TRUE@
-cpu lm32bf \
4505 @SIM_ENABLE_ARCH_lm32_TRUE@
-infile
$(srcdir)/lm32
/mloop.in
-outfile-prefix lm32
/
4506 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/eng.hin lm32
/eng.h
4507 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/mloop.cin lm32
/mloop.c
4508 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)touch
$@
4510 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cgen
: lm32
/cgen-arch lm32
/cgen-cpu-decode
4512 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cgen-arch
:
4513 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)mach
=all FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
4514 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/arch.h lm32
/arch.c lm32
/cpuall.h
: @CGEN_MAINT@ lm32
/cgen-arch
4516 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cgen-cpu-decode
:
4517 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)cpu
=lm32bf mach
=lm32 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4518 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/cpu.h lm32
/sem.c lm32
/sem-switch.c lm32
/model.c lm32
/decode.c lm32
/decode.h
: @CGEN_MAINT@ lm32
/cgen-cpu-decode
4519 @SIM_ENABLE_ARCH_m32c_TRUE@
$(m32c_libsim_a_OBJECTS
) $(m32c_libsim_a_LIBADD
): m32c
/hw-config.h
4521 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/%.o
: m32c
/%.c
4522 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4524 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/%.o
: common
/%.c
4525 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4526 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/modules.c
: |
$(m32c_BUILD_OUTPUTS
)
4528 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4529 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
4530 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
)
4532 # opc2c is a build-time only tool. Override the default rules for it.
4533 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c.o
: m32c
/opc2c.c
4534 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4536 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/m32c.c
: m32c
/m32c.opc m32c
/opc2c
$(EXEEXT
)
4537 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
4538 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
4540 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/r8c.c
: m32c
/r8c.opc m32c
/opc2c
$(EXEEXT
)
4541 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
4542 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
4543 @SIM_ENABLE_ARCH_m32r_TRUE@
$(m32r_libsim_a_OBJECTS
) $(m32r_libsim_a_LIBADD
): m32r
/hw-config.h
4545 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/%.o
: m32r
/%.c
4546 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4548 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/%.o
: common
/%.c
4549 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4550 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/modules.c
: |
$(m32r_BUILD_OUTPUTS
)
4552 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop.c m32r
/eng.h
: m32r
/stamp-mloop
; @true
4553 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop
: $(srccom
)/genmloop.sh m32r
/mloop.in
4554 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4555 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
4556 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rbf \
4557 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloop.in
-outfile-prefix m32r
/
4558 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng.hin m32r
/eng.h
4559 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop.cin m32r
/mloop.c
4560 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
4562 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloopx.c m32r
/engx.h
: m32r
/stamp-mloop
; @true
4563 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-x
: $(srccom
)/genmloop.sh m32r
/mloop.in
4564 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4565 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch semx-switch.c \
4566 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rxf \
4567 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloopx.in
-outfile-prefix m32r
/ -outfile-suffix x
4568 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/engx.hin m32r
/engx.h
4569 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloopx.cin m32r
/mloopx.c
4570 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
4572 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop2.c m32r
/eng2.h
: m32r
/stamp-mloop
; @true
4573 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-2
: $(srccom
)/genmloop.sh m32r
/mloop.in
4574 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4575 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch sem2-switch.c \
4576 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32r2f \
4577 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloop2.in
-outfile-prefix m32r
/ -outfile-suffix
2
4578 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng2.hin m32r
/eng2.h
4579 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop2.cin m32r
/mloop2.c
4580 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
4582 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen
: m32r
/cgen-arch m32r
/cgen-cpu-decode m32r
/cgen-cpu-decode-x m32r
/cgen-cpu-decode-2
4584 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-arch
:
4585 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)mach
=all FLAGS
="with-scache with-profile=fn"; $(CGEN_GEN_ARCH
)
4586 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/arch.h m32r
/arch.c m32r
/cpuall.h
: @CGEN_MAINT@ m32r
/cgen-arch
4588 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-cpu-decode
:
4589 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)cpu
=m32rbf mach
=m32r FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4590 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cpu.h m32r
/sem.c m32r
/sem-switch.c m32r
/model.c m32r
/decode.c m32r
/decode.h
: @CGEN_MAINT@ m32r
/cgen-cpu-decode
4592 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-cpu-decode-x
:
4593 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)cpu
=m32rxf mach
=m32rx SUFFIX
=x FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4594 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cpux.h m32r
/semx-switch.c m32r
/modelx.c m32r
/decodex.c m32r
/decodex.h
: @CGEN_MAINT@ m32r
/cgen-cpu-decode-x
4596 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cgen-cpu-decode-2
:
4597 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)cpu
=m32r2f mach
=m32r2 SUFFIX
=2 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4598 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/cpu2.h m32r
/sem2-switch.c m32r
/model2.c m32r
/decode2.c m32r
/decode2.h
: @CGEN_MAINT@ m32r
/cgen-cpu-decode-2
4599 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(m68hc11_libsim_a_OBJECTS
) $(m68hc11_libsim_a_LIBADD
): m68hc11
/hw-config.h
4601 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/%.o
: m68hc11
/%.c
4602 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4604 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/%.o
: common
/%.c
4605 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_at
)$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4606 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/modules.c
: |
$(m68hc11_BUILD_OUTPUTS
)
4608 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4609 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode
$(EXEEXT
): $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
4610 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_LDADD
)
4612 # gencode is a build-time only tool. Override the default rules for it.
4613 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode.o
: m68hc11
/gencode.c
4614 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4616 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc11int.c
: m68hc11
/gencode
$(EXEEXT
)
4617 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6811
>$@
4619 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc12int.c
: m68hc11
/gencode
$(EXEEXT
)
4620 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6812
>$@
4621 @SIM_ENABLE_ARCH_mips_TRUE@mips
/modules.c
: |
$(mips_BUILD_OUTPUTS
)
4623 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_IGEN_ITABLE
): mips
/stamp-igen-itable
4624 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE
): mips
/stamp-gen-mode-single
4625 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16
): mips
/stamp-gen-mode-m16-m16
4626 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32
): mips
/stamp-gen-mode-m16-m32
4627 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_MULTI_SRC
): mips
/stamp-gen-mode-multi-igen mips
/stamp-gen-mode-multi-run
4629 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-igen-itable
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(IGEN
)
4630 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
4631 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
4632 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
4633 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
4634 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
4635 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnowidth \
4636 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnounimplemented \
4637 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_IGEN_ITABLE_FLAGS
) \
4638 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
4639 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
4640 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
4641 @SIM_ENABLE_ARCH_mips_TRUE@
-n itable.h
-ht mips
/itable.h \
4642 @SIM_ENABLE_ARCH_mips_TRUE@
-n itable.c
-t mips
/itable.c
4643 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
4645 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-single
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_IGEN_DC
) $(IGEN
)
4646 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
4647 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
4648 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
4649 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
4650 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
4651 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_SINGLE_FLAGS
) \
4652 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
4653 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
4654 @SIM_ENABLE_ARCH_mips_TRUE@
-B
32 \
4655 @SIM_ENABLE_ARCH_mips_TRUE@
-H
31 \
4656 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
4657 @SIM_ENABLE_ARCH_mips_TRUE@
-o
$(mips_IGEN_DC
) \
4658 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
4659 @SIM_ENABLE_ARCH_mips_TRUE@
-n icache.h
-hc mips
/icache.h \
4660 @SIM_ENABLE_ARCH_mips_TRUE@
-n icache.c
-c mips
/icache.c \
4661 @SIM_ENABLE_ARCH_mips_TRUE@
-n semantics.h
-hs mips
/semantics.h \
4662 @SIM_ENABLE_ARCH_mips_TRUE@
-n semantics.c
-s mips
/semantics.c \
4663 @SIM_ENABLE_ARCH_mips_TRUE@
-n idecode.h
-hd mips
/idecode.h \
4664 @SIM_ENABLE_ARCH_mips_TRUE@
-n idecode.c
-d mips
/idecode.c \
4665 @SIM_ENABLE_ARCH_mips_TRUE@
-n model.h
-hm mips
/model.h \
4666 @SIM_ENABLE_ARCH_mips_TRUE@
-n model.c
-m mips
/model.c \
4667 @SIM_ENABLE_ARCH_mips_TRUE@
-n support.h
-hf mips
/support.h \
4668 @SIM_ENABLE_ARCH_mips_TRUE@
-n support.c
-f mips
/support.c \
4669 @SIM_ENABLE_ARCH_mips_TRUE@
-n engine.h
-he mips
/engine.h \
4670 @SIM_ENABLE_ARCH_mips_TRUE@
-n engine.c
-e mips
/engine.c \
4671 @SIM_ENABLE_ARCH_mips_TRUE@
-n irun.c
-r mips
/irun.c
4672 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
4674 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-m16-m16
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_M16_DC
) $(IGEN
)
4675 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
4676 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
4677 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
4678 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
4679 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
4680 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_M16_FLAGS
) \
4681 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
4682 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
4683 @SIM_ENABLE_ARCH_mips_TRUE@
-B
16 \
4684 @SIM_ENABLE_ARCH_mips_TRUE@
-H
15 \
4685 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
4686 @SIM_ENABLE_ARCH_mips_TRUE@
-o
$(mips_M16_DC
) \
4687 @SIM_ENABLE_ARCH_mips_TRUE@
-P m16_ \
4688 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
4689 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_icache.h
-hc mips
/m16_icache.h \
4690 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_icache.c
-c mips
/m16_icache.c \
4691 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_semantics.h
-hs mips
/m16_semantics.h \
4692 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_semantics.c
-s mips
/m16_semantics.c \
4693 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_idecode.h
-hd mips
/m16_idecode.h \
4694 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_idecode.c
-d mips
/m16_idecode.c \
4695 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_model.h
-hm mips
/m16_model.h \
4696 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_model.c
-m mips
/m16_model.c \
4697 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_support.h
-hf mips
/m16_support.h \
4698 @SIM_ENABLE_ARCH_mips_TRUE@
-n m16_support.c
-f mips
/m16_support.c
4699 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
4701 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-m16-m32
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_IGEN_DC
) $(IGEN
)
4702 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
4703 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
4704 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
4705 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
4706 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
4707 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_MIPS_SINGLE_FLAGS
) \
4708 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
4709 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
4710 @SIM_ENABLE_ARCH_mips_TRUE@
-B
32 \
4711 @SIM_ENABLE_ARCH_mips_TRUE@
-H
31 \
4712 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
4713 @SIM_ENABLE_ARCH_mips_TRUE@
-o
$(mips_IGEN_DC
) \
4714 @SIM_ENABLE_ARCH_mips_TRUE@
-P m32_ \
4715 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
4716 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_icache.h
-hc mips
/m32_icache.h \
4717 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_icache.c
-c mips
/m32_icache.c \
4718 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_semantics.h
-hs mips
/m32_semantics.h \
4719 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_semantics.c
-s mips
/m32_semantics.c \
4720 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_idecode.h
-hd mips
/m32_idecode.h \
4721 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_idecode.c
-d mips
/m32_idecode.c \
4722 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_model.h
-hm mips
/m32_model.h \
4723 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_model.c
-m mips
/m32_model.c \
4724 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_support.h
-hf mips
/m32_support.h \
4725 @SIM_ENABLE_ARCH_mips_TRUE@
-n m32_support.c
-f mips
/m32_support.c
4726 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
4728 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-multi-igen
: $(mips_IGEN_INSN
) $(mips_IGEN_INSN_INC
) $(mips_IGEN_DC
) $(mips_M16_DC
) $(mips_MICROMIPS32_DC
) $(mips_MICROMIPS16_DC
) $(IGEN
)
4729 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)\
4730 @SIM_ENABLE_ARCH_mips_TRUE@ for t in
$(SIM_MIPS_MULTI_IGEN_CONFIGS
); do \
4731 @SIM_ENABLE_ARCH_mips_TRUE@ p
=`echo $${t} | sed -e 's/:.*//'` ; \
4732 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
4733 @SIM_ENABLE_ARCH_mips_TRUE@ f
=`echo $${t} | sed -e 's/.*://'` ; \
4734 @SIM_ENABLE_ARCH_mips_TRUE@ case
$${p} in \
4735 @SIM_ENABLE_ARCH_mips_TRUE@ micromips16
*) \
4736 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
4737 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32
* | micromips64
*) \
4738 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
4739 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m32
*) \
4740 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
4741 @SIM_ENABLE_ARCH_mips_TRUE@ m
="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
4742 @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m64
*) \
4743 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
4744 @SIM_ENABLE_ARCH_mips_TRUE@ m
="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
4745 @SIM_ENABLE_ARCH_mips_TRUE@ m16
*) \
4746 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
4747 @SIM_ENABLE_ARCH_mips_TRUE@
*) \
4748 @SIM_ENABLE_ARCH_mips_TRUE@ e
="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
4749 @SIM_ENABLE_ARCH_mips_TRUE@ esac
; \
4750 @SIM_ENABLE_ARCH_mips_TRUE@
$(IGEN_RUN
) \
4751 @SIM_ENABLE_ARCH_mips_TRUE@
$(mips_IGEN_TRACE
) \
4752 @SIM_ENABLE_ARCH_mips_TRUE@
$${e} \
4753 @SIM_ENABLE_ARCH_mips_TRUE@
-I
$(srcdir)/mips \
4754 @SIM_ENABLE_ARCH_mips_TRUE@
-Werror \
4755 @SIM_ENABLE_ARCH_mips_TRUE@
-Wnodiscard \
4756 @SIM_ENABLE_ARCH_mips_TRUE@
-M
$${m} \
4757 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-direct-access \
4758 @SIM_ENABLE_ARCH_mips_TRUE@
-G gen-zero-r0 \
4759 @SIM_ENABLE_ARCH_mips_TRUE@
-i
$(mips_IGEN_INSN
) \
4760 @SIM_ENABLE_ARCH_mips_TRUE@
-P
$${p}_ \
4761 @SIM_ENABLE_ARCH_mips_TRUE@
-x \
4762 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_icache.h
-hc mips
/$${p}_icache.h \
4763 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_icache.c
-c mips
/$${p}_icache.c \
4764 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_semantics.h
-hs mips
/$${p}_semantics.h \
4765 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_semantics.c
-s mips
/$${p}_semantics.c \
4766 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_idecode.h
-hd mips
/$${p}_idecode.h \
4767 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_idecode.c
-d mips
/$${p}_idecode.c \
4768 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_model.h
-hm mips
/$${p}_model.h \
4769 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_model.c
-m mips
/$${p}_model.c \
4770 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_support.h
-hf mips
/$${p}_support.h \
4771 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_support.c
-f mips
/$${p}_support.c \
4772 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_engine.h
-he mips
/$${p}_engine.h \
4773 @SIM_ENABLE_ARCH_mips_TRUE@
-n
$${p}_engine.c
-e mips
/$${p}_engine.c \
4774 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
; \
4775 @SIM_ENABLE_ARCH_mips_TRUE@ done
4776 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
4778 @SIM_ENABLE_ARCH_mips_TRUE@mips
/stamp-gen-mode-multi-run
: mips
/m16run.c mips
/micromipsrun.c
4779 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_GEN
)\
4780 @SIM_ENABLE_ARCH_mips_TRUE@ for t in
$(SIM_MIPS_MULTI_IGEN_CONFIGS
); do \
4781 @SIM_ENABLE_ARCH_mips_TRUE@ case
$${t} in \
4782 @SIM_ENABLE_ARCH_mips_TRUE@ m16
*) \
4783 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
4784 @SIM_ENABLE_ARCH_mips_TRUE@ o
=mips
/m16
$${m}_run.c
; \
4785 @SIM_ENABLE_ARCH_mips_TRUE@ sed
< $(srcdir)/mips
/m16run.c
> $$o.tmp \
4786 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/^sim_/m16$${m}_/" \
4787 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"/include/s/sim-engine/m16$${m}_engine/" \
4788 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m16_/m16$${m}_/" \
4789 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m32_/m32$${m}_/" \
4790 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
1; \
4791 @SIM_ENABLE_ARCH_mips_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
4792 @SIM_ENABLE_ARCH_mips_TRUE@
;;\
4793 @SIM_ENABLE_ARCH_mips_TRUE@ micromips32
*) \
4794 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
4795 @SIM_ENABLE_ARCH_mips_TRUE@ o
=mips
/micromips
$${m}_run.c
; \
4796 @SIM_ENABLE_ARCH_mips_TRUE@ sed
< $(srcdir)/mips
/micromipsrun.c
> $$o.tmp \
4797 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/^sim_/micromips32$${m}_/" \
4798 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"/include/s/sim-engine/micromips32$${m}_engine/" \
4799 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips16_/micromips16$${m}_/" \
4800 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips32_/micromips32$${m}_/" \
4801 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m32_/m32$${m}_/" \
4802 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
1; \
4803 @SIM_ENABLE_ARCH_mips_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
4804 @SIM_ENABLE_ARCH_mips_TRUE@
;;\
4805 @SIM_ENABLE_ARCH_mips_TRUE@ micromips64
*) \
4806 @SIM_ENABLE_ARCH_mips_TRUE@ m
=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
4807 @SIM_ENABLE_ARCH_mips_TRUE@ o
=mips
/micromips
$${m}_run.c
; \
4808 @SIM_ENABLE_ARCH_mips_TRUE@ sed
< $(srcdir)/mips
/micromipsrun.c
> $$o.tmp \
4809 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/^sim_/micromips64$${m}_/" \
4810 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"/include/s/sim-engine/micromips64$${m}_engine/" \
4811 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips16_/micromips16$${m}_/" \
4812 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/micromips32_/micromips64$${m}_/" \
4813 @SIM_ENABLE_ARCH_mips_TRUE@
-e
"s/m32_/m64$${m}_/" \
4814 @SIM_ENABLE_ARCH_mips_TRUE@ || exit
1; \
4815 @SIM_ENABLE_ARCH_mips_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
4816 @SIM_ENABLE_ARCH_mips_TRUE@
;;\
4817 @SIM_ENABLE_ARCH_mips_TRUE@ esac \
4818 @SIM_ENABLE_ARCH_mips_TRUE@ done
4819 @SIM_ENABLE_ARCH_mips_TRUE@
$(AM_V_at
)touch
$@
4820 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/modules.c
: |
$(mn10300_BUILD_OUTPUTS
)
4822 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_BUILT_SRC_FROM_IGEN
): mn10300
/stamp-igen
4823 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/stamp-igen
: $(mn10300_IGEN_INSN
) $(mn10300_IGEN_INSN_INC
) $(mn10300_IGEN_DC
) $(IGEN
)
4824 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
4825 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_IGEN_TRACE
) \
4826 @SIM_ENABLE_ARCH_mn10300_TRUE@
-G gen-direct-access \
4827 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M mn10300
,am33
-G gen-multi-sim
=am33 \
4828 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M am33_2 \
4829 @SIM_ENABLE_ARCH_mn10300_TRUE@
-I
$(srcdir)/mn10300 \
4830 @SIM_ENABLE_ARCH_mn10300_TRUE@
-i
$(mn10300_IGEN_INSN
) \
4831 @SIM_ENABLE_ARCH_mn10300_TRUE@
-o
$(mn10300_IGEN_DC
) \
4832 @SIM_ENABLE_ARCH_mn10300_TRUE@
-x \
4833 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.h
-hc mn10300
/icache.h \
4834 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.c
-c mn10300
/icache.c \
4835 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.h
-hs mn10300
/semantics.h \
4836 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.c
-s mn10300
/semantics.c \
4837 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.h
-hd mn10300
/idecode.h \
4838 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.c
-d mn10300
/idecode.c \
4839 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.h
-hm mn10300
/model.h \
4840 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.c
-m mn10300
/model.c \
4841 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.h
-hf mn10300
/support.h \
4842 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.c
-f mn10300
/support.c \
4843 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.h
-ht mn10300
/itable.h \
4844 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.c
-t mn10300
/itable.c \
4845 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.h
-he mn10300
/engine.h \
4846 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.c
-e mn10300
/engine.c \
4847 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n irun.c
-r mn10300
/irun.c
4848 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)touch
$@
4850 @SIM_ENABLE_ARCH_moxie_TRUE@moxie
/moxie-gdb.dtb
: @MAINT@ moxie
/moxie-gdb.dts moxie
/$(am__dirstamp
)
4851 @SIM_ENABLE_ARCH_moxie_TRUE@
$(AM_V_GEN
) \
4852 @SIM_ENABLE_ARCH_moxie_TRUE@ if
test "x$(DTC)" != x
; then \
4853 @SIM_ENABLE_ARCH_moxie_TRUE@
$(DTC
) -O dtb
-o
$@.tmp
${srcdir}/moxie
/moxie-gdb.dts || exit
1; \
4854 @SIM_ENABLE_ARCH_moxie_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
${srcdir}/moxie
/moxie-gdb.dtb || exit
1; \
4855 @SIM_ENABLE_ARCH_moxie_TRUE@ touch
${srcdir}/moxie
/moxie-gdb.dtb
; \
4856 @SIM_ENABLE_ARCH_moxie_TRUE@
else \
4857 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"Could not update the moxie-gdb.dtb file because the device "; \
4858 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"tree compiler tool (dtc) is missing. Install the tool to "; \
4859 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"update the device tree blob."; \
4860 @SIM_ENABLE_ARCH_moxie_TRUE@ fi
4861 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/modules.c
: |
$(or1k_BUILD_OUTPUTS
)
4863 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/mloop.c or1k
/eng.h
: or1k
/stamp-mloop
; @true
4864 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/stamp-mloop
: $(srccom
)/genmloop.sh or1k
/mloop.in
4865 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
4866 @SIM_ENABLE_ARCH_or1k_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
4867 @SIM_ENABLE_ARCH_or1k_TRUE@
-cpu or1k32bf \
4868 @SIM_ENABLE_ARCH_or1k_TRUE@
-infile
$(srcdir)/or1k
/mloop.in
-outfile-prefix or1k
/
4869 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/eng.hin or1k
/eng.h
4870 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/mloop.cin or1k
/mloop.c
4871 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)touch
$@
4873 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cgen
: or1k
/cgen-arch or1k
/cgen-cpu-decode
4875 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cgen-arch
:
4876 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)mach
=or32
,or32nd FLAGS
="with-scache"; $(CGEN_GEN_ARCH
)
4877 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/arch.h or1k
/arch.c or1k
/cpuall.h
: @CGEN_MAINT@ or1k
/cgen-arch
4879 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cgen-cpu-decode
:
4880 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)cpu
=or1k32bf mach
=or32
,or32nd FLAGS
="with-scache" EXTRAFILES
="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE
)
4881 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/cpu.h or1k
/cpu.c or1k
/model.c or1k
/sem.c or1k
/sem-switch.c or1k
/decode.c or1k
/decode.h
: @CGEN_MAINT@ or1k
/cgen-cpu-decode
4883 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/psim
$(EXEEXT
): ppc
/run
$(EXEEXT
)
4884 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)ln
$< $@
2>/dev
/null ||
$(LN_S
) $< $@
2>/dev
/null || cp
-p
$< $@
4886 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/%.o
: ppc
/%.c | ppc
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
4887 @SIM_ENABLE_ARCH_ppc_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4889 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.c
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
4890 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--source
$@.tmp
4891 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.c
4892 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.c
4894 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.h
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
4895 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--header
$@.tmp
4896 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.h
4897 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.h
4899 @SIM_ENABLE_ARCH_rl78_TRUE@rl78
/%.o
: rl78
/%.c | rl78
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
4900 @SIM_ENABLE_ARCH_rl78_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4902 @SIM_ENABLE_ARCH_rx_TRUE@rx
/%.o
: rx
/%.c | rx
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
4903 @SIM_ENABLE_ARCH_rx_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4904 @SIM_ENABLE_ARCH_sh_TRUE@sh
/modules.c
: |
$(sh_BUILD_OUTPUTS
)
4906 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
4907 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode
$(EXEEXT
): $(sh_gencode_OBJECTS
) $(sh_gencode_DEPENDENCIES
) sh
/$(am__dirstamp
)
4908 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(sh_gencode_OBJECTS
) $(sh_gencode_LDADD
)
4910 # gencode is a build-time only tool. Override the default rules for it.
4911 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode.o
: sh
/gencode.c
4912 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
4914 @SIM_ENABLE_ARCH_sh_TRUE@sh
/code.c
: sh
/gencode
$(EXEEXT
)
4915 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -x
>$@
4917 @SIM_ENABLE_ARCH_sh_TRUE@sh
/ppi.c
: sh
/gencode
$(EXEEXT
)
4918 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -p
>$@
4920 @SIM_ENABLE_ARCH_sh_TRUE@sh
/table.c
: sh
/gencode
$(EXEEXT
)
4921 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -s
>$@
4922 @SIM_ENABLE_ARCH_v850_TRUE@v850
/modules.c
: |
$(v850_BUILD_OUTPUTS
)
4924 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_BUILT_SRC_FROM_IGEN
): v850
/stamp-igen
4925 @SIM_ENABLE_ARCH_v850_TRUE@v850
/stamp-igen
: $(v850_IGEN_INSN
) $(v850_IGEN_DC
) $(IGEN
)
4926 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
4927 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_IGEN_TRACE
) \
4928 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-direct-access \
4929 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-zero-r0 \
4930 @SIM_ENABLE_ARCH_v850_TRUE@
-i
$(v850_IGEN_INSN
) \
4931 @SIM_ENABLE_ARCH_v850_TRUE@
-o
$(v850_IGEN_DC
) \
4932 @SIM_ENABLE_ARCH_v850_TRUE@
-x \
4933 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.h
-hc v850
/icache.h \
4934 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.c
-c v850
/icache.c \
4935 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.h
-hs v850
/semantics.h \
4936 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.c
-s v850
/semantics.c \
4937 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.h
-hd v850
/idecode.h \
4938 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.c
-d v850
/idecode.c \
4939 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.h
-hm v850
/model.h \
4940 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.c
-m v850
/model.c \
4941 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.h
-hf v850
/support.h \
4942 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.c
-f v850
/support.c \
4943 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.h
-ht v850
/itable.h \
4944 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.c
-t v850
/itable.c \
4945 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.h
-he v850
/engine.h \
4946 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.c
-e v850
/engine.c \
4947 @SIM_ENABLE_ARCH_v850_TRUE@
-n irun.c
-r v850
/irun.c
4948 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)touch
$@
4950 %/libsim.a
: |
$(SIM_ALL_RECURSIVE_DEPS
)
4951 $(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4953 %/nrun.o
: common
/nrun.c |
%/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
4954 $(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
4956 all-recursive
: $(SIM_ALL_RECURSIVE_DEPS
)
4958 install-data-local
: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS
)
4959 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(libdir)
4960 lib
=`echo sim | sed '$(program_transform_name)'`; \
4961 for d in
$(SIM_ENABLED_ARCHES
); do \
4963 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
4965 $(INSTALL_DATA
) $$d/libsim.a
$(DESTDIR
)$(libdir)/$$n || exit
1; \
4968 install-exec-local
: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS
)
4969 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
4970 run
=`echo run | sed '$(program_transform_name)'`; \
4971 for d in
$(SIM_ENABLED_ARCHES
); do \
4973 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
4974 $(LIBTOOL
) --mode
=install \
4975 $(INSTALL_PROGRAM
) $$d/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
) || exit
1; \
4978 uninstall-local
: $(SIM_UNINSTALL_LOCAL_DEPS
)
4979 rm -f
$(DESTDIR
)$(bindir)/run
$(DESTDIR
)$(libdir)/libsim.a
4980 for d in
$(SIM_ENABLED_ARCHES
); do \
4981 rm -f
$(DESTDIR
)$(bindir)/run-
$$d $(DESTDIR
)$(libdir)/libsim-
$$d.a
; \
4984 # Tell versions [3.59,3.63) of GNU make to not export all variables.
4985 # Otherwise a system limit (for SysV at least) may be exceeded.