1 # Makefile.in generated by automake 1.15.1 from Makefile.am.
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660 install-data-recursive install-dvi-recursive \
661 install-exec-recursive install-html-recursive \
662 install-info-recursive install-pdf-recursive \
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705 $(srcroot
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715 am__tagged_files
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720 am__uniquify_input
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737 RUNTESTDEFAULTFLAGS
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810 copy_in_global_log = 1; \
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933 AS_FOR_TARGET_FRV
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935 AS_FOR_TARGET_H8300
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936 AS_FOR_TARGET_IQ2000
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937 AS_FOR_TARGET_LM32
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938 AS_FOR_TARGET_M32C
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939 AS_FOR_TARGET_M32R
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940 AS_FOR_TARGET_M68HC11
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941 AS_FOR_TARGET_MCORE
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942 AS_FOR_TARGET_MICROBLAZE
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943 AS_FOR_TARGET_MIPS
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944 AS_FOR_TARGET_MN10300
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945 AS_FOR_TARGET_MOXIE
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946 AS_FOR_TARGET_MSP430
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947 AS_FOR_TARGET_OR1K
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948 AS_FOR_TARGET_PPC
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949 AS_FOR_TARGET_PRU
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950 AS_FOR_TARGET_RISCV
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951 AS_FOR_TARGET_RL78
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952 AS_FOR_TARGET_RX
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953 AS_FOR_TARGET_SH
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954 AS_FOR_TARGET_V850
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955 AUTOCONF
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956 AUTOHEADER
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957 AUTOMAKE
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960 CCDEPMODE
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961 CC_FOR_BUILD
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962 CC_FOR_TARGET
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963 CC_FOR_TARGET_AARCH64
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964 CC_FOR_TARGET_ARM
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965 CC_FOR_TARGET_AVR
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966 CC_FOR_TARGET_BFIN
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967 CC_FOR_TARGET_BPF
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968 CC_FOR_TARGET_CR16
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969 CC_FOR_TARGET_CRIS
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970 CC_FOR_TARGET_D10V
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971 CC_FOR_TARGET_ERC32
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972 CC_FOR_TARGET_EXAMPLE_SYNACOR
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973 CC_FOR_TARGET_FRV
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974 CC_FOR_TARGET_FT32
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975 CC_FOR_TARGET_H8300
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976 CC_FOR_TARGET_IQ2000
= @CC_FOR_TARGET_IQ2000@
977 CC_FOR_TARGET_LM32
= @CC_FOR_TARGET_LM32@
978 CC_FOR_TARGET_M32C
= @CC_FOR_TARGET_M32C@
979 CC_FOR_TARGET_M32R
= @CC_FOR_TARGET_M32R@
980 CC_FOR_TARGET_M68HC11
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981 CC_FOR_TARGET_MCORE
= @CC_FOR_TARGET_MCORE@
982 CC_FOR_TARGET_MICROBLAZE
= @CC_FOR_TARGET_MICROBLAZE@
983 CC_FOR_TARGET_MIPS
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984 CC_FOR_TARGET_MN10300
= @CC_FOR_TARGET_MN10300@
985 CC_FOR_TARGET_MOXIE
= @CC_FOR_TARGET_MOXIE@
986 CC_FOR_TARGET_MSP430
= @CC_FOR_TARGET_MSP430@
987 CC_FOR_TARGET_OR1K
= @CC_FOR_TARGET_OR1K@
988 CC_FOR_TARGET_PPC
= @CC_FOR_TARGET_PPC@
989 CC_FOR_TARGET_PRU
= @CC_FOR_TARGET_PRU@
990 CC_FOR_TARGET_RISCV
= @CC_FOR_TARGET_RISCV@
991 CC_FOR_TARGET_RL78
= @CC_FOR_TARGET_RL78@
992 CC_FOR_TARGET_RX
= @CC_FOR_TARGET_RX@
993 CC_FOR_TARGET_SH
= @CC_FOR_TARGET_SH@
994 CC_FOR_TARGET_V850
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996 CFLAGS_FOR_BUILD
= @CFLAGS_FOR_BUILD@
997 CGEN_MAINT
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999 CPPFLAGS
= @CPPFLAGS@
1000 CPPFLAGS_FOR_BUILD
= @CPPFLAGS_FOR_BUILD@
1001 CYGPATH_W
= @CYGPATH_W@
1002 C_DIALECT
= @C_DIALECT@
1005 DSYMUTIL
= @DSYMUTIL@
1016 INSTALL_DATA
= @INSTALL_DATA@
1017 INSTALL_PROGRAM
= @INSTALL_PROGRAM@
1018 INSTALL_SCRIPT
= @INSTALL_SCRIPT@
1019 INSTALL_STRIP_PROGRAM
= @INSTALL_STRIP_PROGRAM@
1022 LDFLAGS_FOR_BUILD
= @LDFLAGS_FOR_BUILD@
1023 LD_FOR_TARGET
= @LD_FOR_TARGET@
1024 LD_FOR_TARGET_AARCH64
= @LD_FOR_TARGET_AARCH64@
1025 LD_FOR_TARGET_ARM
= @LD_FOR_TARGET_ARM@
1026 LD_FOR_TARGET_AVR
= @LD_FOR_TARGET_AVR@
1027 LD_FOR_TARGET_BFIN
= @LD_FOR_TARGET_BFIN@
1028 LD_FOR_TARGET_BPF
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1029 LD_FOR_TARGET_CR16
= @LD_FOR_TARGET_CR16@
1030 LD_FOR_TARGET_CRIS
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1031 LD_FOR_TARGET_D10V
= @LD_FOR_TARGET_D10V@
1032 LD_FOR_TARGET_ERC32
= @LD_FOR_TARGET_ERC32@
1033 LD_FOR_TARGET_EXAMPLE_SYNACOR
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1034 LD_FOR_TARGET_FRV
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1035 LD_FOR_TARGET_FT32
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1036 LD_FOR_TARGET_H8300
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1037 LD_FOR_TARGET_IQ2000
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1038 LD_FOR_TARGET_LM32
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1039 LD_FOR_TARGET_M32C
= @LD_FOR_TARGET_M32C@
1040 LD_FOR_TARGET_M32R
= @LD_FOR_TARGET_M32R@
1041 LD_FOR_TARGET_M68HC11
= @LD_FOR_TARGET_M68HC11@
1042 LD_FOR_TARGET_MCORE
= @LD_FOR_TARGET_MCORE@
1043 LD_FOR_TARGET_MICROBLAZE
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1044 LD_FOR_TARGET_MIPS
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1045 LD_FOR_TARGET_MN10300
= @LD_FOR_TARGET_MN10300@
1046 LD_FOR_TARGET_MOXIE
= @LD_FOR_TARGET_MOXIE@
1047 LD_FOR_TARGET_MSP430
= @LD_FOR_TARGET_MSP430@
1048 LD_FOR_TARGET_OR1K
= @LD_FOR_TARGET_OR1K@
1049 LD_FOR_TARGET_PPC
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1050 LD_FOR_TARGET_PRU
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1051 LD_FOR_TARGET_RISCV
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1052 LD_FOR_TARGET_RL78
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1053 LD_FOR_TARGET_RX
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1054 LD_FOR_TARGET_SH
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1055 LD_FOR_TARGET_V850
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1061 LTLIBOBJS
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1063 MAKEINFO
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1072 PACKAGE_BUGREPORT
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1073 PACKAGE_NAME
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1074 PACKAGE_STRING
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1075 PACKAGE_TARNAME
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1076 PACKAGE_URL
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1077 PACKAGE_VERSION
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1078 PATH_SEPARATOR
= @PATH_SEPARATOR@
1079 PKGVERSION
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1080 PKG_CONFIG
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1081 PKG_CONFIG_LIBDIR
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1082 PKG_CONFIG_PATH
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1084 RANLIB_FOR_BUILD
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1085 READLINE_CFLAGS
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1086 READLINE_LIB
= @READLINE_LIB@
1087 REPORT_BUGS_TEXI
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1088 REPORT_BUGS_TO
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1089 SDL_CFLAGS
= @SDL_CFLAGS@
1090 SDL_LIBS
= @SDL_LIBS@
1092 SET_MAKE
= @SET_MAKE@
1094 SIM_COMMON_BUILD_FALSE
= @SIM_COMMON_BUILD_FALSE@
1095 SIM_COMMON_BUILD_TRUE
= @SIM_COMMON_BUILD_TRUE@
1096 SIM_ENABLED_ARCHES
= @SIM_ENABLED_ARCHES@
1097 SIM_FRV_TRAPDUMP_FLAGS
= @SIM_FRV_TRAPDUMP_FLAGS@
1098 SIM_HW_CFLAGS
= @SIM_HW_CFLAGS@
1099 SIM_HW_SOCKSER
= @SIM_HW_SOCKSER@
1100 SIM_INLINE
= @SIM_INLINE@
1101 SIM_PRIMARY_TARGET
= @SIM_PRIMARY_TARGET@
1102 SIM_RISCV_BITSIZE
= @SIM_RISCV_BITSIZE@
1103 SIM_RX_CYCLE_ACCURATE_FLAGS
= @SIM_RX_CYCLE_ACCURATE_FLAGS@
1104 SIM_SUBDIRS
= @SIM_SUBDIRS@
1105 SIM_TOOLCHAIN_VARS
= @SIM_TOOLCHAIN_VARS@
1107 TERMCAP_LIB
= @TERMCAP_LIB@
1109 WARN_CFLAGS
= @WARN_CFLAGS@
1110 WERROR_CFLAGS
= @WERROR_CFLAGS@
1111 abs_builddir
= @abs_builddir@
1112 abs_srcdir
= @abs_srcdir@
1113 abs_top_builddir
= @abs_top_builddir@
1114 abs_top_srcdir
= @abs_top_srcdir@
1115 ac_ct_CC
= @ac_ct_CC@
1116 ac_ct_DUMPBIN
= @ac_ct_DUMPBIN@
1117 am__include
= @am__include@
1118 am__leading_dot
= @am__leading_dot@
1119 am__quote
= @am__quote@
1121 am__untar
= @am__untar@
1124 build_alias
= @build_alias@
1125 build_cpu
= @build_cpu@
1126 build_os
= @build_os@
1127 build_vendor
= @build_vendor@
1128 builddir
= @builddir@
1132 datarootdir
= @datarootdir@
1135 exec_prefix = @
exec_prefix@
1137 host_alias
= @host_alias@
1138 host_cpu
= @host_cpu@
1140 host_vendor
= @host_vendor@
1142 include_makefile
= @include_makefile@
1143 includedir = @
includedir@
1145 install_sh
= @install_sh@
1147 libexecdir
= @libexecdir@
1148 localedir
= @localedir@
1149 localstatedir
= @localstatedir@
1152 oldincludedir = @
oldincludedir@
1155 program_transform_name
= @program_transform_name@
1158 sharedstatedir
= @sharedstatedir@
1159 sim_bitsize
= @sim_bitsize@
1160 sim_float
= @sim_float@
1163 sysconfdir
= @sysconfdir@
1165 target_alias
= @target_alias@
1166 target_cpu
= @target_cpu@
1167 target_os
= @target_os@
1168 target_vendor
= @target_vendor@
1169 top_build_prefix
= @top_build_prefix@
1170 top_builddir
= @top_builddir@
1171 top_srcdir
= @top_srcdir@
1172 AUTOMAKE_OPTIONS
= dejagnu foreign no-dist subdir-objects
1173 ACLOCAL_AMFLAGS
= -Im4
-I..
-I..
/config
1174 GNULIB_PARENT_DIR
= ..
1175 srccom
= $(srcdir)/common
1176 srcroot
= $(srcdir)/..
1177 SUBDIRS
= @subdirs@
$(SIM_SUBDIRS
)
1178 AM_MAKEFLAGS
= SIM_NEW_COMMON_OBJS_
="$(SIM_NEW_COMMON_OBJS)" \
1180 pkginclude_HEADERS
= $(am__append_1
)
1181 noinst_LIBRARIES
= $(SIM_COMMON_LIB
) $(am__append_5
)
1182 CLEANFILES
= common
/version.c common
/version.c-stamp \
1183 testsuite
/common
/bits-gen testsuite
/common
/bits32m0.c \
1184 testsuite
/common
/bits32m31.c testsuite
/common
/bits64m0.c \
1185 testsuite
/common
/bits64m63.c
1187 MOSTLYCLEANFILES
= core
$(am__append_7
) site-sim-config.exp \
1188 testrun.log testrun.sum
$(am__append_14
) $(am__append_18
) \
1189 $(am__append_22
) $(am__append_26
) $(am__append_33
) \
1190 $(am__append_38
) $(am__append_41
) $(am__append_45
) \
1191 $(am__append_48
) $(am__append_52
) $(am__append_58
) \
1192 $(am__append_63
) $(am__append_72
) $(am__append_75
)
1193 AM_CFLAGS
= $(WERROR_CFLAGS
) $(WARN_CFLAGS
)
1194 AM_CPPFLAGS
= $(INCGNU
) -I
$(srcroot
)/include -I..
/bfd
-I.. \
1195 $(SIM_HW_CFLAGS
) $(SIM_INLINE
) -I
$(srcdir)/common \
1197 AM_CPPFLAGS_FOR_BUILD
= -I
$(srcroot
)/include $(SIM_HW_CFLAGS
) \
1198 $(SIM_INLINE
) -I
$(srcdir)/common
1199 COMPILE_FOR_BUILD
= $(CC_FOR_BUILD
) $(AM_CPPFLAGS_FOR_BUILD
) $(CPPFLAGS_FOR_BUILD
) $(CFLAGS_FOR_BUILD
)
1200 LINK_FOR_BUILD
= $(CC_FOR_BUILD
) $(CFLAGS_FOR_BUILD
) $(LDFLAGS_FOR_BUILD
) -o
$@
1201 SIM_ALL_RECURSIVE_DEPS
= common
/libcommon.a
$(am__append_4
) \
1202 $(am__append_13
) $(am__append_16
) $(am__append_21
) \
1203 $(am__append_24
) $(am__append_32
) $(am__append_37
) \
1204 $(am__append_40
) $(am__append_43
) $(am__append_47
) \
1205 $(am__append_50
) $(am__append_57
) $(am__append_62
) \
1206 $(am__append_70
) $(am__append_74
)
1207 SIM_INSTALL_DATA_LOCAL_DEPS
=
1208 SIM_INSTALL_EXEC_LOCAL_DEPS
= $(am__append_28
)
1209 SIM_UNINSTALL_LOCAL_DEPS
= $(am__append_29
)
1210 SIM_COMMON_LIB
= common
/libcommon.a
1211 common_libcommon_a_SOURCES
= \
1213 common
/portability.c \
1216 common
/target-newlib-errno.c \
1217 common
/target-newlib-open.c \
1218 common
/target-newlib-signal.c \
1219 common
/target-newlib-syscall.c \
1222 SIM_COMMON_HW_OBJS
= \
1234 SIM_NEW_COMMON_OBJS
= sim-arange.o sim-bits.o sim-close.o \
1235 sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1236 sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1237 sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1238 sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1239 sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1240 sim-watch.o
$(am__append_2
)
1241 SIM_HW_DEVICES
= cfi core pal glue
1242 LIBIBERTY_LIB
= ..
/libiberty
/libiberty.a
1243 BFD_LIB
= ..
/bfd
/libbfd.la
1244 OPCODES_LIB
= ..
/opcodes
/libopcodes.la
1251 $(LIBGNU_EXTRA_LIBS
)
1254 # igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1255 # leak detection while running it.
1256 @SIM_ENABLE_IGEN_TRUE@IGEN
= igen
/igen
$(EXEEXT
)
1257 @SIM_ENABLE_IGEN_TRUE@IGEN_RUN
= ASAN_OPTIONS
=detect_leaks
=0 $(IGEN
)
1258 @SIM_ENABLE_IGEN_TRUE@igen_libigen_a_SOURCES
= \
1259 @SIM_ENABLE_IGEN_TRUE@ igen
/table.c \
1260 @SIM_ENABLE_IGEN_TRUE@ igen
/lf.c \
1261 @SIM_ENABLE_IGEN_TRUE@ igen
/misc.c \
1262 @SIM_ENABLE_IGEN_TRUE@ igen
/filter_host.c \
1263 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode.c \
1264 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache.c \
1265 @SIM_ENABLE_IGEN_TRUE@ igen
/filter.c \
1266 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn.c \
1267 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-model.c \
1268 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-itable.c \
1269 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-icache.c \
1270 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-semantics.c \
1271 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-idecode.c \
1272 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-support.c \
1273 @SIM_ENABLE_IGEN_TRUE@ igen
/gen-engine.c \
1274 @SIM_ENABLE_IGEN_TRUE@ igen
/gen.c
1276 @SIM_ENABLE_IGEN_TRUE@igen_igen_SOURCES
= igen
/igen.c
1277 @SIM_ENABLE_IGEN_TRUE@igen_igen_LDADD
= igen
/libigen.a
1278 @SIM_ENABLE_IGEN_TRUE@igen_filter_SOURCES
=
1279 @SIM_ENABLE_IGEN_TRUE@igen_filter_LDADD
= igen
/filter-main.o igen
/libigen.a
1280 @SIM_ENABLE_IGEN_TRUE@igen_gen_SOURCES
=
1281 @SIM_ENABLE_IGEN_TRUE@igen_gen_LDADD
= igen
/gen-main.o igen
/libigen.a
1282 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_SOURCES
=
1283 @SIM_ENABLE_IGEN_TRUE@igen_ld_cache_LDADD
= igen
/ld-cache-main.o igen
/libigen.a
1284 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_SOURCES
=
1285 @SIM_ENABLE_IGEN_TRUE@igen_ld_decode_LDADD
= igen
/ld-decode-main.o igen
/libigen.a
1286 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_SOURCES
=
1287 @SIM_ENABLE_IGEN_TRUE@igen_ld_insn_LDADD
= igen
/ld-insn-main.o igen
/libigen.a
1288 @SIM_ENABLE_IGEN_TRUE@igen_table_SOURCES
=
1289 @SIM_ENABLE_IGEN_TRUE@igen_table_LDADD
= igen
/table-main.o igen
/libigen.a
1290 @SIM_ENABLE_IGEN_TRUE@igen_IGEN_TOOLS
= \
1291 @SIM_ENABLE_IGEN_TRUE@
$(IGEN
) \
1292 @SIM_ENABLE_IGEN_TRUE@ igen
/filter \
1293 @SIM_ENABLE_IGEN_TRUE@ igen
/gen \
1294 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-cache \
1295 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-decode \
1296 @SIM_ENABLE_IGEN_TRUE@ igen
/ld-insn \
1297 @SIM_ENABLE_IGEN_TRUE@ igen
/table
1299 EXTRA_DEJAGNU_SITE_CONFIG
= site-sim-config.exp
1301 # Custom verbose test variables that automake doesn't provide (yet?).
1302 AM_V_RUNTEST
= $(AM_V_RUNTEST_@AM_V@
)
1303 AM_V_RUNTEST_
= $(AM_V_RUNTEST_@AM_DEFAULT_V@
)
1304 AM_V_RUNTEST_0
= @echo
" RUNTEST $(RUNTESTFLAGS) $*";
1307 LC_ALL
=C
; export LC_ALL
; \
1308 EXPECT
=${EXPECT} ; export EXPECT
; \
1309 runtest
=$(RUNTEST
); \
1310 $$runtest $(RUNTESTFLAGS
)
1312 testsuite_common_CPPFLAGS
= \
1313 -I
$(srcdir)/common \
1314 -I
$(srcroot
)/include \
1317 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES
=
1318 @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD
= \
1319 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/nrun.o \
1320 @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64
/libsim.a \
1321 @SIM_ENABLE_ARCH_aarch64_TRUE@
$(SIM_COMMON_LIBS
)
1323 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES
=
1324 @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD
= \
1325 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/nrun.o \
1326 @SIM_ENABLE_ARCH_arm_TRUE@ arm
/libsim.a \
1327 @SIM_ENABLE_ARCH_arm_TRUE@
$(SIM_COMMON_LIBS
)
1329 @SIM_ENABLE_ARCH_arm_TRUE@armdocdir
= $(docdir
)/arm
1330 @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA
= arm
/README
1331 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES
=
1332 @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD
= \
1333 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/nrun.o \
1334 @SIM_ENABLE_ARCH_avr_TRUE@ avr
/libsim.a \
1335 @SIM_ENABLE_ARCH_avr_TRUE@
$(SIM_COMMON_LIBS
)
1337 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES
=
1338 @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD
= \
1339 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/nrun.o \
1340 @SIM_ENABLE_ARCH_bfin_TRUE@ bfin
/libsim.a \
1341 @SIM_ENABLE_ARCH_bfin_TRUE@
$(SIM_COMMON_LIBS
)
1343 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES
=
1344 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD
= \
1345 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/nrun.o \
1346 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/libsim.a \
1347 @SIM_ENABLE_ARCH_bpf_TRUE@
$(SIM_COMMON_LIBS
)
1349 @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS
= \
1350 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/eng-le.h \
1351 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-le.c \
1352 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/stamp-mloop-le \
1353 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/eng-be.h \
1354 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/mloop-be.c \
1355 @SIM_ENABLE_ARCH_bpf_TRUE@ bpf
/stamp-mloop-be
1357 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES
=
1358 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD
= \
1359 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/nrun.o \
1360 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/libsim.a \
1361 @SIM_ENABLE_ARCH_cr16_TRUE@
$(SIM_COMMON_LIBS
)
1363 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS
= \
1364 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/gencode
$(EXEEXT
) \
1365 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/simops.h \
1366 @SIM_ENABLE_ARCH_cr16_TRUE@ cr16
/table.c
1368 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES
= cr16
/gencode.c
1369 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD
= cr16
/cr16-opc.o
1370 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES
=
1371 @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD
= \
1372 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/nrun.o \
1373 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/libsim.a \
1374 @SIM_ENABLE_ARCH_cris_TRUE@
$(SIM_COMMON_LIBS
)
1376 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES
= cris
/rvdummy.c
1377 @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD
= $(LIBIBERTY_LIB
)
1378 @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS
= \
1379 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/engv10.h \
1380 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv10f.c \
1381 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v10f \
1382 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/engv32.h \
1383 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/mloopv32f.c \
1384 @SIM_ENABLE_ARCH_cris_TRUE@ cris
/stamp-mloop-v32f
1386 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES
=
1387 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD
= \
1388 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/nrun.o \
1389 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/libsim.a \
1390 @SIM_ENABLE_ARCH_d10v_TRUE@
$(SIM_COMMON_LIBS
)
1392 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS
= \
1393 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/gencode
$(EXEEXT
) \
1394 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/simops.h \
1395 @SIM_ENABLE_ARCH_d10v_TRUE@ d10v
/table.c
1397 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES
= d10v
/gencode.c
1398 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD
= d10v
/d10v-opc.o
1399 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES
=
1400 @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD
= \
1401 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/sis.o \
1402 @SIM_ENABLE_ARCH_erc32_TRUE@ erc32
/libsim.a \
1403 @SIM_ENABLE_ARCH_erc32_TRUE@
$(SIM_COMMON_LIBS
) $(READLINE_LIB
) $(TERMCAP_LIB
)
1405 @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir
= $(docdir
)/erc32
1406 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA
= erc32
/README.erc32 erc32
/README.gdb erc32
/README.sis
1407 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES
=
1408 @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD
= \
1409 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/nrun.o \
1410 @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor
/libsim.a \
1411 @SIM_ENABLE_ARCH_examples_TRUE@
$(SIM_COMMON_LIBS
)
1413 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES
=
1414 @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD
= \
1415 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/nrun.o \
1416 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/libsim.a \
1417 @SIM_ENABLE_ARCH_frv_TRUE@
$(SIM_COMMON_LIBS
)
1419 @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir
= $(docdir
)/frv
1420 @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA
= frv
/README
1421 @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS
= \
1422 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/eng.h \
1423 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/mloop.c \
1424 @SIM_ENABLE_ARCH_frv_TRUE@ frv
/stamp-mloop
1426 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES
=
1427 @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD
= \
1428 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/nrun.o \
1429 @SIM_ENABLE_ARCH_ft32_TRUE@ ft32
/libsim.a \
1430 @SIM_ENABLE_ARCH_ft32_TRUE@
$(SIM_COMMON_LIBS
)
1432 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES
=
1433 @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD
= \
1434 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/nrun.o \
1435 @SIM_ENABLE_ARCH_h8300_TRUE@ h8300
/libsim.a \
1436 @SIM_ENABLE_ARCH_h8300_TRUE@
$(SIM_COMMON_LIBS
)
1438 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES
=
1439 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD
= \
1440 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/nrun.o \
1441 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/libsim.a \
1442 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(SIM_COMMON_LIBS
)
1444 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS
= \
1445 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/eng.h \
1446 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/mloop.c \
1447 @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000
/stamp-mloop
1449 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES
=
1450 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD
= \
1451 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/nrun.o \
1452 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/libsim.a \
1453 @SIM_ENABLE_ARCH_lm32_TRUE@
$(SIM_COMMON_LIBS
)
1455 @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS
= \
1456 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/eng.h \
1457 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/mloop.c \
1458 @SIM_ENABLE_ARCH_lm32_TRUE@ lm32
/stamp-mloop
1460 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES
=
1461 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD
= \
1462 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/main.o \
1463 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/libsim.a \
1464 @SIM_ENABLE_ARCH_m32c_TRUE@
$(SIM_COMMON_LIBS
)
1466 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS
= \
1467 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/opc2c
$(EXEEXT
) \
1468 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/m32c.c \
1469 @SIM_ENABLE_ARCH_m32c_TRUE@ m32c
/r8c.c
1471 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES
= m32c
/opc2c.c
1473 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1474 # leak detection while running it.
1475 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN
= ASAN_OPTIONS
=detect_leaks
=0 m32c
/opc2c
$(EXEEXT
)
1476 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES
=
1477 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD
= \
1478 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/nrun.o \
1479 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/libsim.a \
1480 @SIM_ENABLE_ARCH_m32r_TRUE@
$(SIM_COMMON_LIBS
)
1482 @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS
= \
1483 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/eng.h \
1484 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop.c \
1485 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop \
1486 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/engx.h \
1487 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloopx.c \
1488 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-x \
1489 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/eng2.h \
1490 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/mloop2.c \
1491 @SIM_ENABLE_ARCH_m32r_TRUE@ m32r
/stamp-mloop-2
1493 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES
=
1494 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD
= \
1495 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/nrun.o \
1496 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/libsim.a \
1497 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(SIM_COMMON_LIBS
)
1499 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS
= \
1500 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/gencode
$(EXEEXT
) \
1501 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc11int.c \
1502 @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11
/m68hc12int.c
1504 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES
= m68hc11
/gencode.c
1505 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES
=
1506 @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD
= \
1507 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/nrun.o \
1508 @SIM_ENABLE_ARCH_mcore_TRUE@ mcore
/libsim.a \
1509 @SIM_ENABLE_ARCH_mcore_TRUE@
$(SIM_COMMON_LIBS
)
1511 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES
=
1512 @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD
= \
1513 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/nrun.o \
1514 @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze
/libsim.a \
1515 @SIM_ENABLE_ARCH_microblaze_TRUE@
$(SIM_COMMON_LIBS
)
1517 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES
=
1518 @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD
= \
1519 @SIM_ENABLE_ARCH_mips_TRUE@ mips
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1520 @SIM_ENABLE_ARCH_mips_TRUE@ mips
/libsim.a \
1521 @SIM_ENABLE_ARCH_mips_TRUE@
$(SIM_COMMON_LIBS
)
1523 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES
=
1524 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD
= \
1525 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/nrun.o \
1526 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/libsim.a \
1527 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(SIM_COMMON_LIBS
)
1529 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN
= \
1530 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.h \
1531 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/icache.c \
1532 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.h \
1533 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/idecode.c \
1534 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.h \
1535 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/semantics.c \
1536 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.h \
1537 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/model.c \
1538 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.h \
1539 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/support.c \
1540 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
/itable.h \
1541 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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1542 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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1543 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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1544 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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1548 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300
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1552 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC
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1553 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC
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1557 @SIM_ENABLE_ARCH_moxie_TRUE@ moxie
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1558 @SIM_ENABLE_ARCH_moxie_TRUE@
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1578 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
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1579 @SIM_ENABLE_ARCH_or1k_TRUE@ or1k
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1585 @SIM_ENABLE_ARCH_ppc_TRUE@
$(SIM_COMMON_LIBS
)
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1598 @SIM_ENABLE_ARCH_riscv_TRUE@ riscv
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1599 @SIM_ENABLE_ARCH_riscv_TRUE@
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1611 @SIM_ENABLE_ARCH_rx_TRUE@
$(SIM_COMMON_LIBS
)
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1641 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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1645 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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1647 @SIM_ENABLE_ARCH_v850_TRUE@ v850
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1657 @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC
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) .
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1716 aarch64
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1720 arm
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1724 avr
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1728 bfin
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1736 cr16
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1740 cris
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1748 frv
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$@
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1752 ft32
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1754 h8300
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1756 h8300
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1758 iq2000
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1759 cd
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1760 iq2000
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1761 cd
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1762 lm32
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1763 cd
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1764 lm32
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1766 m32c
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1768 m32c
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1769 cd
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1770 m32r
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1772 m32r
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1773 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1774 m68hc11
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/m68hc11
/Makefile.in
1775 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1776 m68hc11
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1777 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1778 mcore
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/mcore
/Makefile.in
1779 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1780 mcore
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1781 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1782 microblaze
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/microblaze
/Makefile.in
1783 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1784 microblaze
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1785 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1786 mips
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1787 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1788 mn10300
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/mn10300
/Makefile.in
1789 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1790 mn10300
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1791 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1792 moxie
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/moxie
/Makefile.in
1793 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1794 moxie
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1795 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1796 msp430
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/msp430
/Makefile.in
1797 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1798 msp430
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1799 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1800 or1k
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/or1k
/Makefile.in
1801 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1802 or1k
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1803 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1804 ppc
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1805 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1806 pru
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/pru
/Makefile.in
1807 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1808 pru
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1809 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1810 riscv
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/riscv
/Makefile.in
1811 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1812 riscv
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1813 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1814 rl78
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/rl78
/Makefile.in
1815 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1816 rl78
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1817 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1818 rx
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/rx
/Makefile.in
1819 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1820 rx
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1821 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1822 sh
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/sh
/Makefile.in
1823 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1824 sh
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1825 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1826 erc32
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/erc32
/Makefile.in
1827 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1828 erc32
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1829 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1830 v850
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/v850
/Makefile.in
1831 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1832 v850
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1833 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1834 example-synacor
/Makefile.sim
: $(top_builddir
)/config.status
$(top_srcdir
)/example-synacor
/Makefile.in
1835 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1836 example-synacor
/.gdbinit
: $(top_builddir
)/config.status
$(top_srcdir
)/common
/gdbinit.in
1837 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1838 arch-subdir.mk
: $(top_builddir
)/config.status
$(srcdir)/arch-subdir.mk.in
1839 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1840 .gdbinit
: $(top_builddir
)/config.status
$(srcdir)/gdbinit.in
1841 cd
$(top_builddir
) && $(SHELL
) .
/config.status
$@
1843 clean-noinstLIBRARIES
:
1844 -test -z
"$(noinst_LIBRARIES)" ||
rm -f
$(noinst_LIBRARIES
)
1845 common
/$(am__dirstamp
):
1847 @
: > common
/$(am__dirstamp
)
1848 common
/$(DEPDIR
)/$(am__dirstamp
):
1849 @
$(MKDIR_P
) common
/$(DEPDIR
)
1850 @
: > common
/$(DEPDIR
)/$(am__dirstamp
)
1851 common
/callback.
$(OBJEXT
): common
/$(am__dirstamp
) \
1852 common
/$(DEPDIR
)/$(am__dirstamp
)
1853 common
/portability.
$(OBJEXT
): common
/$(am__dirstamp
) \
1854 common
/$(DEPDIR
)/$(am__dirstamp
)
1855 common
/sim-load.
$(OBJEXT
): common
/$(am__dirstamp
) \
1856 common
/$(DEPDIR
)/$(am__dirstamp
)
1857 common
/syscall.
$(OBJEXT
): common
/$(am__dirstamp
) \
1858 common
/$(DEPDIR
)/$(am__dirstamp
)
1859 common
/target-newlib-errno.
$(OBJEXT
): common
/$(am__dirstamp
) \
1860 common
/$(DEPDIR
)/$(am__dirstamp
)
1861 common
/target-newlib-open.
$(OBJEXT
): common
/$(am__dirstamp
) \
1862 common
/$(DEPDIR
)/$(am__dirstamp
)
1863 common
/target-newlib-signal.
$(OBJEXT
): common
/$(am__dirstamp
) \
1864 common
/$(DEPDIR
)/$(am__dirstamp
)
1865 common
/target-newlib-syscall.
$(OBJEXT
): common
/$(am__dirstamp
) \
1866 common
/$(DEPDIR
)/$(am__dirstamp
)
1867 common
/version.
$(OBJEXT
): common
/$(am__dirstamp
) \
1868 common
/$(DEPDIR
)/$(am__dirstamp
)
1870 common
/libcommon.a
: $(common_libcommon_a_OBJECTS
) $(common_libcommon_a_DEPENDENCIES
) $(EXTRA_common_libcommon_a_DEPENDENCIES
) common
/$(am__dirstamp
)
1871 $(AM_V_at
)-rm -f common
/libcommon.a
1872 $(AM_V_AR
)$(common_libcommon_a_AR
) common
/libcommon.a
$(common_libcommon_a_OBJECTS
) $(common_libcommon_a_LIBADD
)
1873 $(AM_V_at
)$(RANLIB
) common
/libcommon.a
1874 igen
/$(am__dirstamp
):
1876 @
: > igen
/$(am__dirstamp
)
1877 igen
/$(DEPDIR
)/$(am__dirstamp
):
1878 @
$(MKDIR_P
) igen
/$(DEPDIR
)
1879 @
: > igen
/$(DEPDIR
)/$(am__dirstamp
)
1880 igen
/table.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1881 igen
/$(DEPDIR
)/$(am__dirstamp
)
1882 igen
/lf.
$(OBJEXT
): igen
/$(am__dirstamp
) igen
/$(DEPDIR
)/$(am__dirstamp
)
1883 igen
/misc.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1884 igen
/$(DEPDIR
)/$(am__dirstamp
)
1885 igen
/filter_host.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1886 igen
/$(DEPDIR
)/$(am__dirstamp
)
1887 igen
/ld-decode.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1888 igen
/$(DEPDIR
)/$(am__dirstamp
)
1889 igen
/ld-cache.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1890 igen
/$(DEPDIR
)/$(am__dirstamp
)
1891 igen
/filter.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1892 igen
/$(DEPDIR
)/$(am__dirstamp
)
1893 igen
/ld-insn.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1894 igen
/$(DEPDIR
)/$(am__dirstamp
)
1895 igen
/gen-model.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1896 igen
/$(DEPDIR
)/$(am__dirstamp
)
1897 igen
/gen-itable.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1898 igen
/$(DEPDIR
)/$(am__dirstamp
)
1899 igen
/gen-icache.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1900 igen
/$(DEPDIR
)/$(am__dirstamp
)
1901 igen
/gen-semantics.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1902 igen
/$(DEPDIR
)/$(am__dirstamp
)
1903 igen
/gen-idecode.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1904 igen
/$(DEPDIR
)/$(am__dirstamp
)
1905 igen
/gen-support.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1906 igen
/$(DEPDIR
)/$(am__dirstamp
)
1907 igen
/gen-engine.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1908 igen
/$(DEPDIR
)/$(am__dirstamp
)
1909 igen
/gen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
1910 igen
/$(DEPDIR
)/$(am__dirstamp
)
1912 @SIM_ENABLE_IGEN_FALSE@igen
/libigen.a
: $(igen_libigen_a_OBJECTS
) $(igen_libigen_a_DEPENDENCIES
) $(EXTRA_igen_libigen_a_DEPENDENCIES
) igen
/$(am__dirstamp
)
1913 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_at
)-rm -f igen
/libigen.a
1914 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_AR
)$(igen_libigen_a_AR
) igen
/libigen.a
$(igen_libigen_a_OBJECTS
) $(igen_libigen_a_LIBADD
)
1915 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_at
)$(RANLIB
) igen
/libigen.a
1917 clean-checkPROGRAMS
:
1918 @list
='$(check_PROGRAMS)'; test -n
"$$list" || exit
0; \
1919 echo
" rm -f" $$list; \
1920 rm -f
$$list || exit
$$?
; \
1921 test -n
"$(EXEEXT)" || exit
0; \
1922 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
1923 echo
" rm -f" $$list; \
1926 clean-noinstPROGRAMS
:
1927 @list
='$(noinst_PROGRAMS)'; test -n
"$$list" || exit
0; \
1928 echo
" rm -f" $$list; \
1929 rm -f
$$list || exit
$$?
; \
1930 test -n
"$(EXEEXT)" || exit
0; \
1931 list
=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
1932 echo
" rm -f" $$list; \
1934 aarch64
/$(am__dirstamp
):
1936 @
: > aarch64
/$(am__dirstamp
)
1938 aarch64
/run
$(EXEEXT
): $(aarch64_run_OBJECTS
) $(aarch64_run_DEPENDENCIES
) $(EXTRA_aarch64_run_DEPENDENCIES
) aarch64
/$(am__dirstamp
)
1939 @
rm -f aarch64
/run
$(EXEEXT
)
1940 $(AM_V_CCLD
)$(LINK
) $(aarch64_run_OBJECTS
) $(aarch64_run_LDADD
) $(LIBS
)
1941 arm
/$(am__dirstamp
):
1943 @
: > arm
/$(am__dirstamp
)
1945 arm
/run
$(EXEEXT
): $(arm_run_OBJECTS
) $(arm_run_DEPENDENCIES
) $(EXTRA_arm_run_DEPENDENCIES
) arm
/$(am__dirstamp
)
1946 @
rm -f arm
/run
$(EXEEXT
)
1947 $(AM_V_CCLD
)$(LINK
) $(arm_run_OBJECTS
) $(arm_run_LDADD
) $(LIBS
)
1948 avr
/$(am__dirstamp
):
1950 @
: > avr
/$(am__dirstamp
)
1952 avr
/run
$(EXEEXT
): $(avr_run_OBJECTS
) $(avr_run_DEPENDENCIES
) $(EXTRA_avr_run_DEPENDENCIES
) avr
/$(am__dirstamp
)
1953 @
rm -f avr
/run
$(EXEEXT
)
1954 $(AM_V_CCLD
)$(LINK
) $(avr_run_OBJECTS
) $(avr_run_LDADD
) $(LIBS
)
1955 bfin
/$(am__dirstamp
):
1957 @
: > bfin
/$(am__dirstamp
)
1959 bfin
/run
$(EXEEXT
): $(bfin_run_OBJECTS
) $(bfin_run_DEPENDENCIES
) $(EXTRA_bfin_run_DEPENDENCIES
) bfin
/$(am__dirstamp
)
1960 @
rm -f bfin
/run
$(EXEEXT
)
1961 $(AM_V_CCLD
)$(LINK
) $(bfin_run_OBJECTS
) $(bfin_run_LDADD
) $(LIBS
)
1962 bpf
/$(am__dirstamp
):
1964 @
: > bpf
/$(am__dirstamp
)
1966 bpf
/run
$(EXEEXT
): $(bpf_run_OBJECTS
) $(bpf_run_DEPENDENCIES
) $(EXTRA_bpf_run_DEPENDENCIES
) bpf
/$(am__dirstamp
)
1967 @
rm -f bpf
/run
$(EXEEXT
)
1968 $(AM_V_CCLD
)$(LINK
) $(bpf_run_OBJECTS
) $(bpf_run_LDADD
) $(LIBS
)
1969 cr16
/$(am__dirstamp
):
1971 @
: > cr16
/$(am__dirstamp
)
1972 cr16
/$(DEPDIR
)/$(am__dirstamp
):
1973 @
$(MKDIR_P
) cr16
/$(DEPDIR
)
1974 @
: > cr16
/$(DEPDIR
)/$(am__dirstamp
)
1975 cr16
/gencode.
$(OBJEXT
): cr16
/$(am__dirstamp
) \
1976 cr16
/$(DEPDIR
)/$(am__dirstamp
)
1978 @SIM_ENABLE_ARCH_cr16_FALSE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) $(EXTRA_cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
1979 @SIM_ENABLE_ARCH_cr16_FALSE@ @
rm -f cr16
/gencode
$(EXEEXT
)
1980 @SIM_ENABLE_ARCH_cr16_FALSE@
$(AM_V_CCLD
)$(LINK
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
) $(LIBS
)
1982 cr16
/run
$(EXEEXT
): $(cr16_run_OBJECTS
) $(cr16_run_DEPENDENCIES
) $(EXTRA_cr16_run_DEPENDENCIES
) cr16
/$(am__dirstamp
)
1983 @
rm -f cr16
/run
$(EXEEXT
)
1984 $(AM_V_CCLD
)$(LINK
) $(cr16_run_OBJECTS
) $(cr16_run_LDADD
) $(LIBS
)
1985 cris
/$(am__dirstamp
):
1987 @
: > cris
/$(am__dirstamp
)
1989 cris
/run
$(EXEEXT
): $(cris_run_OBJECTS
) $(cris_run_DEPENDENCIES
) $(EXTRA_cris_run_DEPENDENCIES
) cris
/$(am__dirstamp
)
1990 @
rm -f cris
/run
$(EXEEXT
)
1991 $(AM_V_CCLD
)$(LINK
) $(cris_run_OBJECTS
) $(cris_run_LDADD
) $(LIBS
)
1992 cris
/$(DEPDIR
)/$(am__dirstamp
):
1993 @
$(MKDIR_P
) cris
/$(DEPDIR
)
1994 @
: > cris
/$(DEPDIR
)/$(am__dirstamp
)
1995 cris
/rvdummy.
$(OBJEXT
): cris
/$(am__dirstamp
) \
1996 cris
/$(DEPDIR
)/$(am__dirstamp
)
1998 cris
/rvdummy
$(EXEEXT
): $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_DEPENDENCIES
) $(EXTRA_cris_rvdummy_DEPENDENCIES
) cris
/$(am__dirstamp
)
1999 @
rm -f cris
/rvdummy
$(EXEEXT
)
2000 $(AM_V_CCLD
)$(LINK
) $(cris_rvdummy_OBJECTS
) $(cris_rvdummy_LDADD
) $(LIBS
)
2001 d10v
/$(am__dirstamp
):
2003 @
: > d10v
/$(am__dirstamp
)
2004 d10v
/$(DEPDIR
)/$(am__dirstamp
):
2005 @
$(MKDIR_P
) d10v
/$(DEPDIR
)
2006 @
: > d10v
/$(DEPDIR
)/$(am__dirstamp
)
2007 d10v
/gencode.
$(OBJEXT
): d10v
/$(am__dirstamp
) \
2008 d10v
/$(DEPDIR
)/$(am__dirstamp
)
2010 @SIM_ENABLE_ARCH_d10v_FALSE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) $(EXTRA_d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
2011 @SIM_ENABLE_ARCH_d10v_FALSE@ @
rm -f d10v
/gencode
$(EXEEXT
)
2012 @SIM_ENABLE_ARCH_d10v_FALSE@
$(AM_V_CCLD
)$(LINK
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
) $(LIBS
)
2014 d10v
/run
$(EXEEXT
): $(d10v_run_OBJECTS
) $(d10v_run_DEPENDENCIES
) $(EXTRA_d10v_run_DEPENDENCIES
) d10v
/$(am__dirstamp
)
2015 @
rm -f d10v
/run
$(EXEEXT
)
2016 $(AM_V_CCLD
)$(LINK
) $(d10v_run_OBJECTS
) $(d10v_run_LDADD
) $(LIBS
)
2017 erc32
/$(am__dirstamp
):
2019 @
: > erc32
/$(am__dirstamp
)
2021 erc32
/run
$(EXEEXT
): $(erc32_run_OBJECTS
) $(erc32_run_DEPENDENCIES
) $(EXTRA_erc32_run_DEPENDENCIES
) erc32
/$(am__dirstamp
)
2022 @
rm -f erc32
/run
$(EXEEXT
)
2023 $(AM_V_CCLD
)$(LINK
) $(erc32_run_OBJECTS
) $(erc32_run_LDADD
) $(LIBS
)
2024 erc32
/$(DEPDIR
)/$(am__dirstamp
):
2025 @
$(MKDIR_P
) erc32
/$(DEPDIR
)
2026 @
: > erc32
/$(DEPDIR
)/$(am__dirstamp
)
2027 erc32
/sis.
$(OBJEXT
): erc32
/$(am__dirstamp
) \
2028 erc32
/$(DEPDIR
)/$(am__dirstamp
)
2030 @SIM_ENABLE_ARCH_erc32_FALSE@erc32
/sis
$(EXEEXT
): $(erc32_sis_OBJECTS
) $(erc32_sis_DEPENDENCIES
) $(EXTRA_erc32_sis_DEPENDENCIES
) erc32
/$(am__dirstamp
)
2031 @SIM_ENABLE_ARCH_erc32_FALSE@ @
rm -f erc32
/sis
$(EXEEXT
)
2032 @SIM_ENABLE_ARCH_erc32_FALSE@
$(AM_V_CCLD
)$(LINK
) $(erc32_sis_OBJECTS
) $(erc32_sis_LDADD
) $(LIBS
)
2033 example-synacor
/$(am__dirstamp
):
2034 @
$(MKDIR_P
) example-synacor
2035 @
: > example-synacor
/$(am__dirstamp
)
2037 example-synacor
/run
$(EXEEXT
): $(example_synacor_run_OBJECTS
) $(example_synacor_run_DEPENDENCIES
) $(EXTRA_example_synacor_run_DEPENDENCIES
) example-synacor
/$(am__dirstamp
)
2038 @
rm -f example-synacor
/run
$(EXEEXT
)
2039 $(AM_V_CCLD
)$(LINK
) $(example_synacor_run_OBJECTS
) $(example_synacor_run_LDADD
) $(LIBS
)
2040 frv
/$(am__dirstamp
):
2042 @
: > frv
/$(am__dirstamp
)
2044 frv
/run
$(EXEEXT
): $(frv_run_OBJECTS
) $(frv_run_DEPENDENCIES
) $(EXTRA_frv_run_DEPENDENCIES
) frv
/$(am__dirstamp
)
2045 @
rm -f frv
/run
$(EXEEXT
)
2046 $(AM_V_CCLD
)$(LINK
) $(frv_run_OBJECTS
) $(frv_run_LDADD
) $(LIBS
)
2047 ft32
/$(am__dirstamp
):
2049 @
: > ft32
/$(am__dirstamp
)
2051 ft32
/run
$(EXEEXT
): $(ft32_run_OBJECTS
) $(ft32_run_DEPENDENCIES
) $(EXTRA_ft32_run_DEPENDENCIES
) ft32
/$(am__dirstamp
)
2052 @
rm -f ft32
/run
$(EXEEXT
)
2053 $(AM_V_CCLD
)$(LINK
) $(ft32_run_OBJECTS
) $(ft32_run_LDADD
) $(LIBS
)
2054 h8300
/$(am__dirstamp
):
2056 @
: > h8300
/$(am__dirstamp
)
2058 h8300
/run
$(EXEEXT
): $(h8300_run_OBJECTS
) $(h8300_run_DEPENDENCIES
) $(EXTRA_h8300_run_DEPENDENCIES
) h8300
/$(am__dirstamp
)
2059 @
rm -f h8300
/run
$(EXEEXT
)
2060 $(AM_V_CCLD
)$(LINK
) $(h8300_run_OBJECTS
) $(h8300_run_LDADD
) $(LIBS
)
2062 igen
/filter$(EXEEXT
): $(igen_filter_OBJECTS
) $(igen_filter_DEPENDENCIES
) $(EXTRA_igen_filter_DEPENDENCIES
) igen
/$(am__dirstamp
)
2063 @
rm -f igen
/filter$(EXEEXT
)
2064 $(AM_V_CCLD
)$(LINK
) $(igen_filter_OBJECTS
) $(igen_filter_LDADD
) $(LIBS
)
2066 igen
/gen
$(EXEEXT
): $(igen_gen_OBJECTS
) $(igen_gen_DEPENDENCIES
) $(EXTRA_igen_gen_DEPENDENCIES
) igen
/$(am__dirstamp
)
2067 @
rm -f igen
/gen
$(EXEEXT
)
2068 $(AM_V_CCLD
)$(LINK
) $(igen_gen_OBJECTS
) $(igen_gen_LDADD
) $(LIBS
)
2069 igen
/igen.
$(OBJEXT
): igen
/$(am__dirstamp
) \
2070 igen
/$(DEPDIR
)/$(am__dirstamp
)
2072 @SIM_ENABLE_IGEN_FALSE@igen
/igen
$(EXEEXT
): $(igen_igen_OBJECTS
) $(igen_igen_DEPENDENCIES
) $(EXTRA_igen_igen_DEPENDENCIES
) igen
/$(am__dirstamp
)
2073 @SIM_ENABLE_IGEN_FALSE@ @
rm -f igen
/igen
$(EXEEXT
)
2074 @SIM_ENABLE_IGEN_FALSE@
$(AM_V_CCLD
)$(LINK
) $(igen_igen_OBJECTS
) $(igen_igen_LDADD
) $(LIBS
)
2076 igen
/ld-cache
$(EXEEXT
): $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_DEPENDENCIES
) $(EXTRA_igen_ld_cache_DEPENDENCIES
) igen
/$(am__dirstamp
)
2077 @
rm -f igen
/ld-cache
$(EXEEXT
)
2078 $(AM_V_CCLD
)$(LINK
) $(igen_ld_cache_OBJECTS
) $(igen_ld_cache_LDADD
) $(LIBS
)
2080 igen
/ld-decode
$(EXEEXT
): $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_DEPENDENCIES
) $(EXTRA_igen_ld_decode_DEPENDENCIES
) igen
/$(am__dirstamp
)
2081 @
rm -f igen
/ld-decode
$(EXEEXT
)
2082 $(AM_V_CCLD
)$(LINK
) $(igen_ld_decode_OBJECTS
) $(igen_ld_decode_LDADD
) $(LIBS
)
2084 igen
/ld-insn
$(EXEEXT
): $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_DEPENDENCIES
) $(EXTRA_igen_ld_insn_DEPENDENCIES
) igen
/$(am__dirstamp
)
2085 @
rm -f igen
/ld-insn
$(EXEEXT
)
2086 $(AM_V_CCLD
)$(LINK
) $(igen_ld_insn_OBJECTS
) $(igen_ld_insn_LDADD
) $(LIBS
)
2088 igen
/table
$(EXEEXT
): $(igen_table_OBJECTS
) $(igen_table_DEPENDENCIES
) $(EXTRA_igen_table_DEPENDENCIES
) igen
/$(am__dirstamp
)
2089 @
rm -f igen
/table
$(EXEEXT
)
2090 $(AM_V_CCLD
)$(LINK
) $(igen_table_OBJECTS
) $(igen_table_LDADD
) $(LIBS
)
2091 iq2000
/$(am__dirstamp
):
2093 @
: > iq2000
/$(am__dirstamp
)
2095 iq2000
/run
$(EXEEXT
): $(iq2000_run_OBJECTS
) $(iq2000_run_DEPENDENCIES
) $(EXTRA_iq2000_run_DEPENDENCIES
) iq2000
/$(am__dirstamp
)
2096 @
rm -f iq2000
/run
$(EXEEXT
)
2097 $(AM_V_CCLD
)$(LINK
) $(iq2000_run_OBJECTS
) $(iq2000_run_LDADD
) $(LIBS
)
2098 lm32
/$(am__dirstamp
):
2100 @
: > lm32
/$(am__dirstamp
)
2102 lm32
/run
$(EXEEXT
): $(lm32_run_OBJECTS
) $(lm32_run_DEPENDENCIES
) $(EXTRA_lm32_run_DEPENDENCIES
) lm32
/$(am__dirstamp
)
2103 @
rm -f lm32
/run
$(EXEEXT
)
2104 $(AM_V_CCLD
)$(LINK
) $(lm32_run_OBJECTS
) $(lm32_run_LDADD
) $(LIBS
)
2105 m32c
/$(am__dirstamp
):
2107 @
: > m32c
/$(am__dirstamp
)
2108 m32c
/$(DEPDIR
)/$(am__dirstamp
):
2109 @
$(MKDIR_P
) m32c
/$(DEPDIR
)
2110 @
: > m32c
/$(DEPDIR
)/$(am__dirstamp
)
2111 m32c
/opc2c.
$(OBJEXT
): m32c
/$(am__dirstamp
) \
2112 m32c
/$(DEPDIR
)/$(am__dirstamp
)
2114 @SIM_ENABLE_ARCH_m32c_FALSE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) $(EXTRA_m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
2115 @SIM_ENABLE_ARCH_m32c_FALSE@ @
rm -f m32c
/opc2c
$(EXEEXT
)
2116 @SIM_ENABLE_ARCH_m32c_FALSE@
$(AM_V_CCLD
)$(LINK
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
) $(LIBS
)
2118 m32c
/run
$(EXEEXT
): $(m32c_run_OBJECTS
) $(m32c_run_DEPENDENCIES
) $(EXTRA_m32c_run_DEPENDENCIES
) m32c
/$(am__dirstamp
)
2119 @
rm -f m32c
/run
$(EXEEXT
)
2120 $(AM_V_CCLD
)$(LINK
) $(m32c_run_OBJECTS
) $(m32c_run_LDADD
) $(LIBS
)
2121 m32r
/$(am__dirstamp
):
2123 @
: > m32r
/$(am__dirstamp
)
2125 m32r
/run
$(EXEEXT
): $(m32r_run_OBJECTS
) $(m32r_run_DEPENDENCIES
) $(EXTRA_m32r_run_DEPENDENCIES
) m32r
/$(am__dirstamp
)
2126 @
rm -f m32r
/run
$(EXEEXT
)
2127 $(AM_V_CCLD
)$(LINK
) $(m32r_run_OBJECTS
) $(m32r_run_LDADD
) $(LIBS
)
2128 m68hc11
/$(am__dirstamp
):
2130 @
: > m68hc11
/$(am__dirstamp
)
2131 m68hc11
/$(DEPDIR
)/$(am__dirstamp
):
2132 @
$(MKDIR_P
) m68hc11
/$(DEPDIR
)
2133 @
: > m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
2134 m68hc11
/gencode.
$(OBJEXT
): m68hc11
/$(am__dirstamp
) \
2135 m68hc11
/$(DEPDIR
)/$(am__dirstamp
)
2137 @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11
/gencode
$(EXEEXT
): $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_DEPENDENCIES
) $(EXTRA_m68hc11_gencode_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
2138 @SIM_ENABLE_ARCH_m68hc11_FALSE@ @
rm -f m68hc11
/gencode
$(EXEEXT
)
2139 @SIM_ENABLE_ARCH_m68hc11_FALSE@
$(AM_V_CCLD
)$(LINK
) $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_LDADD
) $(LIBS
)
2141 m68hc11
/run
$(EXEEXT
): $(m68hc11_run_OBJECTS
) $(m68hc11_run_DEPENDENCIES
) $(EXTRA_m68hc11_run_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
2142 @
rm -f m68hc11
/run
$(EXEEXT
)
2143 $(AM_V_CCLD
)$(LINK
) $(m68hc11_run_OBJECTS
) $(m68hc11_run_LDADD
) $(LIBS
)
2144 mcore
/$(am__dirstamp
):
2146 @
: > mcore
/$(am__dirstamp
)
2148 mcore
/run
$(EXEEXT
): $(mcore_run_OBJECTS
) $(mcore_run_DEPENDENCIES
) $(EXTRA_mcore_run_DEPENDENCIES
) mcore
/$(am__dirstamp
)
2149 @
rm -f mcore
/run
$(EXEEXT
)
2150 $(AM_V_CCLD
)$(LINK
) $(mcore_run_OBJECTS
) $(mcore_run_LDADD
) $(LIBS
)
2151 microblaze
/$(am__dirstamp
):
2152 @
$(MKDIR_P
) microblaze
2153 @
: > microblaze
/$(am__dirstamp
)
2155 microblaze
/run
$(EXEEXT
): $(microblaze_run_OBJECTS
) $(microblaze_run_DEPENDENCIES
) $(EXTRA_microblaze_run_DEPENDENCIES
) microblaze
/$(am__dirstamp
)
2156 @
rm -f microblaze
/run
$(EXEEXT
)
2157 $(AM_V_CCLD
)$(LINK
) $(microblaze_run_OBJECTS
) $(microblaze_run_LDADD
) $(LIBS
)
2158 mips
/$(am__dirstamp
):
2160 @
: > mips
/$(am__dirstamp
)
2162 mips
/run
$(EXEEXT
): $(mips_run_OBJECTS
) $(mips_run_DEPENDENCIES
) $(EXTRA_mips_run_DEPENDENCIES
) mips
/$(am__dirstamp
)
2163 @
rm -f mips
/run
$(EXEEXT
)
2164 $(AM_V_CCLD
)$(LINK
) $(mips_run_OBJECTS
) $(mips_run_LDADD
) $(LIBS
)
2165 mn10300
/$(am__dirstamp
):
2167 @
: > mn10300
/$(am__dirstamp
)
2169 mn10300
/run
$(EXEEXT
): $(mn10300_run_OBJECTS
) $(mn10300_run_DEPENDENCIES
) $(EXTRA_mn10300_run_DEPENDENCIES
) mn10300
/$(am__dirstamp
)
2170 @
rm -f mn10300
/run
$(EXEEXT
)
2171 $(AM_V_CCLD
)$(LINK
) $(mn10300_run_OBJECTS
) $(mn10300_run_LDADD
) $(LIBS
)
2172 moxie
/$(am__dirstamp
):
2174 @
: > moxie
/$(am__dirstamp
)
2176 moxie
/run
$(EXEEXT
): $(moxie_run_OBJECTS
) $(moxie_run_DEPENDENCIES
) $(EXTRA_moxie_run_DEPENDENCIES
) moxie
/$(am__dirstamp
)
2177 @
rm -f moxie
/run
$(EXEEXT
)
2178 $(AM_V_CCLD
)$(LINK
) $(moxie_run_OBJECTS
) $(moxie_run_LDADD
) $(LIBS
)
2179 msp430
/$(am__dirstamp
):
2181 @
: > msp430
/$(am__dirstamp
)
2183 msp430
/run
$(EXEEXT
): $(msp430_run_OBJECTS
) $(msp430_run_DEPENDENCIES
) $(EXTRA_msp430_run_DEPENDENCIES
) msp430
/$(am__dirstamp
)
2184 @
rm -f msp430
/run
$(EXEEXT
)
2185 $(AM_V_CCLD
)$(LINK
) $(msp430_run_OBJECTS
) $(msp430_run_LDADD
) $(LIBS
)
2186 or1k
/$(am__dirstamp
):
2188 @
: > or1k
/$(am__dirstamp
)
2190 or1k
/run
$(EXEEXT
): $(or1k_run_OBJECTS
) $(or1k_run_DEPENDENCIES
) $(EXTRA_or1k_run_DEPENDENCIES
) or1k
/$(am__dirstamp
)
2191 @
rm -f or1k
/run
$(EXEEXT
)
2192 $(AM_V_CCLD
)$(LINK
) $(or1k_run_OBJECTS
) $(or1k_run_LDADD
) $(LIBS
)
2193 ppc
/$(am__dirstamp
):
2195 @
: > ppc
/$(am__dirstamp
)
2196 ppc
/$(DEPDIR
)/$(am__dirstamp
):
2197 @
$(MKDIR_P
) ppc
/$(DEPDIR
)
2198 @
: > ppc
/$(DEPDIR
)/$(am__dirstamp
)
2199 ppc
/psim.
$(OBJEXT
): ppc
/$(am__dirstamp
) ppc
/$(DEPDIR
)/$(am__dirstamp
)
2201 @SIM_ENABLE_ARCH_ppc_FALSE@ppc
/psim
$(EXEEXT
): $(ppc_psim_OBJECTS
) $(ppc_psim_DEPENDENCIES
) $(EXTRA_ppc_psim_DEPENDENCIES
) ppc
/$(am__dirstamp
)
2202 @SIM_ENABLE_ARCH_ppc_FALSE@ @
rm -f ppc
/psim
$(EXEEXT
)
2203 @SIM_ENABLE_ARCH_ppc_FALSE@
$(AM_V_CCLD
)$(LINK
) $(ppc_psim_OBJECTS
) $(ppc_psim_LDADD
) $(LIBS
)
2205 ppc
/run
$(EXEEXT
): $(ppc_run_OBJECTS
) $(ppc_run_DEPENDENCIES
) $(EXTRA_ppc_run_DEPENDENCIES
) ppc
/$(am__dirstamp
)
2206 @
rm -f ppc
/run
$(EXEEXT
)
2207 $(AM_V_CCLD
)$(LINK
) $(ppc_run_OBJECTS
) $(ppc_run_LDADD
) $(LIBS
)
2208 pru
/$(am__dirstamp
):
2210 @
: > pru
/$(am__dirstamp
)
2212 pru
/run
$(EXEEXT
): $(pru_run_OBJECTS
) $(pru_run_DEPENDENCIES
) $(EXTRA_pru_run_DEPENDENCIES
) pru
/$(am__dirstamp
)
2213 @
rm -f pru
/run
$(EXEEXT
)
2214 $(AM_V_CCLD
)$(LINK
) $(pru_run_OBJECTS
) $(pru_run_LDADD
) $(LIBS
)
2215 riscv
/$(am__dirstamp
):
2217 @
: > riscv
/$(am__dirstamp
)
2219 riscv
/run
$(EXEEXT
): $(riscv_run_OBJECTS
) $(riscv_run_DEPENDENCIES
) $(EXTRA_riscv_run_DEPENDENCIES
) riscv
/$(am__dirstamp
)
2220 @
rm -f riscv
/run
$(EXEEXT
)
2221 $(AM_V_CCLD
)$(LINK
) $(riscv_run_OBJECTS
) $(riscv_run_LDADD
) $(LIBS
)
2222 rl78
/$(am__dirstamp
):
2224 @
: > rl78
/$(am__dirstamp
)
2226 rl78
/run
$(EXEEXT
): $(rl78_run_OBJECTS
) $(rl78_run_DEPENDENCIES
) $(EXTRA_rl78_run_DEPENDENCIES
) rl78
/$(am__dirstamp
)
2227 @
rm -f rl78
/run
$(EXEEXT
)
2228 $(AM_V_CCLD
)$(LINK
) $(rl78_run_OBJECTS
) $(rl78_run_LDADD
) $(LIBS
)
2231 @
: > rx
/$(am__dirstamp
)
2233 rx
/run
$(EXEEXT
): $(rx_run_OBJECTS
) $(rx_run_DEPENDENCIES
) $(EXTRA_rx_run_DEPENDENCIES
) rx
/$(am__dirstamp
)
2234 @
rm -f rx
/run
$(EXEEXT
)
2235 $(AM_V_CCLD
)$(LINK
) $(rx_run_OBJECTS
) $(rx_run_LDADD
) $(LIBS
)
2238 @
: > sh
/$(am__dirstamp
)
2239 sh
/$(DEPDIR
)/$(am__dirstamp
):
2240 @
$(MKDIR_P
) sh
/$(DEPDIR
)
2241 @
: > sh
/$(DEPDIR
)/$(am__dirstamp
)
2242 sh
/gencode.
$(OBJEXT
): sh
/$(am__dirstamp
) sh
/$(DEPDIR
)/$(am__dirstamp
)
2244 @SIM_ENABLE_ARCH_sh_FALSE@sh
/gencode
$(EXEEXT
): $(sh_gencode_OBJECTS
) $(sh_gencode_DEPENDENCIES
) $(EXTRA_sh_gencode_DEPENDENCIES
) sh
/$(am__dirstamp
)
2245 @SIM_ENABLE_ARCH_sh_FALSE@ @
rm -f sh
/gencode
$(EXEEXT
)
2246 @SIM_ENABLE_ARCH_sh_FALSE@
$(AM_V_CCLD
)$(LINK
) $(sh_gencode_OBJECTS
) $(sh_gencode_LDADD
) $(LIBS
)
2248 sh
/run
$(EXEEXT
): $(sh_run_OBJECTS
) $(sh_run_DEPENDENCIES
) $(EXTRA_sh_run_DEPENDENCIES
) sh
/$(am__dirstamp
)
2249 @
rm -f sh
/run
$(EXEEXT
)
2250 $(AM_V_CCLD
)$(LINK
) $(sh_run_OBJECTS
) $(sh_run_LDADD
) $(LIBS
)
2251 testsuite
/common
/$(am__dirstamp
):
2252 @
$(MKDIR_P
) testsuite
/common
2253 @
: > testsuite
/common
/$(am__dirstamp
)
2254 testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
):
2255 @
$(MKDIR_P
) testsuite
/common
/$(DEPDIR
)
2256 @
: > testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
2257 testsuite
/common
/alu-tst.
$(OBJEXT
): testsuite
/common
/$(am__dirstamp
) \
2258 testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
2259 testsuite
/common
/bits-gen.
$(OBJEXT
): testsuite
/common
/$(am__dirstamp
) \
2260 testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
2261 testsuite
/common
/bits32m0.
$(OBJEXT
): testsuite
/common
/$(am__dirstamp
) \
2262 testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
2263 testsuite
/common
/bits32m31.
$(OBJEXT
): \
2264 testsuite
/common
/$(am__dirstamp
) \
2265 testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
2266 testsuite
/common
/bits64m0.
$(OBJEXT
): testsuite
/common
/$(am__dirstamp
) \
2267 testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
2268 testsuite
/common
/bits64m63.
$(OBJEXT
): \
2269 testsuite
/common
/$(am__dirstamp
) \
2270 testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
2271 testsuite
/common
/fpu-tst.
$(OBJEXT
): testsuite
/common
/$(am__dirstamp
) \
2272 testsuite
/common
/$(DEPDIR
)/$(am__dirstamp
)
2273 v850
/$(am__dirstamp
):
2275 @
: > v850
/$(am__dirstamp
)
2277 v850
/run
$(EXEEXT
): $(v850_run_OBJECTS
) $(v850_run_DEPENDENCIES
) $(EXTRA_v850_run_DEPENDENCIES
) v850
/$(am__dirstamp
)
2278 @
rm -f v850
/run
$(EXEEXT
)
2279 $(AM_V_CCLD
)$(LINK
) $(v850_run_OBJECTS
) $(v850_run_LDADD
) $(LIBS
)
2281 mostlyclean-compile
:
2283 -rm -f common
/*.
$(OBJEXT
)
2284 -rm -f cr16
/*.
$(OBJEXT
)
2285 -rm -f cris
/*.
$(OBJEXT
)
2286 -rm -f d10v
/*.
$(OBJEXT
)
2287 -rm -f erc32
/*.
$(OBJEXT
)
2288 -rm -f igen
/*.
$(OBJEXT
)
2289 -rm -f m32c
/*.
$(OBJEXT
)
2290 -rm -f m68hc11
/*.
$(OBJEXT
)
2291 -rm -f ppc
/*.
$(OBJEXT
)
2292 -rm -f sh
/*.
$(OBJEXT
)
2293 -rm -f testsuite
/common
/*.
$(OBJEXT
)
2298 @AMDEP_TRUE@@am__include@ @am__quote@common
/$(DEPDIR
)/callback.Po@am__quote@
2299 @AMDEP_TRUE@@am__include@ @am__quote@common
/$(DEPDIR
)/portability.Po@am__quote@
2300 @AMDEP_TRUE@@am__include@ @am__quote@common
/$(DEPDIR
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3122 @SIM_ENABLE_IGEN_TRUE@igen
/libigen.a
: $(igen_libigen_a_OBJECTS
) $(igen_libigen_a_DEPENDENCIES
) $(EXTRA_igen_libigen_a_DEPENDENCIES
) igen
/$(am__dirstamp
)
3123 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_at
)-rm -f
$@
3124 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_AR
)$(AR_FOR_BUILD
) $(ARFLAGS
) $@
$(igen_libigen_a_OBJECTS
) $(igen_libigen_a_LIBADD
)
3125 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_at
)$(RANLIB_FOR_BUILD
) $@
3127 @SIM_ENABLE_IGEN_TRUE@igen
/igen
$(EXEEXT
): $(igen_igen_OBJECTS
) $(igen_igen_DEPENDENCIES
) igen
/$(am__dirstamp
)
3128 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(igen_igen_OBJECTS
) $(igen_igen_LDADD
)
3130 # igen is a build-time only tool. Override the default rules for it.
3131 @SIM_ENABLE_IGEN_TRUE@igen
/%.o
: igen
/%.c
3132 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3134 # Build some of the files in standalone mode for developers of igen itself.
3135 @SIM_ENABLE_IGEN_TRUE@igen
/%-main.o
: igen
/%.c
3136 @SIM_ENABLE_IGEN_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -DMAIN
-c
$< -o
$@
3138 site-sim-config.exp
: Makefile
3140 echo
"set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
3141 echo
"set builddir \"$(builddir)\""; \
3142 echo
"set srcdir \"$(srcdir)/testsuite\""; \
3143 $(foreach V
,$(SIM_TOOLCHAIN_VARS
),echo
"set $(V) \"$($(V))\"";) \
3146 # Ignore dirs that only contain configuration settings.
3147 check/.
/config
/%.exp
: ; @true
3148 check/config
/%.exp
: ; @true
3149 check/.
/lib
/%.exp
: ; @true
3150 check/lib
/%.exp
: ; @true
3153 $(AM_V_at
)mkdir
-p testsuite
/$*
3154 $(AM_V_RUNTEST
)$(DO_RUNTEST
) --objdir testsuite
/$* --outdir testsuite
/$* $*.exp
3156 check-DEJAGNU-parallel
:
3158 set
-- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
3159 $(MAKE
) -k
`printf 'check/%s.exp ' $$@`; \
3161 set
-- `printf 'testsuite/%s/ ' $$@`; \
3162 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh \
3163 `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum
; \
3164 $(SHELL
) $(srcroot
)/contrib
/dg-extract-results.sh
-L \
3165 `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log
; \
3167 $(SED
) -n
'/^.*===.*Summary.*===/,$$p' testrun.sum
; \
3170 check-DEJAGNU-single
:
3171 $(AM_V_RUNTEST
)$(DO_RUNTEST
)
3173 # If running a single job, invoking runtest once is faster & has nicer output.
3174 check-DEJAGNU
: site.exp
3175 $(AM_V_at
)(set
-e
; \
3176 EXPECT
=${EXPECT} ; export EXPECT
; \
3177 runtest
=$(RUNTEST
); \
3178 if
$(SHELL
) -c
"$$runtest --version" > /dev
/null
2>&1; then \
3179 case
"$(MAKEFLAGS)" in \
3180 *-j
*) $(MAKE
) check-DEJAGNU-parallel
;; \
3181 *) $(MAKE
) check-DEJAGNU-single
;; \
3184 echo
"WARNING: could not find \`runtest'" 1>&2; :;\
3187 # These tests are build-time only tools. Override the default rules for them.
3188 testsuite
/common
/%.o
: testsuite
/common
/%.c
3189 $(AM_V_CC
)$(COMPILE_FOR_BUILD
) $(testsuite_common_CPPFLAGS
) -c
$< -o
$@
3191 testsuite
/common
/alu-tst
$(EXEEXT
): $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3192 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_alu_tst_OBJECTS
) $(testsuite_common_alu_tst_LDADD
)
3194 testsuite
/common
/fpu-tst
$(EXEEXT
): $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3195 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_fpu_tst_OBJECTS
) $(testsuite_common_fpu_tst_LDADD
)
3197 testsuite
/common
/bits-gen
$(EXEEXT
): $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3198 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits_gen_OBJECTS
) $(testsuite_common_bits_gen_LDADD
)
3200 testsuite
/common
/bits32m0
$(EXEEXT
): $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3201 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m0_OBJECTS
) $(testsuite_common_bits32m0_LDADD
)
3203 testsuite
/common
/bits32m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3204 $(AM_V_GEN
)$< 32 0 big
> $@.tmp
3205 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3206 $(AM_V_at
)mv
$@.tmp
$@
3208 testsuite
/common
/bits32m31
$(EXEEXT
): $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3209 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits32m31_OBJECTS
) $(testsuite_common_bits32m31_LDADD
)
3211 testsuite
/common
/bits32m31.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3212 $(AM_V_GEN
)$< 32 31 little
> $@.tmp
3213 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3214 $(AM_V_at
)mv
$@.tmp
$@
3216 testsuite
/common
/bits64m0
$(EXEEXT
): $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3217 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m0_OBJECTS
) $(testsuite_common_bits64m0_LDADD
)
3219 testsuite
/common
/bits64m0.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3220 $(AM_V_GEN
)$< 64 0 big
> $@.tmp
3221 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3222 $(AM_V_at
)mv
$@.tmp
$@
3224 testsuite
/common
/bits64m63
$(EXEEXT
): $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_DEPENDENCIES
) testsuite
/common
/$(am__dirstamp
)
3225 $(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(testsuite_common_bits64m63_OBJECTS
) $(testsuite_common_bits64m63_LDADD
)
3227 testsuite
/common
/bits64m63.c
: testsuite
/common
/bits-gen
$(EXEEXT
) testsuite
/common
/bits-tst.c
3228 $(AM_V_GEN
)$< 64 63 little
> $@.tmp
3229 $(AM_V_at
)cat
$(srcdir)/testsuite
/common
/bits-tst.c
>> $@.tmp
3230 $(AM_V_at
)mv
$@.tmp
$@
3232 @SIM_ENABLE_ARCH_bfin_TRUE@bfin
/linux-fixed-code.h
: @MAINT@
$(srcdir)/bfin
/linux-fixed-code.s bfin
/local.mk bfin
/$(am__dirstamp
)
3233 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_GEN
)$(AS_FOR_TARGET_BFIN
) $(srcdir)/bfin
/linux-fixed-code.s
-o bfin
/linux-fixed-code.o
3234 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)(\
3235 @SIM_ENABLE_ARCH_bfin_TRUE@ set
-e
; \
3236 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \
3237 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"static const unsigned char bfin_linux_fixed_code[] ="; \
3238 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"{"; \
3239 @SIM_ENABLE_ARCH_bfin_TRUE@
$(OBJDUMP_FOR_TARGET_BFIN
) -d
-z bfin
/linux-fixed-code.o
> $@.dis
; \
3240 @SIM_ENABLE_ARCH_bfin_TRUE@ sed
-n \
3241 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
's:^[^ ]* :0x:' \
3242 @SIM_ENABLE_ARCH_bfin_TRUE@
-e
'/^0x/{s: .*::;s: *$$:,:;s: :, 0x:g;p;}' \
3243 @SIM_ENABLE_ARCH_bfin_TRUE@
$@.dis
; \
3244 @SIM_ENABLE_ARCH_bfin_TRUE@
rm -f
$@.dis
; \
3245 @SIM_ENABLE_ARCH_bfin_TRUE@ echo
"};" \
3246 @SIM_ENABLE_ARCH_bfin_TRUE@
) > $@.tmp
3247 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/bfin
/linux-fixed-code.h
3248 @SIM_ENABLE_ARCH_bfin_TRUE@
$(AM_V_at
)touch
$(srcdir)/bfin
/linux-fixed-code.h
3250 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/mloop-le.c bpf
/eng-le.h
: bpf
/stamp-mloop-le
; @true
3251 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/stamp-mloop-le
: $(srccom
)/genmloop.sh bpf
/mloop.in
3252 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3253 @SIM_ENABLE_ARCH_bpf_TRUE@
-mono
-scache
-prefix bpfbf_ebpfle
-cpu bpfbf \
3254 @SIM_ENABLE_ARCH_bpf_TRUE@
-infile
$(srcdir)/bpf
/mloop.in \
3255 @SIM_ENABLE_ARCH_bpf_TRUE@
-outfile-prefix bpf
/ -outfile-suffix
-le
3256 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/eng-le.hin bpf
/eng-le.h
3257 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/mloop-le.cin bpf
/mloop-le.c
3258 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)touch
$@
3260 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/mloop-be.c bpf
/eng-be.h
: bpf
/stamp-mloop-be
; @true
3261 @SIM_ENABLE_ARCH_bpf_TRUE@bpf
/stamp-mloop-be
: $(srccom
)/genmloop.sh bpf
/mloop.in
3262 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3263 @SIM_ENABLE_ARCH_bpf_TRUE@
-mono
-scache
-prefix bpfbf_ebpfbe
-cpu bpfbf \
3264 @SIM_ENABLE_ARCH_bpf_TRUE@
-infile
$(srcdir)/bpf
/mloop.in \
3265 @SIM_ENABLE_ARCH_bpf_TRUE@
-outfile-prefix bpf
/ -outfile-suffix
-be
3266 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/eng-be.hin bpf
/eng-be.h
3267 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change bpf
/mloop-be.cin bpf
/mloop-be.c
3268 @SIM_ENABLE_ARCH_bpf_TRUE@
$(AM_V_at
)touch
$@
3270 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3271 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode
$(EXEEXT
): $(cr16_gencode_OBJECTS
) $(cr16_gencode_DEPENDENCIES
) cr16
/$(am__dirstamp
)
3272 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(cr16_gencode_OBJECTS
) $(cr16_gencode_LDADD
)
3274 # gencode is a build-time only tool. Override the default rules for it.
3275 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/gencode.o
: cr16
/gencode.c
3276 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3277 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/cr16-opc.o
: ..
/opcodes
/cr16-opc.c
3278 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3280 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/simops.h
: cr16
/gencode
$(EXEEXT
)
3281 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< -h
>$@
3283 @SIM_ENABLE_ARCH_cr16_TRUE@cr16
/table.c
: cr16
/gencode
$(EXEEXT
)
3284 @SIM_ENABLE_ARCH_cr16_TRUE@
$(AM_V_GEN
)$< >$@
3286 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv10f.c cris
/engv10.h
: cris
/stamp-mloop-v10f
; @true
3287 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v10f
: $(srccom
)/genmloop.sh cris
/mloop.in
3288 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3289 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv10f-switch.c \
3290 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv10f \
3291 @SIM_ENABLE_ARCH_cris_TRUE@
-infile
$(srcdir)/cris
/mloop.in
-outfile-prefix cris
/ -outfile-suffix
-v10f
3292 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v10f.hin cris
/engv10.h
3293 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v10f.cin cris
/mloopv10f.c
3294 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
3296 @SIM_ENABLE_ARCH_cris_TRUE@cris
/mloopv32f.c cris
/engv32.h
: cris
/stamp-mloop-v32f
; @true
3297 @SIM_ENABLE_ARCH_cris_TRUE@cris
/stamp-mloop-v32f
: $(srccom
)/genmloop.sh cris
/mloop.in
3298 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3299 @SIM_ENABLE_ARCH_cris_TRUE@
-mono
-no-fast
-pbb
-switch semcrisv32f-switch.c \
3300 @SIM_ENABLE_ARCH_cris_TRUE@
-cpu crisv32f \
3301 @SIM_ENABLE_ARCH_cris_TRUE@
-infile
$(srcdir)/cris
/mloop.in
-outfile-prefix cris
/ -outfile-suffix
-v32f
3302 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/eng-v32f.hin cris
/engv32.h
3303 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change cris
/mloop-v32f.cin cris
/mloopv32f.c
3304 @SIM_ENABLE_ARCH_cris_TRUE@
$(AM_V_at
)touch
$@
3306 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3307 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode
$(EXEEXT
): $(d10v_gencode_OBJECTS
) $(d10v_gencode_DEPENDENCIES
) d10v
/$(am__dirstamp
)
3308 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(d10v_gencode_OBJECTS
) $(d10v_gencode_LDADD
)
3310 # gencode is a build-time only tool. Override the default rules for it.
3311 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/gencode.o
: d10v
/gencode.c
3312 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3313 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/d10v-opc.o
: ..
/opcodes
/d10v-opc.c
3314 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3316 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/simops.h
: d10v
/gencode
$(EXEEXT
)
3317 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< -h
>$@
3319 @SIM_ENABLE_ARCH_d10v_TRUE@d10v
/table.c
: d10v
/gencode
$(EXEEXT
)
3320 @SIM_ENABLE_ARCH_d10v_TRUE@
$(AM_V_GEN
)$< >$@
3322 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/sis
$(EXEEXT
): erc32
/run
$(EXEEXT
)
3323 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_GEN
)ln
$< $@
2>/dev
/null ||
$(LN_S
) $< $@
2>/dev
/null || cp
-p
$< $@
3325 @SIM_ENABLE_ARCH_erc32_TRUE@erc32
/%.o
: erc32
/%.c | erc32
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3326 @SIM_ENABLE_ARCH_erc32_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3327 @SIM_ENABLE_ARCH_erc32_TRUE@sim-
%D-install-exec-local
: installdirs
3328 @SIM_ENABLE_ARCH_erc32_TRUE@
$(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
3329 @SIM_ENABLE_ARCH_erc32_TRUE@ n
=`echo sis | sed '$(program_transform_name)'`; \
3330 @SIM_ENABLE_ARCH_erc32_TRUE@
$(LIBTOOL
) --mode
=install $(INSTALL_PROGRAM
) erc32
/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
)
3331 @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local
:
3332 @SIM_ENABLE_ARCH_erc32_TRUE@
rm -f
$(DESTDIR
)$(bindir)/sis
3334 @SIM_ENABLE_ARCH_frv_TRUE@frv
/mloop.c frv
/eng.h
: frv
/stamp-mloop
; @true
3335 @SIM_ENABLE_ARCH_frv_TRUE@frv
/stamp-mloop
: $(srccom
)/genmloop.sh frv
/mloop.in
3336 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3337 @SIM_ENABLE_ARCH_frv_TRUE@
-mono
-scache
-parallel-generic-write
-parallel-only \
3338 @SIM_ENABLE_ARCH_frv_TRUE@
-cpu frvbf \
3339 @SIM_ENABLE_ARCH_frv_TRUE@
-infile
$(srcdir)/frv
/mloop.in
-outfile-prefix frv
/
3340 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/eng.hin frv
/eng.h
3341 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change frv
/mloop.cin frv
/mloop.c
3342 @SIM_ENABLE_ARCH_frv_TRUE@
$(AM_V_at
)touch
$@
3344 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/mloop.c iq2000
/eng.h
: iq2000
/stamp-mloop
; @true
3345 @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000
/stamp-mloop
: $(srccom
)/genmloop.sh iq2000
/mloop.in
3346 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3347 @SIM_ENABLE_ARCH_iq2000_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
3348 @SIM_ENABLE_ARCH_iq2000_TRUE@
-cpu iq2000bf \
3349 @SIM_ENABLE_ARCH_iq2000_TRUE@
-infile
$(srcdir)/iq2000
/mloop.in
-outfile-prefix iq2000
/
3350 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/eng.hin iq2000
/eng.h
3351 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change iq2000
/mloop.cin iq2000
/mloop.c
3352 @SIM_ENABLE_ARCH_iq2000_TRUE@
$(AM_V_at
)touch
$@
3354 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/mloop.c lm32
/eng.h
: lm32
/stamp-mloop
; @true
3355 @SIM_ENABLE_ARCH_lm32_TRUE@lm32
/stamp-mloop
: $(srccom
)/genmloop.sh lm32
/mloop.in
3356 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3357 @SIM_ENABLE_ARCH_lm32_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
3358 @SIM_ENABLE_ARCH_lm32_TRUE@
-cpu lm32bf \
3359 @SIM_ENABLE_ARCH_lm32_TRUE@
-infile
$(srcdir)/lm32
/mloop.in
-outfile-prefix lm32
/
3360 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/eng.hin lm32
/eng.h
3361 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change lm32
/mloop.cin lm32
/mloop.c
3362 @SIM_ENABLE_ARCH_lm32_TRUE@
$(AM_V_at
)touch
$@
3364 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/%.o
: m32c
/%.c | m32c
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3365 @SIM_ENABLE_ARCH_m32c_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3367 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3368 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c
$(EXEEXT
): $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_DEPENDENCIES
) m32c
/$(am__dirstamp
)
3369 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m32c_opc2c_OBJECTS
) $(m32c_opc2c_LDADD
)
3371 # opc2c is a build-time only tool. Override the default rules for it.
3372 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/opc2c.o
: m32c
/opc2c.c
3373 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3375 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/m32c.c
: m32c
/m32c.opc m32c
/opc2c
$(EXEEXT
)
3376 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
3377 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
3379 @SIM_ENABLE_ARCH_m32c_TRUE@m32c
/r8c.c
: m32c
/r8c.opc m32c
/opc2c
$(EXEEXT
)
3380 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_GEN
)$(m32c_OPC2C_RUN
) -l
$@.log
$< > $@.tmp
3381 @SIM_ENABLE_ARCH_m32c_TRUE@
$(AM_V_at
)mv
$@.tmp
$@
3383 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop.c m32r
/eng.h
: m32r
/stamp-mloop
; @true
3384 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop
: $(srccom
)/genmloop.sh m32r
/mloop.in
3385 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3386 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
3387 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rbf \
3388 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloop.in
-outfile-prefix m32r
/
3389 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng.hin m32r
/eng.h
3390 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop.cin m32r
/mloop.c
3391 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
3393 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloopx.c m32r
/engx.h
: m32r
/stamp-mloop
; @true
3394 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-x
: $(srccom
)/genmloop.sh m32r
/mloop.in
3395 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3396 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch semx-switch.c \
3397 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32rxf \
3398 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloopx.in
-outfile-prefix m32r
/ -outfile-suffix x
3399 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/engx.hin m32r
/engx.h
3400 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloopx.cin m32r
/mloopx.c
3401 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
3403 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/mloop2.c m32r
/eng2.h
: m32r
/stamp-mloop
; @true
3404 @SIM_ENABLE_ARCH_m32r_TRUE@m32r
/stamp-mloop-2
: $(srccom
)/genmloop.sh m32r
/mloop.in
3405 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3406 @SIM_ENABLE_ARCH_m32r_TRUE@
-mono
-no-fast
-pbb
-parallel-write
-switch sem2-switch.c \
3407 @SIM_ENABLE_ARCH_m32r_TRUE@
-cpu m32r2f \
3408 @SIM_ENABLE_ARCH_m32r_TRUE@
-infile
$(srcdir)/m32r
/mloop2.in
-outfile-prefix m32r
/ -outfile-suffix
2
3409 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/eng2.hin m32r
/eng2.h
3410 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change m32r
/mloop2.cin m32r
/mloop2.c
3411 @SIM_ENABLE_ARCH_m32r_TRUE@
$(AM_V_at
)touch
$@
3413 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3414 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode
$(EXEEXT
): $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_DEPENDENCIES
) m68hc11
/$(am__dirstamp
)
3415 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(m68hc11_gencode_OBJECTS
) $(m68hc11_gencode_LDADD
)
3417 # gencode is a build-time only tool. Override the default rules for it.
3418 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/gencode.o
: m68hc11
/gencode.c
3419 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3421 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc11int.c
: m68hc11
/gencode
$(EXEEXT
)
3422 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6811
>$@
3424 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11
/m68hc12int.c
: m68hc11
/gencode
$(EXEEXT
)
3425 @SIM_ENABLE_ARCH_m68hc11_TRUE@
$(AM_V_GEN
)$< -m6812
>$@
3427 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_BUILT_SRC_FROM_IGEN
): mn10300
/stamp-igen
3428 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300
/stamp-igen
: $(mn10300_IGEN_INSN
) $(mn10300_IGEN_INSN_INC
) $(mn10300_IGEN_DC
) $(IGEN
)
3429 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
3430 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(mn10300_IGEN_TRACE
) \
3431 @SIM_ENABLE_ARCH_mn10300_TRUE@
-G gen-direct-access \
3432 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M mn10300
,am33
-G gen-multi-sim
=am33 \
3433 @SIM_ENABLE_ARCH_mn10300_TRUE@
-M am33_2 \
3434 @SIM_ENABLE_ARCH_mn10300_TRUE@
-I
$(srcdir)/mn10300 \
3435 @SIM_ENABLE_ARCH_mn10300_TRUE@
-i
$(mn10300_IGEN_INSN
) \
3436 @SIM_ENABLE_ARCH_mn10300_TRUE@
-o
$(mn10300_IGEN_DC
) \
3437 @SIM_ENABLE_ARCH_mn10300_TRUE@
-x \
3438 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.h
-hc mn10300
/tmp-icache.h \
3439 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n icache.c
-c mn10300
/tmp-icache.c \
3440 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.h
-hs mn10300
/tmp-semantics.h \
3441 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n semantics.c
-s mn10300
/tmp-semantics.c \
3442 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.h
-hd mn10300
/tmp-idecode.h \
3443 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n idecode.c
-d mn10300
/tmp-idecode.c \
3444 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.h
-hm mn10300
/tmp-model.h \
3445 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n model.c
-m mn10300
/tmp-model.c \
3446 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.h
-hf mn10300
/tmp-support.h \
3447 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n support.c
-f mn10300
/tmp-support.c \
3448 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.h
-ht mn10300
/tmp-itable.h \
3449 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n itable.c
-t mn10300
/tmp-itable.c \
3450 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.h
-he mn10300
/tmp-engine.h \
3451 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n engine.c
-e mn10300
/tmp-engine.c \
3452 @SIM_ENABLE_ARCH_mn10300_TRUE@
-n irun.c
-r mn10300
/tmp-irun.c
3453 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change mn10300
/tmp-icache.h mn10300
/icache.h
3454 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change mn10300
/tmp-icache.c mn10300
/icache.c
3455 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change mn10300
/tmp-idecode.h mn10300
/idecode.h
3456 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change mn10300
/tmp-idecode.c mn10300
/idecode.c
3457 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change mn10300
/tmp-semantics.h mn10300
/semantics.h
3458 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change mn10300
/tmp-semantics.c mn10300
/semantics.c
3459 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change mn10300
/tmp-model.h mn10300
/model.h
3460 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change mn10300
/tmp-model.c mn10300
/model.c
3461 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change mn10300
/tmp-support.h mn10300
/support.h
3462 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change mn10300
/tmp-support.c mn10300
/support.c
3463 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change mn10300
/tmp-itable.h mn10300
/itable.h
3464 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change mn10300
/tmp-itable.c mn10300
/itable.c
3465 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change mn10300
/tmp-engine.h mn10300
/engine.h
3466 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change mn10300
/tmp-engine.c mn10300
/engine.c
3467 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change mn10300
/tmp-irun.c mn10300
/irun.c
3468 @SIM_ENABLE_ARCH_mn10300_TRUE@
$(AM_V_at
)touch
$@
3470 @SIM_ENABLE_ARCH_moxie_TRUE@moxie
/moxie-gdb.dtb
: @MAINT@ moxie
/moxie-gdb.dts moxie
/$(am__dirstamp
)
3471 @SIM_ENABLE_ARCH_moxie_TRUE@
$(AM_V_GEN
) \
3472 @SIM_ENABLE_ARCH_moxie_TRUE@ if
test "x$(DTC)" != x
; then \
3473 @SIM_ENABLE_ARCH_moxie_TRUE@
$(DTC
) -O dtb
-o
$@.tmp
${srcdir}/moxie
/moxie-gdb.dts || exit
1; \
3474 @SIM_ENABLE_ARCH_moxie_TRUE@
$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
${srcdir}/moxie
/moxie-gdb.dtb || exit
1; \
3475 @SIM_ENABLE_ARCH_moxie_TRUE@ touch
${srcdir}/moxie
/moxie-gdb.dtb
; \
3476 @SIM_ENABLE_ARCH_moxie_TRUE@
else \
3477 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"Could not update the moxie-gdb.dtb file because the device "; \
3478 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"tree compiler tool (dtc) is missing. Install the tool to "; \
3479 @SIM_ENABLE_ARCH_moxie_TRUE@ echo
"update the device tree blob."; \
3480 @SIM_ENABLE_ARCH_moxie_TRUE@ fi
3482 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/mloop.c or1k
/eng.h
: or1k
/stamp-mloop
; @true
3483 @SIM_ENABLE_ARCH_or1k_TRUE@or1k
/stamp-mloop
: $(srccom
)/genmloop.sh or1k
/mloop.in
3484 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_GEN
)$(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
3485 @SIM_ENABLE_ARCH_or1k_TRUE@
-mono
-fast
-pbb
-switch sem-switch.c \
3486 @SIM_ENABLE_ARCH_or1k_TRUE@
-cpu or1k32bf \
3487 @SIM_ENABLE_ARCH_or1k_TRUE@
-infile
$(srcdir)/or1k
/mloop.in
-outfile-prefix or1k
/
3488 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/eng.hin or1k
/eng.h
3489 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change or1k
/mloop.cin or1k
/mloop.c
3490 @SIM_ENABLE_ARCH_or1k_TRUE@
$(AM_V_at
)touch
$@
3492 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/psim
$(EXEEXT
): ppc
/run
$(EXEEXT
)
3493 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)ln
$< $@
2>/dev
/null ||
$(LN_S
) $< $@
2>/dev
/null || cp
-p
$< $@
3495 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/%.o
: ppc
/%.c | ppc
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3496 @SIM_ENABLE_ARCH_ppc_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3498 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.c
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
3499 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--source
$@.tmp
3500 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.c
3501 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.c
3503 @SIM_ENABLE_ARCH_ppc_TRUE@ppc
/spreg.h
: @MAINT@ ppc
/ppc-spr-table ppc
/spreg-gen.py ppc
/$(am__dirstamp
)
3504 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_GEN
)$(srcdir)/ppc
/spreg-gen.py
--header
$@.tmp
3505 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change
$@.tmp
$(srcdir)/ppc
/spreg.h
3506 @SIM_ENABLE_ARCH_ppc_TRUE@
$(AM_V_at
)touch
$(srcdir)/ppc
/spreg.h
3508 @SIM_ENABLE_ARCH_rl78_TRUE@rl78
/%.o
: rl78
/%.c | rl78
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3509 @SIM_ENABLE_ARCH_rl78_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3511 @SIM_ENABLE_ARCH_rx_TRUE@rx
/%.o
: rx
/%.c | rx
/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3512 @SIM_ENABLE_ARCH_rx_TRUE@
$(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3514 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
3515 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode
$(EXEEXT
): $(sh_gencode_OBJECTS
) $(sh_gencode_DEPENDENCIES
) sh
/$(am__dirstamp
)
3516 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CCLD
)$(LINK_FOR_BUILD
) $(sh_gencode_OBJECTS
) $(sh_gencode_LDADD
)
3518 # gencode is a build-time only tool. Override the default rules for it.
3519 @SIM_ENABLE_ARCH_sh_TRUE@sh
/gencode.o
: sh
/gencode.c
3520 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_CC
)$(COMPILE_FOR_BUILD
) -c
$< -o
$@
3522 @SIM_ENABLE_ARCH_sh_TRUE@sh
/code.c
: sh
/gencode
$(EXEEXT
)
3523 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -x
>$@
3525 @SIM_ENABLE_ARCH_sh_TRUE@sh
/ppi.c
: sh
/gencode
$(EXEEXT
)
3526 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -p
>$@
3528 @SIM_ENABLE_ARCH_sh_TRUE@sh
/table.c
: sh
/gencode
$(EXEEXT
)
3529 @SIM_ENABLE_ARCH_sh_TRUE@
$(AM_V_GEN
)$< -s
>$@
3531 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_BUILT_SRC_FROM_IGEN
): v850
/stamp-igen
3532 @SIM_ENABLE_ARCH_v850_TRUE@v850
/stamp-igen
: $(v850_IGEN_INSN
) $(v850_IGEN_DC
) $(IGEN
)
3533 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_GEN
)$(IGEN_RUN
) \
3534 @SIM_ENABLE_ARCH_v850_TRUE@
$(v850_IGEN_TRACE
) \
3535 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-direct-access \
3536 @SIM_ENABLE_ARCH_v850_TRUE@
-G gen-zero-r0 \
3537 @SIM_ENABLE_ARCH_v850_TRUE@
-i
$(v850_IGEN_INSN
) \
3538 @SIM_ENABLE_ARCH_v850_TRUE@
-o
$(v850_IGEN_DC
) \
3539 @SIM_ENABLE_ARCH_v850_TRUE@
-x \
3540 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.h
-hc v850
/tmp-icache.h \
3541 @SIM_ENABLE_ARCH_v850_TRUE@
-n icache.c
-c v850
/tmp-icache.c \
3542 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.h
-hs v850
/tmp-semantics.h \
3543 @SIM_ENABLE_ARCH_v850_TRUE@
-n semantics.c
-s v850
/tmp-semantics.c \
3544 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.h
-hd v850
/tmp-idecode.h \
3545 @SIM_ENABLE_ARCH_v850_TRUE@
-n idecode.c
-d v850
/tmp-idecode.c \
3546 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.h
-hm v850
/tmp-model.h \
3547 @SIM_ENABLE_ARCH_v850_TRUE@
-n model.c
-m v850
/tmp-model.c \
3548 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.h
-hf v850
/tmp-support.h \
3549 @SIM_ENABLE_ARCH_v850_TRUE@
-n support.c
-f v850
/tmp-support.c \
3550 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.h
-ht v850
/tmp-itable.h \
3551 @SIM_ENABLE_ARCH_v850_TRUE@
-n itable.c
-t v850
/tmp-itable.c \
3552 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.h
-he v850
/tmp-engine.h \
3553 @SIM_ENABLE_ARCH_v850_TRUE@
-n engine.c
-e v850
/tmp-engine.c \
3554 @SIM_ENABLE_ARCH_v850_TRUE@
-n irun.c
-r v850
/tmp-irun.c
3555 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change v850
/tmp-icache.h v850
/icache.h
3556 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change v850
/tmp-icache.c v850
/icache.c
3557 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change v850
/tmp-idecode.h v850
/idecode.h
3558 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change v850
/tmp-idecode.c v850
/idecode.c
3559 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change v850
/tmp-semantics.h v850
/semantics.h
3560 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change v850
/tmp-semantics.c v850
/semantics.c
3561 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change v850
/tmp-model.h v850
/model.h
3562 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change v850
/tmp-model.c v850
/model.c
3563 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change v850
/tmp-support.h v850
/support.h
3564 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change v850
/tmp-support.c v850
/support.c
3565 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change v850
/tmp-itable.h v850
/itable.h
3566 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change v850
/tmp-itable.c v850
/itable.c
3567 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change v850
/tmp-engine.h v850
/engine.h
3568 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change v850
/tmp-engine.c v850
/engine.c
3569 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)$(SHELL
) $(srcroot
)/move-if-change v850
/tmp-irun.c v850
/irun.c
3570 @SIM_ENABLE_ARCH_v850_TRUE@
$(AM_V_at
)touch
$@
3572 %/libsim.a
: |
$(SIM_ALL_RECURSIVE_DEPS
)
3573 $(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3575 %/nrun.o
: common
/nrun.c |
%/libsim.a
$(SIM_ALL_RECURSIVE_DEPS
)
3576 $(MAKE
) $(AM_MAKEFLAGS
) -C
$(@D
) $(@F
)
3578 all-recursive
: $(SIM_ALL_RECURSIVE_DEPS
)
3580 install-data-local
: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS
)
3581 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(libdir)
3582 lib
=`echo sim | sed '$(program_transform_name)'`; \
3583 for d in
$(SIM_ENABLED_ARCHES
); do \
3585 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
3587 $(INSTALL_DATA
) $$d/libsim.a
$(DESTDIR
)$(libdir)/$$n || exit
1; \
3590 install-exec-local
: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS
)
3591 $(AM_V_at
)$(MKDIR_P
) $(DESTDIR
)$(bindir)
3592 run
=`echo run | sed '$(program_transform_name)'`; \
3593 for d in
$(SIM_ENABLED_ARCHES
); do \
3595 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n
="$$n-$$d"; \
3596 $(LIBTOOL
) --mode
=install \
3597 $(INSTALL_PROGRAM
) $$d/run
$(EXEEXT
) $(DESTDIR
)$(bindir)/$$n$(EXEEXT
) || exit
1; \
3600 uninstall-local
: $(SIM_UNINSTALL_LOCAL_DEPS
)
3601 rm -f
$(DESTDIR
)$(bindir)/run
$(DESTDIR
)$(libdir)/libsim.a
3602 for d in
$(SIM_ENABLED_ARCHES
); do \
3603 rm -f
$(DESTDIR
)$(bindir)/run-
$$d $(DESTDIR
)$(libdir)/libsim-
$$d.a
; \
3606 # Tell versions [3.59,3.63) of GNU make to not export all variables.
3607 # Otherwise a system limit (for SysV at least) may be exceeded.