sim/aarch64/ChangeLog

   1 2021-06-22  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * configure.ac: Removed.
   4         * aclocal.m4: Removed.
   5         * configure: Removed.
   6
   7 2021-06-21  Mike Frysinger  <vapier@gentoo.org>
   8
   9         * aclocal.m4: Regenerate.
  10         * configure: Regenerate.
  11
  12 2021-06-21  Mike Frysinger  <vapier@gentoo.org>
  13
  14         * configure: Regenerate.
  15
  16 2021-06-20  Mike Frysinger  <vapier@gentoo.org>
  17
  18         * configure.ac (SIM_AC_COMMON): Delete.
  19         * aclocal.m4, configure: Regenerate.
  20
  21 2021-06-20  Mike Frysinger  <vapier@gentoo.org>
  22
  23         * aclocal.m4: Regenerate.
  24         * configure: Regenerate.
  25
  26 2021-06-19  Mike Frysinger  <vapier@gentoo.org>
  27
  28         * aclocal.m4: Regenerate.
  29         * configure: Regenerate.
  30
  31 2021-06-19  Mike Frysinger  <vapier@gentoo.org>
  32
  33         * configure: Regenerate.
  34
  35 2021-06-18  Mike Frysinger  <vapier@gentoo.org>
  36
  37         * aclocal.m4, configure: Regenerate.
  38
  39 2021-06-18  Mike Frysinger  <vapier@gentoo.org>
  40
  41         * configure: Regenerate.
  42
  43 2021-06-18  Mike Frysinger  <vapier@gentoo.org>
  44
  45         * cpustate.c: Include sim-signal.h.
  46         * memory.c, simulator.c: Likewise.
  47
  48 2021-06-17  Mike Frysinger  <vapier@gentoo.org>
  49
  50         * configure.ac: Delete SIM_AC_OPTION_ENDIAN call.
  51         * aclocal.m4, configure: Regenerate.
  52
  53 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
  54
  55         * configure: Regenerate.
  56
  57 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
  58
  59         * configure: Regenerate.
  60         * config.in: Removed.
  61
  62 2021-06-15  Mike Frysinger  <vapier@gentoo.org>
  63
  64         * config.in, configure: Regenerate.
  65
  66 2021-06-14  Mike Frysinger  <vapier@gentoo.org>
  67
  68         * configure.ac: Delete call to SIM_AC_OPTION_WARNINGS.
  69         * configure: Regenerate.
  70
  71 2021-06-12  Mike Frysinger  <vapier@gentoo.org>
  72
  73         * configure.ac: Delete call to SIM_AC_OPTION_ALIGNMENT.
  74         * interp.c (sim_open): Set current_alignment.
  75
  76 2021-06-12  Mike Frysinger  <vapier@gentoo.org>
  77
  78         * aclocal.m4, config.in, configure: Regenerate.
  79
  80 2021-06-12  Mike Frysinger  <vapier@gentoo.org>
  81
  82         * config.in, configure: Regenerate.
  83
  84 2021-05-17  Mike Frysinger  <vapier@gentoo.org>
  85
  86         * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Delete.
  87
  88 2021-05-17  Mike Frysinger  <vapier@gentoo.org>
  89
  90         * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Define.
  91         (struct sim_state): Delete.
  92
  93 2021-05-16  Mike Frysinger  <vapier@gentoo.org>
  94
  95         * cpustate.c: Include defs.h.
  96         * interp.c: Replace config.h include with defs.h.
  97         * memory.c, simulator.c: Likewise.
  98         * cpustate.h, simulator.h: Delete config.h include.
  99
 100 2021-05-16  Mike Frysinger  <vapier@gentoo.org>
 101
 102         * config.in, configure: Regenerate.
 103
 104 2021-05-14  Mike Frysinger  <vapier@gentoo.org>
 105
 106         * cpustate.h: Update include path.
 107         * interp.c: Likewise.
 108
 109 2021-05-04  Mike Frysinger  <vapier@gentoo.org>
 110
 111         * configure: Regenerate.
 112
 113 2021-05-01  Mike Frysinger  <vapier@gentoo.org>
 114
 115         * config.in, configure: Regenerate.
 116
 117 2021-05-01  Mike Frysinger  <vapier@gentoo.org>
 118
 119         * cpustate.c (aarch64_set_FP_float): Change lx to PRIx64.
 120         (aarch64_set_FP_double, aarch64_set_FP_long_double,
 121         aarch64_set_vec_u64, aarch64_set_vec_s64): Likewise.
 122
 123 2021-05-01  Mike Frysinger  <vapier@gentoo.org>
 124
 125         * simulator.c (do_fcvtzu): Change UL to ULL.
 126
 127 2021-04-26  Mike Frysinger  <vapier@gentoo.org>
 128
 129         * aclocal.m4, config.in, configure: Regenerate.
 130
 131 2021-04-22  Tom Tromey  <tom@tromey.com>
 132
 133         * configure, config.in: Rebuild.
 134
 135 2021-04-22  Tom Tromey  <tom@tromey.com>
 136
 137         * configure: Rebuild.
 138
 139 2021-04-21  Mike Frysinger  <vapier@gentoo.org>
 140
 141         * aclocal.m4: Regenerate.
 142
 143 2021-04-21  Simon Marchi  <simon.marchi@polymtl.ca>
 144
 145         * configure: Regenerate.
 146
 147 2021-04-18  Mike Frysinger  <vapier@gentoo.org>
 148
 149         * configure: Regenerate.
 150
 151 2021-04-12  Mike Frysinger  <vapier@gentoo.org>
 152
 153         * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
 154
 155 2021-04-07  Jim Wilson  <jimw@sifive.com>
 156
 157         PR sim/27483
 158         * simulator.c (set_flags_for_add32): Compare uresult against
 159         itself.  Compare sresult against itself.
 160
 161 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
 162
 163         * aclocal.m4, configure: Regenerate.
 164
 165 2021-02-28  Mike Frysinger  <vapier@gentoo.org>
 166
 167         * configure: Regenerate.
 168
 169 2021-02-21  Mike Frysinger  <vapier@gentoo.org>
 170
 171         * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
 172         * aclocal.m4, configure: Regenerate.
 173
 174 2021-02-13  Mike Frysinger  <vapier@gentoo.org>
 175
 176         * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
 177         * aclocal.m4, configure: Regenerate.
 178
 179 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
 180
 181         * configure: Regenerate.
 182
 183 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
 184
 185         * config.in, configure: Regenerate.
 186
 187 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
 188
 189         * configure: Regenerate.
 190
 191 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
 192
 193         * configure: Regenerate.
 194
 195 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
 196
 197         * configure: Regenerate.
 198
 199 2020-02-06  Carlo Bramini  <carlo_bramini@users.sourceforge.net>
 200
 201         PR sim/25318
 202         * simulator.c (blr): Read destination register before calling
 203         aarch64_save_LR.
 204
 205 2019-03-28  Andrew Burgess  <andrew.burgess@embecosm.com>
 206
 207         * cpustate.c: Add 'libiberty.h' include.
 208         * interp.c: Add 'sim-assert.h' include.
 209
 210 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
 211
 212         * configure: Regenerate.
 213
 214 2017-04-22  Jim Wilson  <jim.wilson@linaro.org>
 215
 216         * simulator.c (vec_load): Add M argument.  Rewrite to iterate over
 217         registers based on structure size.
 218         (LD4, LD3, LD2, LD1_2, LD1_3, LD1_4): Pass new arg to vec_load.
 219         (LD1_1): Replace with call to vec_load.
 220         (vec_store): Add new M argument.  Rewrite to iterate over registers
 221         based on structure size.
 222         (ST4, ST3, ST2, ST1_2, ST1_3, ST1_4): Pass new arg to vec_store.
 223         (ST1_1): Replace with call to vec_store.
 224
 225 2017-04-08  Jim Wilson  <jim.wilson@linaro.org>
 226
 227         * simulator.c (do_vec_FCVTL): New.
 228         (do_vec_op1): Call do_vec_FCVTL.
 229
 230         * simulator.c (do_scalar_FCMGE_zero, do_scalar_FCMLE_zero,
 231         do_scalar_FCMGT_zero, do_scalar_FCMEQ_zero, do_scalar_FCMLT_zero): New.
 232         (do_scalar_vec): Add calls to new functions.
 233
 234 2017-03-25  Jim Wilson  <jim.wilson@linaro.org>
 235
 236         * simulator.c (set_flags_for_add32): Cast result to uint32_t in carry
 237         flag check.
 238
 239 2017-03-03  Jim Wilson  <jim.wilson@linaro.org>
 240
 241         * simulator.c (mul64hi): Shift carry left by 32.
 242         (smulh): Change signum to negate.  If negate, invert result, and add
 243         carry bit if low part of multiply result is zero.
 244
 245 2017-02-25  Jim Wilson  <jim.wilson@linaro.org>
 246
 247         * simulator.c (do_vec_SMOV_into_scalar): New.
 248         (do_vec_UMOV_into_scalar): Renamed from do_vec_MOV_into_scalar.
 249         Rewritten.
 250         (do_vec_UMOV): Merged into do_vec_UMOV_into_scalar and deleted.
 251         (do_vec_op1): Move do_vec_TRN call and do_vec_UZP call.  Add
 252         do_vec_SMOV_into_scalar call.  Delete do_vec_MOV_into_scalar and
 253         do_vec_UMOV calls.  Add do_vec_UMOV_into_scalar call.
 254
 255         * simulator.c (popcount): New.
 256         (do_vec_CNT): New.
 257         (do_vec_op1): Add do_vec_CNT call.
 258
 259 2017-02-19  Jim Wilson  <jim.wilson@linaro.org>
 260
 261         * simulator.c (do_vec_ADDV): Mov val declaration inside each case,
 262         with type set to input type size.
 263         (do_vec_xtl): Change bias from 3 to 4 for byte case.
 264
 265 2017-02-14  Jim Wilson  <jim.wilson@linaro.org>
 266
 267         * simulator.c (do_vec_MLA): Rewrite switch body.
 268
 269         * simulator.c (do_vec_bit): Change loop limits from 16 and 8 to 4 and
 270         2.  Move test_false if inside loop.  Fix logic for computing result
 271         stored to vd.
 272
 273         * simulator.c: (LDn_STn_SINGLE_LANE_AND_SIZE): New.
 274         (do_vec_LDn_single, do_vec_STn_single): New.
 275         (do_vec_LDnR): Add and set new nregs var.  Replace switch on nregs with
 276         loop over nregs using new var n.  Add n times size to address in loop.
 277         Add n to vd in loop.
 278         (do_vec_load_store): Add comment for instruction bit 24.  New var
 279         single to hold instruction bit 24.  Add new code to use single.  Move
 280         ldnr support inside single if statements.  Fix ldnr register counts
 281         inside post if statement.  Change HALT_NYI calls to HALT_UNALLOC.
 282
 283 2017-01-23  Jim Wilson  <jim.wilson@linaro.org>
 284
 285         * simulator.c (do_vec_compare): Add case 0x23 for CMTST.
 286
 287 2017-01-17  Jim Wilson  <jim.wilson@linaro.org>
 288
 289         * simulator.c (do_vec_ADDV): Call aarch64_set_vec_u64 instead of
 290         aarch64_set_reg_u64.  In case 2, call HALT_UNALLOC if not full.  In
 291         case 3, call HALT_UNALLOC unconditionally.
 292         (do_vec_XTN): Delete shifts.  In case 2, change index from i + 4 to
 293         i + 2.  Delete if on bias, change index to i + bias * X.
 294
 295 2017-01-09  Jim Wilson  <jim.wilson@linaro.org>
 296
 297         * simulator.c (do_vec_UZP): Rewrite.
 298
 299 2017-01-04  Jim Wilson  <jim.wilson@linaro.org>
 300
 301         * cpustate.c: Include math.h.
 302         (aarch64_set_FP_float): Use signbit to check for signed zero.
 303         (aarch64_set_FP_double): Likewise.
 304         * simulator.c (do_vec_MOV_immediate, case 0x8): Add missing break.
 305         (do_vec_mul): In all DO_VEC_WIDENING_MUL calls, make second and fourth
 306         args same size as third arg.
 307         (fmaxnm): Use isnan instead of fpclassify.
 308         (fminnm, dmaxnm, dminnm): Likewise.
 309         (do_vec_MLS): Reverse order of subtraction operands.
 310         (dexSimpleFPCondSelect): Call aarch64_get_FP_double or
 311         aarch64_get_FP_float to get source register contents.
 312         (UINT_MIN, ULONG_MIN, FLOAT_UINT_MAX, FLOAT_UINT_MIN,
 313         DOUBLE_UINT_MAX, DOUBLE_UINT_MIN, FLOAT_ULONG_MAX, FLOAT_ULONG_MIN,
 314         DOUBLE_ULONG_MAX, DOUBLE_ULONG_MIN): New.
 315         (do_fcvtzu): Use ULONG instead of LONG, and UINT instead of INT in
 316         raise_exception calls.
 317
 318 2016-12-21  Jim Wilson  <jim.wilson@linaro.org>
 319
 320         * simulator.c (set_flags_for_float_compare): Add code to handle Inf.
 321         Add comment to document NaN issue.
 322         (set_flags_for_double_compare): Likewise.
 323
 324 2016-12-13  Jim Wilson  <jim.wilson@linaro.org>
 325
 326         * simulator.c (NEG, POS): Move before set_flags_for_add64.
 327         (set_flags_for_add64): Replace with a modified copy of
 328         set_flags_for_sub64.
 329
 330 2016-12-03  Jim Wilson  <jim.wilson@linaro.org>
 331
 332         * simulator.c (tbnz, tbz): Cast 1 to uint64_t before shifting.
 333         (dexTestBranchImmediate): Shift high bit of pos by 5 not 4.
 334
 335 2016-12-01  Jim Wilson  <jim.wilson@linaro.org>
 336
 337         * simulator.c (fsturs): Switch use of rn and st variables.
 338         (fsturd, fsturq): Likewise
 339
 340 2016-08-15  Mike Frysinger  <vapier@gentoo.org>
 341
 342         * interp.c: Include bfd.h.
 343         (symcount, symtab, aarch64_get_sym_value): Delete.
 344         (remove_useless_symbols): Change count type to long.
 345         (aarch64_get_func): Add SIM_DESC to arg list.  Add symcount
 346         and symtab local variables.
 347         (sim_create_inferior): Delete storage.  Replace symbol code
 348         with a call to trace_load_symbols.
 349         * memory.c: Delete bfd.h, elf/internal.h, and elf/common.h
 350         includes.
 351         (aarch64_get_heap_start): Change aarch64_get_sym_value to
 352         trace_sym_value.
 353         * memory.h: Delete bfd.h include.
 354         (mem_add_blk): Delete unused prototype.
 355         * simulator.c (bl, blr): Pass SIM_DESC to aarch64_get_func.
 356         * simulator.c (aarch64_get_func): Add SIM_DESC to arg list.
 357         (aarch64_get_sym_value): Delete.
 358
 359 2016-08-12  Nick Clifton  <nickc@redhat.com>
 360
 361         * simulator.c (aarch64_step): Revert pervious delta.
 362         (aarch64_run): Call sim_events_tick after each
 363         instruction is simulated, and if necessary call
 364         sim_events_process.
 365         * simulator.h: Revert previous delta.
 366
 367 2016-08-11  Nick Clifton  <nickc@redhat.com>
 368
 369         * interp.c (sim_create_inferior): Allow for being called with a
 370         NULL abfd parameter.  If a bfd is provided, initialise the sim
 371         with that start address.
 372         * simulator.c (HALT_NYI): Just print out the numeric value of the
 373         instruction when not tracing.
 374         (aarch64_step): Change from static to global.
 375         * simulator.h: Add a prototype for aarch64_step().
 376
 377 2016-07-27  Alan Modra  <amodra@gmail.com>
 378
 379         * memory.c: Don't include libbfd.h.
 380
 381 2016-07-21  Nick Clifton  <nickc@redhat.com>
 382
 383         * simulator.c (fsqrts): Use sqrtf rather than sqrt.
 384
 385 2016-06-30  Jim Wilson  <jim.wilson@linaro.org>
 386
 387         * cpustate.h: Include config.h.
 388         (union GRegisterValue): Add WORDS_BIGENDIAN check.  For big endian code
 389         use anonymous structs to align members.
 390         * simulator.c (aarch64_step): Use sim_core_read_buffer and
 391         endian_le2h_4 to read instruction from pc.
 392
 393 2016-05-06  Nick Clifton  <nickc@redhat.com>
 394
 395         * simulator.c (do_FMLA_by_element): New function.
 396         (do_vec_op2): Call it.
 397
 398 2016-04-27  Nick Clifton  <nickc@redhat.com>
 399
 400         * simulator.c: Add TRACE_DECODE statements to all emulation
 401         functions.
 402
 403 2016-03-30  Nick Clifton  <nickc@redhat.com>
 404
 405         * cpustate.c (aarch64_set_reg_s32): New function.
 406         (aarch64_set_reg_u32): New function.
 407         (aarch64_get_FP_half): Place half precision value into the correct
 408         slot of the union.
 409         (aarch64_set_FP_half): Likewise.
 410         * cpustate.h: Add prototypes for aarch64_set_reg_s32 and
 411         aarch64_set_reg_u32.
 412         * memory.c (FETCH_FUNC): Cast the read value to the access type
 413         before converting it to the return type.  Rename to FETCH_FUNC64.
 414         (FETCH_FUNC32): New macro.  Duplicates FETCH_FUNC64 but for 32-bit
 415         accesses.  Use for 32-bit memory access functions.
 416         * simulator.c (ldrsb_wb): Use sign extension not zero extension.
 417         (ldrb_scale_ext, ldrsh32_abs, ldrsh32_wb): Likewise.
 418         (ldrsh32_scale_ext, ldrsh_abs, ldrsh64_wb): Likewise.
 419         (ldrsh_scale_ext, ldrsw_abs): Likewise.
 420         (ldrh32_abs): Store 32 bit value not 64-bits.
 421         (ldrh32_wb, ldrh32_scale_ext): Likewise.
 422         (do_vec_MOV_immediate): Fix computation of val.
 423         (do_vec_MVNI): Likewise.
 424         (DO_VEC_WIDENING_MUL): New macro.
 425         (do_vec_mull): Use new macro.
 426         (do_vec_mul): Use new macro.
 427         (do_vec_MLA): Read values before writing.
 428         (do_vec_xtl): Likewise.
 429         (do_vec_SSHL): Select correct shift value.
 430         (do_vec_USHL): Likewise.
 431         (do_scalar_UCVTF): New function.
 432         (do_scalar_vec): Call new function.
 433         (store_pair_u64): Treat reads of SP as reads of XZR.
 434
 435 2016-03-29  Nick Clifton  <nickc@redhat.com>
 436
 437         * cpustate.c: Remove space after asterisk in function parameters.
 438         * decode.h (greg): Delete unused function.
 439         (vreg, shift, extension, scaling, writeback, condcode): Likewise.
 440         * simulator.c: Use INSTR macro in more places.
 441         (HALT_NYI): Use sim_io_eprintf in place of fprintf.
 442         Remove extraneous whitespace.
 443
 444 2016-03-23  Nick Clifton  <nickc@redhat.com>
 445
 446         * cpustate.c (aarch64_get_FP_half): New function.  Read a vector
 447         register as a half precision floating point number.
 448         (aarch64_set_FP_half): New function.  Similar, but for setting
 449         a half precision register.
 450         (aarch64_get_thread_id): New function.  Returns the value of the
 451         CPU's TPIDR register.
 452         (aarch64_get_FPCR): New function.  Returns the value of the CPU's
 453         floating point control register.
 454         (aarch64_set_FPCR): New function.  Set the value of the CPU's FPCR
 455         register.
 456         * cpustate.h: Add prototypes for new functions.
 457         * sim-main.h (struct _sim_cpu): Add FPCR and tpidr fields.
 458         * memory.c: Use unaligned core access functions for all memory
 459         reads and writes.
 460         * simulator.c (HALT_NYI): Generate an error message if tracing
 461         will not tell the user why the simulator is halting.
 462         (HALT_UNREACHABLE): Delete.  Delete (unneeded) uses of the macro.
 463         (INSTR): New time-saver macro.
 464         (fldrb_abs): New function.  Loads an 8-bit value using a scaled
 465         offset.
 466         (fldrh_abs): New function.  Likewise for 16-bit values.
 467         (do_vec_SSHL): Allow for negative shift values.
 468         (do_vec_USHL): Likewise.
 469         (do_vec_SHL): Correct computation of shift amount.
 470         (do_vec_SSHR_USHR): Correct decision of signed vs unsigned
 471         shifts and computation of shift value.
 472         (clz): New function.  Counts leading zero bits.
 473         (do_vec_CLZ): New function.  Implements CLZ (vector).
 474         (do_vec_MOV_element): Call do_vec_CLZ.
 475         (dexSimpleFPCondCompare): Implement.
 476         (do_FCVT_half_to_single): New function.  Implements one of the
 477         FCVT operations.
 478         (do_FCVT_half_to_double): New function.  Likewise.
 479         (do_FCVT_single_to_half): New function.  Likewise.
 480         (do_FCVT_double_to_half): New function.  Likewise.
 481         (dexSimpleFPDataProc1Source): Call new FCVT functions.
 482         (do_scalar_SHL): Handle negative shifts.
 483         (do_scalar_shift): Handle SSHR.
 484         (do_scalar_USHL): New function.
 485         (do_double_add): Simplify to just performing a double precision
 486         add operation.  Move remaining code into...
 487         (do_scalar_vec): ... New function.
 488         (dexLoadUnsignedImmediate): Call new fldrb_abs and fldrh_abs
 489         functions.
 490         (system_get): Add support for TPIDR, CTR, FPCR, FPSR and CPSR
 491         registers.
 492         (system_set): New function.
 493         (do_MSR_immediate): New function.  Stub for now.
 494         (do_MSR_reg): New function.  Likewise. Partially implements MSR
 495         instruction.
 496         (do_SYS): New function.  Stub for now,
 497         (dexSystem): Call new functions.
 498
 499 2016-03-18  Nick Clifton  <nickc@redhat.com>
 500
 501         * cpustate.c: Remove spurious spaces from TRACE strings.
 502         Print hex equivalents of floats and doubles.
 503         Check element number against array size when accessing vector
 504         registers.
 505         (GET_VEC_ELEMENT): Fix off by one error checking for an invalid
 506         element index.
 507         (SET_VEC_ELEMENT): Likewise.
 508         (GET_VEC_ELEMENT): And fix thinko using macro arguments.
 509
 510         * memory.c: Trace memory reads when --trace-memory is enabled.
 511         Remove float and double load and store functions.
 512         * memory.h (aarch64_get_mem_float): Delete prototype.
 513         (aarch64_get_mem_double): Likewise.
 514         (aarch64_set_mem_float): Likewise.
 515         (aarch64_set_mem_double): Likewise.
 516         * simulator (IS_SET): Always return either 0 or 1.
 517         (IS_CLEAR): Likewise.
 518         (fldrs_pcrel): Load and store floats using 32-bit memory accesses
 519         and doubles using 64-bit memory accesses.
 520         (fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise.
 521         (fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise.
 522         (fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise.
 523         (fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise.
 524         (store_pair_double, load_pair_float, load_pair_double): Likewise.
 525         (do_vec_MUL_by_element): New function.
 526         (do_vec_op2): Call do_vec_MUL_by_element.
 527         (do_scalar_NEG): New function.
 528         (do_double_add): Call do_scalar_NEG.
 529
 530 2016-03-03  Nick Clifton  <nickc@redhat.com>
 531
 532         * simulator.c (set_flags_for_sub32): Correct type of signbit.
 533         (CondCompare): Swap interpretation of bit 30.
 534         (DO_ADDP): Delete macro.
 535         (do_vec_ADDP): Copy source registers before starting to update
 536         destination register.
 537         (do_vec_FADDP): Likewise.
 538         (do_vec_load_store): Fix computation of sizeof_operation.
 539         (rbit64): Fix type of constant.
 540         (aarch64_step): When displaying insn value, display all 32 bits.
 541
 542 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 543
 544         * config.in, configure: Regenerate.
 545
 546 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 547
 548         * configure: Regenerate.
 549
 550 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 551
 552         * configure.ac (SIM_AC_OPTION_ENVIRONMENT): Delete call.
 553         * configure: Regenerate.
 554
 555 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 556
 557         * configure: Regenerate.
 558
 559 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 560
 561         * configure: Regenerate.
 562
 563 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 564
 565         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 566         * configure: Regenerate.
 567
 568 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 569
 570         * configure: Regenerate.
 571
 572 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 573
 574         * configure: Regenerate.
 575
 576 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 577
 578         * config.in, configure: Regenerate.
 579
 580 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 581
 582         * interp.c (sim_create_inferior): Mark argv and env const.
 583         (sim_open): Mark argv const.
 584
 585 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 586
 587         * interp.c: Delete dis-asm.h include.
 588         (info, opbuf, op_printf, aarch64_print_insn, sim_dis_read): Delete.
 589         (sim_create_inferior): Delete disassemble init logic.
 590         (OPTION_DISAS, aarch64_option_handler, aarch64_options): Delete.
 591         (sim_open): Delete sim_add_option_table call.
 592         * memory.c (mem_error): Delete disas check.
 593         * simulator.c: Delete dis-asm.h include.
 594         (disas): Delete.
 595         (HALT_UNALLOC): Replace disassembly logic with TRACE_DISASM.
 596         (HALT_NYI): Likewise.
 597         (handle_halt): Delete disas call.
 598         (aarch64_step): Replace disas logic with TRACE_DISASM.
 599         * simulator.h: Delete dis-asm.h include.
 600         (aarch64_print_insn): Delete.
 601
 602 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 603
 604         * simulator.c (MAX, MIN): Delete.
 605         (do_vec_maxv): Change MAX to max and MIN to min.
 606         (do_vec_fminmaxV): Likewise.
 607
 608 2016-01-04  Tristan Gingold  <gingold@adacore.com>
 609
 610         * simulator.c: Remove syscall.h include.
 611
 612 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 613
 614         * configure: Regenerate.
 615
 616 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 617
 618         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 619         * configure: Regenerate.
 620
 621 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 622
 623         * configure: Regenerate.
 624
 625 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 626
 627         * interp.c (sim_dis_read): Change private_data to application_data.
 628         (sim_create_inferior): Likewise.
 629
 630 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 631
 632         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 633
 634 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 635
 636         * config.in, configure: Regenerate.
 637
 638 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 639
 640         * interp.c (sim_create_inferior): Update comment and argv check.
 641
 642 2015-12-14  Nick Clifton  <nickc@redhat.com>
 643
 644         * simulator.c (system_get): New function.  Provides read
 645         access to the dczid system register.
 646         (do_mrs): New function - implements the MRS instruction.
 647         (dexSystem): Call do_mrs for the MRS instruction.  Halt on
 648         unimplemented system instructions.
 649
 650 2015-11-24  Nick Clifton  <nickc@redhat.com>
 651
 652         * configure.ac: New configure template.
 653         * aclocal.m4: Generate.
 654         * config.in: Generate.
 655         * configure: Generate.
 656         * cpustate.c: New file - functions for accessing AArch64 registers.
 657         * cpustate.h: New header.
 658         * decode.h: New header.
 659         * interp.c: New file - interface between GDB and simulator.
 660         * Makefile.in: New makefile template.
 661         * memory.c: New file - functions for simulating aarch64 memory
 662         accesses.
 663         * memory.h: New header.
 664         * sim-main.h: New header.
 665         * simulator.c: New file - aarch64 simulator functions.
 666         * simulator.h: New header.