sim/aarch64/memory.c

   1 /* memory.c -- Memory accessor functions for the AArch64 simulator
   2
   3    Copyright (C) 2015-2016 Free Software Foundation, Inc.
   4
   5    Contributed by Red Hat.
   6
   7    This file is part of GDB.
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  21
  22 #include "config.h"
  23 #include <sys/types.h>
  24 #include <stdio.h>
  25 #include <stdlib.h>
  26 #include <string.h>
  27
  28 #include "bfd.h"
  29 #include "libbfd.h"
  30 #include "libiberty.h"
  31 #include "elf/internal.h"
  32 #include "elf/common.h"
  33
  34 #include "memory.h"
  35 #include "simulator.h"
  36
  37 #include "sim-core.h"
  38
  39 static inline void
  40 mem_error (sim_cpu *cpu, const char *message, uint64_t addr)
  41 {
  42   TRACE_MEMORY (cpu, "ERROR: %s: %" PRIx64, message, addr);
  43 }
  44
  45 #define FETCH_FUNC(RETURN_TYPE, ACCESS_TYPE, NAME, N)                   \
  46   RETURN_TYPE                                                           \
  47   aarch64_get_mem_##NAME (sim_cpu *cpu, uint64_t address)               \
  48   {                                                                     \
  49     return (RETURN_TYPE) sim_core_read_##N (cpu, 0, read_map, address); \
  50   }
  51
  52 /* A variant of the FETCH_FUNC macro that uses unaligned reads.
  53    The AArch64 only requires 4-byte alignment for 8-byte quantities
  54    but the sim common core does not support this.  */
  55 #define FETCH_FUNC_U(RETURN_TYPE, ACCESS_TYPE, NAME)                    \
  56   RETURN_TYPE                                                           \
  57   aarch64_get_mem_##NAME (sim_cpu *cpu, uint64_t address)               \
  58   {                                                                     \
  59     return (RETURN_TYPE) sim_core_read_unaligned_8 (cpu, 0, read_map, address); \
  60   }
  61
  62 FETCH_FUNC_U (uint64_t, uint64_t, u64)
  63 FETCH_FUNC_U (int64_t,   int64_t, s64)
  64 FETCH_FUNC (uint32_t,   uint32_t, u32, 4)
  65 FETCH_FUNC (int32_t,     int32_t, s32, 4)
  66 FETCH_FUNC (uint32_t,   uint16_t, u16, 2)
  67 FETCH_FUNC (int32_t,     int16_t, s16, 2)
  68 FETCH_FUNC (uint32_t,    uint8_t, u8, 1)
  69 FETCH_FUNC (int32_t,      int8_t, s8, 1)
  70 FETCH_FUNC (float,         float, float, 4)
  71 FETCH_FUNC_U (double,     double, double)
  72
  73 void
  74 aarch64_get_mem_long_double (sim_cpu *cpu, uint64_t address, FRegister *a)
  75 {
  76   a->v[0] = sim_core_read_unaligned_8 (cpu, 0, read_map, address);
  77   a->v[1] = sim_core_read_unaligned_8 (cpu, 0, read_map, address + 8);
  78 }
  79
  80 #define STORE_FUNC(TYPE, NAME, N)                                       \
  81   void                                                                  \
  82   aarch64_set_mem_##NAME (sim_cpu *cpu, uint64_t address, TYPE value)   \
  83   {                                                                     \
  84     TRACE_MEMORY (cpu,                                                  \
  85                   "write of %" PRIx64 " (%d bytes) to %" PRIx64,        \
  86                   (uint64_t) value, N, address);                        \
  87                                                                         \
  88     sim_core_write_unaligned_##N (cpu, 0, write_map, address, value);   \
  89   }
  90
  91 /* A variant of the STORE_FUNC macro that uses unaligned writes.
  92    The AArch64 only requires 4-byte alignment for 8-byte quantities
  93    but the sim common core does not support this.  */
  94 #define STORE_FUNC_U(TYPE, NAME)                                        \
  95   void                                                                  \
  96   aarch64_set_mem_##NAME (sim_cpu *cpu, uint64_t address, TYPE value)   \
  97   {                                                                     \
  98     TRACE_MEMORY (cpu,                                                  \
  99                   "write of %" PRIx64 " (8 bytes) to %" PRIx64,         \
 100                   (uint64_t) value, address);                           \
 101                                                                         \
 102     sim_core_write_unaligned_8 (cpu, 0, write_map, address, value);     \
 103   }
 104
 105 STORE_FUNC_U (uint64_t, u64)
 106 STORE_FUNC_U (int64_t,  s64)
 107 STORE_FUNC (uint32_t,   u32, 4)
 108 STORE_FUNC (int32_t,    s32, 4)
 109 STORE_FUNC (uint16_t,   u16, 2)
 110 STORE_FUNC (int16_t,    s16, 2)
 111 STORE_FUNC (uint8_t,    u8, 1)
 112 STORE_FUNC (int8_t,     s8, 1)
 113 STORE_FUNC (float,      float, 4)
 114 STORE_FUNC_U (double,   double)
 115
 116 void
 117 aarch64_set_mem_long_double (sim_cpu *cpu, uint64_t address, FRegister a)
 118 {
 119   TRACE_MEMORY (cpu,
 120                 "write of long double %" PRIx64 " %" PRIx64 " to %" PRIx64,
 121                 a.v[0], a.v[1], address);
 122
 123   sim_core_write_unaligned_8 (cpu, 0, write_map, address, a.v[0]);
 124   sim_core_write_unaligned_8 (cpu, 0, write_map, address + 8, a.v[1]);
 125 }
 126
 127 void
 128 aarch64_get_mem_blk (sim_cpu *  cpu,
 129                      uint64_t   address,
 130                      char *     buffer,
 131                      unsigned   length)
 132 {
 133   unsigned len;
 134
 135   len = sim_core_read_buffer (CPU_STATE (cpu), cpu, read_map,
 136                               buffer, address, length);
 137   if (len == length)
 138     return;
 139
 140   memset (buffer, 0, length);
 141   if (cpu)
 142     mem_error (cpu, "read of non-existant mem block at", address);
 143
 144   sim_engine_halt (CPU_STATE (cpu), cpu, NULL, aarch64_get_PC (cpu),
 145                    sim_stopped, SIM_SIGBUS);
 146 }
 147
 148 const char *
 149 aarch64_get_mem_ptr (sim_cpu *cpu, uint64_t address)
 150 {
 151   char *addr = sim_core_trans_addr (CPU_STATE (cpu), cpu, read_map, address);
 152
 153   if (addr == NULL)
 154     {
 155       mem_error (cpu, "request for non-existant mem addr of", address);
 156       sim_engine_halt (CPU_STATE (cpu), cpu, NULL, aarch64_get_PC (cpu),
 157                        sim_stopped, SIM_SIGBUS);
 158     }
 159
 160   return addr;
 161 }
 162
 163 /* We implement a combined stack and heap.  That way the sbrk()
 164    function in libgloss/aarch64/syscalls.c has a chance to detect
 165    an out-of-memory condition by noticing a stack/heap collision.
 166
 167    The heap starts at the end of loaded memory and carries on up
 168    to an arbitary 2Gb limit.  */
 169
 170 uint64_t
 171 aarch64_get_heap_start (sim_cpu *cpu)
 172 {
 173   uint64_t heap = aarch64_get_sym_value ("end");
 174
 175   if (heap == 0)
 176     heap = aarch64_get_sym_value ("_end");
 177   if (heap == 0)
 178     {
 179       heap = STACK_TOP - 0x100000;
 180       sim_io_eprintf (CPU_STATE (cpu),
 181                       "Unable to find 'end' symbol - using addr based "
 182                       "upon stack instead %" PRIx64 "\n",
 183                       heap);
 184     }
 185   return heap;
 186 }
 187
 188 uint64_t
 189 aarch64_get_stack_start (sim_cpu *cpu)
 190 {
 191   if (aarch64_get_heap_start (cpu) >= STACK_TOP)
 192     mem_error (cpu, "executable is too big", aarch64_get_heap_start (cpu));
 193   return STACK_TOP;
 194 }