1 /* armdefs.h -- ARMulator common definitions: ARM6 Instruction Emulator.
2 Copyright (C) 1994 Advanced RISC Machines Ltd.
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 3 of the License, or
7 (at your option) any later version.
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, see <http://www.gnu.org/licenses/>. */
29 typedef uint32_t ARMword
;
30 typedef int32_t ARMsword
;
31 typedef uint64_t ARMdword
;
32 typedef int64_t ARMsdword
;
33 typedef struct ARMul_State ARMul_State
;
35 typedef unsigned ARMul_CPInits (ARMul_State
* state
);
36 typedef unsigned ARMul_CPExits (ARMul_State
* state
);
37 typedef unsigned ARMul_LDCs (ARMul_State
* state
, unsigned type
,
38 ARMword instr
, ARMword value
);
39 typedef unsigned ARMul_STCs (ARMul_State
* state
, unsigned type
,
40 ARMword instr
, ARMword
* value
);
41 typedef unsigned ARMul_MRCs (ARMul_State
* state
, unsigned type
,
42 ARMword instr
, ARMword
* value
);
43 typedef unsigned ARMul_MCRs (ARMul_State
* state
, unsigned type
,
44 ARMword instr
, ARMword value
);
45 typedef unsigned ARMul_CDPs (ARMul_State
* state
, unsigned type
,
47 typedef unsigned ARMul_CPReads (ARMul_State
* state
, unsigned reg
,
49 typedef unsigned ARMul_CPWrites (ARMul_State
* state
, unsigned reg
,
52 typedef double ARMdval
; /* FIXME: Must be a 64-bit floating point type. */
53 typedef float ARMfval
; /* FIXME: Must be a 32-bit floating point type. */
64 #define VFP_fval(N) (state->VFP_Reg[(N)>> 1].fval[(N) & 1])
65 #define VFP_uword(N) (state->VFP_Reg[(N)>> 1].uword[(N) & 1])
66 #define VFP_sword(N) (state->VFP_Reg[(N)>> 1].sword[(N) & 1])
68 #define VFP_dval(N) (state->VFP_Reg[(N)].dval)
69 #define VFP_dword(N) (state->VFP_Reg[(N)].dword)
73 ARMword Emulate
; /* to start and stop emulation */
74 unsigned EndCondition
; /* reason for stopping */
75 unsigned ErrorCode
; /* type of illegal instruction */
76 ARMword Reg
[16]; /* the current register file */
77 ARMword RegBank
[7][16]; /* all the registers */
78 /* 40 bit accumulator. We always keep this 64 bits wide,
79 and move only 40 bits out of it in an MRA insn. */
81 ARMword Cpsr
; /* the current psr */
82 ARMword Spsr
[7]; /* the exception psr's */
83 ARMword NFlag
, ZFlag
, CFlag
, VFlag
, IFFlags
; /* dummy flags for speed */
86 ARMword TFlag
; /* Thumb state */
88 ARMword Bank
; /* the current register bank */
89 ARMword Mode
; /* the current mode */
90 ARMword instr
, pc
, temp
; /* saved register state */
91 ARMword loaded
, decoded
; /* saved pipeline state */
92 unsigned long NumScycles
, NumNcycles
, NumIcycles
, NumCcycles
, NumFcycles
; /* emulated cycles used */
93 unsigned long NumInstrs
; /* the number of instructions executed */
95 unsigned VectorCatch
; /* caught exception mask */
96 unsigned CallDebug
; /* set to call the debugger */
97 unsigned CanWatch
; /* set by memory interface if its willing to suffer the
98 overhead of checking for watchpoints on each memory
100 unsigned MemReadDebug
, MemWriteDebug
;
101 unsigned long StopHandle
;
103 unsigned char *MemDataPtr
; /* admin data */
104 unsigned char *MemInPtr
; /* the Data In bus */
105 unsigned char *MemOutPtr
; /* the Data Out bus (which you may not need */
106 unsigned char *MemSparePtr
; /* extra space */
109 unsigned char *OSptr
; /* OS Handle */
110 char *CommandLine
; /* Command Line from ARMsd */
112 ARMul_CPInits
*CPInit
[16]; /* coprocessor initialisers */
113 ARMul_CPExits
*CPExit
[16]; /* coprocessor finalisers */
114 ARMul_LDCs
*LDC
[16]; /* LDC instruction */
115 ARMul_STCs
*STC
[16]; /* STC instruction */
116 ARMul_MRCs
*MRC
[16]; /* MRC instruction */
117 ARMul_MCRs
*MCR
[16]; /* MCR instruction */
118 ARMul_CDPs
*CDP
[16]; /* CDP instruction */
119 ARMul_CPReads
*CPRead
[16]; /* Read CP register */
120 ARMul_CPWrites
*CPWrite
[16]; /* Write CP register */
121 unsigned char *CPData
[16]; /* Coprocessor data */
122 unsigned char const *CPRegWords
[16]; /* map of coprocessor register sizes */
123 unsigned long LastTime
; /* Value of last call to ARMul_Time() */
124 ARMword CP14R0_CCD
; /* used to count 64 clock cycles with CP14 R0 bit
127 unsigned EventSet
; /* the number of events in the queue */
128 unsigned long Now
; /* time to the nearest cycle */
129 struct EventNode
**EventPtr
; /* the event list */
131 unsigned Exception
; /* enable the next four values */
132 unsigned Debug
; /* show instructions as they are executed */
133 unsigned NresetSig
; /* reset the processor */
143 ARMword Vector
; /* synthesize aborts in cycle modes */
144 ARMword Aborted
; /* sticky flag for aborts */
145 ARMword Reseted
; /* sticky flag for Reset */
146 ARMword Inted
, LastInted
; /* sticky flags for interrupts */
147 ARMword Base
; /* extra hand for base writeback */
148 ARMword AbortAddr
; /* to keep track of Prefetch aborts */
150 const struct Dbg_HostosInterface
*hostif
;
152 unsigned is_v4
; /* Are we emulating a v4 architecture (or higher) ? */
153 unsigned is_v5
; /* Are we emulating a v5 architecture ? */
154 unsigned is_v5e
; /* Are we emulating a v5e architecture ? */
155 unsigned is_v6
; /* Are we emulating a v6 architecture ? */
156 unsigned is_XScale
; /* Are we emulating an XScale architecture ? */
157 unsigned is_iWMMXt
; /* Are we emulating an iWMMXt co-processor ? */
158 unsigned is_ep9312
; /* Are we emulating a Cirrus Maverick co-processor ? */
159 unsigned verbose
; /* Print various messages like the banner */
161 ARM_VFP_reg VFP_Reg
[32]; /* Advanced SIMD registers. */
162 ARMword FPSCR
; /* Floating Point Status Register. */
165 #define ResetPin NresetSig
166 #define FIQPin NfiqSig
167 #define IRQPin NirqSig
168 #define AbortPin abortSig
169 #define TransPin NtransSig
170 #define BigEndPin bigendSig
171 #define Prog32Pin prog32Sig
172 #define Data32Pin data32Sig
173 #define LateAbortPin lateabtSig
175 /***************************************************************************\
176 * Properties of ARM we know about *
177 \***************************************************************************/
180 #define ARM_Fix26_Prop 0x01
181 #define ARM_Nexec_Prop 0x02
182 #define ARM_Debug_Prop 0x10
183 #define ARM_Isync_Prop ARM_Debug_Prop
184 #define ARM_Lock_Prop 0x20
185 #define ARM_v4_Prop 0x40
186 #define ARM_v5_Prop 0x80
187 #define ARM_v5e_Prop 0x100
188 #define ARM_XScale_Prop 0x200
189 #define ARM_ep9312_Prop 0x400
190 #define ARM_iWMMXt_Prop 0x800
191 #define ARM_v6_Prop 0x1000
193 /***************************************************************************\
194 * Macros to extract instruction fields *
195 \***************************************************************************/
197 #define BIT(n) ( (ARMword)(instr>>(n))&1) /* bit n of instruction */
198 #define BITS(m,n) ( (ARMword)(instr<<(31-(n))) >> ((31-(n))+(m)) ) /* bits m to n of instr */
199 #define TOPBITS(n) (instr >> (n)) /* bits 31 to n of instr */
201 /***************************************************************************\
202 * The hardware vector addresses *
203 \***************************************************************************/
206 #define ARMUndefinedInstrV 4L
208 #define ARMPrefetchAbortV 12L
209 #define ARMDataAbortV 16L
210 #define ARMAddrExceptnV 20L
213 #define ARMErrorV 32L /* This is an offset, not an address ! */
215 #define ARMul_ResetV ARMResetV
216 #define ARMul_UndefinedInstrV ARMUndefinedInstrV
217 #define ARMul_SWIV ARMSWIV
218 #define ARMul_PrefetchAbortV ARMPrefetchAbortV
219 #define ARMul_DataAbortV ARMDataAbortV
220 #define ARMul_AddrExceptnV ARMAddrExceptnV
221 #define ARMul_IRQV ARMIRQV
222 #define ARMul_FIQV ARMFIQV
224 /***************************************************************************\
225 * Mode and Bank Constants *
226 \***************************************************************************/
228 #define USER26MODE 0L
232 #define USER32MODE 16L
233 #define FIQ32MODE 17L
234 #define IRQ32MODE 18L
235 #define SVC32MODE 19L
236 #define ABORT32MODE 23L
237 #define UNDEF32MODE 27L
238 #define SYSTEMMODE 31L
240 #define ARM32BITMODE (state->Mode > 3)
241 #define ARM26BITMODE (state->Mode <= 3)
242 #define ARMMODE (state->Mode)
243 #define ARMul_MODEBITS 0x1fL
244 #define ARMul_MODE32BIT ARM32BITMODE
245 #define ARMul_MODE26BIT ARM26BITMODE
254 #define SYSTEMBANK USERBANK
256 #define BANK_CAN_ACCESS_SPSR(bank) \
257 ((bank) != USERBANK && (bank) != SYSTEMBANK && (bank) != DUMMYBANK)
259 /***************************************************************************\
260 * Definitons of things in the emulator *
261 \***************************************************************************/
263 extern void ARMul_EmulateInit (void);
264 extern ARMul_State
*ARMul_NewState (void);
265 extern void ARMul_Reset (ARMul_State
* state
);
266 extern ARMword
ARMul_DoProg (ARMul_State
* state
);
267 extern ARMword
ARMul_DoInstr (ARMul_State
* state
);
269 /***************************************************************************\
270 * Definitons of things for event handling *
271 \***************************************************************************/
273 extern void ARMul_ScheduleEvent (ARMul_State
* state
, unsigned long delay
,
274 unsigned (*func
) ());
275 extern void ARMul_EnvokeEvent (ARMul_State
* state
);
276 extern unsigned long ARMul_Time (ARMul_State
* state
);
278 /***************************************************************************\
279 * Useful support routines *
280 \***************************************************************************/
282 extern ARMword
ARMul_GetReg (ARMul_State
* state
, unsigned mode
,
284 extern void ARMul_SetReg (ARMul_State
* state
, unsigned mode
, unsigned reg
,
286 extern ARMword
ARMul_GetPC (ARMul_State
* state
);
287 extern ARMword
ARMul_GetNextPC (ARMul_State
* state
);
288 extern void ARMul_SetPC (ARMul_State
* state
, ARMword value
);
289 extern ARMword
ARMul_GetR15 (ARMul_State
* state
);
290 extern void ARMul_SetR15 (ARMul_State
* state
, ARMword value
);
292 extern ARMword
ARMul_GetCPSR (ARMul_State
* state
);
293 extern void ARMul_SetCPSR (ARMul_State
* state
, ARMword value
);
294 extern ARMword
ARMul_GetSPSR (ARMul_State
* state
, ARMword mode
);
295 extern void ARMul_SetSPSR (ARMul_State
* state
, ARMword mode
, ARMword value
);
297 /***************************************************************************\
298 * Definitons of things to handle aborts *
299 \***************************************************************************/
301 extern void ARMul_Abort (ARMul_State
* state
, ARMword address
);
302 #define ARMul_ABORTWORD 0xefffffff /* SWI -1 */
303 #define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \
304 state->AbortAddr = (address & ~3L)
305 #define ARMul_DATAABORT(address) state->abortSig = HIGH ; \
306 state->Aborted = ARMul_DataAbortV ;
307 #define ARMul_CLEARABORT state->abortSig = LOW
309 /***************************************************************************\
310 * Definitons of things in the memory interface *
311 \***************************************************************************/
313 extern unsigned ARMul_MemoryInit (ARMul_State
* state
,
314 unsigned long initmemsize
);
315 extern void ARMul_MemoryExit (ARMul_State
* state
);
317 extern ARMword
ARMul_LoadInstrS (ARMul_State
* state
, ARMword address
,
319 extern ARMword
ARMul_LoadInstrN (ARMul_State
* state
, ARMword address
,
321 extern ARMword
ARMul_ReLoadInstr (ARMul_State
* state
, ARMword address
,
324 extern ARMword
ARMul_LoadWordS (ARMul_State
* state
, ARMword address
);
325 extern ARMword
ARMul_LoadWordN (ARMul_State
* state
, ARMword address
);
326 extern ARMword
ARMul_LoadHalfWord (ARMul_State
* state
, ARMword address
);
327 extern ARMword
ARMul_LoadByte (ARMul_State
* state
, ARMword address
);
329 extern void ARMul_StoreWordS (ARMul_State
* state
, ARMword address
,
331 extern void ARMul_StoreWordN (ARMul_State
* state
, ARMword address
,
333 extern void ARMul_StoreHalfWord (ARMul_State
* state
, ARMword address
,
335 extern void ARMul_StoreByte (ARMul_State
* state
, ARMword address
,
338 extern ARMword
ARMul_SwapWord (ARMul_State
* state
, ARMword address
,
340 extern ARMword
ARMul_SwapByte (ARMul_State
* state
, ARMword address
,
343 extern void ARMul_Icycles (ARMul_State
* state
, unsigned number
,
345 extern void ARMul_Ccycles (ARMul_State
* state
, unsigned number
,
348 extern ARMword
ARMul_ReadWord (ARMul_State
* state
, ARMword address
);
349 extern ARMword
ARMul_ReadByte (ARMul_State
* state
, ARMword address
);
350 extern ARMword
ARMul_SafeReadByte (ARMul_State
* state
, ARMword address
);
351 extern void ARMul_WriteWord (ARMul_State
* state
, ARMword address
,
353 extern void ARMul_WriteByte (ARMul_State
* state
, ARMword address
,
355 extern void ARMul_SafeWriteByte (ARMul_State
* state
, ARMword address
,
358 extern ARMword
ARMul_MemAccess (ARMul_State
* state
, ARMword
, ARMword
,
359 ARMword
, ARMword
, ARMword
, ARMword
, ARMword
,
360 ARMword
, ARMword
, ARMword
);
362 /***************************************************************************\
363 * Definitons of things in the co-processor interface *
364 \***************************************************************************/
366 #define ARMul_FIRST 0
367 #define ARMul_TRANSFER 1
370 #define ARMul_INTERRUPT 4
375 #define ARMul_CP13_R0_FIQ 0x1
376 #define ARMul_CP13_R0_IRQ 0x2
377 #define ARMul_CP13_R8_PMUS 0x1
379 #define ARMul_CP14_R0_ENABLE 0x0001
380 #define ARMul_CP14_R0_CLKRST 0x0004
381 #define ARMul_CP14_R0_CCD 0x0008
382 #define ARMul_CP14_R0_INTEN0 0x0010
383 #define ARMul_CP14_R0_INTEN1 0x0020
384 #define ARMul_CP14_R0_INTEN2 0x0040
385 #define ARMul_CP14_R0_FLAG0 0x0100
386 #define ARMul_CP14_R0_FLAG1 0x0200
387 #define ARMul_CP14_R0_FLAG2 0x0400
388 #define ARMul_CP14_R10_MOE_IB 0x0004
389 #define ARMul_CP14_R10_MOE_DB 0x0008
390 #define ARMul_CP14_R10_MOE_BT 0x000c
391 #define ARMul_CP15_R1_ENDIAN 0x0080
392 #define ARMul_CP15_R1_ALIGN 0x0002
393 #define ARMul_CP15_R5_X 0x0400
394 #define ARMul_CP15_R5_ST_ALIGN 0x0001
395 #define ARMul_CP15_R5_IMPRE 0x0406
396 #define ARMul_CP15_R5_MMU_EXCPT 0x0400
397 #define ARMul_CP15_DBCON_M 0x0100
398 #define ARMul_CP15_DBCON_E1 0x000c
399 #define ARMul_CP15_DBCON_E0 0x0003
401 extern unsigned ARMul_CoProInit (ARMul_State
* state
);
402 extern void ARMul_CoProExit (ARMul_State
* state
);
403 extern void ARMul_CoProAttach (ARMul_State
* state
, unsigned number
,
404 ARMul_CPInits
* init
, ARMul_CPExits
* exit
,
405 ARMul_LDCs
* ldc
, ARMul_STCs
* stc
,
406 ARMul_MRCs
* mrc
, ARMul_MCRs
* mcr
,
408 ARMul_CPReads
* read
, ARMul_CPWrites
* write
);
409 extern void ARMul_CoProDetach (ARMul_State
* state
, unsigned number
);
410 extern void XScale_check_memacc (ARMul_State
* state
, ARMword
* address
,
412 extern void XScale_set_fsr_far (ARMul_State
* state
, ARMword fsr
, ARMword far
);
413 extern int XScale_debug_moe (ARMul_State
* state
, int moe
);
415 /***************************************************************************\
416 * Definitons of things in the host environment *
417 \***************************************************************************/
419 extern unsigned ARMul_OSInit (ARMul_State
* state
);
420 extern void ARMul_OSExit (ARMul_State
* state
);
421 extern unsigned ARMul_OSHandleSWI (ARMul_State
* state
, ARMword number
);
422 extern ARMword
ARMul_OSLastErrorP (ARMul_State
* state
);
424 extern ARMword
ARMul_Debug (ARMul_State
* state
, ARMword pc
, ARMword instr
);
425 extern unsigned ARMul_OSException (ARMul_State
* state
, ARMword vector
,
429 /***************************************************************************\
430 * Host-dependent stuff *
431 \***************************************************************************/
434 pascal void SpinCursor (short increment
); /* copied from CursorCtl.h */
435 # define HOURGLASS SpinCursor( 1 )
436 # define HOURGLASS_RATE 1023 /* 2^n - 1 */
439 extern void ARMul_UndefInstr (ARMul_State
*, ARMword
);
440 extern void ARMul_FixCPSR (ARMul_State
*, ARMword
, ARMword
);
441 extern void ARMul_FixSPSR (ARMul_State
*, ARMword
, ARMword
);
442 extern void ARMul_ConsolePrint (ARMul_State
*, const char *, ...);
443 extern void ARMul_SelectProcessor (ARMul_State
*, unsigned);