sim/bfin/dv-bfin_otp.c

   1 /* Blackfin One-Time Programmable Memory (OTP) model
   2
   3    Copyright (C) 2010-2021 Free Software Foundation, Inc.
   4    Contributed by Analog Devices, Inc.
   5
   6    This file is part of simulators.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 /* This must come before any other includes.  */
  22 #include "defs.h"
  23
  24 #include "sim-main.h"
  25 #include "devices.h"
  26 #include "dv-bfin_otp.h"
  27
  28 /* XXX: No public documentation on this interface.  This seems to work
  29         with the on-chip ROM functions though and was figured out by
  30         disassembling & walking that code.  */
  31 /* XXX: About only thing that should be done here are CRC fields.  And
  32         supposedly there is an interrupt that could be generated.  */
  33
  34 struct bfin_otp
  35 {
  36   bu32 base;
  37
  38   /* The actual OTP storage -- 0x200 pages, each page is 128bits.
  39      While certain pages have predefined and/or secure access, we don't
  40      bother trying to implement that coverage.  All pages are open for
  41      reading & writing.  */
  42   bu32 mem[0x200 * 4];
  43
  44   /* Order after here is important -- matches hardware MMR layout.  */
  45   bu16 BFIN_MMR_16(control);
  46   bu16 BFIN_MMR_16(ben);
  47   bu16 BFIN_MMR_16(status);
  48   bu32 timing;
  49   bu32 _pad0[28];
  50   bu32 data0, data1, data2, data3;
  51 };
  52 #define mmr_base()      offsetof(struct bfin_otp, control)
  53 #define mmr_offset(mmr) (offsetof(struct bfin_otp, mmr) - mmr_base())
  54 #define mmr_idx(mmr)    (mmr_offset (mmr) / 4)
  55
  56 static const char * const mmr_names[] =
  57 {
  58   "OTP_CONTROL", "OTP_BEN", "OTP_STATUS", "OTP_TIMING",
  59   [mmr_idx (data0)] = "OTP_DATA0", "OTP_DATA1", "OTP_DATA2", "OTP_DATA3",
  60 };
  61 #define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>")
  62
  63 /* XXX: This probably misbehaves with big endian hosts.  */
  64 static void
  65 bfin_otp_transfer (struct bfin_otp *otp, void *vdst, void *vsrc)
  66 {
  67   bu8 *dst = vdst, *src = vsrc;
  68   int bidx;
  69   for (bidx = 0; bidx < 16; ++bidx)
  70     if (otp->ben & (1 << bidx))
  71       dst[bidx] = src[bidx];
  72 }
  73
  74 static void
  75 bfin_otp_read_page (struct bfin_otp *otp, bu16 page)
  76 {
  77   bfin_otp_transfer (otp, &otp->data0, &otp->mem[page * 4]);
  78 }
  79
  80 static void
  81 bfin_otp_write_page_val (struct bfin_otp *otp, bu16 page, bu64 val[2])
  82 {
  83   bfin_otp_transfer (otp, &otp->mem[page * 4], val);
  84 }
  85 static void
  86 bfin_otp_write_page_val2 (struct bfin_otp *otp, bu16 page, bu64 lo, bu64 hi)
  87 {
  88   bu64 val[2] = { lo, hi };
  89   bfin_otp_write_page_val (otp, page, val);
  90 }
  91 static void
  92 bfin_otp_write_page (struct bfin_otp *otp, bu16 page)
  93 {
  94   bfin_otp_write_page_val2 (otp, page, otp->data0, otp->data1);
  95 }
  96
  97 static unsigned
  98 bfin_otp_io_write_buffer (struct hw *me, const void *source, int space,
  99                           address_word addr, unsigned nr_bytes)
 100 {
 101   struct bfin_otp *otp = hw_data (me);
 102   bu32 mmr_off;
 103   bu32 value;
 104   bu16 *value16p;
 105   bu32 *value32p;
 106   void *valuep;
 107
 108   /* Invalid access mode is higher priority than missing register.  */
 109   if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true))
 110     return 0;
 111
 112   if (nr_bytes == 4)
 113     value = dv_load_4 (source);
 114   else
 115     value = dv_load_2 (source);
 116
 117   mmr_off = addr - otp->base;
 118   valuep = (void *)((unsigned long)otp + mmr_base() + mmr_off);
 119   value16p = valuep;
 120   value32p = valuep;
 121
 122   HW_TRACE_WRITE ();
 123
 124   switch (mmr_off)
 125     {
 126     case mmr_offset(control):
 127       {
 128         int page;
 129
 130         if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true))
 131           return 0;
 132         /* XXX: Seems like these bits aren't writable.  */
 133         *value16p = value & 0x39FF;
 134
 135         /* Low bits seem to be the page address.  */
 136         page = value & PAGE_ADDR;
 137
 138         /* Write operation.  */
 139         if (value & DO_WRITE)
 140           bfin_otp_write_page (otp, page);
 141
 142         /* Read operation.  */
 143         if (value & DO_READ)
 144           bfin_otp_read_page (otp, page);
 145
 146         otp->status |= STATUS_DONE;
 147
 148         break;
 149       }
 150     case mmr_offset(ben):
 151       if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true))
 152         return 0;
 153       /* XXX: All bits seem to be writable.  */
 154       *value16p = value;
 155       break;
 156     case mmr_offset(status):
 157       if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true))
 158         return 0;
 159       /* XXX: All bits seem to be W1C.  */
 160       dv_w1c_2 (value16p, value, -1);
 161       break;
 162     case mmr_offset(timing):
 163     case mmr_offset(data0):
 164     case mmr_offset(data1):
 165     case mmr_offset(data2):
 166     case mmr_offset(data3):
 167       if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, true))
 168         return 0;
 169       *value32p = value;
 170       break;
 171     default:
 172       dv_bfin_mmr_invalid (me, addr, nr_bytes, true);
 173       return 0;
 174     }
 175
 176   return nr_bytes;
 177 }
 178
 179 static unsigned
 180 bfin_otp_io_read_buffer (struct hw *me, void *dest, int space,
 181                          address_word addr, unsigned nr_bytes)
 182 {
 183   struct bfin_otp *otp = hw_data (me);
 184   bu32 mmr_off;
 185   bu16 *value16p;
 186   bu32 *value32p;
 187   void *valuep;
 188
 189   /* Invalid access mode is higher priority than missing register.  */
 190   if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, false))
 191     return 0;
 192
 193   mmr_off = addr - otp->base;
 194   valuep = (void *)((unsigned long)otp + mmr_base() + mmr_off);
 195   value16p = valuep;
 196   value32p = valuep;
 197
 198   HW_TRACE_READ ();
 199
 200   switch (mmr_off)
 201     {
 202     case mmr_offset(control):
 203     case mmr_offset(ben):
 204     case mmr_offset(status):
 205       if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false))
 206         return 0;
 207       dv_store_2 (dest, *value16p);
 208       break;
 209     case mmr_offset(timing):
 210     case mmr_offset(data0):
 211     case mmr_offset(data1):
 212     case mmr_offset(data2):
 213     case mmr_offset(data3):
 214       if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, false))
 215         return 0;
 216       dv_store_4 (dest, *value32p);
 217       break;
 218     default:
 219       dv_bfin_mmr_invalid (me, addr, nr_bytes, false);
 220       return 0;
 221     }
 222
 223   return nr_bytes;
 224 }
 225
 226 static void
 227 attach_bfin_otp_regs (struct hw *me, struct bfin_otp *otp)
 228 {
 229   address_word attach_address;
 230   int attach_space;
 231   unsigned attach_size;
 232   reg_property_spec reg;
 233
 234   if (hw_find_property (me, "reg") == NULL)
 235     hw_abort (me, "Missing \"reg\" property");
 236
 237   if (!hw_find_reg_array_property (me, "reg", 0, &reg))
 238     hw_abort (me, "\"reg\" property must contain three addr/size entries");
 239
 240   hw_unit_address_to_attach_address (hw_parent (me),
 241                                      &reg.address,
 242                                      &attach_space, &attach_address, me);
 243   hw_unit_size_to_attach_size (hw_parent (me), &reg.size, &attach_size, me);
 244
 245   if (attach_size != BFIN_MMR_OTP_SIZE)
 246     hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_OTP_SIZE);
 247
 248   hw_attach_address (hw_parent (me),
 249                      0, attach_space, attach_address, attach_size, me);
 250
 251   otp->base = attach_address;
 252 }
 253
 254 static const struct hw_port_descriptor bfin_otp_ports[] =
 255 {
 256   { "stat", 0, 0, output_port, },
 257   { NULL, 0, 0, 0, },
 258 };
 259
 260 static void
 261 bfin_otp_finish (struct hw *me)
 262 {
 263   char part_str[16];
 264   struct bfin_otp *otp;
 265   unsigned int fps03;
 266   int type = hw_find_integer_property (me, "type");
 267
 268   otp = HW_ZALLOC (me, struct bfin_otp);
 269
 270   set_hw_data (me, otp);
 271   set_hw_io_read_buffer (me, bfin_otp_io_read_buffer);
 272   set_hw_io_write_buffer (me, bfin_otp_io_write_buffer);
 273   set_hw_ports (me, bfin_otp_ports);
 274
 275   attach_bfin_otp_regs (me, otp);
 276
 277   /* Initialize the OTP.  */
 278   otp->ben     = 0xFFFF;
 279   otp->timing  = 0x00001485;
 280
 281   /* Semi-random value for unique chip id.  */
 282   bfin_otp_write_page_val2 (otp, FPS00, (unsigned long)otp, ~(unsigned long)otp);
 283
 284   memset (part_str, 0, sizeof (part_str));
 285   sprintf (part_str, "ADSP-BF%iX", type);
 286   switch (type)
 287     {
 288     case 512:
 289       fps03 = FPS03_BF512;
 290       break;
 291     case 514:
 292       fps03 = FPS03_BF514;
 293       break;
 294     case 516:
 295       fps03 = FPS03_BF516;
 296       break;
 297     case 518:
 298       fps03 = FPS03_BF518;
 299       break;
 300     case 522:
 301       fps03 = FPS03_BF522;
 302       break;
 303     case 523:
 304       fps03 = FPS03_BF523;
 305       break;
 306     case 524:
 307       fps03 = FPS03_BF524;
 308       break;
 309     case 525:
 310       fps03 = FPS03_BF525;
 311       break;
 312     case 526:
 313       fps03 = FPS03_BF526;
 314       break;
 315     case 527:
 316       fps03 = FPS03_BF527;
 317       break;
 318     default:
 319       fps03 = 0;
 320       break;
 321     }
 322   part_str[14] = (fps03 >> 0);
 323   part_str[15] = (fps03 >> 8);
 324   bfin_otp_write_page_val (otp, FPS03, (void *)part_str);
 325 }
 326
 327 const struct hw_descriptor dv_bfin_otp_descriptor[] =
 328 {
 329   {"bfin_otp", bfin_otp_finish,},
 330   {NULL, NULL},
 331 };