sim: bfin: new port
[binutils-gdb.git] / sim / bfin / dv-bfin_wdog.c
1 /* Blackfin Watchdog (WDOG) model.
2
3 Copyright (C) 2010-2011 Free Software Foundation, Inc.
4 Contributed by Analog Devices, Inc.
5
6 This file is part of simulators.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #include "config.h"
22
23 #include "sim-main.h"
24 #include "dv-sockser.h"
25 #include "devices.h"
26 #include "dv-bfin_wdog.h"
27
28 /* XXX: Should we bother emulating the TX/RX FIFOs ? */
29
30 struct bfin_wdog
31 {
32 bu32 base;
33
34 /* Order after here is important -- matches hardware MMR layout. */
35 bu16 BFIN_MMR_16(ctl);
36 bu32 cnt, stat;
37 };
38 #define mmr_base() offsetof(struct bfin_wdog, ctl)
39 #define mmr_offset(mmr) (offsetof(struct bfin_wdog, mmr) - mmr_base())
40
41 static const char * const mmr_names[] = {
42 "WDOG_CTL", "WDOG_CNT", "WDOG_STAT",
43 };
44 #define mmr_name(off) mmr_names[(off) / 4]
45
46 static bool
47 bfin_wdog_enabled (struct bfin_wdog *wdog)
48 {
49 return ((wdog->ctl & WDEN) != WDDIS);
50 }
51
52 static unsigned
53 bfin_wdog_io_write_buffer (struct hw *me, const void *source,
54 int space, address_word addr, unsigned nr_bytes)
55 {
56 struct bfin_wdog *wdog = hw_data (me);
57 bu32 mmr_off;
58 bu32 value;
59 bu16 *value16p;
60 bu32 *value32p;
61 void *valuep;
62
63 if (nr_bytes == 4)
64 value = dv_load_4 (source);
65 else
66 value = dv_load_2 (source);
67
68 mmr_off = addr - wdog->base;
69 valuep = (void *)((unsigned long)wdog + mmr_base() + mmr_off);
70 value16p = valuep;
71 value32p = valuep;
72
73 HW_TRACE_WRITE ();
74
75 switch (mmr_off)
76 {
77 case mmr_offset(ctl):
78 dv_w1c_2_partial (value16p, value, WDRO);
79 /* XXX: Should enable an event here to handle timeouts. */
80 break;
81
82 case mmr_offset(cnt):
83 /* Writes are discarded when enabeld. */
84 if (!bfin_wdog_enabled (wdog))
85 {
86 *value32p = value;
87 /* Writes to CNT preloads the STAT. */
88 wdog->stat = wdog->cnt;
89 }
90 break;
91
92 case mmr_offset(stat):
93 /* When enabled, writes to STAT reload the counter. */
94 if (bfin_wdog_enabled (wdog))
95 wdog->stat = wdog->cnt;
96 /* XXX: When disabled, are writes just ignored ? */
97 break;
98 }
99
100 return nr_bytes;
101 }
102
103 static unsigned
104 bfin_wdog_io_read_buffer (struct hw *me, void *dest,
105 int space, address_word addr, unsigned nr_bytes)
106 {
107 struct bfin_wdog *wdog = hw_data (me);
108 bu32 mmr_off;
109 bu16 *value16p;
110 bu32 *value32p;
111 void *valuep;
112
113 mmr_off = addr - wdog->base;
114 valuep = (void *)((unsigned long)wdog + mmr_base() + mmr_off);
115 value16p = valuep;
116 value32p = valuep;
117
118 HW_TRACE_READ ();
119
120 switch (mmr_off)
121 {
122 case mmr_offset(ctl):
123 dv_bfin_mmr_require_16 (me, addr, nr_bytes, false);
124 dv_store_2 (dest, *value16p);
125 break;
126
127 case mmr_offset(cnt):
128 case mmr_offset(stat):
129 dv_store_4 (dest, *value32p);
130 break;
131 }
132
133 return nr_bytes;
134 }
135
136 static const struct hw_port_descriptor bfin_wdog_ports[] = {
137 { "reset", WDEV_RESET, 0, output_port, },
138 { "nmi", WDEV_NMI, 0, output_port, },
139 { "gpi", WDEV_GPI, 0, output_port, },
140 { NULL, 0, 0, 0, },
141 };
142
143 static void
144 bfin_wdog_port_event (struct hw *me, int my_port, struct hw *source,
145 int source_port, int level)
146 {
147 struct bfin_wdog *wdog = hw_data (me);
148 bu16 wdev;
149
150 wdog->ctl |= WDRO;
151 wdev = (wdog->ctl & WDEV);
152 if (wdev != WDEV_NONE)
153 hw_port_event (me, wdev, 1);
154 }
155
156 static void
157 attach_bfin_wdog_regs (struct hw *me, struct bfin_wdog *wdog)
158 {
159 address_word attach_address;
160 int attach_space;
161 unsigned attach_size;
162 reg_property_spec reg;
163
164 if (hw_find_property (me, "reg") == NULL)
165 hw_abort (me, "Missing \"reg\" property");
166
167 if (!hw_find_reg_array_property (me, "reg", 0, &reg))
168 hw_abort (me, "\"reg\" property must contain three addr/size entries");
169
170 hw_unit_address_to_attach_address (hw_parent (me),
171 &reg.address,
172 &attach_space, &attach_address, me);
173 hw_unit_size_to_attach_size (hw_parent (me), &reg.size, &attach_size, me);
174
175 if (attach_size != BFIN_MMR_WDOG_SIZE)
176 hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_WDOG_SIZE);
177
178 hw_attach_address (hw_parent (me),
179 0, attach_space, attach_address, attach_size, me);
180
181 wdog->base = attach_address;
182 }
183
184 static void
185 bfin_wdog_finish (struct hw *me)
186 {
187 struct bfin_wdog *wdog;
188
189 wdog = HW_ZALLOC (me, struct bfin_wdog);
190
191 set_hw_data (me, wdog);
192 set_hw_io_read_buffer (me, bfin_wdog_io_read_buffer);
193 set_hw_io_write_buffer (me, bfin_wdog_io_write_buffer);
194 set_hw_ports (me, bfin_wdog_ports);
195 set_hw_port_event (me, bfin_wdog_port_event);
196
197 attach_bfin_wdog_regs (me, wdog);
198
199 /* Initialize the Watchdog. */
200 wdog->ctl = WDDIS;
201 }
202
203 const struct hw_descriptor dv_bfin_wdog_descriptor[] = {
204 {"bfin_wdog", bfin_wdog_finish,},
205 {NULL, NULL},
206 };