sim/bfin/dv-bfin_wp.c

   1 /* Blackfin Watchpoint (WP) model.
   2
   3    Copyright (C) 2010-2011 Free Software Foundation, Inc.
   4    Contributed by Analog Devices, Inc.
   5
   6    This file is part of simulators.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "config.h"
  22
  23 #include "sim-main.h"
  24 #include "devices.h"
  25 #include "dv-bfin_wp.h"
  26
  27 /* XXX: This is mostly a stub.  */
  28
  29 #define WPI_NUM 6       /* 6 instruction watchpoints.  */
  30 #define WPD_NUM 2       /* 2 data watchpoints.  */
  31
  32 struct bfin_wp
  33 {
  34   bu32 base;
  35
  36   /* Order after here is important -- matches hardware MMR layout.  */
  37   bu32 iactl;
  38   bu32 _pad0[15];
  39   bu32 ia[WPI_NUM];
  40   bu32 _pad1[16 - WPI_NUM];
  41   bu32 iacnt[WPI_NUM];
  42   bu32 _pad2[32 - WPI_NUM];
  43
  44   bu32 dactl;
  45   bu32 _pad3[15];
  46   bu32 da[WPD_NUM];
  47   bu32 _pad4[16 - WPD_NUM];
  48   bu32 dacnt[WPD_NUM];
  49   bu32 _pad5[32 - WPD_NUM];
  50
  51   bu32 stat;
  52 };
  53 #define mmr_base()      offsetof(struct bfin_wp, iactl)
  54 #define mmr_offset(mmr) (offsetof(struct bfin_wp, mmr) - mmr_base())
  55 #define mmr_idx(mmr)    (mmr_offset (mmr) / 4)
  56
  57 static const char * const mmr_names[] = {
  58   [mmr_idx (iactl)] = "WPIACTL",
  59   [mmr_idx (ia)]    = "WPIA0", "WPIA1", "WPIA2", "WPIA3", "WPIA4", "WPIA5",
  60   [mmr_idx (iacnt)] = "WPIACNT0", "WPIACNT1", "WPIACNT2",
  61                       "WPIACNT3", "WPIACNT4", "WPIACNT5",
  62   [mmr_idx (dactl)] = "WPDACTL",
  63   [mmr_idx (da)]    = "WPDA0", "WPDA1", "WPDA2", "WPDA3", "WPDA4", "WPDA5",
  64   [mmr_idx (dacnt)] = "WPDACNT0", "WPDACNT1", "WPDACNT2",
  65                       "WPDACNT3", "WPDACNT4", "WPDACNT5",
  66   [mmr_idx (stat)]  = "WPSTAT",
  67 };
  68 #define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>")
  69
  70 static unsigned
  71 bfin_wp_io_write_buffer (struct hw *me, const void *source, int space,
  72                          address_word addr, unsigned nr_bytes)
  73 {
  74   struct bfin_wp *wp = hw_data (me);
  75   bu32 mmr_off;
  76   bu32 value;
  77   bu32 *valuep;
  78
  79   value = dv_load_4 (source);
  80   mmr_off = addr - wp->base;
  81   valuep = (void *)((unsigned long)wp + mmr_base() + mmr_off);
  82
  83   HW_TRACE_WRITE ();
  84
  85   switch (mmr_off)
  86     {
  87     case mmr_offset(iactl):
  88     case mmr_offset(ia[0]) ... mmr_offset(ia[WPI_NUM - 1]):
  89     case mmr_offset(iacnt[0]) ... mmr_offset(iacnt[WPI_NUM - 1]):
  90     case mmr_offset(dactl):
  91     case mmr_offset(da[0]) ... mmr_offset(da[WPD_NUM - 1]):
  92     case mmr_offset(dacnt[0]) ... mmr_offset(dacnt[WPD_NUM - 1]):
  93       *valuep = value;
  94       break;
  95     case mmr_offset(stat):
  96       /* Yes, the hardware is this dumb -- clear all bits on any write.  */
  97       *valuep = 0;
  98       break;
  99     default:
 100       dv_bfin_mmr_invalid (me, addr, nr_bytes, true);
 101       break;
 102     }
 103
 104   return nr_bytes;
 105 }
 106
 107 static unsigned
 108 bfin_wp_io_read_buffer (struct hw *me, void *dest, int space,
 109                         address_word addr, unsigned nr_bytes)
 110 {
 111   struct bfin_wp *wp = hw_data (me);
 112   bu32 mmr_off;
 113   bu32 value;
 114   bu32 *valuep;
 115
 116   mmr_off = addr - wp->base;
 117   valuep = (void *)((unsigned long)wp + mmr_base() + mmr_off);
 118
 119   HW_TRACE_READ ();
 120
 121   switch (mmr_off)
 122     {
 123     case mmr_offset(iactl):
 124     case mmr_offset(ia[0]) ... mmr_offset(ia[WPI_NUM - 1]):
 125     case mmr_offset(iacnt[0]) ... mmr_offset(iacnt[WPI_NUM - 1]):
 126     case mmr_offset(dactl):
 127     case mmr_offset(da[0]) ... mmr_offset(da[WPD_NUM - 1]):
 128     case mmr_offset(dacnt[0]) ... mmr_offset(dacnt[WPD_NUM - 1]):
 129     case mmr_offset(stat):
 130       value = *valuep;
 131       break;
 132     default:
 133       while (1) /* Core MMRs -> exception -> doesn't return.  */
 134         dv_bfin_mmr_invalid (me, addr, nr_bytes, false);
 135       break;
 136     }
 137
 138   dv_store_4 (dest, value);
 139
 140   return nr_bytes;
 141 }
 142
 143 static void
 144 attach_bfin_wp_regs (struct hw *me, struct bfin_wp *wp)
 145 {
 146   address_word attach_address;
 147   int attach_space;
 148   unsigned attach_size;
 149   reg_property_spec reg;
 150
 151   if (hw_find_property (me, "reg") == NULL)
 152     hw_abort (me, "Missing \"reg\" property");
 153
 154   if (!hw_find_reg_array_property (me, "reg", 0, &reg))
 155     hw_abort (me, "\"reg\" property must contain three addr/size entries");
 156
 157   hw_unit_address_to_attach_address (hw_parent (me),
 158                                      &reg.address,
 159                                      &attach_space, &attach_address, me);
 160   hw_unit_size_to_attach_size (hw_parent (me), &reg.size, &attach_size, me);
 161
 162   if (attach_size != BFIN_COREMMR_WP_SIZE)
 163     hw_abort (me, "\"reg\" size must be %#x", BFIN_COREMMR_WP_SIZE);
 164
 165   hw_attach_address (hw_parent (me),
 166                      0, attach_space, attach_address, attach_size, me);
 167
 168   wp->base = attach_address;
 169 }
 170
 171 static void
 172 bfin_wp_finish (struct hw *me)
 173 {
 174   struct bfin_wp *wp;
 175
 176   wp = HW_ZALLOC (me, struct bfin_wp);
 177
 178   set_hw_data (me, wp);
 179   set_hw_io_read_buffer (me, bfin_wp_io_read_buffer);
 180   set_hw_io_write_buffer (me, bfin_wp_io_write_buffer);
 181
 182   attach_bfin_wp_regs (me, wp);
 183 }
 184
 185 const struct hw_descriptor dv_bfin_wp_descriptor[] = {
 186   {"bfin_wp", bfin_wp_finish,},
 187   {NULL, NULL},
 188 };