1 /* Blackfin Watchpoint (WP) model.
3 Copyright (C) 2010-2011 Free Software Foundation, Inc.
4 Contributed by Analog Devices, Inc.
6 This file is part of simulators.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
25 #include "dv-bfin_wp.h"
27 /* XXX: This is mostly a stub. */
29 #define WPI_NUM 6 /* 6 instruction watchpoints. */
30 #define WPD_NUM 2 /* 2 data watchpoints. */
36 /* Order after here is important -- matches hardware MMR layout. */
40 bu32 _pad1
[16 - WPI_NUM
];
42 bu32 _pad2
[32 - WPI_NUM
];
47 bu32 _pad4
[16 - WPD_NUM
];
49 bu32 _pad5
[32 - WPD_NUM
];
53 #define mmr_base() offsetof(struct bfin_wp, iactl)
54 #define mmr_offset(mmr) (offsetof(struct bfin_wp, mmr) - mmr_base())
55 #define mmr_idx(mmr) (mmr_offset (mmr) / 4)
57 static const char * const mmr_names
[] = {
58 [mmr_idx (iactl
)] = "WPIACTL",
59 [mmr_idx (ia
)] = "WPIA0", "WPIA1", "WPIA2", "WPIA3", "WPIA4", "WPIA5",
60 [mmr_idx (iacnt
)] = "WPIACNT0", "WPIACNT1", "WPIACNT2",
61 "WPIACNT3", "WPIACNT4", "WPIACNT5",
62 [mmr_idx (dactl
)] = "WPDACTL",
63 [mmr_idx (da
)] = "WPDA0", "WPDA1", "WPDA2", "WPDA3", "WPDA4", "WPDA5",
64 [mmr_idx (dacnt
)] = "WPDACNT0", "WPDACNT1", "WPDACNT2",
65 "WPDACNT3", "WPDACNT4", "WPDACNT5",
66 [mmr_idx (stat
)] = "WPSTAT",
68 #define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>")
71 bfin_wp_io_write_buffer (struct hw
*me
, const void *source
, int space
,
72 address_word addr
, unsigned nr_bytes
)
74 struct bfin_wp
*wp
= hw_data (me
);
79 value
= dv_load_4 (source
);
80 mmr_off
= addr
- wp
->base
;
81 valuep
= (void *)((unsigned long)wp
+ mmr_base() + mmr_off
);
87 case mmr_offset(iactl
):
88 case mmr_offset(ia
[0]) ... mmr_offset(ia
[WPI_NUM
- 1]):
89 case mmr_offset(iacnt
[0]) ... mmr_offset(iacnt
[WPI_NUM
- 1]):
90 case mmr_offset(dactl
):
91 case mmr_offset(da
[0]) ... mmr_offset(da
[WPD_NUM
- 1]):
92 case mmr_offset(dacnt
[0]) ... mmr_offset(dacnt
[WPD_NUM
- 1]):
95 case mmr_offset(stat
):
96 /* Yes, the hardware is this dumb -- clear all bits on any write. */
100 dv_bfin_mmr_invalid (me
, addr
, nr_bytes
, true);
108 bfin_wp_io_read_buffer (struct hw
*me
, void *dest
, int space
,
109 address_word addr
, unsigned nr_bytes
)
111 struct bfin_wp
*wp
= hw_data (me
);
116 mmr_off
= addr
- wp
->base
;
117 valuep
= (void *)((unsigned long)wp
+ mmr_base() + mmr_off
);
123 case mmr_offset(iactl
):
124 case mmr_offset(ia
[0]) ... mmr_offset(ia
[WPI_NUM
- 1]):
125 case mmr_offset(iacnt
[0]) ... mmr_offset(iacnt
[WPI_NUM
- 1]):
126 case mmr_offset(dactl
):
127 case mmr_offset(da
[0]) ... mmr_offset(da
[WPD_NUM
- 1]):
128 case mmr_offset(dacnt
[0]) ... mmr_offset(dacnt
[WPD_NUM
- 1]):
129 case mmr_offset(stat
):
133 while (1) /* Core MMRs -> exception -> doesn't return. */
134 dv_bfin_mmr_invalid (me
, addr
, nr_bytes
, false);
138 dv_store_4 (dest
, value
);
144 attach_bfin_wp_regs (struct hw
*me
, struct bfin_wp
*wp
)
146 address_word attach_address
;
148 unsigned attach_size
;
149 reg_property_spec reg
;
151 if (hw_find_property (me
, "reg") == NULL
)
152 hw_abort (me
, "Missing \"reg\" property");
154 if (!hw_find_reg_array_property (me
, "reg", 0, ®
))
155 hw_abort (me
, "\"reg\" property must contain three addr/size entries");
157 hw_unit_address_to_attach_address (hw_parent (me
),
159 &attach_space
, &attach_address
, me
);
160 hw_unit_size_to_attach_size (hw_parent (me
), ®
.size
, &attach_size
, me
);
162 if (attach_size
!= BFIN_COREMMR_WP_SIZE
)
163 hw_abort (me
, "\"reg\" size must be %#x", BFIN_COREMMR_WP_SIZE
);
165 hw_attach_address (hw_parent (me
),
166 0, attach_space
, attach_address
, attach_size
, me
);
168 wp
->base
= attach_address
;
172 bfin_wp_finish (struct hw
*me
)
176 wp
= HW_ZALLOC (me
, struct bfin_wp
);
178 set_hw_data (me
, wp
);
179 set_hw_io_read_buffer (me
, bfin_wp_io_read_buffer
);
180 set_hw_io_write_buffer (me
, bfin_wp_io_write_buffer
);
182 attach_bfin_wp_regs (me
, wp
);
185 const struct hw_descriptor dv_bfin_wp_descriptor
[] = {
186 {"bfin_wp", bfin_wp_finish
,},