sim: unify sim_cia definition
[binutils-gdb.git] / sim / bfin / sim-main.h
1 /* Simulator for Analog Devices Blackfin processors.
2
3 Copyright (C) 2005-2015 Free Software Foundation, Inc.
4 Contributed by Analog Devices, Inc.
5
6 This file is part of simulators.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #ifndef _BFIN_MAIN_SIM_H_
22 #define _BFIN_MAIN_SIM_H_
23
24 #include "sim-basics.h"
25 #include "sim-signal.h"
26
27 typedef struct _sim_cpu SIM_CPU;
28
29 #include "bfin-sim.h"
30
31 #include "machs.h"
32
33 #include "sim-base.h"
34
35 struct _sim_cpu {
36 /* ... simulator specific members ... */
37 struct bfin_cpu_state state;
38 sim_cpu_base base;
39 };
40 #define BFIN_CPU_STATE ((cpu)->state)
41
42 struct sim_state {
43 sim_cpu *cpu[MAX_NR_PROCESSORS];
44
45 /* ... simulator specific members ... */
46 struct bfin_board_data board;
47 #define STATE_BOARD_DATA(sd) (&(sd)->board)
48 sim_state_base base;
49 };
50
51 #include "sim-config.h"
52 #include "sim-types.h"
53 #include "sim-engine.h"
54 #include "sim-options.h"
55 #include "dv-bfin_trace.h"
56
57 #undef MAX
58 #undef MIN
59 #undef CLAMP
60 #undef ALIGN
61 #define MAX(a, b) ((a) > (b) ? (a) : (b))
62 #define MIN(a, b) ((a) < (b) ? (a) : (b))
63 #define CLAMP(a, b, c) MIN (MAX (a, b), c)
64 #define ALIGN(addr, size) (((addr) + ((size)-1)) & ~((size)-1))
65
66 #define MAYBE_TRACE(type, cpu, fmt, ...) \
67 do { \
68 if (TRACE_##type##_P (cpu)) \
69 trace_generic (CPU_STATE (cpu), cpu, TRACE_##type##_IDX, \
70 fmt, ## __VA_ARGS__); \
71 } while (0)
72 #define TRACE_INSN(cpu, fmt, ...) MAYBE_TRACE (INSN, cpu, fmt, ## __VA_ARGS__)
73 #define TRACE_DECODE(cpu, fmt, ...) MAYBE_TRACE (DECODE, cpu, fmt, ## __VA_ARGS__)
74 #define TRACE_EXTRACT(cpu, fmt, ...) MAYBE_TRACE (EXTRACT, cpu, fmt, ## __VA_ARGS__)
75 #define TRACE_SYSCALL(cpu, fmt, ...) MAYBE_TRACE (SYSCALL, cpu, fmt, ## __VA_ARGS__)
76 #define TRACE_CORE(cpu, addr, size, map, val) \
77 do { \
78 MAYBE_TRACE (CORE, cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \
79 map == exec_map ? 'I' : 'D', \
80 map == write_map ? "STORE" : "FETCH", \
81 size, addr, size * 2, val); \
82 PROFILE_COUNT_CORE (cpu, addr, size, map); \
83 } while (0)
84 #define TRACE_EVENTS(cpu, fmt, ...) MAYBE_TRACE (EVENTS, cpu, fmt, ## __VA_ARGS__)
85 #define TRACE_BRANCH(cpu, oldpc, newpc, hwloop, fmt, ...) \
86 do { \
87 MAYBE_TRACE (BRANCH, cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \
88 if (STATE_ENVIRONMENT (CPU_STATE (cpu)) == OPERATING_ENVIRONMENT) \
89 bfin_trace_queue (cpu, oldpc, newpc, hwloop); \
90 } while (0)
91
92 extern void trace_register (SIM_DESC sd,
93 sim_cpu *cpu,
94 const char *fmt,
95 ...)
96 __attribute__((format (printf, 3, 4)));
97 #define TRACE_REGISTER(cpu, fmt, ...) \
98 do { \
99 if (TRACE_CORE_P (cpu)) \
100 trace_register (CPU_STATE (cpu), cpu, fmt, ## __VA_ARGS__); \
101 } while (0)
102 #define TRACE_REG(cpu, reg, val) TRACE_REGISTER (cpu, "wrote "#reg" = %#x", val)
103
104 /* Default memory size. */
105 #define BFIN_DEFAULT_MEM_SIZE (128 * 1024 * 1024)
106
107 #endif