sim/common/cgen-sim.h

   1 /* Simulator header for Cpu tools GENerated simulators.
   2    Copyright (C) 1996, 1997 Free Software Foundation, Inc.
   3    Contributed by Cygnus Support.
   4
   5 This file is part of GDB, the GNU debugger.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 2, or (at your option)
  10 any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License along
  18 with this program; if not, write to the Free Software Foundation, Inc.,
  19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21 #ifndef CGEN_SIM_H
  22 #define CGEN_SIM_H
  23
  24 #define PC (STATE_CPU_CPU (current_state, 0)->pc)
  25
  26 /* Execution state.  */
  27 enum exec_state {
  28   EXEC_STATE_RUNNING, EXEC_STATE_EXITED,
  29   EXEC_STATE_STOPPED, EXEC_STATE_SIGNALLED
  30 };
  31
  32 /* Signals we use.  */
  33 enum sim_signal_type {
  34   SIM_SIGNONE,
  35   SIM_SIGILL,    /* illegal insn */
  36   SIM_SIGTRAP,
  37   SIM_SIGALIGN,  /* misaligned memory access */
  38   SIM_SIGACCESS, /* tried to read/write memory that's not readable/writable */
  39   SIM_SIGXCPU    /* cpu limit exceeded */
  40 };
  41
  42 void engine_halt PARAMS ((struct _sim_cpu *, enum exec_state, int));
  43 void engine_signal PARAMS ((struct _sim_cpu *, enum sim_signal_type));
  44 \f
  45 /* Instruction field support macros.  */
  46
  47 #define EXTRACT_SIGNED(val, total, start, length) \
  48 (((((val) >> ((total) - ((start) + (length)))) & ((1 << (length)) - 1)) \
  49   ^ (1 << ((length) - 1))) \
  50  - (1 << ((length) - 1)))
  51
  52 #define EXTRACT_UNSIGNED(val, total, start, length) \
  53 (((val) >> ((total) - ((start) + (length)))) & ((1 << (length)) - 1))
  54
  55 /* Compute number of longs required to hold N bits.  */
  56 #define HOST_LONGS_FOR_BITS(n) \
  57   (((n) + sizeof (long) * 8 - 1) / sizeof (long) * 8)
  58 \f
  59 /* Decode,extract,semantics.  */
  60
  61 typedef void (EXTRACT_FN) PARAMS ((SIM_CPU *, PCADDR, insn_t, struct argbuf *));
  62 /*typedef CIA (SEMANTIC_FN) PARAMS ((SEM_ARG));*/
  63 typedef PCADDR (SEMANTIC_FN) PARAMS ((SIM_CPU *, struct argbuf *));
  64 #if 0 /* wip */
  65 typedef void (EXTRACT_CACHE_FN) PARAMS ((SIM_CPU *, PCADDR, insn_t, struct argbuf *));
  66 #endif
  67 typedef PCADDR (SEMANTIC_CACHE_FN) PARAMS ((SIM_CPU *, struct scache *));
  68
  69 typedef struct {
  70   /* Using cgen_insn_type requires <cpu>-opc.h.  */
  71   int /*enum cgen_insn_type*/ insn_type;
  72   const struct cgen_insn *opcode;
  73   /* FIXME: Perhaps rename these to normal/fast versions to associate them
  74      with the normal/fast args to genmloop.sh.  */
  75   EXTRACT_FN *extract;
  76   SEMANTIC_FN *semantic;
  77 #if 0 /* wip */
  78   EXTRACT_CACHE_FN *extract_fast;
  79 #endif
  80   SEMANTIC_CACHE_FN *semantic_fast;
  81 #if defined (USE_SEM_SWITCH) && defined (__GNUC__)
  82   void *semantic_lab;
  83 #endif
  84 } DECODE;
  85
  86 /* FIXME: length parm to decode() is currently unneeded.  */
  87 extern DECODE *decode PARAMS ((insn_t /*, int*/));
  88 \f
  89 /* Simulator state.  */
  90
  91 #if WITH_SCACHE
  92 #include "cgen-scache.h"
  93 #endif
  94
  95 /* ??? Do we *need* to pass state to the semantic routines?  */
  96 extern SIM_DESC current_state;
  97
  98 /* FIXME: Until sim_open creates one.  */
  99 extern struct sim_state sim_global_state;
 100
 101 /* Simulator state.  */
 102
 103 /* Main state struct.
 104    CGEN_STATE contains addition state information not present in
 105    sim_state_base.  */
 106
 107 typedef struct cgen_state {
 108   /* argv, env */
 109   char **argv;
 110 #define STATE_ARGV(s) ((s)->cgen_state.argv)
 111   char **envp;
 112 #define STATE_ENVP(s) ((s)->cgen_state.envp)
 113 } CGEN_STATE;
 114
 115 /* Additional per-cpu data.  */
 116
 117 typedef struct {
 118   /* Simulator's execution cache.  */
 119 #if WITH_SCACHE
 120   CPU_SCACHE scache;
 121 #endif /* WITH_SCACHE */
 122
 123   enum exec_state exec_state;
 124 #define CPU_EXEC_STATE(cpu) ((cpu)->cgen_cpu.exec_state)
 125
 126   int halt_sigrc;
 127 #define CPU_HALT_SIGRC(cpu) ((cpu)->cgen_cpu.halt_sigrc)
 128
 129   jmp_buf halt_jmp_buf;
 130 #define CPU_HALT_JMP_BUF(cpu) ((cpu)->cgen_cpu.halt_jmp_buf)
 131
 132   CPU_DATA cpu;
 133 #define CPU_CPU(c) (& (c)->cgen_cpu.cpu)
 134   CPU_PROFILE profile_state;
 135 #define CPU_PROFILE_STATE(cpu) (& (cpu)->cgen_cpu.profile_state)
 136 } CGEN_CPU;
 137 \f
 138 /* Various utilities.  */
 139
 140 int engine_stop (SIM_DESC);
 141 void engine_run (SIM_DESC, int, int);
 142 void engine_resume (SIM_DESC, int, int);
 143 void engine_halt (SIM_CPU *, enum exec_state, int);
 144 void engine_signal (SIM_CPU *, enum sim_signal_type);
 145
 146 int sim_signal_to_host (int);
 147
 148 void
 149 sim_disassemble_insn (const struct cgen_insn *, const struct argbuf *,
 150                       PCADDR, char *);
 151
 152 #endif /* CGEN_SIM_H */