1 /* This file is part of the program psim.
3 Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
25 /* declared in sim-basics.h, this object is used everywhere */
26 /* typedef struct _device device; */
31 As explained in earlier sections, the device, device instance,
32 property and ports lie at the heart of PSIM's device model.
34 In the below a synopsis of the device object and the operations it
41 The devices are created using a sequence of steps. In particular:
43 o A tree framework is created.
45 At this point, properties can be modified and extra
46 devices inserted (or removed?).
50 Any properties that have a run-time value (eg ihandle
51 or device instance pointer properties) are entered
52 into the device tree using a named reference to the
53 corresponding runtime object that is to be created.
57 o Real devices are created for all the dummy devices.
59 A device can assume that all of its parents have been
62 A device can assume that all non run-time properties
63 have been initialized.
65 As part of being created, the device normally attaches
66 itself to its parent bus.
70 Device instance data is initialized.
76 o Any run-time properties are created.
82 o Some devices, as part of their initialization
83 might want to refer to ihandle properties
90 o It is important to separate the creation
91 of an actual device from the creation
92 of the tree. The alternative creating
93 the device in two stages: As a separate
94 entity and then as a part of the tree.
97 o Run-time properties can not be created
98 until after the devices in the tree
99 have been created. Hence an extra pass
107 A device is able to determine its relationship to other devices
108 within the tree. Operations include querying for a devices parent,
109 sibling, child, name, and path (from the root).
114 #define hw_parent(hw) ((hw)->parent_of_hw + 0)
116 #define hw_sibling(hw) ((hw)->sibling_of_hw + 0)
118 #define hw_child(hw) ((hw)->child_of_hw + 0)
126 #define hw_family(hw) ((hw)->family_of_hw + 0)
128 #define hw_name(hw) ((hw)->name_of_hw + 0)
130 #define hw_args(hw) ((hw)->args_of_hw + 0)
132 #define hw_path(hw) ((hw)->path_of_hw + 0)
136 /* Short cut to the root node of the tree */
138 #define hw_root(hw) ((hw)->root_of_hw + 0)
140 /* Short cut back to the simulator object */
142 #define hw_system(hw) ((hw)->system_of_hw + 0)
144 /* Device private data */
146 #define hw_data(hw) ((hw)->data_of_hw)
150 /* Perform a soft reset of the device */
152 typedef unsigned (hw_reset_callback
)
155 #define hw_reset(hw) ((hw)->to_reset (hw))
158 /* Hardware operations:
160 Connecting a parent to its children is a common bus. The parent
161 node is described as the bus owner and is responisble for
162 co-ordinating bus operations. On the bus, a SPACE:ADDR pair is used
163 to specify an address. A device that is both a bus owner (parent)
164 and bus client (child) are refered to as a bridging device.
166 A child performing a data (DMA) transfer will pass its request to
167 the bus owner (the devices parent). The bus owner will then either
168 reflect the request to one of the other devices attached to the bus
169 (a child of the bus owner) or bridge the request up the tree to the
173 /* Children attached to a bus can register (attach) themselves to
174 specific addresses on their attached bus.
176 (A device may also be implicitly attached to certain bus
179 The SPACE:ADDR pair specify an address on the common bus that
180 connects the parent and child devices. */
182 typedef void (hw_attach_address_callback
)
187 address_word nr_bytes
,
188 struct hw
*client
); /*callback/default*/
190 #define hw_attach_address(me, level, space, addr, nr_bytes, client) \
191 ((me)->to_attach_address (me, level, space, addr, nr_bytes, client))
194 typedef void (hw_detach_address_callback
)
199 address_word nr_bytes
,
200 struct hw
*client
); /*callback/default*/
202 #define hw_detach_address(me, level, space, addr, nr_bytes, client) \
203 ((me)->to_detach_address (me, level, space, addr, nr_bytes, client))
206 /* An IO operation from a parent to a child via the conecting bus.
208 The SPACE:ADDR pair specify an address on the bus shared between
209 the parent and child devices. */
211 typedef unsigned (hw_io_read_buffer_callback
)
220 #define hw_io_read_buffer(hw, dest, space, addr, nr_bytes, processor, cia) \
221 ((hw)->to_io_read_buffer (hw, dest, space, addr, nr_bytes, processor, cia))
223 typedef unsigned (hw_io_write_buffer_callback
)
232 #define hw_io_write_buffer(hw, src, space, addr, nr_bytes, processor, cia) \
233 ((hw)->to_io_write_buffer (hw, src, space, addr, nr_bytes, processor, cia))
237 /* Conversly, the device pci1000,1@1 may need to perform a dma transfer
238 into the cpu/memory core. Just as I/O moves towards the leaves,
239 dma transfers move towards the core via the initiating devices
240 parent nodes. The root device (special) converts the DMA transfer
241 into reads/writes to memory.
243 The SPACE:ADDR pair specify an address on the common bus connecting
244 the parent and child devices. */
246 typedef unsigned (hw_dma_read_buffer_callback
)
253 #define hw_dma_read_buffer(bus, dest, space, addr, nr_bytes) \
254 ((bus)->to_dma_read_buffer (bus, dest, space, addr, nr_bytes))
256 typedef unsigned (hw_dma_write_buffer_callback
)
262 int violate_read_only_section
);
264 #define hw_dma_write_buffer(bus, src, space, addr, nr_bytes, violate_ro) \
265 ((bus)->to_dma_write_buffer (bus, src, space, addr, nr_bytes, violate_ro))
267 /* Address/size specs for devices are encoded following a convention
268 similar to that used by OpenFirmware. In particular, an
269 address/size is packed into a sequence of up to four cell words.
270 The number of words determined by the number of {address,size}
271 cells attributes of the device. */
273 typedef struct _hw_unit
{
275 unsigned_cell cells
[4]; /* unused cells are zero */
279 /* For the given bus, the number of address and size cells used in a
282 #define hw_unit_nr_address_cells(bus) ((bus)->nr_address_cells_of_hw_unit + 0)
284 #define hw_unit_nr_size_cells(bus) ((bus)->nr_size_cells_of_hw_unit + 0)
287 /* For the given device, its identifying hw_unit address.
289 Each device has an identifying hw_unit address. That address is
290 used when identifying one of a number of identical devices on a
291 common controller bus. ex fd0&fd1. */
293 const hw_unit
*hw_unit_address
297 /* Convert between a textual and the internal representation of a
298 hw_unit address/size.
300 NOTE: A device asks its parent to translate between a hw_unit and
301 textual representation. This is because the textual address of a
302 device is specified using the parent busses notation. */
304 typedef int (hw_unit_decode_callback
)
309 #define hw_unit_decode(bus, encoded, unit) \
310 ((bus)->to_unit_decode (bus, encoded, unit))
313 typedef int (hw_unit_encode_callback
)
319 #define hw_unit_encode(bus, unit, encoded, sizeof_encoded) \
320 ((bus)->to_unit_encode (bus, unit, encoded, sizeof_encoded))
324 /* As the bus that the device is attached too, to translate a devices
325 hw_unit address/size into a form suitable for an attach address
328 Return a zero result if the address should be ignored when looking
329 for attach addresses. */
331 typedef int (hw_unit_address_to_attach_address_callback
)
333 const hw_unit
*unit_addr
,
335 unsigned_word
*attach_addr
,
338 #define hw_unit_address_to_attach_address(bus, unit_addr, attach_space, attach_addr, client) \
339 ((bus)->to_unit_address_to_attach_address (bus, unit_addr, attach_space, attach_addr, client))
342 typedef int (hw_unit_size_to_attach_size_callback
)
344 const hw_unit
*unit_size
,
345 unsigned *attach_size
,
348 #define hw_unit_size_to_attach_size(bus, unit_size, attach_size, client) \
349 ((bus)->to_unit_size_to_attach_size (bus, unit_size, attach_size, client))
359 Often devices require `out of band' operations to be performed.
360 For instance a pal device may need to notify a PCI bridge device
361 that an interrupt ack cycle needs to be performed on the PCI bus.
362 Within PSIM such operations are performed by using the generic
363 ioctl call <<hw_ioctl()>>.
368 hw_ioctl_break
, /* unsigned_word requested_break */
369 hw_ioctl_set_trace
, /* void */
370 hw_ioctl_create_stack
, /* unsigned_word *sp, char **argv, char **envp */
371 hw_ioctl_change_media
, /* const char *new_image (possibly NULL) */
372 nr_hw_ioctl_requests
,
375 typedef int (hw_ioctl_callback
)
379 hw_ioctl_request request
,
386 hw_ioctl_request request
,
392 Device specific versions of certain event handlers */
394 typedef struct _hw_event hw_event
;
395 typedef void (hw_event_handler
) (struct hw
*me
, void *data
);
397 hw_event
*hw_event_queue_schedule
400 hw_event_handler
*handler
,
403 void hw_event_queue_deschedule
405 hw_event
*event_to_remove
);
407 signed64 hw_event_queue_time
414 So that errors originating from devices appear in a consistent
415 format, the <<hw_abort()>> function can be used. Formats and
416 outputs the error message before aborting the simulation
418 Devices should use this function to abort the simulation except
419 when the abort reason leaves the simulation in a hazardous
420 condition (for instance a failed malloc).
424 void volatile NORETURN hw_abort
427 ...) __attribute__ ((format (printf
, 2, 3)));
429 #define hw_trace_p(hw) ((hw)->trace_of_hw_p + 0)
433 /* Some of the related functions require specific types */
435 struct hw_property_data
;
439 /* Finally the hardware device - keep your grubby little mits off of
440 these internals! :-) */
445 struct hw
*parent_of_hw
;
446 struct hw
*sibling_of_hw
;
447 struct hw
*child_of_hw
;
450 const char *name_of_hw
;
451 const char *family_of_hw
;
452 const char *args_of_hw
;
453 const char *path_of_hw
;
459 struct hw
*root_of_hw
;
460 SIM_DESC system_of_hw
;
462 /* identifying data */
463 hw_unit unit_address_of_hw
;
464 int nr_address_cells_of_hw_unit
;
465 int nr_size_cells_of_hw_unit
;
468 hw_reset_callback
*to_reset
;
470 /* Basic callbacks */
471 hw_io_read_buffer_callback
*to_io_read_buffer
;
472 hw_io_write_buffer_callback
*to_io_write_buffer
;
473 hw_dma_read_buffer_callback
*to_dma_read_buffer
;
474 hw_dma_write_buffer_callback
*to_dma_write_buffer
;
475 hw_attach_address_callback
*to_attach_address
;
476 hw_detach_address_callback
*to_detach_address
;
478 /* More complicated callbacks */
479 hw_ioctl_callback
*to_ioctl
;
482 /* address callbacks */
483 hw_unit_decode_callback
*to_unit_decode
;
484 hw_unit_encode_callback
*to_unit_encode
;
485 hw_unit_address_to_attach_address_callback
*to_unit_address_to_attach_address
;
486 hw_unit_size_to_attach_size_callback
*to_unit_size_to_attach_size
;
489 struct hw_property_data
*properties_of_hw
;
490 struct hw_port_data
*ports_of_hw
;
491 struct hw_base_data
*base_of_hw
;