sim: unify symbol table handling
[binutils-gdb.git] / sim / common / sim-base.h
1 /* Simulator pseudo baseclass.
2
3 Copyright 1997-2016 Free Software Foundation, Inc.
4
5 Contributed by Cygnus Support.
6
7 This file is part of GDB, the GNU debugger.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22
23 /* Simulator state pseudo baseclass.
24
25 Each simulator is required to have the file ``sim-main.h''. That
26 file includes ``sim-basics.h'', defines the base type ``sim_cia''
27 (the data type that contains complete current instruction address
28 information), include ``sim-base.h'':
29
30 #include "sim-basics.h"
31 /-* If `sim_cia' is not an integral value (e.g. a struct), define
32 CIA_ADDR to return the integral value. *-/
33 /-* typedef struct {...} sim_cia; *-/
34 /-* #define CIA_ADDR(cia) (...) *-/
35 #include "sim-base.h"
36
37 finally, two data types `struct _sim_cpu' and `struct sim_state'
38 are defined:
39
40 struct _sim_cpu {
41 ... simulator specific members ...
42 sim_cpu_base base;
43 };
44
45 struct sim_state {
46 sim_cpu *cpu[MAX_NR_PROCESSORS];
47 ... simulator specific members ...
48 sim_state_base base;
49 };
50
51 Note that `base' appears last. This makes `base.magic' appear last
52 in the entire struct and helps catch miscompilation errors. */
53
54
55 #ifndef SIM_BASE_H
56 #define SIM_BASE_H
57
58 /* Pre-declare certain types. */
59
60 /* typedef <target-dependant> sim_cia; */
61 #ifndef NULL_CIA
62 #define NULL_CIA ((sim_cia) 0)
63 #endif
64 /* Return the current instruction address as a number.
65 Some targets treat the current instruction address as a struct
66 (e.g. for delay slot handling). */
67 #ifndef CIA_ADDR
68 #define CIA_ADDR(cia) (cia)
69 typedef address_word sim_cia;
70 #endif
71 #ifndef INVALID_INSTRUCTION_ADDRESS
72 #define INVALID_INSTRUCTION_ADDRESS ((address_word)0 - 1)
73 #endif
74
75 /* TODO: Probably should just delete SIM_CPU. */
76 typedef struct _sim_cpu SIM_CPU;
77 typedef struct _sim_cpu sim_cpu;
78
79 #include "sim-module.h"
80
81 #include "sim-trace.h"
82 #include "sim-core.h"
83 #include "sim-events.h"
84 #include "sim-profile.h"
85 #include "sim-model.h"
86 #include "sim-io.h"
87 #include "sim-engine.h"
88 #include "sim-watch.h"
89 #include "sim-memopt.h"
90 #include "sim-cpu.h"
91
92
93 /* We require all sims to dynamically allocate cpus. See comment up top about
94 struct sim_state. */
95 #if (WITH_SMP)
96 # define STATE_CPU(sd, n) ((sd)->cpu[n])
97 #else
98 # define STATE_CPU(sd, n) ((sd)->cpu[0])
99 #endif
100
101
102 typedef struct {
103
104 /* Simulator's argv[0]. */
105 const char *my_name;
106 #define STATE_MY_NAME(sd) ((sd)->base.my_name)
107
108 /* Who opened the simulator. */
109 SIM_OPEN_KIND open_kind;
110 #define STATE_OPEN_KIND(sd) ((sd)->base.open_kind)
111
112 /* The host callbacks. */
113 struct host_callback_struct *callback;
114 #define STATE_CALLBACK(sd) ((sd)->base.callback)
115
116 /* The type of simulation environment (user/operating). */
117 enum sim_environment environment;
118 #define STATE_ENVIRONMENT(sd) ((sd)->base.environment)
119
120 #if 0 /* FIXME: Not ready yet. */
121 /* Stuff defined in sim-config.h. */
122 struct sim_config config;
123 #define STATE_CONFIG(sd) ((sd)->base.config)
124 #endif
125
126 /* List of installed module `init' handlers. */
127 struct module_list *modules;
128 #define STATE_MODULES(sd) ((sd)->base.modules)
129
130 /* Supported options. */
131 struct option_list *options;
132 #define STATE_OPTIONS(sd) ((sd)->base.options)
133
134 /* Non-zero if -v specified. */
135 int verbose_p;
136 #define STATE_VERBOSE_P(sd) ((sd)->base.verbose_p)
137
138 /* Non cpu-specific trace data. See sim-trace.h. */
139 TRACE_DATA trace_data;
140 #define STATE_TRACE_DATA(sd) (& (sd)->base.trace_data)
141
142 /* If non NULL, the BFD architecture specified on the command line */
143 const struct bfd_arch_info *architecture;
144 #define STATE_ARCHITECTURE(sd) ((sd)->base.architecture)
145
146 /* If non NULL, the bfd target specified on the command line */
147 const char *target;
148 #define STATE_TARGET(sd) ((sd)->base.target)
149
150 /* In standalone simulator, this is the program's arguments passed
151 on the command line. */
152 char **prog_argv;
153 #define STATE_PROG_ARGV(sd) ((sd)->base.prog_argv)
154
155 /* The program's bfd. */
156 struct bfd *prog_bfd;
157 #define STATE_PROG_BFD(sd) ((sd)->base.prog_bfd)
158
159 /* Symbol table for prog_bfd */
160 struct bfd_symbol **prog_syms;
161 #define STATE_PROG_SYMS(sd) ((sd)->base.prog_syms)
162
163 /* Number of prog_syms symbols. */
164 long prog_syms_count;
165 #define STATE_PROG_SYMS_COUNT(sd) ((sd)->base.prog_syms_count)
166
167 /* The program's text section. */
168 struct bfd_section *text_section;
169 /* Starting and ending text section addresses from the bfd. */
170 bfd_vma text_start, text_end;
171 #define STATE_TEXT_SECTION(sd) ((sd)->base.text_section)
172 #define STATE_TEXT_START(sd) ((sd)->base.text_start)
173 #define STATE_TEXT_END(sd) ((sd)->base.text_end)
174
175 /* Start address, set when the program is loaded from the bfd. */
176 bfd_vma start_addr;
177 #define STATE_START_ADDR(sd) ((sd)->base.start_addr)
178
179 /* Size of the simulator's cache, if any.
180 This is not the target's cache. It is the cache the simulator uses
181 to process instructions. */
182 unsigned int scache_size;
183 #define STATE_SCACHE_SIZE(sd) ((sd)->base.scache_size)
184
185 /* core memory bus */
186 #define STATE_CORE(sd) (&(sd)->base.core)
187 sim_core core;
188
189 /* Record of memory sections added via the memory-options interface. */
190 #define STATE_MEMOPT(sd) ((sd)->base.memopt)
191 sim_memopt *memopt;
192
193 /* event handler */
194 #define STATE_EVENTS(sd) (&(sd)->base.events)
195 sim_events events;
196
197 /* generic halt/resume engine */
198 sim_engine engine;
199 #define STATE_ENGINE(sd) (&(sd)->base.engine)
200
201 /* generic watchpoint support */
202 sim_watchpoints watchpoints;
203 #define STATE_WATCHPOINTS(sd) (&(sd)->base.watchpoints)
204
205 #if WITH_HW
206 struct sim_hw *hw;
207 #define STATE_HW(sd) ((sd)->base.hw)
208 #endif
209
210 /* Should image loads be performed using the LMA or VMA? Older
211 simulators use the VMA while newer simulators prefer the LMA. */
212 int load_at_lma_p;
213 #define STATE_LOAD_AT_LMA_P(SD) ((SD)->base.load_at_lma_p)
214
215 /* Marker for those wanting to do sanity checks.
216 This should remain the last member of this struct to help catch
217 miscompilation errors. */
218 int magic;
219 #define SIM_MAGIC_NUMBER 0x4242
220 #define STATE_MAGIC(sd) ((sd)->base.magic)
221 } sim_state_base;
222
223 /* Functions for allocating/freeing a sim_state. */
224 SIM_DESC sim_state_alloc (SIM_OPEN_KIND kind, host_callback *callback);
225 void sim_state_free (SIM_DESC);
226
227 #endif /* SIM_BASE_H */