sim/common/sim-base.h

   1 /* Simulator pseudo baseclass.
   2    Copyright (C) 1997 Free Software Foundation, Inc.
   3    Contributed by Cygnus Support.
   4
   5 This file is part of GDB, the GNU debugger.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 2, or (at your option)
  10 any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License along
  18 with this program; if not, write to the Free Software Foundation, Inc.,
  19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21
  22 /* Simulator state pseudo baseclass.
  23
  24    Each simulator is required to have the file ``sim-main.h''.  That
  25    file includes ``sim-basics.h'', defines the base type ``sim_cia''
  26    (the data type that contains complete current instruction address
  27    information), include ``sim-base.h'':
  28
  29      #include "sim-basics.h"
  30      typedef address_word sim_cia;
  31      /-* If `sim_cia' is not an integral value (e.g. a struct), define
  32          CIA_ADDR to return the integral value.  *-/
  33      /-* #define CIA_ADDR(cia) (...) *-/
  34      #include "sim-base.h"
  35
  36    finally, two data types `struct _sim_cpu' and `struct sim_state'
  37    are defined:
  38
  39      struct _sim_cpu {
  40         ... simulator specific members ...
  41         sim_cpu_base base;
  42      };
  43
  44      struct sim_state {
  45        sim_cpu cpu[MAX_NR_PROCESSORS];
  46      #if (WITH_SMP)
  47      #define STATE_CPU(sd,n) (&(sd)->cpu[n])
  48      #else
  49      #define STATE_CPU(sd,n) (&(sd)->cpu[0])
  50      #endif
  51        ... simulator specific members ...
  52        sim_state_base base;
  53      };
  54
  55    Note that `base' appears last.  This makes `base.magic' appear last
  56    in the entire struct and helps catch miscompilation errors. */
  57
  58
  59 #ifndef SIM_BASE_H
  60 #define SIM_BASE_H
  61
  62 /* Pre-declare certain types. */
  63
  64 /* typedef <target-dependant> sim_cia; */
  65 #ifndef NULL_CIA
  66 #define NULL_CIA ((sim_cia) 0)
  67 #endif
  68 /* Return the current instruction address as a number.
  69    Some targets treat the current instruction address as a struct
  70    (e.g. for delay slot handling).  */
  71 #ifndef CIA_ADDR
  72 #define CIA_ADDR(cia) (cia)
  73 #endif
  74 #ifndef INVALID_INSTRUCTION_ADDRESS
  75 #define INVALID_INSTRUCTION_ADDRESS ((address_word)0 - 1)
  76 #endif
  77
  78 typedef struct _sim_cpu sim_cpu;
  79
  80 #include "sim-module.h"
  81
  82 #include "sim-trace.h"
  83 #include "sim-core.h"
  84 #include "sim-events.h"
  85 #include "sim-profile.h"
  86 #ifdef SIM_HAVE_MODEL
  87 #include "sim-model.h"
  88 #endif
  89 #include "sim-io.h"
  90 #include "sim-engine.h"
  91 #include "sim-watch.h"
  92 #include "sim-memopt.h"
  93 #ifdef SIM_HAVE_BREAKPOINTS
  94 #include "sim-break.h"
  95 #endif
  96
  97 /* Global pointer to current state while sim_resume is running.
  98    On a machine with lots of registers, it might be possible to reserve
  99    one of them for current_state.  However on a machine with few registers
 100    current_state can't permanently live in one and indirecting through it
 101    will be slower [in which case one can have sim_resume set globals from
 102    current_state for faster access].
 103    If CURRENT_STATE_REG is defined, it means current_state is living in
 104    a global register.  */
 105
 106
 107 #ifdef CURRENT_STATE_REG
 108 /* FIXME: wip */
 109 #else
 110 extern struct sim_state *current_state;
 111 #endif
 112
 113
 114 /* The simulator may provide different (and faster) definition.  */
 115 #ifndef CURRENT_STATE
 116 #define CURRENT_STATE current_state
 117 #endif
 118
 119
 120 typedef struct {
 121
 122   /* Simulator's argv[0].  */
 123   const char *my_name;
 124 #define STATE_MY_NAME(sd) ((sd)->base.my_name)
 125
 126   /* Who opened the simulator.  */
 127   SIM_OPEN_KIND open_kind;
 128 #define STATE_OPEN_KIND(sd) ((sd)->base.open_kind)
 129
 130   /* The host callbacks.  */
 131   struct host_callback_struct *callback;
 132 #define STATE_CALLBACK(sd) ((sd)->base.callback)
 133
 134 #if 0 /* FIXME: Not ready yet.  */
 135   /* Stuff defined in sim-config.h.  */
 136   struct sim_config config;
 137 #define STATE_CONFIG(sd) ((sd)->base.config)
 138 #endif
 139
 140   /* List of installed module `init' handlers.  */
 141   MODULE_INIT_LIST *init_list;
 142 #define STATE_INIT_LIST(sd) ((sd)->base.init_list)
 143   /* List of installed module `uninstall' handlers.  */
 144   MODULE_UNINSTALL_LIST *uninstall_list;
 145 #define STATE_UNINSTALL_LIST(sd) ((sd)->base.uninstall_list)
 146   /* List of installed module `resume' handlers.  */
 147   MODULE_RESUME_LIST *resume_list;
 148 #define STATE_RESUME_LIST(sd) ((sd)->base.resume_list)
 149   /* List of installed module `suspend' handlers.  */
 150   MODULE_SUSPEND_LIST *suspend_list;
 151 #define STATE_SUSPEND_LIST(sd) ((sd)->base.suspend_list)
 152
 153   /* Supported options.  */
 154   struct option_list *options;
 155 #define STATE_OPTIONS(sd) ((sd)->base.options)
 156
 157   /* Non-zero if -v specified.  */
 158   int verbose_p;
 159 #define STATE_VERBOSE_P(sd) ((sd)->base.verbose_p)
 160
 161   /* Non cpu-specific trace data.  See sim-trace.h.  */
 162   TRACE_DATA trace_data;
 163 #define STATE_TRACE_DATA(sd) (& (sd)->base.trace_data)
 164
 165   /* If non NULL, the BFD architecture specified on the command line */
 166   const struct bfd_arch_info *architecture;
 167 #define STATE_ARCHITECTURE(sd) ((sd)->base.architecture)
 168
 169   /* If non NULL, the bfd target specified on the command line */
 170   const char *target;
 171 #define STATE_TARGET(sd) ((sd)->base.target)
 172
 173   /* In standalone simulator, this is the program's arguments passed
 174      on the command line.  */
 175   char **prog_argv;
 176 #define STATE_PROG_ARGV(sd) ((sd)->base.prog_argv)
 177
 178   /* The program's bfd.  */
 179   struct _bfd *prog_bfd;
 180 #define STATE_PROG_BFD(sd) ((sd)->base.prog_bfd)
 181
 182   /* The program's text section.  */
 183   struct sec *text_section;
 184   /* Starting and ending text section addresses from the bfd.  */
 185   SIM_ADDR text_start, text_end;
 186 #define STATE_TEXT_SECTION(sd) ((sd)->base.text_section)
 187 #define STATE_TEXT_START(sd) ((sd)->base.text_start)
 188 #define STATE_TEXT_END(sd) ((sd)->base.text_end)
 189
 190   /* Start address, set when the program is loaded from the bfd.  */
 191   SIM_ADDR start_addr;
 192 #define STATE_START_ADDR(sd) ((sd)->base.start_addr)
 193
 194   /* Size of the simulator's cache, if any.
 195      This is not the target's cache.  It is the cache the simulator uses
 196      to process instructions.  */
 197   unsigned int scache_size;
 198 #define STATE_SCACHE_SIZE(sd) ((sd)->base.scache_size)
 199
 200   /* FIXME: Move to top level sim_state struct (as some struct)?  */
 201 #ifdef SIM_HAVE_FLATMEM
 202   unsigned int mem_size;
 203 #define STATE_MEM_SIZE(sd) ((sd)->base.mem_size)
 204   unsigned int mem_base;
 205 #define STATE_MEM_BASE(sd) ((sd)->base.mem_base)
 206   unsigned char *memory;
 207 #define STATE_MEMORY(sd) ((sd)->base.memory)
 208 #endif
 209
 210   /* core memory bus */
 211 #define STATE_CORE(sd) (&(sd)->base.core)
 212   sim_core core;
 213
 214   /* memory-options for managing the core */
 215 #define STATE_MEMOPT(sd) ((sd)->base.memopt)
 216   sim_memopt *memopt;
 217
 218   /* event handler */
 219 #define STATE_EVENTS(sd) (&(sd)->base.events)
 220   sim_events events;
 221
 222   /* generic halt/resume engine */
 223   sim_engine engine;
 224 #define STATE_ENGINE(sd) (&(sd)->base.engine)
 225
 226   /* generic watchpoint support */
 227   sim_watchpoints watchpoints;
 228 #define STATE_WATCHPOINTS(sd) (&(sd)->base.watchpoints)
 229
 230   /* Pointer to list of breakpoints */
 231   struct sim_breakpoint *breakpoints;
 232 #define STATE_BREAKPOINTS(sd) ((sd)->base.breakpoints)
 233
 234   /* Marker for those wanting to do sanity checks.
 235      This should remain the last member of this struct to help catch
 236      miscompilation errors.  */
 237   int magic;
 238 #define SIM_MAGIC_NUMBER 0x4242
 239 #define STATE_MAGIC(sd) ((sd)->base.magic)
 240 } sim_state_base;
 241
 242
 243 /* Pseudo baseclass for each cpu.  */
 244
 245 typedef struct {
 246
 247   /* Backlink to main state struct.  */
 248   SIM_DESC state;
 249 #define CPU_STATE(cpu) ((cpu)->base.state)
 250
 251   /* The name of the cpu.  */
 252   const char *name;
 253 #define CPU_NAME(cpu) ((cpu)->base.name)
 254
 255   /* Options specific to this cpu.  */
 256   struct option_list *options;
 257 #define CPU_OPTIONS(cpu) ((cpu)->base.options)
 258
 259   /* Processor specific core data */
 260   sim_cpu_core core;
 261 #define CPU_CORE(cpu) (& (cpu)->base.core)
 262
 263   /* Trace data.  See sim-trace.h.  */
 264   TRACE_DATA trace_data;
 265 #define CPU_TRACE_DATA(cpu) (& (cpu)->base.trace_data)
 266
 267   /* Maximum number of debuggable entities.
 268      This debugging is not intended for normal use.
 269      It is only enabled when the simulator is configured with --with-debug
 270      which shouldn't normally be specified.  */
 271 #ifndef MAX_DEBUG_VALUES
 272 #define MAX_DEBUG_VALUES 4
 273 #endif
 274
 275   /* Boolean array of specified debugging flags.  */
 276   char debug_flags[MAX_DEBUG_VALUES];
 277 #define CPU_DEBUG_FLAGS(cpu) ((cpu)->base.debug_flags)
 278   /* Standard values.  */
 279 #define DEBUG_INSN_IDX 0
 280 #define DEBUG_NEXT_IDX 2 /* simulator specific debug bits begin here */
 281
 282   /* Debugging output goes to this or stderr if NULL.
 283      We can't store `stderr' here as stderr goes through a callback.  */
 284   FILE *debug_file;
 285 #define CPU_DEBUG_FILE(cpu) ((cpu)->base.debug_file)
 286
 287   /* Profile data.  See sim-profile.h.  */
 288   PROFILE_DATA profile_data;
 289 #define CPU_PROFILE_DATA(cpu) (& (cpu)->base.profile_data)
 290
 291 #ifdef SIM_HAVE_MODEL
 292   /* Machine tables for this cpu.  See sim-model.h.  */
 293   const MACH *mach;
 294 #define CPU_MACH(cpu) ((cpu)->base.mach)
 295   /* The selected model.  */
 296   const MODEL *model;
 297 #define CPU_MODEL(cpu) ((cpu)->base.model)
 298 #endif
 299
 300 } sim_cpu_base;
 301
 302
 303 /* Functions for allocating/freeing a sim_state.  */
 304 SIM_DESC sim_state_alloc PARAMS ((SIM_OPEN_KIND kind, host_callback *callback));
 305 void sim_state_free PARAMS ((SIM_DESC));
 306
 307 /* Return a pointer to the cpu data for CPU_NAME, or NULL if not found.  */
 308 sim_cpu *sim_cpu_lookup (SIM_DESC sd, const char *cpu_name);
 309
 310
 311 #endif /* SIM_BASE_H */