1 /* Simulator pseudo baseclass.
3 Copyright 1997-2021 Free Software Foundation, Inc.
5 Contributed by Cygnus Support.
7 This file is part of GDB, the GNU debugger.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 /* Simulator state pseudo baseclass.
25 Each simulator is required to have the file ``sim-main.h''. That
26 file includes ``sim-basics.h'', defines the base type ``sim_cia''
27 (the data type that contains complete current instruction address
28 information), include ``sim-base.h'':
30 #include "sim-basics.h"
31 /-* If `sim_cia' is not an integral value (e.g. a struct), define
32 CIA_ADDR to return the integral value. *-/
33 /-* typedef struct {...} sim_cia; *-/
34 /-* #define CIA_ADDR(cia) (...) *-/
37 finally, two data types `struct _sim_cpu' and `struct sim_state'
41 ... simulator specific members ...
45 If your sim needs to allocate sim-wide state, use STATE_ARCH_DATA. */
55 /* Pre-declare certain types. */
57 /* typedef <target-dependant> sim_cia; */
59 #define NULL_CIA ((sim_cia) 0)
61 /* Return the current instruction address as a number.
62 Some targets treat the current instruction address as a struct
63 (e.g. for delay slot handling). */
65 #define CIA_ADDR(cia) (cia)
66 typedef address_word sim_cia
;
68 #ifndef INVALID_INSTRUCTION_ADDRESS
69 #define INVALID_INSTRUCTION_ADDRESS ((address_word)0 - 1)
72 /* TODO: Probably should just delete SIM_CPU. */
73 typedef struct _sim_cpu SIM_CPU
;
74 typedef struct _sim_cpu sim_cpu
;
76 #include "sim-module.h"
78 #include "sim-arange.h"
79 #include "sim-trace.h"
81 #include "sim-events.h"
82 #include "sim-profile.h"
83 #include "sim-model.h"
85 #include "sim-engine.h"
86 #include "sim-watch.h"
87 #include "sim-memopt.h"
89 #include "sim-assert.h"
92 # include "cgen-sim.h"
93 # define SIM_HAVE_COMMON_SIM_STATE
96 /* We require all sims to dynamically allocate cpus. See comment up top about
99 # define STATE_CPU(sd, n) ((sd)->cpu[n])
101 # define STATE_CPU(sd, n) ((sd)->cpu[0])
107 /* Simulator's argv[0]. */
109 #define STATE_MY_NAME(sd) ((sd)->base.my_name)
111 /* Who opened the simulator. */
112 SIM_OPEN_KIND open_kind
;
113 #define STATE_OPEN_KIND(sd) ((sd)->base.open_kind)
115 /* The host callbacks. */
116 struct host_callback_struct
*callback
;
117 #define STATE_CALLBACK(sd) ((sd)->base.callback)
119 /* The type of simulation environment (user/operating). */
120 enum sim_environment environment
;
121 #define STATE_ENVIRONMENT(sd) ((sd)->base.environment)
123 #if 0 /* FIXME: Not ready yet. */
124 /* Stuff defined in sim-config.h. */
125 struct sim_config config
;
126 #define STATE_CONFIG(sd) ((sd)->base.config)
129 /* List of installed module `init' handlers. */
130 struct module_list
*modules
;
131 #define STATE_MODULES(sd) ((sd)->base.modules)
133 /* Supported options. */
134 struct option_list
*options
;
135 #define STATE_OPTIONS(sd) ((sd)->base.options)
137 /* Non-zero if -v specified. */
139 #define STATE_VERBOSE_P(sd) ((sd)->base.verbose_p)
141 /* Non cpu-specific trace data. See sim-trace.h. */
142 TRACE_DATA trace_data
;
143 #define STATE_TRACE_DATA(sd) (& (sd)->base.trace_data)
145 /* If non NULL, the BFD architecture specified on the command line */
146 const struct bfd_arch_info
*architecture
;
147 #define STATE_ARCHITECTURE(sd) ((sd)->base.architecture)
149 /* If non NULL, the bfd target specified on the command line */
151 #define STATE_TARGET(sd) ((sd)->base.target)
153 /* In standalone simulator, this is the program's arguments passed
154 on the command line. */
156 #define STATE_PROG_ARGV(sd) ((sd)->base.prog_argv)
158 /* The program's bfd. */
159 struct bfd
*prog_bfd
;
160 #define STATE_PROG_BFD(sd) ((sd)->base.prog_bfd)
162 /* Symbol table for prog_bfd */
163 struct bfd_symbol
**prog_syms
;
164 #define STATE_PROG_SYMS(sd) ((sd)->base.prog_syms)
166 /* Number of prog_syms symbols. */
167 long prog_syms_count
;
168 #define STATE_PROG_SYMS_COUNT(sd) ((sd)->base.prog_syms_count)
170 /* The program's text section. */
171 struct bfd_section
*text_section
;
172 /* Starting and ending text section addresses from the bfd. */
173 bfd_vma text_start
, text_end
;
174 #define STATE_TEXT_SECTION(sd) ((sd)->base.text_section)
175 #define STATE_TEXT_START(sd) ((sd)->base.text_start)
176 #define STATE_TEXT_END(sd) ((sd)->base.text_end)
178 /* Start address, set when the program is loaded from the bfd. */
180 #define STATE_START_ADDR(sd) ((sd)->base.start_addr)
182 /* Size of the simulator's cache, if any.
183 This is not the target's cache. It is the cache the simulator uses
184 to process instructions. */
185 unsigned int scache_size
;
186 #define STATE_SCACHE_SIZE(sd) ((sd)->base.scache_size)
188 /* core memory bus */
189 #define STATE_CORE(sd) (&(sd)->base.core)
192 /* Record of memory sections added via the memory-options interface. */
193 #define STATE_MEMOPT(sd) ((sd)->base.memopt)
197 #define STATE_EVENTS(sd) (&(sd)->base.events)
200 /* generic halt/resume engine */
202 #define STATE_ENGINE(sd) (&(sd)->base.engine)
204 /* generic watchpoint support */
205 sim_watchpoints watchpoints
;
206 #define STATE_WATCHPOINTS(sd) (&(sd)->base.watchpoints)
210 #define STATE_HW(sd) ((sd)->base.hw)
213 /* Should image loads be performed using the LMA or VMA? Older
214 simulators use the VMA while newer simulators prefer the LMA. */
216 #define STATE_LOAD_AT_LMA_P(SD) ((SD)->base.load_at_lma_p)
218 /* Marker for those wanting to do sanity checks.
219 This should remain the last member of this struct to help catch
220 miscompilation errors. */
222 #define SIM_MAGIC_NUMBER 0x4242
223 #define STATE_MAGIC(sd) ((sd)->base.magic)
226 #ifdef SIM_HAVE_COMMON_SIM_STATE
227 /* TODO: Merge sim_state & sim_state_base. */
229 /* All the cpus for this instance. */
230 sim_cpu
*cpu
[MAX_NR_PROCESSORS
];
232 /* All the common state. */
235 /* Pointer for sim target to store arbitrary state data. Normally the
236 target should define a struct and use it here. */
238 #define STATE_ARCH_DATA(sd) ((sd)->arch_data)
241 /* Various cgen runtime state. */
242 CGEN_STATE cgen_state
;
244 #define STATE_CGEN_STATE(sd) ((sd)->cgen_state)
248 /* Functions for allocating/freeing a sim_state. */
249 SIM_DESC
sim_state_alloc_extra (SIM_OPEN_KIND kind
, host_callback
*callback
,
251 #define sim_state_alloc(kind, callback) sim_state_alloc_extra(kind, callback, 0)
253 void sim_state_free (SIM_DESC
);
259 #endif /* SIM_BASE_H */