1 /* This file is part of the program psim.
3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 #include "sim-assert.h"
29 /* "core" module install handler.
31 This is called via sim_module_install to install the "core" subsystem
32 into the simulator. */
34 static MODULE_INIT_FN sim_core_init
;
35 static MODULE_UNINSTALL_FN sim_core_uninstall
;
39 sim_core_install (SIM_DESC sd
)
41 SIM_ASSERT (STATE_MAGIC (sd
) == SIM_MAGIC_NUMBER
);
43 /* establish the other handlers */
44 sim_module_add_uninstall_fn (sd
, sim_core_uninstall
);
45 sim_module_add_init_fn (sd
, sim_core_init
);
47 /* establish any initial data structures - none */
52 /* Uninstall the "core" subsystem from the simulator. */
56 sim_core_uninstall (SIM_DESC sd
)
58 sim_core
*core
= STATE_CORE(sd
);
60 /* blow away any mappings */
61 for (map
= 0; map
< nr_sim_core_maps
; map
++) {
62 sim_core_mapping
*curr
= core
->common
.map
[map
].first
;
63 while (curr
!= NULL
) {
64 sim_core_mapping
*tbd
= curr
;
66 if (tbd
->free_buffer
) {
67 SIM_ASSERT(tbd
->buffer
!= NULL
);
72 core
->common
.map
[map
].first
= NULL
;
79 sim_core_init (SIM_DESC sd
)
87 #ifndef SIM_CORE_SIGNAL
88 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
89 sim_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
93 sim_core_signal (SIM_DESC sd
,
99 transfer_type transfer
,
100 sim_core_signals sig
)
102 const char *copy
= (transfer
== read_transfer
? "read" : "write");
105 case sim_core_unmapped_signal
:
106 sim_engine_abort (sd
, cpu
, cia
, "sim-core: %d byte %s to unmaped address 0x%lx",
107 nr_bytes
, copy
, (unsigned long) addr
);
109 case sim_core_unaligned_signal
:
110 sim_engine_abort (sd
, cpu
, cia
, "sim-core: %d byte misaligned %s to address 0x%lx",
111 nr_bytes
, copy
, (unsigned long) addr
);
114 sim_engine_abort (sd
, cpu
, cia
, "sim_core_signal - internal error - bad switch");
120 STATIC_INLINE_SIM_CORE\
122 sim_core_map_to_str (sim_core_maps map
)
126 case sim_core_read_map
: return "read";
127 case sim_core_write_map
: return "write";
128 case sim_core_execute_map
: return "exec";
129 default: return "(invalid-map)";
136 new_sim_core_mapping (SIM_DESC sd
,
140 address_word nr_bytes
,
146 sim_core_mapping
*new_mapping
= ZALLOC(sim_core_mapping
);
148 new_mapping
->level
= attach
;
149 new_mapping
->space
= space
;
150 new_mapping
->base
= addr
;
151 new_mapping
->nr_bytes
= nr_bytes
;
152 new_mapping
->bound
= addr
+ (nr_bytes
- 1);
154 new_mapping
->mask
= (unsigned) 0 - 1;
156 new_mapping
->mask
= modulo
- 1;
157 if (attach
== attach_raw_memory
)
159 new_mapping
->buffer
= buffer
;
160 new_mapping
->free_buffer
= free_buffer
;
162 else if (attach
>= attach_callback
)
164 new_mapping
->device
= device
;
167 sim_io_error (sd
, "new_sim_core_mapping - internal error - unknown attach type %d\n",
176 sim_core_map_attach (SIM_DESC sd
,
177 sim_core_map
*access_map
,
181 address_word nr_bytes
,
183 device
*client
, /*callback/default*/
184 void *buffer
, /*raw_memory*/
185 int free_buffer
) /*raw_memory*/
187 /* find the insertion point for this additional mapping and then
189 sim_core_mapping
*next_mapping
;
190 sim_core_mapping
**last_mapping
;
192 SIM_ASSERT ((attach
>= attach_callback
)
193 <= (client
!= NULL
&& buffer
== NULL
&& !free_buffer
));
194 SIM_ASSERT ((attach
== attach_raw_memory
)
195 <= (client
== NULL
&& buffer
!= NULL
));
197 /* actually do occasionally get a zero size map */
201 device_error(client
, "called on sim_core_map_attach with size zero");
203 sim_io_error (sd
, "called on sim_core_map_attach with size zero");
207 /* find the insertion point (between last/next) */
208 next_mapping
= access_map
->first
;
209 last_mapping
= &access_map
->first
;
210 while(next_mapping
!= NULL
211 && (next_mapping
->level
< (int) attach
212 || (next_mapping
->level
== (int) attach
213 && next_mapping
->bound
< addr
)))
215 /* provided levels are the same */
216 /* assert: next_mapping->base > all bases before next_mapping */
217 /* assert: next_mapping->bound >= all bounds before next_mapping */
218 last_mapping
= &next_mapping
->next
;
219 next_mapping
= next_mapping
->next
;
222 /* check insertion point correct */
223 SIM_ASSERT (next_mapping
== NULL
|| next_mapping
->level
>= (int) attach
);
224 if (next_mapping
!= NULL
&& next_mapping
->level
== (int) attach
225 && next_mapping
->base
< (addr
+ (nr_bytes
- 1)))
228 device_error (client
, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
232 (long) (addr
+ (nr_bytes
- 1)),
234 (long) next_mapping
->base
,
235 (long) next_mapping
->bound
,
236 (long) next_mapping
->nr_bytes
);
238 sim_io_error (sd
, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
242 (long) (addr
+ (nr_bytes
- 1)),
244 (long) next_mapping
->base
,
245 (long) next_mapping
->bound
,
246 (long) next_mapping
->nr_bytes
);
250 /* create/insert the new mapping */
251 *last_mapping
= new_sim_core_mapping(sd
,
253 space
, addr
, nr_bytes
, modulo
,
254 client
, buffer
, free_buffer
);
255 (*last_mapping
)->next
= next_mapping
;
261 sim_core_attach (SIM_DESC sd
,
267 address_word nr_bytes
,
270 void *optional_buffer
)
272 sim_core
*memory
= STATE_CORE(sd
);
277 /* check for for attempt to use unimplemented per-processor core map */
279 sim_io_error (sd
, "sim_core_map_attach - processor specific memory map not yet supported");
281 if ((access
& access_read_write_exec
) == 0
282 || (access
& ~access_read_write_exec
) != 0)
285 device_error(client
, "invalid access for core attach");
287 sim_io_error (sd
, "invalid access for core attach");
291 /* verify the attach type */
292 if (attach
== attach_raw_memory
)
294 if (WITH_MODULO_MEMORY
&& modulo
!= 0)
296 unsigned mask
= modulo
- 1;
297 if (mask
< 7) /* 8 is minimum modulo */
299 while (mask
> 1) /* no zero bits */
305 device_error (client
, "sim_core_attach - internal error - modulo not power of two");
307 sim_io_error (sd
, "sim_core_attach - internal error - modulo not power of two");
311 else if (WITH_MODULO_MEMORY
&& modulo
!= 0)
314 device_error (client
, "sim_core_attach - internal error - modulo memory disabled");
316 sim_io_error (sd
, "sim_core_attach - internal error - modulo memory disabled");
319 if (optional_buffer
== NULL
)
321 buffer
= zalloc (modulo
== 0 ? nr_bytes
: modulo
);
326 buffer
= optional_buffer
;
330 else if (attach
>= attach_callback
)
338 device_error (client
, "sim_core_attach - internal error - conflicting buffer and attach arguments");
340 sim_io_error (sd
, "sim_core_attach - internal error - conflicting buffer and attach arguments");
346 /* attach the region to all applicable access maps */
348 map
< nr_sim_core_maps
;
353 case sim_core_read_map
:
354 if (access
& access_read
)
355 sim_core_map_attach (sd
, &memory
->common
.map
[map
],
357 space
, addr
, nr_bytes
, modulo
,
358 client
, buffer
, !buffer_freed
);
361 case sim_core_write_map
:
362 if (access
& access_write
)
363 sim_core_map_attach (sd
, &memory
->common
.map
[map
],
365 space
, addr
, nr_bytes
, modulo
,
366 client
, buffer
, !buffer_freed
);
369 case sim_core_execute_map
:
370 if (access
& access_exec
)
371 sim_core_map_attach (sd
, &memory
->common
.map
[map
],
373 space
, addr
, nr_bytes
, modulo
,
374 client
, buffer
, !buffer_freed
);
377 case nr_sim_core_maps
:
378 sim_io_error (sd
, "sim_core_attach - internal error - bad switch");
383 /* Just copy this map to each of the processor specific data structures.
384 FIXME - later this will be replaced by true processor specific
388 for (i
= 0; i
< MAX_NR_PROCESSORS
; i
++)
390 CPU_CORE (STATE_CPU (sd
, i
))->common
= STATE_CORE (sd
)->common
;
396 /* Remove any memory reference related to this address */
397 STATIC_INLINE_SIM_CORE\
399 sim_core_map_detach (SIM_DESC sd
,
400 sim_core_map
*access_map
,
405 sim_core_mapping
**entry
;
406 for (entry
= &access_map
->first
;
408 entry
= &(*entry
)->next
)
410 if ((*entry
)->base
== addr
411 && (*entry
)->level
== attach
412 && (*entry
)->space
== space
)
414 sim_core_mapping
*dead
= (*entry
);
415 (*entry
) = dead
->next
;
416 if (dead
->free_buffer
)
417 zfree (dead
->buffer
);
426 sim_core_detach (SIM_DESC sd
,
432 sim_core
*memory
= STATE_CORE (sd
);
434 for (map
= 0; map
< nr_sim_core_maps
; map
++)
436 sim_core_map_detach (sd
, &memory
->common
.map
[map
],
437 attach
, address_space
, addr
);
439 /* Just copy this update to each of the processor specific data
440 structures. FIXME - later this will be replaced by true
441 processor specific maps. */
444 for (i
= 0; i
< MAX_NR_PROCESSORS
; i
++)
446 CPU_CORE (STATE_CPU (sd
, i
))->common
= STATE_CORE (sd
)->common
;
452 STATIC_INLINE_SIM_CORE\
454 sim_core_find_mapping(sim_core_common
*core
,
458 transfer_type transfer
,
459 int abort
, /*either 0 or 1 - hint to inline/-O */
460 sim_cpu
*cpu
, /* abort => cpu != NULL */
463 sim_core_mapping
*mapping
= core
->map
[map
].first
;
464 ASSERT ((addr
& (nr_bytes
- 1)) == 0); /* must be aligned */
465 ASSERT ((addr
+ (nr_bytes
- 1)) >= addr
); /* must not wrap */
466 ASSERT (!abort
|| cpu
!= NULL
); /* abort needs a non null CPU */
467 while (mapping
!= NULL
)
469 if (addr
>= mapping
->base
470 && (addr
+ (nr_bytes
- 1)) <= mapping
->bound
)
472 mapping
= mapping
->next
;
476 SIM_CORE_SIGNAL (CPU_STATE (cpu
), cpu
, cia
, map
, nr_bytes
, addr
, transfer
,
477 sim_core_unmapped_signal
);
483 STATIC_INLINE_SIM_CORE\
485 sim_core_translate (sim_core_mapping
*mapping
,
488 if (WITH_MODULO_MEMORY
)
489 return (void *)((unsigned8
*) mapping
->buffer
490 + ((addr
- mapping
->base
) & mapping
->mask
));
492 return (void *)((unsigned8
*) mapping
->buffer
493 + addr
- mapping
->base
);
499 sim_core_read_buffer (SIM_DESC sd
,
506 sim_core_common
*core
= (cpu
== NULL
? &STATE_CORE (sd
)->common
: &CPU_CORE (cpu
)->common
);
508 while (count
< len
) {
509 unsigned_word raddr
= addr
+ count
;
510 sim_core_mapping
*mapping
=
511 sim_core_find_mapping(core
, map
,
512 raddr
, /*nr-bytes*/1,
514 0 /*dont-abort*/, NULL
, NULL_CIA
);
518 if (mapping
->device
!= NULL
) {
519 int nr_bytes
= len
- count
;
520 if (raddr
+ nr_bytes
- 1> mapping
->bound
)
521 nr_bytes
= mapping
->bound
- raddr
+ 1;
522 if (device_io_read_buffer(mapping
->device
,
523 (unsigned_1
*)buffer
+ count
,
526 nr_bytes
) != nr_bytes
)
533 ((unsigned_1
*)buffer
)[count
] =
534 *(unsigned_1
*)sim_core_translate(mapping
, raddr
);
544 sim_core_write_buffer (SIM_DESC sd
,
551 sim_core_common
*core
= (cpu
== NULL
? &STATE_CORE (sd
)->common
: &CPU_CORE (cpu
)->common
);
553 while (count
< len
) {
554 unsigned_word raddr
= addr
+ count
;
555 sim_core_mapping
*mapping
=
556 sim_core_find_mapping(core
, map
,
557 raddr
, /*nr-bytes*/1,
559 0 /*dont-abort*/, NULL
, NULL_CIA
);
563 if (WITH_CALLBACK_MEMORY
564 && mapping
->device
!= NULL
) {
565 int nr_bytes
= len
- count
;
566 if (raddr
+ nr_bytes
- 1 > mapping
->bound
)
567 nr_bytes
= mapping
->bound
- raddr
+ 1;
568 if (device_io_write_buffer(mapping
->device
,
569 (unsigned_1
*)buffer
+ count
,
572 nr_bytes
) != nr_bytes
)
579 *(unsigned_1
*)sim_core_translate(mapping
, raddr
) =
580 ((unsigned_1
*)buffer
)[count
];
590 sim_core_set_xor (SIM_DESC sd
,
594 /* set up the XOR map if required. */
595 if (WITH_XOR_ENDIAN
) {
597 sim_core
*core
= STATE_CORE (sd
);
598 sim_cpu_core
*cpu_core
= (cpu
!= NULL
? CPU_CORE (cpu
) : NULL
);
599 if (cpu_core
!= NULL
)
604 mask
= WITH_XOR_ENDIAN
- 1;
607 while (i
- 1 < WITH_XOR_ENDIAN
)
609 cpu_core
->xor[i
-1] = mask
;
610 mask
= (mask
<< 1) & (WITH_XOR_ENDIAN
- 1);
617 core
->byte_xor
= WITH_XOR_ENDIAN
- 1;
625 sim_engine_abort (sd
, cpu
, NULL_CIA
,
626 "Attempted to enable xor-endian mode when permenantly disabled.");
630 STATIC_INLINE_SIM_CORE\
632 reverse_n (unsigned_1
*dest
,
633 const unsigned_1
*src
,
637 for (i
= 0; i
< nr_bytes
; i
++)
639 dest
[nr_bytes
- i
- 1] = src
[i
];
646 sim_core_xor_read_buffer (SIM_DESC sd
,
653 address_word byte_xor
= (cpu
== NULL
? STATE_CORE (sd
)->byte_xor
: CPU_CORE (cpu
)->xor[0]);
654 if (!WITH_XOR_ENDIAN
|| !byte_xor
)
655 return sim_core_read_buffer (sd
, cpu
, map
, buffer
, addr
, nr_bytes
);
657 /* only break up transfers when xor-endian is both selected and enabled */
659 unsigned_1 x
[WITH_XOR_ENDIAN
];
660 unsigned nr_transfered
= 0;
661 address_word start
= addr
;
662 unsigned nr_this_transfer
= (WITH_XOR_ENDIAN
- (addr
& ~(WITH_XOR_ENDIAN
- 1)));
664 /* initial and intermediate transfers are broken when they cross
665 an XOR endian boundary */
666 while (nr_transfered
+ nr_this_transfer
< nr_bytes
)
667 /* initial/intermediate transfers */
669 /* since xor-endian is enabled stop^xor defines the start
670 address of the transfer */
671 stop
= start
+ nr_this_transfer
- 1;
672 SIM_ASSERT (start
<= stop
);
673 SIM_ASSERT ((stop
^ byte_xor
) <= (start
^ byte_xor
));
674 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
676 return nr_transfered
;
677 reverse_n (&((unsigned_1
*)buffer
)[nr_transfered
], x
, nr_this_transfer
);
678 nr_transfered
+= nr_this_transfer
;
679 nr_this_transfer
= WITH_XOR_ENDIAN
;
683 nr_this_transfer
= nr_bytes
- nr_transfered
;
684 stop
= start
+ nr_this_transfer
- 1;
685 SIM_ASSERT (stop
== (addr
+ nr_bytes
- 1));
686 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
688 return nr_transfered
;
689 reverse_n (&((unsigned_1
*)buffer
)[nr_transfered
], x
, nr_this_transfer
);
697 sim_core_xor_write_buffer (SIM_DESC sd
,
704 address_word byte_xor
= (cpu
== NULL
? STATE_CORE (sd
)->byte_xor
: CPU_CORE (cpu
)->xor[0]);
705 if (!WITH_XOR_ENDIAN
|| !byte_xor
)
706 return sim_core_write_buffer (sd
, cpu
, map
, buffer
, addr
, nr_bytes
);
708 /* only break up transfers when xor-endian is both selected and enabled */
710 unsigned_1 x
[WITH_XOR_ENDIAN
];
711 unsigned nr_transfered
= 0;
712 address_word start
= addr
;
713 unsigned nr_this_transfer
= (WITH_XOR_ENDIAN
- (addr
& ~(WITH_XOR_ENDIAN
- 1)));
715 /* initial and intermediate transfers are broken when they cross
716 an XOR endian boundary */
717 while (nr_transfered
+ nr_this_transfer
< nr_bytes
)
718 /* initial/intermediate transfers */
720 /* since xor-endian is enabled stop^xor defines the start
721 address of the transfer */
722 stop
= start
+ nr_this_transfer
- 1;
723 SIM_ASSERT (start
<= stop
);
724 SIM_ASSERT ((stop
^ byte_xor
) <= (start
^ byte_xor
));
725 reverse_n (x
, &((unsigned_1
*)buffer
)[nr_transfered
], nr_this_transfer
);
726 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
728 return nr_transfered
;
729 nr_transfered
+= nr_this_transfer
;
730 nr_this_transfer
= WITH_XOR_ENDIAN
;
734 nr_this_transfer
= nr_bytes
- nr_transfered
;
735 stop
= start
+ nr_this_transfer
- 1;
736 SIM_ASSERT (stop
== (addr
+ nr_bytes
- 1));
737 reverse_n (x
, &((unsigned_1
*)buffer
)[nr_transfered
], nr_this_transfer
);
738 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
740 return nr_transfered
;
747 /* define the read/write 1/2/4/8/word functions */
750 #include "sim-n-core.h"
754 #include "sim-n-core.h"
758 #include "sim-n-core.h"
762 #include "sim-n-core.h"
766 #include "sim-n-core.h"