1 /* This file is part of the program psim.
3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
28 typedef struct _sim_core_mapping sim_core_mapping
;
29 struct _sim_core_mapping
{
42 sim_core_mapping
*next
;
45 typedef struct _sim_core_map sim_core_map
;
46 struct _sim_core_map
{
47 sim_core_mapping
*first
;
57 typedef struct _sim_core sim_core
;
60 sim_core_map map
[nr_sim_core_maps
];
64 /* Install the "core" module. */
67 (SIM_RC
) sim_core_install (SIM_DESC sd
);
70 /* Uninstall the "core" subsystem. */
74 sim_core_uninstall (SIM_DESC sd
);
80 (SIM_RC
) sim_core_init
87 (void) sim_core_set_trace\
93 /* Create a memory space within the core. */
96 (void) sim_core_attach
102 unsigned nr_bytes
, /* host limited */
104 void *optional_buffer
);
108 /* Variable sized read/write
110 Transfer (zero) a variable size block of data between the host and
111 target (possibly byte swapping it). Should any problems occure,
112 the number of bytes actually transfered is returned. */
115 (unsigned) sim_core_read_buffer
123 (unsigned) sim_core_write_buffer
131 /* Fixed sized read/write
133 Transfer a fixed amout of memory between the host and target. The
134 memory always being translated and the operation always aborting
135 should a problem occure */
137 #define DECLARE_SIM_CORE_WRITE_N(N) \
139 (void) sim_core_write_##N \
142 unsigned_word addr, \
145 DECLARE_SIM_CORE_WRITE_N(1)
146 DECLARE_SIM_CORE_WRITE_N(2)
147 DECLARE_SIM_CORE_WRITE_N(4)
148 DECLARE_SIM_CORE_WRITE_N(8)
149 DECLARE_SIM_CORE_WRITE_N(word
)
151 #undef DECLARE_SIM_CORE_WRITE_N
154 #define DECLARE_SIM_CORE_READ_N(N) \
156 (unsigned_##N) sim_core_read_##N \
161 DECLARE_SIM_CORE_READ_N(1)
162 DECLARE_SIM_CORE_READ_N(2)
163 DECLARE_SIM_CORE_READ_N(4)
164 DECLARE_SIM_CORE_READ_N(8)
165 DECLARE_SIM_CORE_READ_N(word
)
167 #undef DECLARE_SIM_CORE_READ_N