* Makefile.in (sim-options_h): Define.
[binutils-gdb.git] / sim / common / sim-core.h
1 /* This file is part of the program psim.
2
3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18
19 */
20
21
22 #ifndef _SIM_CORE_H_
23 #define _SIM_CORE_H_
24
25
26 /* basic types */
27
28 typedef struct _sim_core_mapping sim_core_mapping;
29 struct _sim_core_mapping {
30 /* common */
31 int level;
32 int space;
33 unsigned_word base;
34 unsigned_word bound;
35 unsigned nr_bytes;
36 /* memory map */
37 int free_buffer;
38 void *buffer;
39 /* callback map */
40 device *device;
41 /* growth */
42 sim_core_mapping *next;
43 };
44
45 typedef struct _sim_core_map sim_core_map;
46 struct _sim_core_map {
47 sim_core_mapping *first;
48 };
49
50 typedef enum {
51 sim_core_read_map,
52 sim_core_write_map,
53 sim_core_execute_map,
54 nr_sim_core_maps,
55 } sim_core_maps;
56
57 typedef struct _sim_core sim_core;
58 struct _sim_core {
59 int trace;
60 sim_core_map map[nr_sim_core_maps];
61 };
62
63
64 /* Install the "core" module. */
65
66 EXTERN_SIM_CORE\
67 (SIM_RC) sim_core_install (SIM_DESC sd);
68
69
70 /* Uninstall the "core" subsystem. */
71
72 EXTERN_SIM_CORE\
73 (void)
74 sim_core_uninstall (SIM_DESC sd);
75
76
77 /* initialize */
78
79 EXTERN_SIM_CORE\
80 (SIM_RC) sim_core_init
81 (SIM_DESC sd);
82
83
84 /* tracing */
85
86 INLINE_SIM_CORE\
87 (void) sim_core_set_trace\
88 (SIM_DESC sd,
89 int level);
90
91
92
93 /* Create a memory space within the core. */
94
95 INLINE_SIM_CORE\
96 (void) sim_core_attach
97 (SIM_DESC sd,
98 attach_type attach,
99 access_type access,
100 int address_space,
101 unsigned_word addr,
102 unsigned nr_bytes, /* host limited */
103 device *client,
104 void *optional_buffer);
105
106
107
108 /* Variable sized read/write
109
110 Transfer (zero) a variable size block of data between the host and
111 target (possibly byte swapping it). Should any problems occure,
112 the number of bytes actually transfered is returned. */
113
114 INLINE_SIM_CORE\
115 (unsigned) sim_core_read_buffer
116 (SIM_DESC sd,
117 sim_core_maps map,
118 void *buffer,
119 unsigned_word addr,
120 unsigned nr_bytes);
121
122 INLINE_SIM_CORE\
123 (unsigned) sim_core_write_buffer
124 (SIM_DESC sd,
125 sim_core_maps map,
126 const void *buffer,
127 unsigned_word addr,
128 unsigned nr_bytes);
129
130
131 /* Fixed sized read/write
132
133 Transfer a fixed amout of memory between the host and target. The
134 memory always being translated and the operation always aborting
135 should a problem occure */
136
137 #define DECLARE_SIM_CORE_WRITE_N(N) \
138 INLINE_SIM_CORE\
139 (void) sim_core_write_##N \
140 (SIM_DESC sd, \
141 sim_core_maps map, \
142 unsigned_word addr, \
143 unsigned_##N val);
144
145 DECLARE_SIM_CORE_WRITE_N(1)
146 DECLARE_SIM_CORE_WRITE_N(2)
147 DECLARE_SIM_CORE_WRITE_N(4)
148 DECLARE_SIM_CORE_WRITE_N(8)
149 DECLARE_SIM_CORE_WRITE_N(word)
150
151 #undef DECLARE_SIM_CORE_WRITE_N
152
153
154 #define DECLARE_SIM_CORE_READ_N(N) \
155 INLINE_SIM_CORE\
156 (unsigned_##N) sim_core_read_##N \
157 (SIM_DESC sd, \
158 sim_core_maps map, \
159 unsigned_word addr);
160
161 DECLARE_SIM_CORE_READ_N(1)
162 DECLARE_SIM_CORE_READ_N(2)
163 DECLARE_SIM_CORE_READ_N(4)
164 DECLARE_SIM_CORE_READ_N(8)
165 DECLARE_SIM_CORE_READ_N(word)
166
167 #undef DECLARE_SIM_CORE_READ_N
168
169 #endif