sim/common/sim-n-core.h

   1 /*  This file is part of the program psim.
   2
   3     Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
   4
   5     This program is free software; you can redistribute it and/or modify
   6     it under the terms of the GNU General Public License as published by
   7     the Free Software Foundation; either version 2 of the License, or
   8     (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14
  15     You should have received a copy of the GNU General Public License
  16     along with this program; if not, write to the Free Software
  17     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18
  19     */
  20
  21
  22 #ifndef N
  23 #error "N must be #defined"
  24 #endif
  25
  26 #include "sim-xcat.h"
  27
  28 /* NOTE: see end of file for #undef of these macros */
  29 #define unsigned_N XCONCAT2(unsigned_,N)
  30 #define T2H_N XCONCAT2(T2H_,N)
  31 #define H2T_N XCONCAT2(H2T_,N)
  32
  33 #define sim_core_read_aligned_N XCONCAT2(sim_core_read_aligned_,N)
  34 #define sim_core_write_aligned_N XCONCAT2(sim_core_write_aligned_,N)
  35 #define sim_core_read_unaligned_N XCONCAT2(sim_core_read_unaligned_,N)
  36 #define sim_core_write_unaligned_N XCONCAT2(sim_core_write_unaligned_,N)
  37
  38 /* TAGS: sim_core_read_aligned_1 sim_core_read_aligned_2 */
  39 /* TAGS: sim_core_read_aligned_4 sim_core_read_aligned_8 */
  40 /* TAGS: sim_core_read_aligned_word */
  41
  42 INLINE_SIM_CORE(unsigned_N)
  43 sim_core_read_aligned_N(sim_cpu *cpu,
  44                         sim_cia cia,
  45                         sim_core_maps map,
  46                         address_word xaddr)
  47 {
  48   sim_cpu_core *cpu_core = CPU_CORE (cpu);
  49   sim_core_common *core = &cpu_core->common;
  50   unsigned_N val;
  51   sim_core_mapping *mapping;
  52   address_word addr;
  53 #if WITH_XOR_ENDIAN != 0
  54   if (WITH_XOR_ENDIAN)
  55     addr = xaddr ^ cpu_core->xor[(sizeof(unsigned_N) - 1) % WITH_XOR_ENDIAN];
  56   else
  57 #endif
  58     addr = xaddr;
  59   mapping = sim_core_find_mapping (core, map,
  60                                    addr,
  61                                    sizeof (unsigned_N),
  62                                    read_transfer,
  63                                    1 /*abort*/, cpu, cia);
  64 #if (WITH_DEVICES)
  65   if (WITH_CALLBACK_MEMORY && mapping->device != NULL) {
  66     unsigned_N data;
  67     if (device_io_read_buffer (mapping->device,
  68                                &data,
  69                                mapping->space,
  70                                addr,
  71                                sizeof (unsigned_N)) != sizeof (unsigned_N))
  72       device_error (mapping->device, "internal error - %s - io_read_buffer should not fail",
  73                     XSTRING (sim_core_read_aligned_N));
  74     val = T2H_N (data);
  75   }
  76   else
  77 #endif
  78     val = T2H_N (*(unsigned_N*) sim_core_translate (mapping, addr));
  79   PROFILE_COUNT_CORE (cpu, addr, sizeof (unsigned_N), map);
  80   if (TRACE_P (cpu, TRACE_CORE_IDX))
  81     if (sizeof (unsigned_N) > 4)
  82       trace_printf (CPU_STATE (cpu), cpu,
  83                     "sim-n-core.h:%d: read-%d %s:0x%08lx -> 0x%08lx%08lx\n",
  84                     __LINE__,
  85                     sizeof (unsigned_N),
  86                     sim_core_map_to_str (map),
  87                     (unsigned long) addr,
  88                     (unsigned long) (((unsigned64)(val)) >> 32),
  89                     (unsigned long) val);
  90     else
  91       trace_printf (CPU_STATE (cpu), cpu,
  92                     "sim-n-core.h:%d: read-%d %s:0x%08lx -> 0x%0*lx\n",
  93                     __LINE__,
  94                     sizeof (unsigned_N),
  95                     sim_core_map_to_str (map),
  96                     (unsigned long) addr,
  97                     sizeof (unsigned_N) * 2,
  98                     (unsigned long) val);
  99   return val;
 100 }
 101
 102 /* TAGS: sim_core_read_unaligned_1 sim_core_read_unaligned_2 */
 103 /* TAGS: sim_core_read_unaligned_4 sim_core_read_unaligned_8 */
 104 /* TAGS: sim_core_read_unaligned_word */
 105
 106 INLINE_SIM_CORE(unsigned_N)
 107 sim_core_read_unaligned_N(sim_cpu *cpu,
 108                           sim_cia cia,
 109                           sim_core_maps map,
 110                           address_word addr)
 111 {
 112   int alignment = sizeof (unsigned_N) - 1;
 113   /* if hardwired to forced alignment just do it */
 114   if (WITH_ALIGNMENT == FORCED_ALIGNMENT)
 115     return sim_core_read_aligned_N (cpu, cia, map, addr & ~alignment);
 116   else if ((addr & alignment) == 0)
 117     return sim_core_read_aligned_N (cpu, cia, map, addr);
 118   else
 119     switch (CURRENT_ALIGNMENT)
 120       {
 121       case STRICT_ALIGNMENT:
 122         SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 123                          sizeof (unsigned_N), addr,
 124                          read_transfer, sim_core_unaligned_signal);
 125         return -1;
 126       case NONSTRICT_ALIGNMENT:
 127         {
 128           unsigned_N val;
 129           if (sim_core_xor_read_buffer (CPU_STATE (cpu), cpu, map, &val, addr,
 130                                         sizeof(unsigned_N))
 131               != sizeof(unsigned_N))
 132             SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 133                              sizeof (unsigned_N), addr,
 134                              read_transfer, sim_core_unaligned_signal);
 135           val = T2H_N(val);
 136           PROFILE_COUNT_CORE (cpu, addr, sizeof (unsigned_N), map);
 137           return val;
 138         }
 139       case FORCED_ALIGNMENT:
 140         return sim_core_read_aligned_N (cpu, cia, map, addr & ~alignment);
 141       case MIXED_ALIGNMENT:
 142         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 143                           "internal error - %s - mixed alignment",
 144                           XSTRING (sim_core_read_unaligned_N));
 145         return 0;
 146       default:
 147         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 148                           "internal error - %s - bad switch",
 149                           XSTRING (sim_core_read_unaligned_N));
 150         return 0;
 151       }
 152 }
 153
 154 /* TAGS: sim_core_write_aligned_1 sim_core_write_aligned_2 */
 155 /* TAGS: sim_core_write_aligned_4 sim_core_write_aligned_8 */
 156 /* TAGS: sim_core_write_aligned_word */
 157
 158 INLINE_SIM_CORE(void)
 159 sim_core_write_aligned_N(sim_cpu *cpu,
 160                          sim_cia cia,
 161                          sim_core_maps map,
 162                          address_word xaddr,
 163                          unsigned_N val)
 164 {
 165   sim_cpu_core *cpu_core = CPU_CORE (cpu);
 166   sim_core_common *core = &cpu_core->common;
 167   sim_core_mapping *mapping;
 168   address_word addr;
 169 #if WITH_XOR_ENDIAN != 0
 170   if (WITH_XOR_ENDIAN)
 171     addr = xaddr ^ cpu_core->xor[(sizeof(unsigned_N) - 1) % WITH_XOR_ENDIAN];
 172   else
 173 #endif
 174     addr = xaddr;
 175   mapping = sim_core_find_mapping(core, map,
 176                                   addr,
 177                                   sizeof (unsigned_N),
 178                                   write_transfer,
 179                                   1 /*abort*/, cpu, cia);
 180 #if (WITH_DEVICES)
 181   if (WITH_CALLBACK_MEMORY && mapping->device != NULL) {
 182     unsigned_N data = H2T_N (val);
 183     if (device_io_write_buffer (mapping->device,
 184                                 &data,
 185                                 mapping->space,
 186                                 addr,
 187                                 sizeof (unsigned_N), /* nr_bytes */
 188                                 cpu,
 189                                 cia) != sizeof (unsigned_N))
 190       device_error (mapping->device, "internal error - %s - io_write_buffer should not fail",
 191                     XSTRING (sim_core_write_aligned_N));
 192   }
 193   else
 194 #endif
 195     *(unsigned_N*) sim_core_translate (mapping, addr) = H2T_N (val);
 196   PROFILE_COUNT_CORE (cpu, addr, sizeof (unsigned_N), map);
 197   if (TRACE_P (cpu, TRACE_CORE_IDX))
 198     if (sizeof (unsigned_N) > 4)
 199       trace_printf (CPU_STATE (cpu), cpu,
 200                     "sim-n-core.h:%d: write-%d %s:0x%08lx <- 0x%08lx%08lx\n",
 201                     __LINE__,
 202                     sizeof (unsigned_N),
 203                     sim_core_map_to_str (map),
 204                     (unsigned long) addr,
 205                     (unsigned long) (((unsigned64)(val)) >> 32),
 206                     (unsigned long) val);
 207     else
 208       trace_printf (CPU_STATE (cpu), cpu,
 209                     "sim-n-core.h:%d: write-%d %s:0x%08lx <- 0x%0*lx\n",
 210                     __LINE__,
 211                     sizeof (unsigned_N),
 212                     sim_core_map_to_str (map),
 213                     (unsigned long) addr,
 214                     sizeof (unsigned_N) * 2,
 215                     (unsigned long) val);
 216 }
 217
 218 /* TAGS: sim_core_write_unaligned_1 sim_core_write_unaligned_2 */
 219 /* TAGS: sim_core_write_unaligned_4 sim_core_write_unaligned_8 */
 220 /* TAGS: sim_core_write_unaligned_word */
 221
 222 INLINE_SIM_CORE(void)
 223 sim_core_write_unaligned_N(sim_cpu *cpu,
 224                            sim_cia cia,
 225                            sim_core_maps map,
 226                            address_word addr,
 227                            unsigned_N val)
 228 {
 229   int alignment = sizeof (unsigned_N) - 1;
 230   /* if hardwired to forced alignment just do it */
 231   if (WITH_ALIGNMENT == FORCED_ALIGNMENT)
 232     sim_core_write_aligned_N (cpu, cia, map, addr & ~alignment, val);
 233   else if ((addr & alignment) == 0)
 234     sim_core_write_aligned_N (cpu, cia, map, addr, val);
 235   else
 236     switch (CURRENT_ALIGNMENT)
 237       {
 238       case STRICT_ALIGNMENT:
 239         SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 240                          sizeof (unsigned_N), addr,
 241                          write_transfer, sim_core_unaligned_signal);
 242         break;
 243       case NONSTRICT_ALIGNMENT:
 244         {
 245           unsigned_N val = H2T_N (val);
 246           if (sim_core_xor_write_buffer (CPU_STATE (cpu), cpu, map, &val, addr,
 247                                          sizeof(unsigned_N))
 248               != sizeof(unsigned_N))
 249             SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 250                              sizeof (unsigned_N), addr,
 251                              write_transfer, sim_core_unaligned_signal);
 252           PROFILE_COUNT_CORE (cpu, addr, sizeof (unsigned_N), map);
 253           break;
 254         }
 255       case FORCED_ALIGNMENT:
 256         sim_core_write_aligned_N (cpu, cia, map, addr & ~alignment, val);
 257         break;
 258       case MIXED_ALIGNMENT:
 259         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 260                           "internal error - %s - mixed alignment",
 261                           XSTRING (sim_core_write_unaligned_N));
 262         break;
 263       default:
 264         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 265                           "internal error - %s - bad switch",
 266                           XSTRING (sim_core_write_unaligned_N));
 267         break;
 268       }
 269 }
 270
 271
 272 /* NOTE: see start of file for #define of these macros */
 273 #undef unsigned_N
 274 #undef T2H_N
 275 #undef H2T_N
 276 #undef sim_core_read_aligned_N
 277 #undef sim_core_write_aligned_N
 278 #undef sim_core_read_unaligned_N
 279 #undef sim_core_write_unaligned_N